SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
82.39 | 82.39 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 82.58 | 82.58 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
82.58 | 82.58 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
82.58 | 82.58 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
94.73 | 90.65 | 93.54 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 163 | 139 | 85.28 |
Total Bits | 11012 | 9073 | 82.39 |
Total Bits 0->1 | 5506 | 4551 | 82.66 |
Total Bits 1->0 | 5506 | 4522 | 82.13 |
Ports | 163 | 139 | 85.28 |
Port Bits | 11012 | 9073 | 82.39 |
Port Bits 0->1 | 5506 | 4551 | 82.66 |
Port Bits 1->0 | 5506 | 4522 | 82.13 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T113,T114,T115 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T6,*T61,*T79 | Yes | T6,T61,T79 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T61,T79,T80 | Yes | T61,T79,T80 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T77,T81,T82 | Yes | T77,T81,T82 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T6,*T61,*T116 | Yes | T6,T61,T116 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T60,*T33,*T34 | Yes | T33,T34,T111 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T61,T76,T77 | Yes | T61,T76,T77 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T61,T76,T77 | Yes | T61,T76,T77 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T61,*T76,*T77 | Yes | T61,T76,T77 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T6,*T61,*T79 | Yes | T6,T61,T79 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T61,T79,T80 | Yes | T61,T79,T80 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T61,T76,T77 | Yes | T61,T76,T77 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T34 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T61,T77,T81 | Yes | T61,T77,T81 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T61,T76,T77 | Yes | T61,T76,T77 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T34 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T77,T81,T82 | Yes | T77,T81,T82 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T61,T77,T81 | Yes | T61,T77,T81 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T34 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T61,T76,T77 | Yes | T61,T76,T77 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T117,T118,T119 | Yes | T117,T118,T119 | OUTPUT |
intr_otp_error_o | Yes | Yes | T117,T118,T119 | Yes | T117,T118,T119 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T83,T61,T84 | Yes | T83,T61,T84 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T32,T67,T68 | Yes | T32,T67,T68 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T120,T83,T84 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T83,T84,T85 | Yes | T120,T83,T84 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T107,T121,T83 | Yes | T107,T121,T83 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T107,T83,T84 | Yes | T107,T83,T84 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T107,T83,T84 | Yes | T107,T83,T84 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T83,T61,T122 | Yes | T83,T61,T122 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T83,T84,T62 | Yes | T83,T84,T62 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T83,T61,T84 | Yes | T83,T61,T84 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T32,T67,T68 | Yes | T32,T67,T68 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T107,T121,T83 | Yes | T107,T121,T83 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T83,T61,T122 | Yes | T83,T61,T122 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T83,T84,T62 | Yes | T83,T84,T62 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T65,T107,T123 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[1:0] | No | No | Yes | T124,T125,T126 | INPUT | |
lc_otp_vendor_test_i.ctrl[3:2] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[21:4] | No | No | Yes | T124,T125,T126 | INPUT | |
lc_otp_vendor_test_i.ctrl[22] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[23] | No | No | Yes | T124 | INPUT | |
lc_otp_vendor_test_i.ctrl[24] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[26:25] | No | No | Yes | T126,T125,T124 | INPUT | |
lc_otp_vendor_test_i.ctrl[27] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:28] | No | No | Yes | T126,T125,T124 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[0] | No | No | No | INPUT | ||
lc_otp_program_i.count[12:1] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[13] | No | No | No | INPUT | ||
lc_otp_program_i.count[15:14] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[16] | No | No | No | INPUT | ||
lc_otp_program_i.count[18:17] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.count[19] | No | No | No | INPUT | ||
lc_otp_program_i.count[27:20] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[29:28] | No | No | No | INPUT | ||
lc_otp_program_i.count[34:30] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT |
lc_otp_program_i.count[35] | No | No | No | INPUT | ||
lc_otp_program_i.count[37:36] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[38] | No | No | No | INPUT | ||
lc_otp_program_i.count[45:39] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT |
lc_otp_program_i.count[46] | No | No | No | INPUT | ||
lc_otp_program_i.count[55:47] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[56] | No | No | No | INPUT | ||
lc_otp_program_i.count[60:57] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[61] | No | No | No | INPUT | ||
lc_otp_program_i.count[66:62] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[67] | No | No | No | INPUT | ||
lc_otp_program_i.count[70:68] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[71] | No | No | No | INPUT | ||
lc_otp_program_i.count[90:72] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[91] | No | No | No | INPUT | ||
lc_otp_program_i.count[95:92] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[97:96] | No | No | No | INPUT | ||
lc_otp_program_i.count[112:98] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[113] | No | No | No | INPUT | ||
lc_otp_program_i.count[119:114] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[120] | No | No | No | INPUT | ||
lc_otp_program_i.count[133:121] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[135:134] | No | No | No | INPUT | ||
lc_otp_program_i.count[139:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[140] | No | No | No | INPUT | ||
lc_otp_program_i.count[143:141] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[144] | No | No | No | INPUT | ||
lc_otp_program_i.count[152:145] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[153] | No | No | No | INPUT | ||
lc_otp_program_i.count[159:154] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.count[160] | No | No | No | INPUT | ||
lc_otp_program_i.count[161] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[162] | No | No | No | INPUT | ||
lc_otp_program_i.count[164:163] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[165] | No | No | No | INPUT | ||
lc_otp_program_i.count[187:166] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.count[188] | No | No | No | INPUT | ||
lc_otp_program_i.count[197:189] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[198] | No | No | No | INPUT | ||
lc_otp_program_i.count[210:199] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[211] | No | No | No | INPUT | ||
lc_otp_program_i.count[220:212] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[221] | No | No | No | INPUT | ||
lc_otp_program_i.count[222] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[223] | No | No | No | INPUT | ||
lc_otp_program_i.count[229:224] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.count[230] | No | No | No | INPUT | ||
lc_otp_program_i.count[246:231] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[247] | No | No | No | INPUT | ||
lc_otp_program_i.count[257:248] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[258] | No | No | No | INPUT | ||
lc_otp_program_i.count[260:259] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.count[261] | No | No | No | INPUT | ||
lc_otp_program_i.count[264:262] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.count[265] | No | No | No | INPUT | ||
lc_otp_program_i.count[273:266] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[275:274] | No | No | No | INPUT | ||
lc_otp_program_i.count[293:276] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[294] | No | No | No | INPUT | ||
lc_otp_program_i.count[312:295] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[313] | No | No | No | INPUT | ||
lc_otp_program_i.count[316:314] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[317] | No | No | No | INPUT | ||
lc_otp_program_i.count[325:318] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[326] | No | No | No | INPUT | ||
lc_otp_program_i.count[328:327] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[329] | No | No | No | INPUT | ||
lc_otp_program_i.count[336:330] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[339:337] | No | No | No | INPUT | ||
lc_otp_program_i.count[350:340] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[351] | No | No | No | INPUT | ||
lc_otp_program_i.count[361:352] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.count[362] | No | No | No | INPUT | ||
lc_otp_program_i.count[367:363] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.count[368] | No | No | No | INPUT | ||
lc_otp_program_i.count[369] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.count[370] | No | No | No | INPUT | ||
lc_otp_program_i.count[381:371] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.count[382] | No | No | No | INPUT | ||
lc_otp_program_i.count[383] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.state[0] | No | No | No | INPUT | ||
lc_otp_program_i.state[3:1] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.state[4] | No | No | No | INPUT | ||
lc_otp_program_i.state[19:5] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[20] | No | No | No | INPUT | ||
lc_otp_program_i.state[24:21] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT |
lc_otp_program_i.state[25] | No | No | No | INPUT | ||
lc_otp_program_i.state[34:26] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[35] | No | No | No | INPUT | ||
lc_otp_program_i.state[39:36] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT |
lc_otp_program_i.state[40] | No | No | No | INPUT | ||
lc_otp_program_i.state[43:41] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[44] | No | No | No | INPUT | ||
lc_otp_program_i.state[45] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[46] | No | No | No | INPUT | ||
lc_otp_program_i.state[50:47] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT |
lc_otp_program_i.state[51] | No | No | No | INPUT | ||
lc_otp_program_i.state[54:52] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT |
lc_otp_program_i.state[55] | No | No | No | INPUT | ||
lc_otp_program_i.state[67:56] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT |
lc_otp_program_i.state[68] | No | No | No | INPUT | ||
lc_otp_program_i.state[70:69] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | INPUT |
lc_otp_program_i.state[71] | No | No | No | INPUT | ||
lc_otp_program_i.state[73:72] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[74] | No | No | No | INPUT | ||
lc_otp_program_i.state[83:75] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | INPUT |
lc_otp_program_i.state[84] | No | No | No | INPUT | ||
lc_otp_program_i.state[93:85] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[94] | No | No | No | INPUT | ||
lc_otp_program_i.state[96:95] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[97] | No | No | No | INPUT | ||
lc_otp_program_i.state[101:98] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | INPUT |
lc_otp_program_i.state[102] | No | No | No | INPUT | ||
lc_otp_program_i.state[108:103] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.state[109] | No | No | No | INPUT | ||
lc_otp_program_i.state[125:110] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[126] | No | No | No | INPUT | ||
lc_otp_program_i.state[135:127] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[136] | No | No | No | INPUT | ||
lc_otp_program_i.state[154:137] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[155] | No | No | No | INPUT | ||
lc_otp_program_i.state[159:156] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.state[160] | No | No | No | INPUT | ||
lc_otp_program_i.state[167:161] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[168] | No | No | No | INPUT | ||
lc_otp_program_i.state[201:169] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[202] | No | No | No | INPUT | ||
lc_otp_program_i.state[203] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[204] | No | No | No | INPUT | ||
lc_otp_program_i.state[215:205] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[216] | No | No | No | INPUT | ||
lc_otp_program_i.state[218:217] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[219] | No | No | No | INPUT | ||
lc_otp_program_i.state[226:220] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | INPUT |
lc_otp_program_i.state[227] | No | No | No | INPUT | ||
lc_otp_program_i.state[230:228] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[231] | No | No | No | INPUT | ||
lc_otp_program_i.state[233:232] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.state[234] | No | No | No | INPUT | ||
lc_otp_program_i.state[247:235] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[248] | No | No | No | INPUT | ||
lc_otp_program_i.state[250:249] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.state[251] | No | No | No | INPUT | ||
lc_otp_program_i.state[255:252] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.state[256] | No | No | No | INPUT | ||
lc_otp_program_i.state[257] | Yes | Yes | *T111,*T44,*T4 | Yes | T4,T6,T66 | INPUT |
lc_otp_program_i.state[259:258] | No | No | No | INPUT | ||
lc_otp_program_i.state[267:260] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.state[268] | No | No | No | INPUT | ||
lc_otp_program_i.state[269] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[270] | No | No | No | INPUT | ||
lc_otp_program_i.state[276:271] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[277] | No | No | No | INPUT | ||
lc_otp_program_i.state[278] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT |
lc_otp_program_i.state[279] | No | No | No | INPUT | ||
lc_otp_program_i.state[280] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT |
lc_otp_program_i.state[281] | No | No | No | INPUT | ||
lc_otp_program_i.state[294:282] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[295] | No | No | No | INPUT | ||
lc_otp_program_i.state[301:296] | Yes | Yes | T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.state[303:302] | No | No | No | INPUT | ||
lc_otp_program_i.state[305:304] | Yes | Yes | *T43,*T33,*T111 | Yes | T33,T4,T5 | INPUT |
lc_otp_program_i.state[306] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:307] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT |
lc_otp_program_i.req | Yes | Yes | T4,T6,T66 | Yes | T4,T6,T66 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T4,T6,T66 | Yes | T4,T6,T66 | OUTPUT |
lc_otp_program_o.err | No | No | No | OUTPUT | ||
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T32,T65,T34 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T32,T65,T34 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T32,T67,T68 | Yes | T32,T67,T68 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T4,T6,T66 | Yes | T4,T6,T66 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T1,T59,T60 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T134,T135,T136 | Yes | T33,T34,T137 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T3,T59 | Yes | T34,T67,T68 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T65,T33,T34 | Yes | T2,T43,T86 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T134,T135,T136 | Yes | T33,T34,T137 | OUTPUT |
otp_lc_data_o.count[0] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[12:1] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[13] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[15:14] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[16] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[18:17] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[27:20] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[29:28] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[34:30] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | OUTPUT |
otp_lc_data_o.count[35] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[37:36] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[38] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[45:39] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | OUTPUT |
otp_lc_data_o.count[46] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[55:47] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[56] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[60:57] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[61] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[66:62] | Yes | Yes | T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[67] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[70:68] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[71] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[90:72] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[91] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[95:92] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[97:96] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[112:98] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[119:114] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[120] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[133:121] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[135:134] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[139:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[140] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[143:141] | Yes | Yes | T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[144] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[152:145] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T66,T140 | OUTPUT |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[159:154] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[160] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[161] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[162] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[164:163] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T138,T139 | OUTPUT |
otp_lc_data_o.count[165] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[187:166] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[188] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[197:189] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[198] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[210:199] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[220:212] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T138,T139 | OUTPUT |
otp_lc_data_o.count[221] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[222] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[223] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[229:224] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[230] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[246:231] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[247] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[257:248] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T138,T139 | OUTPUT |
otp_lc_data_o.count[258] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[260:259] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[261] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[264:262] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[265] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[273:266] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[275:274] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[293:276] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[294] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[312:295] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[313] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[316:314] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T138,T139 | OUTPUT |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[325:318] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[326] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[328:327] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[329] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[336:330] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T138,T139 | OUTPUT |
otp_lc_data_o.count[339:337] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350:340] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[361:352] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[362] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[367:363] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[368] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[369] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.count[370] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[381:371] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.count[382] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.state[0] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[3:1] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.state[4] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[19:5] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[20] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[24:21] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | OUTPUT |
otp_lc_data_o.state[25] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[34:26] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[35] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[39:36] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[40] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[43:41] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.state[44] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[45] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[46] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[50:47] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[51] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[54:52] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | OUTPUT |
otp_lc_data_o.state[55] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[67:56] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[70:69] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | OUTPUT |
otp_lc_data_o.state[71] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[73:72] | Yes | Yes | T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[74] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[83:75] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[84] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[93:85] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.state[94] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[96:95] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[97] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[101:98] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | OUTPUT |
otp_lc_data_o.state[102] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[108:103] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.state[109] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[125:110] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.state[126] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[135:127] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.state[136] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[154:137] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[159:156] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.state[160] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[167:161] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[168] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[201:169] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.state[202] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[203] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.state[204] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[215:205] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.state[216] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[218:217] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[219] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[226:220] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | OUTPUT |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[230:228] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[231] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[233:232] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.state[234] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[247:235] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[248] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[250:249] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.state[251] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[255:252] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.state[256] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[257] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[259:258] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[267:260] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.state[268] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[269] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[276:271] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[277] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[278] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.state[279] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[280] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_lc_data_o.state[281] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[294:282] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.state[295] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[301:296] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[303:302] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[305:304] | Yes | Yes | T32,T65,T34 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[306] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:307] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T135 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T32,T67,T68 | Yes | T32,T67,T68 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T134,T135,T136 | Yes | T33,T34,T137 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T2,T3 | Yes | T65,T34,T141 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T134,T135,T136 | Yes | T33,T34,T137 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T2,T3 | Yes | T34,T67,T68 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T43,T44,T45 | Yes | T43,T44,T45 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T142,T143,T144 | Yes | T142,T143,T144 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T145,T146,T147 | Yes | T145,T146,T147 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T43,T44,T45 | Yes | T43,T44,T45 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T142,T143,T144 | Yes | T142,T143,T144 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T145,T146,T147 | Yes | T145,T146,T147 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T43,T44,T113 | Yes | T43,T44,T113 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T43,T44,T113 | Yes | T43,T44,T113 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T32,T33,T67 | Yes | T1,T3,T59 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[1:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[5:2] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[6] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[10:7] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[17:11] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[18] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[20:19] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[21] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[22] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[24:23] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[25] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[27:26] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[28] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[29] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[32:30] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[36:33] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[38:37] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[41:39] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[44:42] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[45] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[46] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[47] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[49:48] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[51:50] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[55:52] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[59:56] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[63:60] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[66:64] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[67] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[69:68] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[71:70] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[72] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[74:73] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[75] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[77:76] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[78] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[79] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[84:81] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[86:85] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[87] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[90:88] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[91] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[93:92] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[97:94] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[99:98] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[102:100] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[104:103] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[108:105] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[111:109] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[112] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[113] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[123:114] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[124] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[125] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[126] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[128:127] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[129] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[130] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[131] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[132] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[134:133] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[136:135] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[137] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[138] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[139] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[140] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[141] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[144:142] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[145] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[147:146] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[149:148] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[151:150] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[152] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[155:153] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[156] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[163:157] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[164] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[167:165] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[168] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[169] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[170] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[174:171] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[175] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[176] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[183:177] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[184] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[185] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[186] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[187] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[188] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[190:189] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[191] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[193:192] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[194] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[195] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[196] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[197] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[198] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[202:199] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[203] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[208:204] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[209] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[212:210] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[214:213] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[215] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[217:216] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[219:218] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[220] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[221] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[223:222] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[225:224] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[230:226] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[231] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[233:232] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[235:234] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[236] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[237] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[239:238] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[243:240] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[245:244] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[246] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[248:247] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[252:249] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[253] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[254] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T34 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[47:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[9:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[10] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[28:11] | Yes | Yes | *T5,*T41,*T42 | Yes | T43,T44,T5 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[29] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[59:30] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[60] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:61] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T7,T8,T9 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T32,T65,T34 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 159 | 139 | 87.42 |
Total Bits | 10986 | 9072 | 82.58 |
Total Bits 0->1 | 5493 | 4550 | 82.83 |
Total Bits 1->0 | 5493 | 4522 | 82.32 |
Ports | 159 | 139 | 87.42 |
Port Bits | 10986 | 9072 | 82.58 |
Port Bits 0->1 | 5493 | 4550 | 82.83 |
Port Bits 1->0 | 5493 | 4522 | 82.32 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T113,T114,T115 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T6,*T61,*T79 | Yes | T6,T61,T79 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T61,T79,T80 | Yes | T61,T79,T80 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T77,T81,T82 | Yes | T77,T81,T82 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T6,*T61,*T116 | Yes | T6,T61,T116 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T60,*T33,*T34 | Yes | T33,T34,T111 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T61,T76,T77 | Yes | T61,T76,T77 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T61,T76,T77 | Yes | T61,T76,T77 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T61,*T76,*T77 | Yes | T61,T76,T77 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T6,*T61,*T79 | Yes | T6,T61,T79 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T61,T79,T80 | Yes | T61,T79,T80 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T61,T76,T77 | Yes | T61,T76,T77 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T34 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T61,T77,T81 | Yes | T61,T77,T81 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T61,T76,T77 | Yes | T61,T76,T77 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T34 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T77,T81,T82 | Yes | T77,T81,T82 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T61,T77,T81 | Yes | T61,T77,T81 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T76,T77,T78 | Yes | T76,T77,T78 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T34 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T61,T76,T77 | Yes | T61,T76,T77 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T117,T118,T119 | Yes | T117,T118,T119 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T117,T118,T119 | Yes | T117,T118,T119 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T83,T61,T84 | Yes | T83,T61,T84 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T32,T67,T68 | Yes | T32,T67,T68 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T120,T83,T84 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T83,T84,T85 | Yes | T120,T83,T84 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T107,T121,T83 | Yes | T107,T121,T83 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T107,T83,T84 | Yes | T107,T83,T84 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T107,T83,T84 | Yes | T107,T83,T84 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T83,T61,T122 | Yes | T83,T61,T122 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T83,T84,T62 | Yes | T83,T84,T62 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T83,T84,T85 | Yes | T83,T84,T85 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T83,T61,T84 | Yes | T83,T61,T84 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T32,T67,T68 | Yes | T32,T67,T68 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T107,T121,T83 | Yes | T107,T121,T83 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T83,T61,T122 | Yes | T83,T61,T122 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T83,T84,T62 | Yes | T83,T84,T62 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T65,T107,T123 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[1:0] | No | No | Yes | T124,T125,T126 | INPUT | ||
lc_otp_vendor_test_i.ctrl[3:2] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[21:4] | No | No | Yes | T124,T125,T126 | INPUT | ||
lc_otp_vendor_test_i.ctrl[22] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[23] | No | No | Yes | T124 | INPUT | ||
lc_otp_vendor_test_i.ctrl[24] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[26:25] | No | No | Yes | T126,T125,T124 | INPUT | ||
lc_otp_vendor_test_i.ctrl[27] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:28] | No | No | Yes | T126,T125,T124 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[0] | No | No | No | INPUT | |||
lc_otp_program_i.count[12:1] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[13] | No | No | No | INPUT | |||
lc_otp_program_i.count[15:14] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[16] | No | No | No | INPUT | |||
lc_otp_program_i.count[18:17] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.count[19] | No | No | No | INPUT | |||
lc_otp_program_i.count[27:20] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[29:28] | No | No | No | INPUT | |||
lc_otp_program_i.count[34:30] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT | |
lc_otp_program_i.count[35] | No | No | No | INPUT | |||
lc_otp_program_i.count[37:36] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[38] | No | No | No | INPUT | |||
lc_otp_program_i.count[45:39] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT | |
lc_otp_program_i.count[46] | No | No | No | INPUT | |||
lc_otp_program_i.count[55:47] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[56] | No | No | No | INPUT | |||
lc_otp_program_i.count[60:57] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[61] | No | No | No | INPUT | |||
lc_otp_program_i.count[66:62] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[67] | No | No | No | INPUT | |||
lc_otp_program_i.count[70:68] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[71] | No | No | No | INPUT | |||
lc_otp_program_i.count[90:72] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[91] | No | No | No | INPUT | |||
lc_otp_program_i.count[95:92] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[97:96] | No | No | No | INPUT | |||
lc_otp_program_i.count[112:98] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[113] | No | No | No | INPUT | |||
lc_otp_program_i.count[119:114] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[120] | No | No | No | INPUT | |||
lc_otp_program_i.count[133:121] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[135:134] | No | No | No | INPUT | |||
lc_otp_program_i.count[139:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[140] | No | No | No | INPUT | |||
lc_otp_program_i.count[143:141] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[144] | No | No | No | INPUT | |||
lc_otp_program_i.count[152:145] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[153] | No | No | No | INPUT | |||
lc_otp_program_i.count[159:154] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.count[160] | No | No | No | INPUT | |||
lc_otp_program_i.count[161] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[162] | No | No | No | INPUT | |||
lc_otp_program_i.count[164:163] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[165] | No | No | No | INPUT | |||
lc_otp_program_i.count[187:166] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.count[188] | No | No | No | INPUT | |||
lc_otp_program_i.count[197:189] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[198] | No | No | No | INPUT | |||
lc_otp_program_i.count[210:199] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[211] | No | No | No | INPUT | |||
lc_otp_program_i.count[220:212] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[221] | No | No | No | INPUT | |||
lc_otp_program_i.count[222] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[223] | No | No | No | INPUT | |||
lc_otp_program_i.count[229:224] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.count[230] | No | No | No | INPUT | |||
lc_otp_program_i.count[246:231] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[247] | No | No | No | INPUT | |||
lc_otp_program_i.count[257:248] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[258] | No | No | No | INPUT | |||
lc_otp_program_i.count[260:259] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.count[261] | No | No | No | INPUT | |||
lc_otp_program_i.count[264:262] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.count[265] | No | No | No | INPUT | |||
lc_otp_program_i.count[273:266] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[275:274] | No | No | No | INPUT | |||
lc_otp_program_i.count[293:276] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[294] | No | No | No | INPUT | |||
lc_otp_program_i.count[312:295] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[313] | No | No | No | INPUT | |||
lc_otp_program_i.count[316:314] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[317] | No | No | No | INPUT | |||
lc_otp_program_i.count[325:318] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[326] | No | No | No | INPUT | |||
lc_otp_program_i.count[328:327] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[329] | No | No | No | INPUT | |||
lc_otp_program_i.count[336:330] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[339:337] | No | No | No | INPUT | |||
lc_otp_program_i.count[350:340] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[351] | No | No | No | INPUT | |||
lc_otp_program_i.count[361:352] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.count[362] | No | No | No | INPUT | |||
lc_otp_program_i.count[367:363] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.count[368] | No | No | No | INPUT | |||
lc_otp_program_i.count[369] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.count[370] | No | No | No | INPUT | |||
lc_otp_program_i.count[381:371] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.count[382] | No | No | No | INPUT | |||
lc_otp_program_i.count[383] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.state[0] | No | No | No | INPUT | |||
lc_otp_program_i.state[3:1] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.state[4] | No | No | No | INPUT | |||
lc_otp_program_i.state[19:5] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[20] | No | No | No | INPUT | |||
lc_otp_program_i.state[24:21] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT | |
lc_otp_program_i.state[25] | No | No | No | INPUT | |||
lc_otp_program_i.state[34:26] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[35] | No | No | No | INPUT | |||
lc_otp_program_i.state[39:36] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT | |
lc_otp_program_i.state[40] | No | No | No | INPUT | |||
lc_otp_program_i.state[43:41] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[44] | No | No | No | INPUT | |||
lc_otp_program_i.state[45] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[46] | No | No | No | INPUT | |||
lc_otp_program_i.state[50:47] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT | |
lc_otp_program_i.state[51] | No | No | No | INPUT | |||
lc_otp_program_i.state[54:52] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT | |
lc_otp_program_i.state[55] | No | No | No | INPUT | |||
lc_otp_program_i.state[67:56] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | INPUT | |
lc_otp_program_i.state[68] | No | No | No | INPUT | |||
lc_otp_program_i.state[70:69] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | INPUT | |
lc_otp_program_i.state[71] | No | No | No | INPUT | |||
lc_otp_program_i.state[73:72] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[74] | No | No | No | INPUT | |||
lc_otp_program_i.state[83:75] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | INPUT | |
lc_otp_program_i.state[84] | No | No | No | INPUT | |||
lc_otp_program_i.state[93:85] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[94] | No | No | No | INPUT | |||
lc_otp_program_i.state[96:95] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[97] | No | No | No | INPUT | |||
lc_otp_program_i.state[101:98] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | INPUT | |
lc_otp_program_i.state[102] | No | No | No | INPUT | |||
lc_otp_program_i.state[108:103] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.state[109] | No | No | No | INPUT | |||
lc_otp_program_i.state[125:110] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[126] | No | No | No | INPUT | |||
lc_otp_program_i.state[135:127] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[136] | No | No | No | INPUT | |||
lc_otp_program_i.state[154:137] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[155] | No | No | No | INPUT | |||
lc_otp_program_i.state[159:156] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.state[160] | No | No | No | INPUT | |||
lc_otp_program_i.state[167:161] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[168] | No | No | No | INPUT | |||
lc_otp_program_i.state[201:169] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[202] | No | No | No | INPUT | |||
lc_otp_program_i.state[203] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[204] | No | No | No | INPUT | |||
lc_otp_program_i.state[215:205] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[216] | No | No | No | INPUT | |||
lc_otp_program_i.state[218:217] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[219] | No | No | No | INPUT | |||
lc_otp_program_i.state[226:220] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | INPUT | |
lc_otp_program_i.state[227] | No | No | No | INPUT | |||
lc_otp_program_i.state[230:228] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[231] | No | No | No | INPUT | |||
lc_otp_program_i.state[233:232] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.state[234] | No | No | No | INPUT | |||
lc_otp_program_i.state[247:235] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[248] | No | No | No | INPUT | |||
lc_otp_program_i.state[250:249] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.state[251] | No | No | No | INPUT | |||
lc_otp_program_i.state[255:252] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.state[256] | No | No | No | INPUT | |||
lc_otp_program_i.state[257] | Yes | Yes | *T111,*T44,*T4 | Yes | T4,T6,T66 | INPUT | |
lc_otp_program_i.state[259:258] | No | No | No | INPUT | |||
lc_otp_program_i.state[267:260] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.state[268] | No | No | No | INPUT | |||
lc_otp_program_i.state[269] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[270] | No | No | No | INPUT | |||
lc_otp_program_i.state[276:271] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[277] | No | No | No | INPUT | |||
lc_otp_program_i.state[278] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | INPUT | |
lc_otp_program_i.state[279] | No | No | No | INPUT | |||
lc_otp_program_i.state[280] | Yes | Yes | *T129,*T130,*T131 | Yes | T129,T130,T131 | INPUT | |
lc_otp_program_i.state[281] | No | No | No | INPUT | |||
lc_otp_program_i.state[294:282] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[295] | No | No | No | INPUT | |||
lc_otp_program_i.state[301:296] | Yes | Yes | T6,*T127,*T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.state[303:302] | No | No | No | INPUT | |||
lc_otp_program_i.state[305:304] | Yes | Yes | *T43,*T33,*T111 | Yes | T33,T4,T5 | INPUT | |
lc_otp_program_i.state[306] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:307] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T128 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T4,T6,T66 | Yes | T4,T6,T66 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T4,T6,T66 | Yes | T4,T6,T66 | OUTPUT | |
lc_otp_program_o.err | No | No | No | OUTPUT | |||
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T32,T65,T34 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T32,T65,T34 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T32,T67,T68 | Yes | T32,T67,T68 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T4,T6,T66 | Yes | T4,T6,T66 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T1,T59,T60 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T134,T135,T136 | Yes | T33,T34,T137 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T1,T3,T59 | Yes | T34,T67,T68 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T65,T33,T34 | Yes | T2,T43,T86 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T134,T135,T136 | Yes | T33,T34,T137 | OUTPUT | |
otp_lc_data_o.count[0] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[12:1] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[13] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[15:14] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[16] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[18:17] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[27:20] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[29:28] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[34:30] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | OUTPUT | |
otp_lc_data_o.count[35] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[37:36] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[38] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[45:39] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | OUTPUT | |
otp_lc_data_o.count[46] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[55:47] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[56] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[60:57] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[61] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[66:62] | Yes | Yes | T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[67] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[70:68] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[71] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[90:72] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[91] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[95:92] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[97:96] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[112:98] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[119:114] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[120] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[133:121] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[135:134] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[139:136] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[140] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[143:141] | Yes | Yes | T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[144] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[152:145] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T66,T140 | OUTPUT | |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[159:154] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[160] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[161] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[162] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[164:163] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T138,T139 | OUTPUT | |
otp_lc_data_o.count[165] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[187:166] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[188] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[197:189] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[198] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[210:199] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[220:212] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T138,T139 | OUTPUT | |
otp_lc_data_o.count[221] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[222] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[223] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[229:224] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[230] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[246:231] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[247] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[257:248] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T138,T139 | OUTPUT | |
otp_lc_data_o.count[258] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[260:259] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[261] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[264:262] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[265] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[273:266] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[275:274] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[293:276] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[294] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[312:295] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[313] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[316:314] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T138,T139 | OUTPUT | |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[325:318] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[326] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[328:327] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[329] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[336:330] | Yes | Yes | *T4,*T138,*T139 | Yes | T4,T138,T139 | OUTPUT | |
otp_lc_data_o.count[339:337] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350:340] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[361:352] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[362] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[367:363] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[368] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[369] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.count[370] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[381:371] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.count[382] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.state[0] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[3:1] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.state[4] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[19:5] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[20] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[24:21] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | OUTPUT | |
otp_lc_data_o.state[25] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[34:26] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[35] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[39:36] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[40] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[43:41] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.state[44] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[45] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[46] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[50:47] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[51] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[54:52] | Yes | Yes | *T111,*T132,*T72 | Yes | T6,T127,T133 | OUTPUT | |
otp_lc_data_o.state[55] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[67:56] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[70:69] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | OUTPUT | |
otp_lc_data_o.state[71] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[73:72] | Yes | Yes | T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[74] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[83:75] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[84] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[93:85] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.state[94] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[96:95] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[97] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[101:98] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | OUTPUT | |
otp_lc_data_o.state[102] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[108:103] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.state[109] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[125:110] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.state[126] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[135:127] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.state[136] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[154:137] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[155] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[159:156] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.state[160] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[167:161] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[168] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[201:169] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.state[202] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[203] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.state[204] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[215:205] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.state[216] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[218:217] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[219] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[226:220] | Yes | Yes | *T111,*T4,*T132 | Yes | T4,T6,T66 | OUTPUT | |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[230:228] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[231] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[233:232] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.state[234] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[247:235] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[248] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[250:249] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.state[251] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[255:252] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.state[256] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[257] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[259:258] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[267:260] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.state[268] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[269] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[276:271] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[277] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[278] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.state[279] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[280] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_lc_data_o.state[281] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[294:282] | Yes | Yes | *T6,*T127,*T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.state[295] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[301:296] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[303:302] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[305:304] | Yes | Yes | T32,T65,T34 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[306] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:307] | Yes | Yes | T6,T127,T128 | Yes | T6,T127,T135 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T32,T67,T68 | Yes | T32,T67,T68 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T134,T135,T136 | Yes | T33,T34,T137 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T2,T3 | Yes | T65,T34,T141 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T134,T135,T136 | Yes | T33,T34,T137 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T2,T3 | Yes | T34,T67,T68 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T43,T44,T45 | Yes | T43,T44,T45 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T142,T143,T144 | Yes | T142,T143,T144 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T145,T146,T147 | Yes | T145,T146,T147 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T43,T44,T45 | Yes | T43,T44,T45 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T142,T143,T144 | Yes | T142,T143,T144 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T145,T146,T147 | Yes | T145,T146,T147 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T43,T44,T113 | Yes | T43,T44,T113 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T32,T43,T86 | Yes | T3,T59,T32 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T59,T32 | Yes | T59,T32,T43 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T43,T44,T113 | Yes | T43,T44,T113 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T32,T33,T67 | Yes | T1,T3,T59 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[1:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[5:2] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[6] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[10:7] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[17:11] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[18] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[20:19] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[21] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[22] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[24:23] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[25] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[27:26] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[28] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[29] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[32:30] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[36:33] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[38:37] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[41:39] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[44:42] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[45] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[46] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[47] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[49:48] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[51:50] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[55:52] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[59:56] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[63:60] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[66:64] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[67] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[69:68] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[71:70] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[72] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[74:73] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[75] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[77:76] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[78] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[79] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[84:81] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[86:85] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[87] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[90:88] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[91] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[93:92] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[97:94] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[99:98] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[102:100] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[104:103] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[108:105] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[111:109] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[112] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[113] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[123:114] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[124] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[125] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[126] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[128:127] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[129] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[130] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[131] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[132] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[134:133] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[136:135] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[137] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[138] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[139] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[140] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[141] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[144:142] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[145] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[147:146] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[149:148] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[151:150] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[152] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[155:153] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[156] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[163:157] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[164] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[167:165] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[168] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[169] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[170] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[174:171] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[175] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[176] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[183:177] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[184] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[185] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[186] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[187] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[188] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[190:189] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[191] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[193:192] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[194] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[195] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[196] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[197] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[198] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[202:199] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[203] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[208:204] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[209] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[212:210] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[214:213] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[215] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[217:216] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[219:218] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[220] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[221] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[223:222] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[225:224] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[230:226] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[231] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[233:232] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[235:234] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[236] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[237] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[239:238] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[243:240] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[245:244] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[246] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[248:247] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[252:249] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[253] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[254] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[255] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T34 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[47:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[9:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T32,T65,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[10] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[28:11] | Yes | Yes | *T5,*T41,*T42 | Yes | T43,T44,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[29] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[59:30] | Yes | Yes | *T32,*T65,*T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[60] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:61] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T32,T65,T33 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T32,T65,T34 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |