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LINE 58
EXPRESSION (reg_we && ((!addrmiss)))
---1-- ------2------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Covered | T1,T2,T3 |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 70
EXPRESSION (intg_err || reg_we_err)
----1--- -----2----
| -1- | -2- | Status | Tests |
|---|
| 0 | 0 | Covered | T1,T2,T3 |
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
LINE 77
EXPRESSION (err_q | intg_err | reg_we_err)
--1-- ----2--- -----3----
| -1- | -2- | -3- | Status | Tests |
|---|
| 0 | 0 | 0 | Covered | T1,T2,T3 |
| 0 | 0 | 1 | Not Covered | |
| 0 | 1 | 0 | Not Covered | |
| 1 | 0 | 0 | Not Covered | |
LINE 119
EXPRESSION (addrmiss | wr_err | intg_err)
----1--- ---2-- ----3---
| -1- | -2- | -3- | Status | Tests |
|---|
| 0 | 0 | 0 | Covered | T1,T2,T3 |
| 0 | 0 | 1 | Not Covered | |
| 0 | 1 | 0 | Not Covered | |
| 1 | 0 | 0 | Not Covered | |
LINE 16296
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO0_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16297
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO1_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16298
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO2_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16299
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO3_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16300
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO4_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16301
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO5_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16302
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO6_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16303
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO7_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16304
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO8_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16305
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO9_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16306
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO10_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16307
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO11_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16308
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO12_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16309
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO13_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16310
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO14_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16311
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO15_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16312
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO16_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16313
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO17_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16314
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO18_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16315
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO19_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16316
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO20_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16317
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO21_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16318
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO22_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16319
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO23_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16320
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO24_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16321
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO25_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16322
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO26_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16323
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO27_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16324
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO28_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16325
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO29_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16326
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO30_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16327
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO31_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16328
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO32_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16329
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO33_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16330
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO34_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16331
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO35_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16332
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO36_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16333
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO37_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16334
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO38_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16335
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO39_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16336
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO40_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16337
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO41_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16338
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO42_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16339
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO43_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16340
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO44_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16341
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO45_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16342
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO46_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16343
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO47_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16344
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO48_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16345
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO49_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16346
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO50_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16347
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO51_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16348
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO52_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16349
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO53_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16350
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO54_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16351
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO55_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16352
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO56_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16353
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO57_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16354
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO58_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16355
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO59_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16356
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO60_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16357
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO61_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16358
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO62_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16359
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO63_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16360
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO64_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16361
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO65_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16362
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO66_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16363
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO67_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16364
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO68_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16365
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO69_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16366
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO70_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16367
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO71_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16368
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO72_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16369
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO73_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16370
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO74_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16371
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO75_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16372
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO76_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16373
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO77_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16374
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO78_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16375
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO79_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16376
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO80_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16377
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO81_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16378
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO82_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16379
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO83_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16380
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO84_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16381
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO85_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16382
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO86_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16383
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO87_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16384
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO88_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16385
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO89_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16386
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO90_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16387
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO91_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16388
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO92_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16389
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO93_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16390
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO94_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16391
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO95_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16392
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO96_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16393
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO97_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16394
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO98_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16395
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO99_OFFSET)
--------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16396
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO100_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16397
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO101_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16398
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO102_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16399
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO103_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16400
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO104_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16401
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO105_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16402
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO106_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16403
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO107_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16404
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO108_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16405
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO109_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16406
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO110_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16407
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO111_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16408
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO112_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16409
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO113_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16410
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO114_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16411
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO115_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16412
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO116_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16413
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO117_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16414
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO118_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16415
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO119_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16416
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO120_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16417
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO121_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16418
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO122_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16419
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO123_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16420
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO124_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16421
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO125_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16422
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO126_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16423
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO127_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16424
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO128_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16425
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO129_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16426
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO130_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16427
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO131_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16428
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO132_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16429
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO133_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16430
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO134_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16431
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO135_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16432
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO136_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16433
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO137_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16434
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO138_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16435
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO139_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16436
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO140_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16437
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO141_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16438
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO142_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16439
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO143_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16440
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO144_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16441
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO145_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16442
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO146_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16443
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO147_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16444
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO148_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16445
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO149_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16446
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO150_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16447
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO151_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16448
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO152_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16449
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO153_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16450
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO154_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16451
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO155_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16452
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO156_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16453
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO157_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16454
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO158_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16455
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO159_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16456
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO160_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16457
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO161_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16458
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO162_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16459
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO163_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16460
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO164_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16461
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO165_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16462
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO166_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16463
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO167_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16464
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO168_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16465
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO169_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16466
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO170_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16467
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO171_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16468
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO172_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16469
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO173_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16470
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO174_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16471
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO175_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16472
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO176_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16473
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO177_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16474
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO178_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16475
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO179_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16476
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO180_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16477
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_PRIO181_OFFSET)
--------------------------1--------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16478
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IP_0_OFFSET)
-------------------------1------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16479
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IP_1_OFFSET)
-------------------------1------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16480
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IP_2_OFFSET)
-------------------------1------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16481
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IP_3_OFFSET)
-------------------------1------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16482
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IP_4_OFFSET)
-------------------------1------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16483
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IP_5_OFFSET)
-------------------------1------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16484
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IE0_0_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16485
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IE0_1_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16486
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IE0_2_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16487
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IE0_3_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16488
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IE0_4_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16489
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_IE0_5_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16490
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_THRESHOLD0_OFFSET)
----------------------------1---------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16491
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_CC0_OFFSET)
------------------------1------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16492
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_MSIP0_OFFSET)
-------------------------1-------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16493
EXPRESSION (reg_addr == rv_plic_reg_pkg::RV_PLIC_ALERT_TEST_OFFSET)
----------------------------1---------------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Not Covered | |
LINE 16496
EXPRESSION ((reg_re || reg_we) ? ((~|addr_hit)) : 1'b0)
---------1--------
| -1- | Status | Tests |
|---|
| 0 | Covered | T1,T2,T3 |
| 1 | Not Covered | |
LINE 16496
SUB-EXPRESSION (reg_re || reg_we)
---1-- ---2--
| -1- | -2- | Status | Tests |
|---|
| 0 | 0 | Covered | T1,T2,T3 |
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
LINE 16500
EXPRESSION
Number Term
1 reg_we &
2 ((addr_hit[0] & ((|(4'b1 & (~reg_be))))) | (addr_hit[1] & ((|(4'b1 & (~reg_be))))) | (addr_hit[2] & ((|(4'b1 & (~reg_be))))) | (addr_hit[3] & ((|(4'b1 & (~reg_be))))) | (addr_hit[4] & ((|(4'b1 & (~reg_be))))) | (addr_hit[5] & ((|(4'b1 & (~reg_be))))) | (addr_hit[6] & ((|(4'b1 & (~reg_be))))) | (addr_hit[7] & ((|(4'b1 & (~reg_be))))) | (addr_hit[8] & ((|(4'b1 & (~reg_be))))) | (addr_hit[9] & ((|(4'b1 & (~reg_be))))) | (addr_hit[10] & ((|(4'b1 & (~reg_be))))) | (addr_hit[11] & ((|(4'b1 & (~reg_be))))) | (addr_hit[12] & ((|(4'b1 & (~reg_be))))) | (addr_hit[13] & ((|(4'b1 & (~reg_be))))) | (addr_hit[14] & ((|(4'b1 & (~reg_be))))) | (addr_hit[15] & ((|(4'b1 & (~reg_be))))) | (addr_hit[16] & ((|(4'b1 & (~reg_be))))) | (addr_hit[17] & ((|(4'b1 & (~reg_be))))) | (addr_hit[18] & ((|(4'b1 & (~reg_be))))) | (addr_hit[19] & ((|(4'b1 & (~reg_be))))) | (addr_hit[20] & ((|(4'b1 & (~reg_be))))) | (addr_hit[21] & ((|(4'b1 & (~reg_be))))) | (addr_hit[22] & ((|(4'b1 & (~reg_be))))) | (addr_hit[23] & ((|(4'b1 & (~reg_be))))) | (addr_hit[24] & ((|(4'b1 & (~reg_be))))) | (addr_hit[25] & ((|(4'b1 & (~reg_be))))) | (addr_hit[26] & ((|(4'b1 & (~reg_be))))) | (addr_hit[27] & ((|(4'b1 & (~reg_be))))) | (addr_hit[28] & ((|(4'b1 & (~reg_be))))) | (addr_hit[29] & ((|(4'b1 & (~reg_be))))) | (addr_hit[30] & ((|(4'b1 & (~reg_be))))) | (addr_hit[31] & ((|(4'b1 & (~reg_be))))) | (addr_hit[32] & ((|(4'b1 & (~reg_be))))) | (addr_hit[33] & ((|(4'b1 & (~reg_be))))) | (addr_hit[34] & ((|(4'b1 & (~reg_be))))) | (addr_hit[35] & ((|(4'b1 & (~reg_be))))) | (addr_hit[36] & ((|(4'b1 & (~reg_be))))) | (addr_hit[37] & ((|(4'b1 & (~reg_be))))) | (addr_hit[38] & ((|(4'b1 & (~reg_be))))) | (addr_hit[39] & ((|(4'b1 & (~reg_be))))) | (addr_hit[40] & ((|(4'b1 & (~reg_be))))) | (addr_hit[41] & ((|(4'b1 & (~reg_be))))) | (addr_hit[42] & ((|(4'b1 & (~reg_be))))) | (addr_hit[43] & ((|(4'b1 & (~reg_be))))) | (addr_hit[44] & ((|(4'b1 & (~reg_be))))) | (addr_hit[45] & ((|(4'b1 & (~reg_be))))) | (addr_hit[46] & ((|(4'b1 & (~reg_be))))) | (addr_hit[47] & ((|(4'b1 & (~reg_be))))) | (addr_hit[48] & ((|(4'b1 & (~reg_be))))) | (addr_hit[49] & ((|(4'b1 & (~reg_be))))) | (addr_hit[50] & ((|(4'b1 & (~reg_be))))) | (addr_hit[51] & ((|(4'b1 & (~reg_be))))) | (addr_hit[52] & ((|(4'b1 & (~reg_be))))) | (addr_hit[53] & ((|(4'b1 & (~reg_be))))) | (addr_hit[54] & ((|(4'b1 & (~reg_be))))) | (addr_hit[55] & ((|(4'b1 & (~reg_be))))) | (addr_hit[56] & ((|(4'b1 & (~reg_be))))) | (addr_hit[57] & ((|(4'b1 & (~reg_be))))) | (addr_hit[58] & ((|(4'b1 & (~reg_be))))) | (addr_hit[59] & ((|(4'b1 & (~reg_be))))) | (addr_hit[60] & ((|(4'b1 & (~reg_be))))) | (addr_hit[61] & ((|(4'b1 & (~reg_be))))) | (addr_hit[62] & ((|(4'b1 & (~reg_be))))) | (addr_hit[63] & ((|(4'b1 & (~reg_be))))) | (addr_hit[64] & ((|(4'b1 & (~reg_be))))) | (addr_hit[65] & ((|(4'b1 & (~reg_be))))) | (addr_hit[66] & ((|(4'b1 & (~reg_be))))) | (addr_hit[67] & ((|(4'b1 & (~reg_be))))) | (addr_hit[68] & ((|(4'b1 & (~reg_be))))) | (addr_hit[69] & ((|(4'b1 & (~reg_be))))) | (addr_hit[70] & ((|(4'b1 & (~reg_be))))) | (addr_hit[71] & ((|(4'b1 & (~reg_be))))) | (addr_hit[72] & ((|(4'b1 & (~reg_be))))) | (addr_hit[73] & ((|(4'b1 & (~reg_be))))) | (addr_hit[74] & ((|(4'b1 & (~reg_be))))) | (addr_hit[75] & ((|(4'b1 & (~reg_be))))) | (addr_hit[76] & ((|(4'b1 & (~reg_be))))) | (addr_hit[77] & ((|(4'b1 & (~reg_be))))) | (addr_hit[78] & ((|(4'b1 & (~reg_be))))) | (addr_hit[79] & ((|(4'b1 & (~reg_be))))) | (addr_hit[80] & ((|(4'b1 & (~reg_be))))) | (addr_hit[81] & ((|(4'b1 & (~reg_be))))) | (addr_hit[82] & ((|(4'b1 & (~reg_be))))) | (addr_hit[83] & ((|(4'b1 & (~reg_be))))) | (addr_hit[84] & ((|(4'b1 & (~reg_be))))) | (addr_hit[85] & ((|(4'b1 & (~reg_be))))) | (addr_hit[86] & ((|(4'b1 & (~reg_be))))) | (addr_hit[87] & ((|(4'b1 & (~reg_be))))) | (addr_hit[88] & ((|(4'b1 & (~reg_be))))) | (addr_hit[89] & ((|(4'b1 & (~reg_be))))) | (addr_hit[90] & ((|(4'b1 & (~reg_be))))) | (addr_hit[91] & ((|(4'b1 & (~reg_be))))) | (addr_hit[92] & ((|(4'b1 & (~reg_be))))) | (addr_hit[93] & ((|(4'b1 & (~reg_be))))) | (addr_hit[94] & ((|(4'b1 & (~reg_be))))) | (addr_hit[95] & ((|(4'b1 & (~reg_be))))) | (addr_hit[96] & ((|(4'b1 & (~reg_be))))) | (addr_hit[97] & ((|(4'b1 & (~reg_be))))) | (addr_hit[98] & ((|(4'b1 & (~reg_be))))) | (addr_hit[99] & ((|(4'b1 & (~reg_be))))) | (addr_hit[100] & ((|(4'b1 & (~reg_be))))) | (addr_hit[101] & ((|(4'b1 & (~reg_be))))) | (addr_hit[102] & ((|(4'b1 & (~reg_be))))) | (addr_hit[103] & ((|(4'b1 & (~reg_be))))) | (addr_hit[104] & ((|(4'b1 & (~reg_be))))) | (addr_hit[105] & ((|(4'b1 & (~reg_be))))) | (addr_hit[106] & ((|(4'b1 & (~reg_be))))) | (addr_hit[107] & ((|(4'b1 & (~reg_be))))) | (addr_hit[108] & ((|(4'b1 & (~reg_be))))) | (addr_hit[109] & ((|(4'b1 & (~reg_be))))) | (addr_hit[110] & ((|(4'b1 & (~reg_be))))) | (addr_hit[111] & ((|(4'b1 & (~reg_be))))) | (addr_hit[112] & ((|(4'b1 & (~reg_be))))) | (addr_hit[113] & ((|(4'b1 & (~reg_be))))) | (addr_hit[114] & ((|(4'b1 & (~reg_be))))) | (addr_hit[115] & ((|(4'b1 & (~reg_be))))) | (addr_hit[116] & ((|(4'b1 & (~reg_be))))) | (addr_hit[117] & ((|(4'b1 & (~reg_be))))) | (addr_hit[118] & ((|(4'b1 & (~reg_be))))) | (addr_hit[119] & ((|(4'b1 & (~reg_be))))) | (addr_hit[120] & ((|(4'b1 & (~reg_be))))) | (addr_hit[121] & ((|(4'b1 & (~reg_be))))) | (addr_hit[122] & ((|(4'b1 & (~reg_be))))) | (addr_hit[123] & ((|(4'b1 & (~reg_be))))) | (addr_hit[124] & ((|(4'b1 & (~reg_be))))) | (addr_hit[125] & ((|(4'b1 & (~reg_be))))) | (addr_hit[126] & ((|(4'b1 & (~reg_be))))) | (addr_hit[127] & ((|(4'b1 & (~reg_be))))) | (addr_hit[128] & ((|(4'b1 & (~reg_be))))) | (addr_hit[129] & ((|(4'b1 & (~reg_be))))) | (addr_hit[130] & ((|(4'b1 & (~reg_be))))) | (addr_hit[131] & ((|(4'b1 & (~reg_be))))) | (addr_hit[132] & ((|(4'b1 & (~reg_be))))) | (addr_hit[133] & ((|(4'b1 & (~reg_be))))) | (addr_hit[134] & ((|(4'b1 & (~reg_be))))) | (addr_hit[135] & ((|(4'b1 & (~reg_be))))) | (addr_hit[136] & ((|(4'b1 & (~reg_be))))) | (addr_hit[137] & ((|(4'b1 & (~reg_be))))) | (addr_hit[138] & ((|(4'b1 & (~reg_be))))) | (addr_hit[139] & ((|(4'b1 & (~reg_be))))) | (addr_hit[140] & ((|(4'b1 & (~reg_be))))) | (addr_hit[141] & ((|(4'b1 & (~reg_be))))) | (addr_hit[142] & ((|(4'b1 & (~reg_be))))) | (addr_hit[143] & ((|(4'b1 & (~reg_be))))) | (addr_hit[144] & ((|(4'b1 & (~reg_be))))) | (addr_hit[145] & ((|(4'b1 & (~reg_be))))) | (addr_hit[146] & ((|(4'b1 & (~reg_be))))) | (addr_hit[147] & ((|(4'b1 & (~reg_be))))) | (addr_hit[148] & ((|(4'b1 & (~reg_be))))) | (addr_hit[149] & ((|(4'b1 & (~reg_be))))) | (addr_hit[150] & ((|(4'b1 & (~reg_be))))) | (addr_hit[151] & ((|(4'b1 & (~reg_be))))) | (addr_hit[152] & ((|(4'b1 & (~reg_be))))) | (addr_hit[153] & ((|(4'b1 & (~reg_be))))) | (addr_hit[154] & ((|(4'b1 & (~reg_be))))) | (addr_hit[155] & ((|(4'b1 & (~reg_be))))) | (addr_hit[156] & ((|(4'b1 & (~reg_be))))) | (addr_hit[157] & ((|(4'b1 & (~reg_be))))) | (addr_hit[158] & ((|(4'b1 & (~reg_be))))) | (addr_hit[159] & ((|(4'b1 & (~reg_be))))) | (addr_hit[160] & ((|(4'b1 & (~reg_be))))) | (addr_hit[161] & ((|(4'b1 & (~reg_be))))) | (addr_hit[162] & ((|(4'b1 & (~reg_be))))) | (addr_hit[163] & ((|(4'b1 & (~reg_be))))) | (addr_hit[164] & ((|(4'b1 & (~reg_be))))) | (addr_hit[165] & ((|(4'b1 & (~reg_be))))) | (addr_hit[166] & ((|(4'b1 & (~reg_be))))) | (addr_hit[167] & ((|(4'b1 & (~reg_be))))) | (addr_hit[168] & ((|(4'b1 & (~reg_be))))) | (addr_hit[169] & ((|(4'b1 & (~reg_be))))) | (addr_hit[170] & ((|(4'b1 & (~reg_be))))) | (addr_hit[171] & ((|(4'b1 & (~reg_be))))) | (addr_hit[172] & ((|(4'b1 & (~reg_be))))) | (addr_hit[173] & ((|(4'b1 & (~reg_be))))) | (addr_hit[174] & ((|(4'b1 & (~reg_be))))) | (addr_hit[175] & ((|(4'b1 & (~reg_be))))) | (addr_hit[176] & ((|(4'b1 & (~reg_be))))) | (addr_hit[177] & ((|(4'b1 & (~reg_be))))) | (addr_hit[178] & ((|(4'b1 & (~reg_be))))) | (addr_hit[179] & ((|(4'b1 & (~reg_be))))) | (addr_hit[180] & ((|(4'b1 & (~reg_be))))) | (addr_hit[181] & ((|(4'b1 & (~reg_be))))) | (addr_hit[182] & ((|(4'b1111 & (~reg_be))))) | (addr_hit[183] & ((|(4'b1111 & (~reg_be))))) | (addr_hit[184] & ((|(4'b1111 & (~reg_be))))) | (addr_hit[185] & ((|(4'b1111 & (~reg_be))))) | (addr_hit[186] & ((|(4'b1111 & (~reg_be))))) | (addr_hit[187] & ((|(4'b0111 & (~reg_be))))) | (addr_hit[188] & ((|(4'b1111 & (~reg_be))))) | (addr_hit[189] & ((|(4'b1111 & (~reg_be))))) | (addr_hit[190] & ((|(4'b1111 & (~reg_be))))) | (addr_hit[191] & ((|(4'b1111 & (~reg_be))))) | (addr_hit[192] & ((|(4'b1111 & (~reg_be))))) | (addr_hit[193] & ((|(4'b0111 & (~reg_be))))) | (addr_hit[194] & ((|(4'b1 & (~reg_be))))) | (addr_hit[195] & ((|(4'b1 & (~reg_be))))) | (addr_hit[196] & ((|(4'b1 & (~reg_be))))) | (addr_hit[197] & ((|(4'b1 & (~reg_be)))))))
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION
Number Term
1 (addr_hit[0] & ((|(4'b1 & (~reg_be))))) |
2 (addr_hit[1] & ((|(4'b1 & (~reg_be))))) |
3 (addr_hit[2] & ((|(4'b1 & (~reg_be))))) |
4 (addr_hit[3] & ((|(4'b1 & (~reg_be))))) |
5 (addr_hit[4] & ((|(4'b1 & (~reg_be))))) |
6 (addr_hit[5] & ((|(4'b1 & (~reg_be))))) |
7 (addr_hit[6] & ((|(4'b1 & (~reg_be))))) |
8 (addr_hit[7] & ((|(4'b1 & (~reg_be))))) |
9 (addr_hit[8] & ((|(4'b1 & (~reg_be))))) |
10 (addr_hit[9] & ((|(4'b1 & (~reg_be))))) |
11 (addr_hit[10] & ((|(4'b1 & (~reg_be))))) |
12 (addr_hit[11] & ((|(4'b1 & (~reg_be))))) |
13 (addr_hit[12] & ((|(4'b1 & (~reg_be))))) |
14 (addr_hit[13] & ((|(4'b1 & (~reg_be))))) |
15 (addr_hit[14] & ((|(4'b1 & (~reg_be))))) |
16 (addr_hit[15] & ((|(4'b1 & (~reg_be))))) |
17 (addr_hit[16] & ((|(4'b1 & (~reg_be))))) |
18 (addr_hit[17] & ((|(4'b1 & (~reg_be))))) |
19 (addr_hit[18] & ((|(4'b1 & (~reg_be))))) |
20 (addr_hit[19] & ((|(4'b1 & (~reg_be))))) |
21 (addr_hit[20] & ((|(4'b1 & (~reg_be))))) |
22 (addr_hit[21] & ((|(4'b1 & (~reg_be))))) |
23 (addr_hit[22] & ((|(4'b1 & (~reg_be))))) |
24 (addr_hit[23] & ((|(4'b1 & (~reg_be))))) |
25 (addr_hit[24] & ((|(4'b1 & (~reg_be))))) |
26 (addr_hit[25] & ((|(4'b1 & (~reg_be))))) |
27 (addr_hit[26] & ((|(4'b1 & (~reg_be))))) |
28 (addr_hit[27] & ((|(4'b1 & (~reg_be))))) |
29 (addr_hit[28] & ((|(4'b1 & (~reg_be))))) |
30 (addr_hit[29] & ((|(4'b1 & (~reg_be))))) |
31 (addr_hit[30] & ((|(4'b1 & (~reg_be))))) |
32 (addr_hit[31] & ((|(4'b1 & (~reg_be))))) |
33 (addr_hit[32] & ((|(4'b1 & (~reg_be))))) |
34 (addr_hit[33] & ((|(4'b1 & (~reg_be))))) |
35 (addr_hit[34] & ((|(4'b1 & (~reg_be))))) |
36 (addr_hit[35] & ((|(4'b1 & (~reg_be))))) |
37 (addr_hit[36] & ((|(4'b1 & (~reg_be))))) |
38 (addr_hit[37] & ((|(4'b1 & (~reg_be))))) |
39 (addr_hit[38] & ((|(4'b1 & (~reg_be))))) |
40 (addr_hit[39] & ((|(4'b1 & (~reg_be))))) |
41 (addr_hit[40] & ((|(4'b1 & (~reg_be))))) |
42 (addr_hit[41] & ((|(4'b1 & (~reg_be))))) |
43 (addr_hit[42] & ((|(4'b1 & (~reg_be))))) |
44 (addr_hit[43] & ((|(4'b1 & (~reg_be))))) |
45 (addr_hit[44] & ((|(4'b1 & (~reg_be))))) |
46 (addr_hit[45] & ((|(4'b1 & (~reg_be))))) |
47 (addr_hit[46] & ((|(4'b1 & (~reg_be))))) |
48 (addr_hit[47] & ((|(4'b1 & (~reg_be))))) |
49 (addr_hit[48] & ((|(4'b1 & (~reg_be))))) |
50 (addr_hit[49] & ((|(4'b1 & (~reg_be))))) |
51 (addr_hit[50] & ((|(4'b1 & (~reg_be))))) |
52 (addr_hit[51] & ((|(4'b1 & (~reg_be))))) |
53 (addr_hit[52] & ((|(4'b1 & (~reg_be))))) |
54 (addr_hit[53] & ((|(4'b1 & (~reg_be))))) |
55 (addr_hit[54] & ((|(4'b1 & (~reg_be))))) |
56 (addr_hit[55] & ((|(4'b1 & (~reg_be))))) |
57 (addr_hit[56] & ((|(4'b1 & (~reg_be))))) |
58 (addr_hit[57] & ((|(4'b1 & (~reg_be))))) |
59 (addr_hit[58] & ((|(4'b1 & (~reg_be))))) |
60 (addr_hit[59] & ((|(4'b1 & (~reg_be))))) |
61 (addr_hit[60] & ((|(4'b1 & (~reg_be))))) |
62 (addr_hit[61] & ((|(4'b1 & (~reg_be))))) |
63 (addr_hit[62] & ((|(4'b1 & (~reg_be))))) |
64 (addr_hit[63] & ((|(4'b1 & (~reg_be))))) |
65 (addr_hit[64] & ((|(4'b1 & (~reg_be))))) |
66 (addr_hit[65] & ((|(4'b1 & (~reg_be))))) |
67 (addr_hit[66] & ((|(4'b1 & (~reg_be))))) |
68 (addr_hit[67] & ((|(4'b1 & (~reg_be))))) |
69 (addr_hit[68] & ((|(4'b1 & (~reg_be))))) |
70 (addr_hit[69] & ((|(4'b1 & (~reg_be))))) |
71 (addr_hit[70] & ((|(4'b1 & (~reg_be))))) |
72 (addr_hit[71] & ((|(4'b1 & (~reg_be))))) |
73 (addr_hit[72] & ((|(4'b1 & (~reg_be))))) |
74 (addr_hit[73] & ((|(4'b1 & (~reg_be))))) |
75 (addr_hit[74] & ((|(4'b1 & (~reg_be))))) |
76 (addr_hit[75] & ((|(4'b1 & (~reg_be))))) |
77 (addr_hit[76] & ((|(4'b1 & (~reg_be))))) |
78 (addr_hit[77] & ((|(4'b1 & (~reg_be))))) |
79 (addr_hit[78] & ((|(4'b1 & (~reg_be))))) |
80 (addr_hit[79] & ((|(4'b1 & (~reg_be))))) |
81 (addr_hit[80] & ((|(4'b1 & (~reg_be))))) |
82 (addr_hit[81] & ((|(4'b1 & (~reg_be))))) |
83 (addr_hit[82] & ((|(4'b1 & (~reg_be))))) |
84 (addr_hit[83] & ((|(4'b1 & (~reg_be))))) |
85 (addr_hit[84] & ((|(4'b1 & (~reg_be))))) |
86 (addr_hit[85] & ((|(4'b1 & (~reg_be))))) |
87 (addr_hit[86] & ((|(4'b1 & (~reg_be))))) |
88 (addr_hit[87] & ((|(4'b1 & (~reg_be))))) |
89 (addr_hit[88] & ((|(4'b1 & (~reg_be))))) |
90 (addr_hit[89] & ((|(4'b1 & (~reg_be))))) |
91 (addr_hit[90] & ((|(4'b1 & (~reg_be))))) |
92 (addr_hit[91] & ((|(4'b1 & (~reg_be))))) |
93 (addr_hit[92] & ((|(4'b1 & (~reg_be))))) |
94 (addr_hit[93] & ((|(4'b1 & (~reg_be))))) |
95 (addr_hit[94] & ((|(4'b1 & (~reg_be))))) |
96 (addr_hit[95] & ((|(4'b1 & (~reg_be))))) |
97 (addr_hit[96] & ((|(4'b1 & (~reg_be))))) |
98 (addr_hit[97] & ((|(4'b1 & (~reg_be))))) |
99 (addr_hit[98] & ((|(4'b1 & (~reg_be))))) |
100 (addr_hit[99] & ((|(4'b1 & (~reg_be))))) |
101 (addr_hit[100] & ((|(4'b1 & (~reg_be))))) |
102 (addr_hit[101] & ((|(4'b1 & (~reg_be))))) |
103 (addr_hit[102] & ((|(4'b1 & (~reg_be))))) |
104 (addr_hit[103] & ((|(4'b1 & (~reg_be))))) |
105 (addr_hit[104] & ((|(4'b1 & (~reg_be))))) |
106 (addr_hit[105] & ((|(4'b1 & (~reg_be))))) |
107 (addr_hit[106] & ((|(4'b1 & (~reg_be))))) |
108 (addr_hit[107] & ((|(4'b1 & (~reg_be))))) |
109 (addr_hit[108] & ((|(4'b1 & (~reg_be))))) |
110 (addr_hit[109] & ((|(4'b1 & (~reg_be))))) |
111 (addr_hit[110] & ((|(4'b1 & (~reg_be))))) |
112 (addr_hit[111] & ((|(4'b1 & (~reg_be))))) |
113 (addr_hit[112] & ((|(4'b1 & (~reg_be))))) |
114 (addr_hit[113] & ((|(4'b1 & (~reg_be))))) |
115 (addr_hit[114] & ((|(4'b1 & (~reg_be))))) |
116 (addr_hit[115] & ((|(4'b1 & (~reg_be))))) |
117 (addr_hit[116] & ((|(4'b1 & (~reg_be))))) |
118 (addr_hit[117] & ((|(4'b1 & (~reg_be))))) |
119 (addr_hit[118] & ((|(4'b1 & (~reg_be))))) |
120 (addr_hit[119] & ((|(4'b1 & (~reg_be))))) |
121 (addr_hit[120] & ((|(4'b1 & (~reg_be))))) |
122 (addr_hit[121] & ((|(4'b1 & (~reg_be))))) |
123 (addr_hit[122] & ((|(4'b1 & (~reg_be))))) |
124 (addr_hit[123] & ((|(4'b1 & (~reg_be))))) |
125 (addr_hit[124] & ((|(4'b1 & (~reg_be))))) |
126 (addr_hit[125] & ((|(4'b1 & (~reg_be))))) |
127 (addr_hit[126] & ((|(4'b1 & (~reg_be))))) |
128 (addr_hit[127] & ((|(4'b1 & (~reg_be))))) |
129 (addr_hit[128] & ((|(4'b1 & (~reg_be))))) |
130 (addr_hit[129] & ((|(4'b1 & (~reg_be))))) |
131 (addr_hit[130] & ((|(4'b1 & (~reg_be))))) |
132 (addr_hit[131] & ((|(4'b1 & (~reg_be))))) |
133 (addr_hit[132] & ((|(4'b1 & (~reg_be))))) |
134 (addr_hit[133] & ((|(4'b1 & (~reg_be))))) |
135 (addr_hit[134] & ((|(4'b1 & (~reg_be))))) |
136 (addr_hit[135] & ((|(4'b1 & (~reg_be))))) |
137 (addr_hit[136] & ((|(4'b1 & (~reg_be))))) |
138 (addr_hit[137] & ((|(4'b1 & (~reg_be))))) |
139 (addr_hit[138] & ((|(4'b1 & (~reg_be))))) |
140 (addr_hit[139] & ((|(4'b1 & (~reg_be))))) |
141 (addr_hit[140] & ((|(4'b1 & (~reg_be))))) |
142 (addr_hit[141] & ((|(4'b1 & (~reg_be))))) |
143 (addr_hit[142] & ((|(4'b1 & (~reg_be))))) |
144 (addr_hit[143] & ((|(4'b1 & (~reg_be))))) |
145 (addr_hit[144] & ((|(4'b1 & (~reg_be))))) |
146 (addr_hit[145] & ((|(4'b1 & (~reg_be))))) |
147 (addr_hit[146] & ((|(4'b1 & (~reg_be))))) |
148 (addr_hit[147] & ((|(4'b1 & (~reg_be))))) |
149 (addr_hit[148] & ((|(4'b1 & (~reg_be))))) |
150 (addr_hit[149] & ((|(4'b1 & (~reg_be))))) |
151 (addr_hit[150] & ((|(4'b1 & (~reg_be))))) |
152 (addr_hit[151] & ((|(4'b1 & (~reg_be))))) |
153 (addr_hit[152] & ((|(4'b1 & (~reg_be))))) |
154 (addr_hit[153] & ((|(4'b1 & (~reg_be))))) |
155 (addr_hit[154] & ((|(4'b1 & (~reg_be))))) |
156 (addr_hit[155] & ((|(4'b1 & (~reg_be))))) |
157 (addr_hit[156] & ((|(4'b1 & (~reg_be))))) |
158 (addr_hit[157] & ((|(4'b1 & (~reg_be))))) |
159 (addr_hit[158] & ((|(4'b1 & (~reg_be))))) |
160 (addr_hit[159] & ((|(4'b1 & (~reg_be))))) |
161 (addr_hit[160] & ((|(4'b1 & (~reg_be))))) |
162 (addr_hit[161] & ((|(4'b1 & (~reg_be))))) |
163 (addr_hit[162] & ((|(4'b1 & (~reg_be))))) |
164 (addr_hit[163] & ((|(4'b1 & (~reg_be))))) |
165 (addr_hit[164] & ((|(4'b1 & (~reg_be))))) |
166 (addr_hit[165] & ((|(4'b1 & (~reg_be))))) |
167 (addr_hit[166] & ((|(4'b1 & (~reg_be))))) |
168 (addr_hit[167] & ((|(4'b1 & (~reg_be))))) |
169 (addr_hit[168] & ((|(4'b1 & (~reg_be))))) |
170 (addr_hit[169] & ((|(4'b1 & (~reg_be))))) |
171 (addr_hit[170] & ((|(4'b1 & (~reg_be))))) |
172 (addr_hit[171] & ((|(4'b1 & (~reg_be))))) |
173 (addr_hit[172] & ((|(4'b1 & (~reg_be))))) |
174 (addr_hit[173] & ((|(4'b1 & (~reg_be))))) |
175 (addr_hit[174] & ((|(4'b1 & (~reg_be))))) |
176 (addr_hit[175] & ((|(4'b1 & (~reg_be))))) |
177 (addr_hit[176] & ((|(4'b1 & (~reg_be))))) |
178 (addr_hit[177] & ((|(4'b1 & (~reg_be))))) |
179 (addr_hit[178] & ((|(4'b1 & (~reg_be))))) |
180 (addr_hit[179] & ((|(4'b1 & (~reg_be))))) |
181 (addr_hit[180] & ((|(4'b1 & (~reg_be))))) |
182 (addr_hit[181] & ((|(4'b1 & (~reg_be))))) |
183 (addr_hit[182] & ((|(4'b1111 & (~reg_be))))) |
184 (addr_hit[183] & ((|(4'b1111 & (~reg_be))))) |
185 (addr_hit[184] & ((|(4'b1111 & (~reg_be))))) |
186 (addr_hit[185] & ((|(4'b1111 & (~reg_be))))) |
187 (addr_hit[186] & ((|(4'b1111 & (~reg_be))))) |
188 (addr_hit[187] & ((|(4'b0111 & (~reg_be))))) |
189 (addr_hit[188] & ((|(4'b1111 & (~reg_be))))) |
190 (addr_hit[189] & ((|(4'b1111 & (~reg_be))))) |
191 (addr_hit[190] & ((|(4'b1111 & (~reg_be))))) |
192 (addr_hit[191] & ((|(4'b1111 & (~reg_be))))) |
193 (addr_hit[192] & ((|(4'b1111 & (~reg_be))))) |
194 (addr_hit[193] & ((|(4'b0111 & (~reg_be))))) |
195 (addr_hit[194] & ((|(4'b1 & (~reg_be))))) |
196 (addr_hit[195] & ((|(4'b1 & (~reg_be))))) |
197 (addr_hit[196] & ((|(4'b1 & (~reg_be))))) |
198 (addr_hit[197] & ((|(4'b1 & (~reg_be))))))
| Sensitive Expression == 1 | Status | Tests |
|---|
| ALL ZEROS | Not Covered | |
| 198 (addr_hit[197] & ((|(4... | Not Covered | |
| 197 (addr_hit[196] & ((|(4... | Not Covered | |
| 196 (addr_hit[195] & ((|(4... | Not Covered | |
| 195 (addr_hit[194] & ((|(4... | Not Covered | |
| 194 (addr_hit[193] & ((|(4... | Not Covered | |
| 193 (addr_hit[192] & ((|(4... | Not Covered | |
| 192 (addr_hit[191] & ((|(4... | Not Covered | |
| 191 (addr_hit[190] & ((|(4... | Not Covered | |
| 190 (addr_hit[189] & ((|(4... | Not Covered | |
| 189 (addr_hit[188] & ((|(4... | Not Covered | |
| 188 (addr_hit[187] & ((|(4... | Not Covered | |
| 187 (addr_hit[186] & ((|(4... | Not Covered | |
| 186 (addr_hit[185] & ((|(4... | Not Covered | |
| 185 (addr_hit[184] & ((|(4... | Not Covered | |
| 184 (addr_hit[183] & ((|(4... | Not Covered | |
| 183 (addr_hit[182] & ((|(4... | Not Covered | |
| 182 (addr_hit[181] & ((|(4... | Not Covered | |
| 181 (addr_hit[180] & ((|(4... | Not Covered | |
| 180 (addr_hit[179] & ((|(4... | Not Covered | |
| 179 (addr_hit[178] & ((|(4... | Not Covered | |
| 178 (addr_hit[177] & ((|(4... | Not Covered | |
| 177 (addr_hit[176] & ((|(4... | Not Covered | |
| 176 (addr_hit[175] & ((|(4... | Not Covered | |
| 175 (addr_hit[174] & ((|(4... | Not Covered | |
| 174 (addr_hit[173] & ((|(4... | Not Covered | |
| 173 (addr_hit[172] & ((|(4... | Not Covered | |
| 172 (addr_hit[171] & ((|(4... | Not Covered | |
| 171 (addr_hit[170] & ((|(4... | Not Covered | |
| 170 (addr_hit[169] & ((|(4... | Not Covered | |
| 169 (addr_hit[168] & ((|(4... | Not Covered | |
| 168 (addr_hit[167] & ((|(4... | Not Covered | |
| 167 (addr_hit[166] & ((|(4... | Not Covered | |
| 166 (addr_hit[165] & ((|(4... | Not Covered | |
| 165 (addr_hit[164] & ((|(4... | Not Covered | |
| 164 (addr_hit[163] & ((|(4... | Not Covered | |
| 163 (addr_hit[162] & ((|(4... | Not Covered | |
| 162 (addr_hit[161] & ((|(4... | Not Covered | |
| 161 (addr_hit[160] & ((|(4... | Not Covered | |
| 160 (addr_hit[159] & ((|(4... | Not Covered | |
| 159 (addr_hit[158] & ((|(4... | Not Covered | |
| 158 (addr_hit[157] & ((|(4... | Not Covered | |
| 157 (addr_hit[156] & ((|(4... | Not Covered | |
| 156 (addr_hit[155] & ((|(4... | Not Covered | |
| 155 (addr_hit[154] & ((|(4... | Not Covered | |
| 154 (addr_hit[153] & ((|(4... | Not Covered | |
| 153 (addr_hit[152] & ((|(4... | Not Covered | |
| 152 (addr_hit[151] & ((|(4... | Not Covered | |
| 151 (addr_hit[150] & ((|(4... | Not Covered | |
| 150 (addr_hit[149] & ((|(4... | Not Covered | |
| 149 (addr_hit[148] & ((|(4... | Not Covered | |
| 148 (addr_hit[147] & ((|(4... | Not Covered | |
| 147 (addr_hit[146] & ((|(4... | Not Covered | |
| 146 (addr_hit[145] & ((|(4... | Not Covered | |
| 145 (addr_hit[144] & ((|(4... | Not Covered | |
| 144 (addr_hit[143] & ((|(4... | Not Covered | |
| 143 (addr_hit[142] & ((|(4... | Not Covered | |
| 142 (addr_hit[141] & ((|(4... | Not Covered | |
| 141 (addr_hit[140] & ((|(4... | Not Covered | |
| 140 (addr_hit[139] & ((|(4... | Not Covered | |
| 139 (addr_hit[138] & ((|(4... | Not Covered | |
| 138 (addr_hit[137] & ((|(4... | Not Covered | |
| 137 (addr_hit[136] & ((|(4... | Not Covered | |
| 136 (addr_hit[135] & ((|(4... | Not Covered | |
| 135 (addr_hit[134] & ((|(4... | Not Covered | |
| 134 (addr_hit[133] & ((|(4... | Not Covered | |
| 133 (addr_hit[132] & ((|(4... | Not Covered | |
| 132 (addr_hit[131] & ((|(4... | Not Covered | |
| 131 (addr_hit[130] & ((|(4... | Not Covered | |
| 130 (addr_hit[129] & ((|(4... | Not Covered | |
| 129 (addr_hit[128] & ((|(4... | Not Covered | |
| 128 (addr_hit[127] & ((|(4... | Not Covered | |
| 127 (addr_hit[126] & ((|(4... | Not Covered | |
| 126 (addr_hit[125] & ((|(4... | Not Covered | |
| 125 (addr_hit[124] & ((|(4... | Not Covered | |
| 124 (addr_hit[123] & ((|(4... | Not Covered | |
| 123 (addr_hit[122] & ((|(4... | Not Covered | |
| 122 (addr_hit[121] & ((|(4... | Not Covered | |
| 121 (addr_hit[120] & ((|(4... | Not Covered | |
| 120 (addr_hit[119] & ((|(4... | Not Covered | |
| 119 (addr_hit[118] & ((|(4... | Not Covered | |
| 118 (addr_hit[117] & ((|(4... | Not Covered | |
| 117 (addr_hit[116] & ((|(4... | Not Covered | |
| 116 (addr_hit[115] & ((|(4... | Not Covered | |
| 115 (addr_hit[114] & ((|(4... | Not Covered | |
| 114 (addr_hit[113] & ((|(4... | Not Covered | |
| 113 (addr_hit[112] & ((|(4... | Not Covered | |
| 112 (addr_hit[111] & ((|(4... | Not Covered | |
| 111 (addr_hit[110] & ((|(4... | Not Covered | |
| 110 (addr_hit[109] & ((|(4... | Not Covered | |
| 109 (addr_hit[108] & ((|(4... | Not Covered | |
| 108 (addr_hit[107] & ((|(4... | Not Covered | |
| 107 (addr_hit[106] & ((|(4... | Not Covered | |
| 106 (addr_hit[105] & ((|(4... | Not Covered | |
| 105 (addr_hit[104] & ((|(4... | Not Covered | |
| 104 (addr_hit[103] & ((|(4... | Not Covered | |
| 103 (addr_hit[102] & ((|(4... | Not Covered | |
| 102 (addr_hit[101] & ((|(4... | Not Covered | |
| 101 (addr_hit[100] & ((|(4... | Not Covered | |
| 100 (addr_hit[99] & ((|(4'... | Not Covered | |
| 99 (addr_hit[98] & ((|(4'... | Not Covered | |
| 98 (addr_hit[97] & ((|(4'... | Not Covered | |
| 97 (addr_hit[96] & ((|(4'... | Not Covered | |
| 96 (addr_hit[95] & ((|(4'... | Not Covered | |
| 95 (addr_hit[94] & ((|(4'... | Not Covered | |
| 94 (addr_hit[93] & ((|(4'... | Not Covered | |
| 93 (addr_hit[92] & ((|(4'... | Not Covered | |
| 92 (addr_hit[91] & ((|(4'... | Not Covered | |
| 91 (addr_hit[90] & ((|(4'... | Not Covered | |
| 90 (addr_hit[89] & ((|(4'... | Not Covered | |
| 89 (addr_hit[88] & ((|(4'... | Not Covered | |
| 88 (addr_hit[87] & ((|(4'... | Not Covered | |
| 87 (addr_hit[86] & ((|(4'... | Not Covered | |
| 86 (addr_hit[85] & ((|(4'... | Not Covered | |
| 85 (addr_hit[84] & ((|(4'... | Not Covered | |
| 84 (addr_hit[83] & ((|(4'... | Not Covered | |
| 83 (addr_hit[82] & ((|(4'... | Not Covered | |
| 82 (addr_hit[81] & ((|(4'... | Not Covered | |
| 81 (addr_hit[80] & ((|(4'... | Not Covered | |
| 80 (addr_hit[79] & ((|(4'... | Not Covered | |
| 79 (addr_hit[78] & ((|(4'... | Not Covered | |
| 78 (addr_hit[77] & ((|(4'... | Not Covered | |
| 77 (addr_hit[76] & ((|(4'... | Not Covered | |
| 76 (addr_hit[75] & ((|(4'... | Not Covered | |
| 75 (addr_hit[74] & ((|(4'... | Not Covered | |
| 74 (addr_hit[73] & ((|(4'... | Not Covered | |
| 73 (addr_hit[72] & ((|(4'... | Not Covered | |
| 72 (addr_hit[71] & ((|(4'... | Not Covered | |
| 71 (addr_hit[70] & ((|(4'... | Not Covered | |
| 70 (addr_hit[69] & ((|(4'... | Not Covered | |
| 69 (addr_hit[68] & ((|(4'... | Not Covered | |
| 68 (addr_hit[67] & ((|(4'... | Not Covered | |
| 67 (addr_hit[66] & ((|(4'... | Not Covered | |
| 66 (addr_hit[65] & ((|(4'... | Not Covered | |
| 65 (addr_hit[64] & ((|(4'... | Not Covered | |
| 64 (addr_hit[63] & ((|(4'... | Not Covered | |
| 63 (addr_hit[62] & ((|(4'... | Not Covered | |
| 62 (addr_hit[61] & ((|(4'... | Not Covered | |
| 61 (addr_hit[60] & ((|(4'... | Not Covered | |
| 60 (addr_hit[59] & ((|(4'... | Not Covered | |
| 59 (addr_hit[58] & ((|(4'... | Not Covered | |
| 58 (addr_hit[57] & ((|(4'... | Not Covered | |
| 57 (addr_hit[56] & ((|(4'... | Not Covered | |
| 56 (addr_hit[55] & ((|(4'... | Not Covered | |
| 55 (addr_hit[54] & ((|(4'... | Not Covered | |
| 54 (addr_hit[53] & ((|(4'... | Not Covered | |
| 53 (addr_hit[52] & ((|(4'... | Not Covered | |
| 52 (addr_hit[51] & ((|(4'... | Not Covered | |
| 51 (addr_hit[50] & ((|(4'... | Not Covered | |
| 50 (addr_hit[49] & ((|(4'... | Not Covered | |
| 49 (addr_hit[48] & ((|(4'... | Not Covered | |
| 48 (addr_hit[47] & ((|(4'... | Not Covered | |
| 47 (addr_hit[46] & ((|(4'... | Not Covered | |
| 46 (addr_hit[45] & ((|(4'... | Not Covered | |
| 45 (addr_hit[44] & ((|(4'... | Not Covered | |
| 44 (addr_hit[43] & ((|(4'... | Not Covered | |
| 43 (addr_hit[42] & ((|(4'... | Not Covered | |
| 42 (addr_hit[41] & ((|(4'... | Not Covered | |
| 41 (addr_hit[40] & ((|(4'... | Not Covered | |
| 40 (addr_hit[39] & ((|(4'... | Not Covered | |
| 39 (addr_hit[38] & ((|(4'... | Not Covered | |
| 38 (addr_hit[37] & ((|(4'... | Not Covered | |
| 37 (addr_hit[36] & ((|(4'... | Not Covered | |
| 36 (addr_hit[35] & ((|(4'... | Not Covered | |
| 35 (addr_hit[34] & ((|(4'... | Not Covered | |
| 34 (addr_hit[33] & ((|(4'... | Not Covered | |
| 33 (addr_hit[32] & ((|(4'... | Not Covered | |
| 32 (addr_hit[31] & ((|(4'... | Not Covered | |
| 31 (addr_hit[30] & ((|(4'... | Not Covered | |
| 30 (addr_hit[29] & ((|(4'... | Not Covered | |
| 29 (addr_hit[28] & ((|(4'... | Not Covered | |
| 28 (addr_hit[27] & ((|(4'... | Not Covered | |
| 27 (addr_hit[26] & ((|(4'... | Not Covered | |
| 26 (addr_hit[25] & ((|(4'... | Not Covered | |
| 25 (addr_hit[24] & ((|(4'... | Not Covered | |
| 24 (addr_hit[23] & ((|(4'... | Not Covered | |
| 23 (addr_hit[22] & ((|(4'... | Not Covered | |
| 22 (addr_hit[21] & ((|(4'... | Not Covered | |
| 21 (addr_hit[20] & ((|(4'... | Not Covered | |
| 20 (addr_hit[19] & ((|(4'... | Not Covered | |
| 19 (addr_hit[18] & ((|(4'... | Not Covered | |
| 18 (addr_hit[17] & ((|(4'... | Not Covered | |
| 17 (addr_hit[16] & ((|(4'... | Not Covered | |
| 16 (addr_hit[15] & ((|(4'... | Not Covered | |
| 15 (addr_hit[14] & ((|(4'... | Not Covered | |
| 14 (addr_hit[13] & ((|(4'... | Not Covered | |
| 13 (addr_hit[12] & ((|(4'... | Not Covered | |
| 12 (addr_hit[11] & ((|(4'... | Not Covered | |
| 11 (addr_hit[10] & ((|(4'... | Not Covered | |
| 10 (addr_hit[9] & ((|(4'b... | Not Covered | |
| 9 (addr_hit[8] & ((|(4'b... | Not Covered | |
| 8 (addr_hit[7] & ((|(4'b... | Not Covered | |
| 7 (addr_hit[6] & ((|(4'b... | Not Covered | |
| 6 (addr_hit[5] & ((|(4'b... | Not Covered | |
| 5 (addr_hit[4] & ((|(4'b... | Not Covered | |
| 4 (addr_hit[3] & ((|(4'b... | Not Covered | |
| 3 (addr_hit[2] & ((|(4'b... | Not Covered | |
| 2 (addr_hit[1] & ((|(4'b... | Not Covered | |
| 1 (addr_hit[0] & ((|(4'b... | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[0] & ((|(4'b1 & (~reg_be)))))
-----1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[1] & ((|(4'b1 & (~reg_be)))))
-----1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[2] & ((|(4'b1 & (~reg_be)))))
-----1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[3] & ((|(4'b1 & (~reg_be)))))
-----1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[4] & ((|(4'b1 & (~reg_be)))))
-----1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[5] & ((|(4'b1 & (~reg_be)))))
-----1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[6] & ((|(4'b1 & (~reg_be)))))
-----1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[7] & ((|(4'b1 & (~reg_be)))))
-----1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[8] & ((|(4'b1 & (~reg_be)))))
-----1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[9] & ((|(4'b1 & (~reg_be)))))
-----1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[10] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[11] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[12] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[13] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[14] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[15] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[16] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[17] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[18] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[19] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[20] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[21] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[22] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[23] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[24] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[25] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[26] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[27] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[28] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[29] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[30] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[31] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[32] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[33] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[34] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[35] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[36] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[37] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[38] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[39] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[40] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[41] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[42] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[43] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[44] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[45] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[46] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[47] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[48] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[49] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[50] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[51] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[52] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[53] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[54] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[55] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[56] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[57] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[58] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[59] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[60] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[61] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[62] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[63] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[64] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[65] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[66] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[67] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[68] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |
LINE 16500
SUB-EXPRESSION (addr_hit[69] & ((|(4'b1 & (~reg_be)))))
------1----- -----------2-----------
| -1- | -2- | Status | Tests |
|---|
| 0 | 1 | Not Covered | |
| 1 | 0 | Not Covered | |
| 1 | 1 | Not Covered | |