Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
45.52 52.63 38.46 45.45


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
60.10 66.67 45.45 68.18


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
92.66 99.11 88.35 98.76 85.05 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 76.27 82.35 55.56 90.91



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
45.52 52.63 38.46 45.45


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
60.10 66.67 45.45 68.18


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
92.66 99.11 88.35 98.76 85.05 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 76.27 82.35 55.56 90.91



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
52.40 57.89 53.85 45.45


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
74.41 77.78 72.73 72.73


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
92.66 99.11 88.35 98.76 85.05 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 100.00 100.00 100.00 100.00



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
56.72 63.16 61.54 45.45


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
73.82 80.56 72.73 68.18


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
92.66 99.11 88.35 98.76 85.05 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 93.27 100.00 88.89 90.91



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
61.50 68.42 61.54 54.55


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
79.29 83.33 77.27 77.27


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
92.66 99.11 88.35 98.76 85.05 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 100.00 100.00 100.00 100.00



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
64.07 68.42 69.23 54.55


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
80.81 83.33 81.82 77.27


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
92.66 99.11 88.35 98.76 85.05 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 100.00 100.00 100.00 100.00



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
64.07 68.42 69.23 54.55


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
77.78 83.33 77.27 72.73


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
92.66 99.11 88.35 98.76 85.05 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 93.27 100.00 88.89 90.91



Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
64.07 68.42 69.23 54.55


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
80.81 83.33 81.82 77.27


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
92.66 99.11 88.35 98.76 85.05 92.00 u_pinmux_aon


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_filter 100.00 100.00 100.00 100.00

Line Coverage for Module : pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191368.42
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 1 1
52 1 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Module : pinmux_wkup
TotalCoveredPercent
Conditions13969.23
Logical13969.23
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT18,T47,T48
10CoveredT1,T2,T3
11CoveredT18,T47,T48

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT1,T2,T3
10CoveredT18,T47,T48
11CoveredT18,T47,T48

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0CoveredT49,T50,T51
1CoveredT1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0CoveredT49,T50,T51
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Module : pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 6 54.55
TERNARY 50 3 2 66.67
IF 57 6 2 33.33
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Not Covered
0 0 Covered T49,T50,T51


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T18,T47,T48
0 - Covered T48,T49,T50


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191052.63
CONT_ASSIGN45100.00
CONT_ASSIGN46100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
ALWAYS5510330.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 0 1
46 0 1
50 1 1
52 1 1
55 1 1
56 1 1
57 1 1
58 0 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup
TotalCoveredPercent
Conditions13538.46
Logical13538.46
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01Not Covered
10CoveredT1,T2,T3
11Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT1,T2,T3
10Not Covered
11Not Covered

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0CoveredT49,T52
1CoveredT1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0CoveredT49,T52
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 5 45.45
TERNARY 50 3 2 66.67
IF 57 6 1 16.67
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Not Covered
0 0 Covered T49,T52


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Not Covered
0 - Covered T49,T52


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191052.63
CONT_ASSIGN45100.00
CONT_ASSIGN46100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
ALWAYS5510330.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 0 1
46 0 1
50 1 1
52 1 1
55 1 1
56 1 1
57 1 1
58 0 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup
TotalCoveredPercent
Conditions13538.46
Logical13538.46
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01Not Covered
10CoveredT1,T2,T3
11Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT1,T2,T3
10Not Covered
11Not Covered

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0CoveredT49
1CoveredT1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0CoveredT49
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 5 45.45
TERNARY 50 3 2 66.67
IF 57 6 1 16.67
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Not Covered
0 0 Covered T49


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Not Covered
0 - Covered T49


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191157.89
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN50100.00
CONT_ASSIGN52100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 0 1
52 0 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup
TotalCoveredPercent
Conditions13753.85
Logical13753.85
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT49,T53,T54
10CoveredT1,T2,T3
11CoveredT49,T53,T54

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT1,T2,T3
10CoveredT49,T53,T54
11CoveredT49,T53,T54

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0Not Covered
1CoveredT1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0Not Covered
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 5 45.45
TERNARY 50 3 1 33.33
IF 57 6 2 33.33
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Not Covered
0 0 Not Covered


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T53,T54,T55
0 - Covered T49


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191263.16
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
ALWAYS5510330.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 1 1
52 1 1
55 1 1
56 1 1
57 1 1
58 0 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup
TotalCoveredPercent
Conditions13861.54
Logical13861.54
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT52
10CoveredT1,T2,T3
11Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT1,T2,T3
10CoveredT52
11CoveredT52

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0CoveredT49
1CoveredT1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0CoveredT49
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 5 45.45
TERNARY 50 3 2 66.67
IF 57 6 1 16.67
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Not Covered
0 0 Covered T49


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Not Covered
0 - Covered T49,T52


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191368.42
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 1 1
52 1 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup
TotalCoveredPercent
Conditions13861.54
Logical13861.54
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT56
10CoveredT1,T2,T3
11Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT1,T2,T3
10CoveredT56
11CoveredT56

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0CoveredT49,T52
1CoveredT1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0CoveredT49,T52
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 6 54.55
TERNARY 50 3 2 66.67
IF 57 6 2 33.33
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Not Covered
0 0 Covered T49,T52


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T56
0 - Covered T49,T52


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191368.42
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 1 1
52 1 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup
TotalCoveredPercent
Conditions13969.23
Logical13969.23
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT47,T49
10CoveredT1,T2,T3
11CoveredT47,T49

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT1,T2,T3
10CoveredT47,T49
11CoveredT47,T49

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0CoveredT49,T50,T51
1CoveredT1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0CoveredT49,T50,T51
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 6 54.55
TERNARY 50 3 2 66.67
IF 57 6 2 33.33
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Not Covered
0 0 Covered T49,T50,T51


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T47
0 - Covered T49,T50,T51


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191368.42
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 1 1
52 1 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup
TotalCoveredPercent
Conditions13969.23
Logical13969.23
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT49,T57,T52
10CoveredT1,T2,T3
11CoveredT49,T52

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT1,T2,T3
10CoveredT49,T57,T52
11CoveredT49,T57,T52

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0CoveredT49,T52
1CoveredT1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0CoveredT49,T52
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 6 54.55
TERNARY 50 3 2 66.67
IF 57 6 2 33.33
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Not Covered
0 0 Covered T49,T52


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T57
0 - Covered T49,T57,T52


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup
Line No.TotalCoveredPercent
TOTAL191368.42
CONT_ASSIGN4511100.00
CONT_ASSIGN4611100.00
CONT_ASSIGN5011100.00
CONT_ASSIGN5211100.00
ALWAYS5510440.00
ALWAYS8255100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
50 1 1
52 1 1
55 1 1
56 1 1
57 1 1
58 1 1
60 0 1
63 0 1
66 0 1
67 0 1
70 0 1
71 0 1
MISSING_ELSE
82 1 1
83 1 1
84 1 1
86 1 1
87 1 1


Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup
TotalCoveredPercent
Conditions13969.23
Logical13969.23
Non-Logical00
Event00

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----
-1--2-StatusTests
01CoveredT18,T48,T58
10CoveredT1,T2,T3
11CoveredT18,T48,T58

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------
-1--2-StatusTests
01CoveredT1,T2,T3
10CoveredT18,T48,T58
11CoveredT18,T48,T58

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----
-1-StatusTests
0CoveredT49,T52
1CoveredT1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--
-1-StatusTests
0CoveredT49,T52
1Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup
Line No.TotalCoveredPercent
Branches 11 6 54.55
TERNARY 50 3 2 66.67
IF 57 6 2 33.33
IF 82 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv' or '../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 50 (cnt_eq_th) ? -2-: 50 (cnt_en) ?

Branches:
-1--2-StatusTests
1 - Covered T1,T2,T3
0 1 Not Covered
0 0 Covered T49,T52


LineNo. Expression -1-: 57 if (wkup_en_i) -2-: 58 case (wkup_mode_i)

Branches:
-1--2-StatusTests
1 Negedge Not Covered
1 Edge Not Covered
1 HighTimed Not Covered
1 LowTimed Not Covered
1 default Covered T18,T48,T58
0 - Covered T48,T49,T59


LineNo. Expression -1-: 82 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%