| T148 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.1929031535 |
|
|
May 09 04:19:18 PM PDT 24 |
May 09 04:20:47 PM PDT 24 |
2394154859 ps |
| T1007 |
/workspace/coverage/default/3.chip_tap_straps_dev.679473542 |
|
|
May 09 04:42:43 PM PDT 24 |
May 09 04:45:41 PM PDT 24 |
2298737591 ps |
| T303 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.3370195721 |
|
|
May 09 04:09:12 PM PDT 24 |
May 09 04:24:58 PM PDT 24 |
4660053090 ps |
| T213 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.1483958500 |
|
|
May 09 04:41:33 PM PDT 24 |
May 09 04:46:33 PM PDT 24 |
4574711310 ps |
| T1008 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.2948950725 |
|
|
May 09 04:42:23 PM PDT 24 |
May 09 04:47:57 PM PDT 24 |
4471589394 ps |
| T35 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.3467897759 |
|
|
May 09 04:38:03 PM PDT 24 |
May 09 04:42:48 PM PDT 24 |
3033689422 ps |
| T1009 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.1986002148 |
|
|
May 09 04:44:48 PM PDT 24 |
May 09 05:05:53 PM PDT 24 |
8845566328 ps |
| T1010 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.2681634139 |
|
|
May 09 04:42:17 PM PDT 24 |
May 09 04:51:09 PM PDT 24 |
6006695012 ps |
| T1011 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.1419234660 |
|
|
May 09 04:40:59 PM PDT 24 |
May 09 04:49:30 PM PDT 24 |
3974736826 ps |
| T772 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.3636550345 |
|
|
May 09 04:41:08 PM PDT 24 |
May 09 04:47:10 PM PDT 24 |
3538098446 ps |
| T800 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.1577385737 |
|
|
May 09 04:42:47 PM PDT 24 |
May 09 04:50:51 PM PDT 24 |
4932411592 ps |
| T1012 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.3639424331 |
|
|
May 09 04:24:16 PM PDT 24 |
May 09 05:00:27 PM PDT 24 |
11302712448 ps |
| T1013 |
/workspace/coverage/default/2.chip_sw_aes_entropy.1724623036 |
|
|
May 09 04:39:01 PM PDT 24 |
May 09 04:43:12 PM PDT 24 |
3434165218 ps |
| T783 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.702424557 |
|
|
May 09 04:47:20 PM PDT 24 |
May 09 04:54:55 PM PDT 24 |
3533859266 ps |
| T191 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.2257980253 |
|
|
May 09 04:40:29 PM PDT 24 |
May 09 06:10:25 PM PDT 24 |
49051987288 ps |
| T1014 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.3035570571 |
|
|
May 09 04:40:15 PM PDT 24 |
May 09 04:47:55 PM PDT 24 |
3043933946 ps |
| T192 |
/workspace/coverage/default/0.chip_sw_flash_init.2206479469 |
|
|
May 09 04:08:47 PM PDT 24 |
May 09 04:39:49 PM PDT 24 |
25773271092 ps |
| T1015 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.2996272364 |
|
|
May 09 04:09:08 PM PDT 24 |
May 09 04:13:21 PM PDT 24 |
2819596460 ps |
| T1016 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2550233574 |
|
|
May 09 04:11:37 PM PDT 24 |
May 09 04:16:12 PM PDT 24 |
3096686054 ps |
| T245 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.1097961708 |
|
|
May 09 04:43:01 PM PDT 24 |
May 09 04:48:51 PM PDT 24 |
3294868200 ps |
| T765 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.2707821030 |
|
|
May 09 04:38:26 PM PDT 24 |
May 09 04:47:30 PM PDT 24 |
6080286064 ps |
| T1017 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.3818110645 |
|
|
May 09 04:18:44 PM PDT 24 |
May 09 04:23:19 PM PDT 24 |
3520730428 ps |
| T1018 |
/workspace/coverage/default/2.chip_tap_straps_prod.2021104976 |
|
|
May 09 04:38:31 PM PDT 24 |
May 09 04:41:38 PM PDT 24 |
2518810199 ps |
| T1019 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.1623689904 |
|
|
May 09 04:10:01 PM PDT 24 |
May 09 04:23:18 PM PDT 24 |
6002481330 ps |
| T1020 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.1671720435 |
|
|
May 09 04:38:24 PM PDT 24 |
May 09 04:42:29 PM PDT 24 |
3477257248 ps |
| T1021 |
/workspace/coverage/default/1.chip_sw_hmac_enc.3589966301 |
|
|
May 09 04:22:32 PM PDT 24 |
May 09 04:25:55 PM PDT 24 |
3272214000 ps |
| T490 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.2762466247 |
|
|
May 09 04:21:28 PM PDT 24 |
May 09 04:33:01 PM PDT 24 |
4104845596 ps |
| T318 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.3260506276 |
|
|
May 09 04:46:24 PM PDT 24 |
May 09 04:56:46 PM PDT 24 |
4708069646 ps |
| T1022 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.71221847 |
|
|
May 09 04:23:45 PM PDT 24 |
May 09 04:27:20 PM PDT 24 |
2875041648 ps |
| T1023 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2337517517 |
|
|
May 09 04:08:04 PM PDT 24 |
May 09 04:13:54 PM PDT 24 |
3502034760 ps |
| T194 |
/workspace/coverage/default/2.chip_sw_flash_init.4213784864 |
|
|
May 09 04:37:17 PM PDT 24 |
May 09 05:07:10 PM PDT 24 |
24584697930 ps |
| T1024 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.1259740516 |
|
|
May 09 04:21:09 PM PDT 24 |
May 09 04:29:20 PM PDT 24 |
6639127904 ps |
| T1025 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.1640423975 |
|
|
May 09 04:40:39 PM PDT 24 |
May 09 04:49:46 PM PDT 24 |
4280789050 ps |
| T169 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.2227586665 |
|
|
May 09 04:11:54 PM PDT 24 |
May 09 04:24:05 PM PDT 24 |
7124060388 ps |
| T1026 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.2761764732 |
|
|
May 09 04:09:33 PM PDT 24 |
May 09 04:13:29 PM PDT 24 |
3011859394 ps |
| T183 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.1054410749 |
|
|
May 09 04:18:59 PM PDT 24 |
May 09 04:27:47 PM PDT 24 |
4742387562 ps |
| T1027 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.2530203913 |
|
|
May 09 04:42:15 PM PDT 24 |
May 09 04:46:48 PM PDT 24 |
3578698147 ps |
| T1028 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.1614986125 |
|
|
May 09 04:47:34 PM PDT 24 |
May 09 04:53:52 PM PDT 24 |
3928059970 ps |
| T73 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.2354682479 |
|
|
May 09 04:08:32 PM PDT 24 |
May 09 04:18:48 PM PDT 24 |
4017897338 ps |
| T1029 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.2618170161 |
|
|
May 09 04:13:13 PM PDT 24 |
May 09 04:26:11 PM PDT 24 |
5753524914 ps |
| T1030 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.1215721949 |
|
|
May 09 04:14:10 PM PDT 24 |
May 09 04:18:58 PM PDT 24 |
2698490652 ps |
| T801 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.4129576224 |
|
|
May 09 04:45:55 PM PDT 24 |
May 09 04:52:46 PM PDT 24 |
3941020758 ps |
| T664 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.1981220442 |
|
|
May 09 04:09:05 PM PDT 24 |
May 09 04:11:35 PM PDT 24 |
2938511329 ps |
| T1031 |
/workspace/coverage/default/2.chip_sw_aes_enc.183449446 |
|
|
May 09 04:40:30 PM PDT 24 |
May 09 04:44:46 PM PDT 24 |
2258098200 ps |
| T796 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.650850703 |
|
|
May 09 04:51:05 PM PDT 24 |
May 09 05:01:48 PM PDT 24 |
5811698684 ps |
| T1032 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.2229190456 |
|
|
May 09 04:12:42 PM PDT 24 |
May 09 04:17:19 PM PDT 24 |
3069442066 ps |
| T358 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.3766525356 |
|
|
May 09 04:09:34 PM PDT 24 |
May 09 04:14:47 PM PDT 24 |
2903093122 ps |
| T1033 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.1878687479 |
|
|
May 09 04:18:32 PM PDT 24 |
May 09 04:21:12 PM PDT 24 |
2344117622 ps |
| T172 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.1471741858 |
|
|
May 09 04:12:11 PM PDT 24 |
May 09 04:22:21 PM PDT 24 |
4019525068 ps |
| T105 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.1095795435 |
|
|
May 09 04:40:52 PM PDT 24 |
May 09 05:08:24 PM PDT 24 |
17541763176 ps |
| T762 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.3706331212 |
|
|
May 09 04:42:24 PM PDT 24 |
May 09 04:50:57 PM PDT 24 |
5030915186 ps |
| T282 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.3308230129 |
|
|
May 09 04:43:51 PM PDT 24 |
May 09 04:54:24 PM PDT 24 |
5311966188 ps |
| T8 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.1015176837 |
|
|
May 09 04:39:19 PM PDT 24 |
May 09 04:45:40 PM PDT 24 |
2659100562 ps |
| T1034 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.202234725 |
|
|
May 09 04:48:29 PM PDT 24 |
May 09 04:56:31 PM PDT 24 |
4744169400 ps |
| T665 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.1388164325 |
|
|
May 09 04:40:24 PM PDT 24 |
May 09 04:42:22 PM PDT 24 |
1883332550 ps |
| T722 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.1155448186 |
|
|
May 09 04:42:20 PM PDT 24 |
May 09 04:48:04 PM PDT 24 |
3531829498 ps |
| T666 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.937305834 |
|
|
May 09 04:07:34 PM PDT 24 |
May 09 04:09:45 PM PDT 24 |
2952197230 ps |
| T1035 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.1159656014 |
|
|
May 09 04:42:12 PM PDT 24 |
May 09 04:47:03 PM PDT 24 |
2120090222 ps |
| T1036 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.841691983 |
|
|
May 09 04:21:56 PM PDT 24 |
May 09 04:28:36 PM PDT 24 |
4333614880 ps |
| T128 |
/workspace/coverage/default/0.chip_sw_ast_clk_rst_inputs.2910083710 |
|
|
May 09 04:11:11 PM PDT 24 |
May 09 05:02:27 PM PDT 24 |
23641850363 ps |
| T1037 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.730697967 |
|
|
May 09 04:41:46 PM PDT 24 |
May 09 04:50:27 PM PDT 24 |
4167201114 ps |
| T1038 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.439448922 |
|
|
May 09 04:39:31 PM PDT 24 |
May 09 04:45:01 PM PDT 24 |
3579142922 ps |
| T1039 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.3398784879 |
|
|
May 09 04:19:24 PM PDT 24 |
May 09 04:44:52 PM PDT 24 |
12689208707 ps |
| T663 |
/workspace/coverage/default/1.chip_tap_straps_dev.3209965971 |
|
|
May 09 04:20:56 PM PDT 24 |
May 09 04:34:16 PM PDT 24 |
9898526664 ps |
| T42 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.2846622886 |
|
|
May 09 04:10:41 PM PDT 24 |
May 09 04:15:45 PM PDT 24 |
2709730906 ps |
| T1040 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2992588948 |
|
|
May 09 04:23:42 PM PDT 24 |
May 09 04:32:34 PM PDT 24 |
4413849308 ps |
| T1041 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.754196039 |
|
|
May 09 04:43:36 PM PDT 24 |
May 09 05:18:16 PM PDT 24 |
12586254456 ps |
| T739 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.751061482 |
|
|
May 09 04:52:52 PM PDT 24 |
May 09 05:02:08 PM PDT 24 |
6053187820 ps |
| T1042 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2956562140 |
|
|
May 09 04:10:45 PM PDT 24 |
May 09 04:16:42 PM PDT 24 |
6700285035 ps |
| T9 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.1836657149 |
|
|
May 09 04:10:03 PM PDT 24 |
May 09 04:15:59 PM PDT 24 |
3468452886 ps |
| T1043 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.567131023 |
|
|
May 09 04:43:51 PM PDT 24 |
May 09 04:53:00 PM PDT 24 |
5336035688 ps |
| T788 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.4113308042 |
|
|
May 09 04:46:23 PM PDT 24 |
May 09 04:54:24 PM PDT 24 |
6076961534 ps |
| T1044 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.671294311 |
|
|
May 09 04:46:41 PM PDT 24 |
May 09 04:54:23 PM PDT 24 |
4897100456 ps |
| T1045 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.3250871939 |
|
|
May 09 04:23:05 PM PDT 24 |
May 09 04:45:18 PM PDT 24 |
6083307850 ps |
| T25 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.1213494688 |
|
|
May 09 04:10:22 PM PDT 24 |
May 09 04:42:39 PM PDT 24 |
8673004848 ps |
| T145 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.3884508857 |
|
|
May 09 04:23:10 PM PDT 24 |
May 09 04:48:15 PM PDT 24 |
13426308184 ps |
| T1046 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.4122858961 |
|
|
May 09 04:10:47 PM PDT 24 |
May 09 04:54:31 PM PDT 24 |
22400093774 ps |
| T1047 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.3886327024 |
|
|
May 09 04:38:26 PM PDT 24 |
May 09 04:48:49 PM PDT 24 |
4993643200 ps |
| T1048 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2513901297 |
|
|
May 09 04:42:17 PM PDT 24 |
May 09 04:57:35 PM PDT 24 |
7326330283 ps |
| T1049 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.2951756005 |
|
|
May 09 04:44:25 PM PDT 24 |
May 09 04:48:56 PM PDT 24 |
2708244928 ps |
| T1050 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.1779491671 |
|
|
May 09 04:21:24 PM PDT 24 |
May 09 04:31:03 PM PDT 24 |
6152375944 ps |
| T662 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.3659704235 |
|
|
May 09 04:19:57 PM PDT 24 |
May 09 04:27:09 PM PDT 24 |
5565929591 ps |
| T1051 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.3928407460 |
|
|
May 09 04:37:26 PM PDT 24 |
May 09 04:40:25 PM PDT 24 |
3110592288 ps |
| T1052 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.268194659 |
|
|
May 09 04:22:31 PM PDT 24 |
May 09 04:26:13 PM PDT 24 |
3067993517 ps |
| T1053 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.1766690128 |
|
|
May 09 04:42:24 PM PDT 24 |
May 09 04:53:45 PM PDT 24 |
5942262772 ps |
| T1054 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3032742068 |
|
|
May 09 04:12:20 PM PDT 24 |
May 09 04:19:08 PM PDT 24 |
3270495720 ps |
| T400 |
/workspace/coverage/default/0.chip_jtag_mem_access.2281312017 |
|
|
May 09 04:02:14 PM PDT 24 |
May 09 04:21:50 PM PDT 24 |
13971211558 ps |
| T1055 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.2279640683 |
|
|
May 09 04:08:11 PM PDT 24 |
May 09 04:17:58 PM PDT 24 |
4070972696 ps |
| T195 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.1998133710 |
|
|
May 09 04:08:28 PM PDT 24 |
May 09 05:33:44 PM PDT 24 |
45846069725 ps |
| T786 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.249860506 |
|
|
May 09 04:41:52 PM PDT 24 |
May 09 04:47:56 PM PDT 24 |
3635444736 ps |
| T1056 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3594987127 |
|
|
May 09 04:48:45 PM PDT 24 |
May 09 04:55:54 PM PDT 24 |
3616847264 ps |
| T1057 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.1059195407 |
|
|
May 09 04:19:13 PM PDT 24 |
May 09 04:35:33 PM PDT 24 |
5303041077 ps |
| T776 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.3668656905 |
|
|
May 09 04:43:50 PM PDT 24 |
May 09 04:54:15 PM PDT 24 |
5360468600 ps |
| T1058 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.2837432341 |
|
|
May 09 04:39:59 PM PDT 24 |
May 09 04:46:31 PM PDT 24 |
3863222500 ps |
| T1059 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.2664452815 |
|
|
May 09 04:38:57 PM PDT 24 |
May 09 04:42:09 PM PDT 24 |
3179067898 ps |
| T1060 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.3138392228 |
|
|
May 09 04:43:58 PM PDT 24 |
May 09 04:48:44 PM PDT 24 |
3508438200 ps |
| T1061 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.3771491584 |
|
|
May 09 04:51:38 PM PDT 24 |
May 09 04:59:21 PM PDT 24 |
4683787500 ps |
| T1062 |
/workspace/coverage/default/0.chip_sw_example_rom.3628610857 |
|
|
May 09 04:06:07 PM PDT 24 |
May 09 04:07:57 PM PDT 24 |
1773485490 ps |
| T667 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2125707485 |
|
|
May 09 04:19:28 PM PDT 24 |
May 09 04:21:05 PM PDT 24 |
1964535143 ps |
| T1063 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.135148848 |
|
|
May 09 04:13:14 PM PDT 24 |
May 09 04:21:12 PM PDT 24 |
3716014556 ps |
| T222 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.563641716 |
|
|
May 09 04:48:32 PM PDT 24 |
May 09 04:57:47 PM PDT 24 |
6007242760 ps |
| T196 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.1729791479 |
|
|
May 09 04:38:52 PM PDT 24 |
May 09 05:08:41 PM PDT 24 |
17979807413 ps |
| T1064 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.3080556270 |
|
|
May 09 04:21:57 PM PDT 24 |
May 09 04:29:53 PM PDT 24 |
4082242560 ps |
| T1065 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.1068544333 |
|
|
May 09 04:42:18 PM PDT 24 |
May 09 04:49:02 PM PDT 24 |
2478214040 ps |
| T742 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.2482195423 |
|
|
May 09 04:19:22 PM PDT 24 |
May 09 04:30:00 PM PDT 24 |
5288708440 ps |
| T1066 |
/workspace/coverage/default/0.chip_sw_power_idle_load.3571313830 |
|
|
May 09 04:09:00 PM PDT 24 |
May 09 04:19:02 PM PDT 24 |
3945887430 ps |
| T1067 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.2369213905 |
|
|
May 09 04:12:31 PM PDT 24 |
May 09 04:21:44 PM PDT 24 |
5453039146 ps |
| T1068 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.3596047056 |
|
|
May 09 04:08:15 PM PDT 24 |
May 09 04:21:33 PM PDT 24 |
8496336174 ps |
| T793 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.3467012080 |
|
|
May 09 04:43:03 PM PDT 24 |
May 09 04:51:52 PM PDT 24 |
5777884652 ps |
| T246 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.2245602376 |
|
|
May 09 04:53:09 PM PDT 24 |
May 09 05:00:59 PM PDT 24 |
4583916584 ps |
| T491 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.2025507083 |
|
|
May 09 04:41:17 PM PDT 24 |
May 09 04:53:26 PM PDT 24 |
4829579140 ps |
| T1069 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.710381568 |
|
|
May 09 04:39:45 PM PDT 24 |
May 09 04:48:04 PM PDT 24 |
4064085875 ps |
| T247 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.386755402 |
|
|
May 09 04:43:05 PM PDT 24 |
May 09 04:52:08 PM PDT 24 |
4668790020 ps |
| T335 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.925347936 |
|
|
May 09 04:43:03 PM PDT 24 |
May 09 04:56:00 PM PDT 24 |
4696778340 ps |
| T259 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.3834427159 |
|
|
May 09 04:13:00 PM PDT 24 |
May 09 04:15:48 PM PDT 24 |
2016975842 ps |
| T1070 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.684946831 |
|
|
May 09 04:12:40 PM PDT 24 |
May 09 04:39:42 PM PDT 24 |
8786795367 ps |
| T221 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.934103366 |
|
|
May 09 04:20:33 PM PDT 24 |
May 09 04:25:34 PM PDT 24 |
3839414842 ps |
| T341 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.3295618080 |
|
|
May 09 04:43:06 PM PDT 24 |
May 09 04:46:43 PM PDT 24 |
3280031696 ps |
| T1071 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1455465129 |
|
|
May 09 04:11:02 PM PDT 24 |
May 09 04:19:33 PM PDT 24 |
4916158372 ps |
| T197 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.2093730586 |
|
|
May 09 04:21:38 PM PDT 24 |
May 09 04:53:56 PM PDT 24 |
23391059015 ps |
| T1072 |
/workspace/coverage/default/1.chip_tap_straps_prod.3398796481 |
|
|
May 09 04:18:05 PM PDT 24 |
May 09 04:20:25 PM PDT 24 |
2655292931 ps |
| T724 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.2158084698 |
|
|
May 09 04:42:50 PM PDT 24 |
May 09 04:52:06 PM PDT 24 |
5141529046 ps |
| T283 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.1192322880 |
|
|
May 09 04:44:00 PM PDT 24 |
May 09 04:50:50 PM PDT 24 |
3974313016 ps |
| T1073 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.3625857989 |
|
|
May 09 04:38:27 PM PDT 24 |
May 09 04:42:42 PM PDT 24 |
2640504872 ps |
| T1074 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1997274652 |
|
|
May 09 04:38:23 PM PDT 24 |
May 09 05:05:39 PM PDT 24 |
12853044716 ps |
| T1075 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.1082997255 |
|
|
May 09 04:35:16 PM PDT 24 |
May 09 04:39:57 PM PDT 24 |
3640138557 ps |
| T1076 |
/workspace/coverage/default/0.rom_keymgr_functest.1038259210 |
|
|
May 09 04:12:22 PM PDT 24 |
May 09 04:17:08 PM PDT 24 |
3870887750 ps |
| T1077 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3824812791 |
|
|
May 09 04:13:26 PM PDT 24 |
May 09 04:24:30 PM PDT 24 |
4740164582 ps |
| T1078 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.3534413123 |
|
|
May 09 04:11:50 PM PDT 24 |
May 09 04:18:53 PM PDT 24 |
5122231504 ps |
| T248 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.2299515030 |
|
|
May 09 04:44:38 PM PDT 24 |
May 09 04:53:24 PM PDT 24 |
5740762440 ps |
| T1079 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3145883925 |
|
|
May 09 04:20:15 PM PDT 24 |
May 09 04:25:08 PM PDT 24 |
2931629388 ps |
| T214 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.2110361662 |
|
|
May 09 04:10:47 PM PDT 24 |
May 09 04:14:21 PM PDT 24 |
2367428248 ps |
| T1080 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.1262867511 |
|
|
May 09 04:22:40 PM PDT 24 |
May 09 04:32:28 PM PDT 24 |
5521433624 ps |
| T495 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3221032013 |
|
|
May 09 04:10:37 PM PDT 24 |
May 09 04:18:16 PM PDT 24 |
3852778338 ps |
| T751 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.1359638243 |
|
|
May 09 04:48:29 PM PDT 24 |
May 09 04:55:53 PM PDT 24 |
3785015400 ps |
| T668 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.501290589 |
|
|
May 09 04:44:35 PM PDT 24 |
May 09 04:53:33 PM PDT 24 |
4490574340 ps |
| T718 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.1173571081 |
|
|
May 09 04:48:46 PM PDT 24 |
May 09 04:56:11 PM PDT 24 |
4235914748 ps |
| T1081 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.1159128643 |
|
|
May 09 04:42:06 PM PDT 24 |
May 09 04:58:03 PM PDT 24 |
14248948971 ps |
| T60 |
/workspace/coverage/default/1.chip_sw_alert_test.3813598764 |
|
|
May 09 04:18:47 PM PDT 24 |
May 09 04:22:23 PM PDT 24 |
2889580520 ps |
| T262 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.2560191742 |
|
|
May 09 04:24:24 PM PDT 24 |
May 09 04:33:25 PM PDT 24 |
5918797190 ps |
| T1082 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.125564028 |
|
|
May 09 04:17:37 PM PDT 24 |
May 09 04:28:22 PM PDT 24 |
4124548182 ps |
| T343 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.541680486 |
|
|
May 09 04:38:28 PM PDT 24 |
May 09 04:52:38 PM PDT 24 |
5122739970 ps |
| T1083 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.1470244175 |
|
|
May 09 04:18:45 PM PDT 24 |
May 09 04:25:24 PM PDT 24 |
6572974995 ps |
| T1084 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.3232876432 |
|
|
May 09 04:10:18 PM PDT 24 |
May 09 04:21:49 PM PDT 24 |
4226135640 ps |
| T1085 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.1057886179 |
|
|
May 09 04:14:11 PM PDT 24 |
May 09 04:45:44 PM PDT 24 |
9882294200 ps |
| T702 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.1559680606 |
|
|
May 09 04:39:55 PM PDT 24 |
May 09 05:03:10 PM PDT 24 |
20948231538 ps |
| T784 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.2204164733 |
|
|
May 09 04:47:12 PM PDT 24 |
May 09 04:57:57 PM PDT 24 |
6471327124 ps |
| T790 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.714121501 |
|
|
May 09 04:24:14 PM PDT 24 |
May 09 04:30:34 PM PDT 24 |
3407938430 ps |
| T745 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.2552966788 |
|
|
May 09 04:43:57 PM PDT 24 |
May 09 04:50:13 PM PDT 24 |
3625671504 ps |
| T1086 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.980426088 |
|
|
May 09 04:37:42 PM PDT 24 |
May 09 04:43:59 PM PDT 24 |
4137138150 ps |
| T1087 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.2316215380 |
|
|
May 09 04:12:23 PM PDT 24 |
May 09 04:28:55 PM PDT 24 |
5340572138 ps |
| T1088 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.1896032728 |
|
|
May 09 04:14:21 PM PDT 24 |
May 09 04:36:02 PM PDT 24 |
12110615878 ps |
| T315 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.2952438602 |
|
|
May 09 04:37:04 PM PDT 24 |
May 09 04:43:36 PM PDT 24 |
3745040008 ps |
| T260 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.496431425 |
|
|
May 09 04:22:32 PM PDT 24 |
May 09 04:26:22 PM PDT 24 |
2362536947 ps |
| T184 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.4029013983 |
|
|
May 09 04:37:51 PM PDT 24 |
May 09 04:45:37 PM PDT 24 |
4109059658 ps |
| T753 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.54751505 |
|
|
May 09 04:45:32 PM PDT 24 |
May 09 04:51:33 PM PDT 24 |
3873169964 ps |
| T1089 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.708916466 |
|
|
May 09 04:40:07 PM PDT 24 |
May 09 04:45:26 PM PDT 24 |
2855882253 ps |
| T1090 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.1967721222 |
|
|
May 09 04:40:56 PM PDT 24 |
May 09 04:54:00 PM PDT 24 |
8636366000 ps |
| T686 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.3042781896 |
|
|
May 09 04:19:27 PM PDT 24 |
May 09 04:22:50 PM PDT 24 |
2740782920 ps |
| T1091 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.1785459011 |
|
|
May 09 04:39:48 PM PDT 24 |
May 09 04:42:46 PM PDT 24 |
2577758660 ps |
| T1092 |
/workspace/coverage/default/1.chip_sw_edn_kat.139882384 |
|
|
May 09 04:20:56 PM PDT 24 |
May 09 04:29:21 PM PDT 24 |
3202226696 ps |
| T1093 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.3881388116 |
|
|
May 09 04:43:48 PM PDT 24 |
May 09 04:52:30 PM PDT 24 |
5319231400 ps |
| T1094 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.1177326825 |
|
|
May 09 04:39:33 PM PDT 24 |
May 09 04:43:57 PM PDT 24 |
2963243922 ps |
| T1095 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.3384726024 |
|
|
May 09 04:48:22 PM PDT 24 |
May 09 04:57:33 PM PDT 24 |
5342937976 ps |
| T1096 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.2749358752 |
|
|
May 09 04:20:32 PM PDT 24 |
May 09 05:25:21 PM PDT 24 |
16716782630 ps |
| T780 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.699727088 |
|
|
May 09 04:45:00 PM PDT 24 |
May 09 04:55:41 PM PDT 24 |
5346194806 ps |
| T1097 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.237507548 |
|
|
May 09 04:08:40 PM PDT 24 |
May 09 04:19:15 PM PDT 24 |
7621169980 ps |
| T779 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.2299594176 |
|
|
May 09 04:48:49 PM PDT 24 |
May 09 04:55:18 PM PDT 24 |
3954930592 ps |
| T1098 |
/workspace/coverage/default/1.chip_sw_example_rom.3283329474 |
|
|
May 09 04:18:04 PM PDT 24 |
May 09 04:19:55 PM PDT 24 |
2197042606 ps |
| T757 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.2251915937 |
|
|
May 09 04:48:52 PM PDT 24 |
May 09 04:55:38 PM PDT 24 |
4047388502 ps |
| T249 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.2338501923 |
|
|
May 09 04:44:04 PM PDT 24 |
May 09 04:54:50 PM PDT 24 |
6471866084 ps |
| T55 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.840860466 |
|
|
May 09 04:37:56 PM PDT 24 |
May 09 04:45:19 PM PDT 24 |
4206543002 ps |
| T263 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.2131632748 |
|
|
May 09 04:40:39 PM PDT 24 |
May 09 04:52:39 PM PDT 24 |
9489393377 ps |
| T88 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.2410427022 |
|
|
May 09 04:48:38 PM PDT 24 |
May 09 04:58:53 PM PDT 24 |
5747294360 ps |
| T1099 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.3471533479 |
|
|
May 09 04:15:33 PM PDT 24 |
May 09 04:18:47 PM PDT 24 |
2605247732 ps |
| T1100 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2313563860 |
|
|
May 09 04:09:23 PM PDT 24 |
May 09 04:17:56 PM PDT 24 |
3453291310 ps |
| T1101 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.451432632 |
|
|
May 09 04:08:30 PM PDT 24 |
May 09 04:21:32 PM PDT 24 |
12257291628 ps |
| T1102 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.3931626338 |
|
|
May 09 04:39:52 PM PDT 24 |
May 09 04:54:05 PM PDT 24 |
5612619250 ps |
| T223 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.3941770024 |
|
|
May 09 04:19:50 PM PDT 24 |
May 09 04:32:29 PM PDT 24 |
5351013960 ps |
| T1103 |
/workspace/coverage/default/1.rom_keymgr_functest.2985046760 |
|
|
May 09 04:35:51 PM PDT 24 |
May 09 04:46:06 PM PDT 24 |
5138873204 ps |
| T1104 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.1538425005 |
|
|
May 09 04:22:15 PM PDT 24 |
May 09 04:34:56 PM PDT 24 |
5971912554 ps |
| T149 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.3825786825 |
|
|
May 09 04:08:02 PM PDT 24 |
May 09 04:12:05 PM PDT 24 |
2404807724 ps |
| T1105 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.2693329879 |
|
|
May 09 04:43:45 PM PDT 24 |
May 09 04:51:31 PM PDT 24 |
7137449950 ps |
| T1106 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.1638819754 |
|
|
May 09 04:10:01 PM PDT 24 |
May 09 04:22:32 PM PDT 24 |
4932162600 ps |
| T1107 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.2844299962 |
|
|
May 09 04:18:05 PM PDT 24 |
May 09 04:25:03 PM PDT 24 |
3874525132 ps |
| T1108 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.1278443447 |
|
|
May 09 04:19:32 PM PDT 24 |
May 09 04:23:10 PM PDT 24 |
2894146712 ps |
| T1109 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.1028651349 |
|
|
May 09 04:12:19 PM PDT 24 |
May 09 04:19:23 PM PDT 24 |
2843605840 ps |
| T1110 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.2778884825 |
|
|
May 09 04:39:12 PM PDT 24 |
May 09 05:31:46 PM PDT 24 |
16956136954 ps |
| T1111 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.2573519401 |
|
|
May 09 04:09:43 PM PDT 24 |
May 09 04:20:38 PM PDT 24 |
4882562473 ps |
| T165 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.2298316941 |
|
|
May 09 04:36:05 PM PDT 24 |
May 09 05:56:02 PM PDT 24 |
44625890006 ps |
| T797 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.951605120 |
|
|
May 09 04:38:39 PM PDT 24 |
May 09 04:47:17 PM PDT 24 |
3837937988 ps |
| T1112 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.2704158422 |
|
|
May 09 04:11:47 PM PDT 24 |
May 09 04:14:14 PM PDT 24 |
2458545460 ps |
| T1113 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.2166091545 |
|
|
May 09 04:11:35 PM PDT 24 |
May 09 04:16:13 PM PDT 24 |
2897407136 ps |
| T1114 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.312027482 |
|
|
May 09 04:08:58 PM PDT 24 |
May 09 04:13:16 PM PDT 24 |
3505441278 ps |
| T1115 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.703923090 |
|
|
May 09 04:09:10 PM PDT 24 |
May 09 04:16:44 PM PDT 24 |
4399172134 ps |
| T1116 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.812859708 |
|
|
May 09 04:11:18 PM PDT 24 |
May 09 04:14:28 PM PDT 24 |
2586282678 ps |
| T1117 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.1996902875 |
|
|
May 09 04:14:42 PM PDT 24 |
May 09 04:41:36 PM PDT 24 |
13014884312 ps |
| T1118 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.681816460 |
|
|
May 09 04:36:19 PM PDT 24 |
May 09 04:42:28 PM PDT 24 |
5512102142 ps |
| T1119 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.2833552479 |
|
|
May 09 04:43:49 PM PDT 24 |
May 09 04:54:01 PM PDT 24 |
4242201460 ps |
| T1120 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.458704021 |
|
|
May 09 04:46:35 PM PDT 24 |
May 09 04:52:37 PM PDT 24 |
4174987504 ps |
| T1121 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.754675817 |
|
|
May 09 04:41:31 PM PDT 24 |
May 09 05:02:43 PM PDT 24 |
11525501912 ps |
| T1122 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.3354902320 |
|
|
May 09 04:41:17 PM PDT 24 |
May 09 05:35:01 PM PDT 24 |
18923689590 ps |
| T1123 |
/workspace/coverage/default/0.chip_sw_aes_entropy.2746937165 |
|
|
May 09 04:09:20 PM PDT 24 |
May 09 04:13:29 PM PDT 24 |
2378376700 ps |
| T1124 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.3337646823 |
|
|
May 09 04:07:48 PM PDT 24 |
May 09 04:17:01 PM PDT 24 |
3957325500 ps |
| T301 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.3641831526 |
|
|
May 09 04:14:27 PM PDT 24 |
May 09 04:31:51 PM PDT 24 |
6408490736 ps |
| T768 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.3798365016 |
|
|
May 09 04:43:52 PM PDT 24 |
May 09 04:52:08 PM PDT 24 |
4863289840 ps |
| T173 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.9276992 |
|
|
May 09 04:20:44 PM PDT 24 |
May 09 04:28:24 PM PDT 24 |
4803761520 ps |
| T1125 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.56579264 |
|
|
May 09 04:21:33 PM PDT 24 |
May 09 04:28:21 PM PDT 24 |
5123261672 ps |
| T1126 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.1854459919 |
|
|
May 09 04:42:08 PM PDT 24 |
May 09 04:48:54 PM PDT 24 |
4890280000 ps |
| T1127 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.280289878 |
|
|
May 09 04:23:57 PM PDT 24 |
May 09 04:26:45 PM PDT 24 |
2269195344 ps |
| T190 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.41733697 |
|
|
May 09 04:21:00 PM PDT 24 |
May 09 05:11:00 PM PDT 24 |
11070744560 ps |
| T1128 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.96818102 |
|
|
May 09 04:40:54 PM PDT 24 |
May 09 04:46:00 PM PDT 24 |
3188821275 ps |
| T1129 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3150682895 |
|
|
May 09 04:08:41 PM PDT 24 |
May 09 04:16:29 PM PDT 24 |
5008401541 ps |
| T1130 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.3126185052 |
|
|
May 09 04:40:55 PM PDT 24 |
May 09 05:03:47 PM PDT 24 |
6499118840 ps |
| T698 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.1562549353 |
|
|
May 09 04:18:13 PM PDT 24 |
May 09 04:22:10 PM PDT 24 |
2660073372 ps |
| T1131 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.405770746 |
|
|
May 09 04:44:16 PM PDT 24 |
May 09 04:49:32 PM PDT 24 |
3327127360 ps |
| T1132 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.4261247990 |
|
|
May 09 04:38:08 PM PDT 24 |
May 09 04:47:57 PM PDT 24 |
4862165456 ps |
| T1133 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.3068577158 |
|
|
May 09 04:20:36 PM PDT 24 |
May 09 05:19:02 PM PDT 24 |
18793372889 ps |
| T795 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.2127353291 |
|
|
May 09 04:47:46 PM PDT 24 |
May 09 04:54:49 PM PDT 24 |
3788080600 ps |
| T304 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.2803901767 |
|
|
May 09 04:10:18 PM PDT 24 |
May 09 04:28:22 PM PDT 24 |
5893668848 ps |
| T1134 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.3215761759 |
|
|
May 09 04:41:35 PM PDT 24 |
May 09 04:48:30 PM PDT 24 |
3819710200 ps |
| T643 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2365934149 |
|
|
May 09 04:16:56 PM PDT 24 |
May 09 05:15:02 PM PDT 24 |
24387440258 ps |
| T384 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.2956845776 |
|
|
May 09 04:41:07 PM PDT 24 |
May 09 04:46:40 PM PDT 24 |
5126797166 ps |
| T1135 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.490648487 |
|
|
May 09 04:19:13 PM PDT 24 |
May 09 04:52:13 PM PDT 24 |
20032111240 ps |
| T134 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.4074313097 |
|
|
May 09 04:14:12 PM PDT 24 |
May 09 05:18:34 PM PDT 24 |
19225659880 ps |
| T747 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.494184309 |
|
|
May 09 04:44:05 PM PDT 24 |
May 09 04:50:23 PM PDT 24 |
3732313592 ps |
| T1136 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.1672397445 |
|
|
May 09 04:41:20 PM PDT 24 |
May 09 04:45:31 PM PDT 24 |
2852456451 ps |
| T1137 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.2682055403 |
|
|
May 09 04:21:46 PM PDT 24 |
May 09 04:25:30 PM PDT 24 |
3127251230 ps |
| T320 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.2871076595 |
|
|
May 09 04:07:37 PM PDT 24 |
May 09 04:18:53 PM PDT 24 |
4227763864 ps |
| T1138 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.1171327762 |
|
|
May 09 04:45:43 PM PDT 24 |
May 09 04:55:55 PM PDT 24 |
4596087698 ps |
| T737 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.4123995304 |
|
|
May 09 04:46:43 PM PDT 24 |
May 09 04:57:44 PM PDT 24 |
5798113496 ps |
| T1139 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.90328738 |
|
|
May 09 04:45:27 PM PDT 24 |
May 09 04:55:43 PM PDT 24 |
7490188690 ps |
| T1140 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.2055285622 |
|
|
May 09 04:10:09 PM PDT 24 |
May 09 04:28:20 PM PDT 24 |
5004147378 ps |
| T1141 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.4147894273 |
|
|
May 09 04:43:07 PM PDT 24 |
May 09 04:46:24 PM PDT 24 |
2811404305 ps |
| T305 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.2145984430 |
|
|
May 09 04:40:20 PM PDT 24 |
May 09 04:53:51 PM PDT 24 |
5635244760 ps |
| T1142 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.1192684454 |
|
|
May 09 04:20:44 PM PDT 24 |
May 09 04:23:34 PM PDT 24 |
2451869568 ps |
| T1143 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.4134960495 |
|
|
May 09 04:22:32 PM PDT 24 |
May 09 04:36:54 PM PDT 24 |
5420474816 ps |
| T1144 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.3474485922 |
|
|
May 09 04:12:51 PM PDT 24 |
May 09 04:17:37 PM PDT 24 |
2855480876 ps |
| T1145 |
/workspace/coverage/default/2.chip_sw_example_concurrency.3577666456 |
|
|
May 09 04:36:11 PM PDT 24 |
May 09 04:39:56 PM PDT 24 |
3270011780 ps |
| T1146 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.546642244 |
|
|
May 09 04:40:28 PM PDT 24 |
May 09 04:57:44 PM PDT 24 |
7223295960 ps |
| T1147 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2746808058 |
|
|
May 09 04:21:11 PM PDT 24 |
May 09 07:54:02 PM PDT 24 |
254776657316 ps |
| T1148 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2475807526 |
|
|
May 09 04:10:49 PM PDT 24 |
May 09 04:21:59 PM PDT 24 |
4191989568 ps |
| T748 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.18175428 |
|
|
May 09 04:47:49 PM PDT 24 |
May 09 04:57:22 PM PDT 24 |
5502055008 ps |
| T290 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.3046190640 |
|
|
May 09 04:18:55 PM PDT 24 |
May 09 04:45:50 PM PDT 24 |
11754548524 ps |
| T250 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.652655402 |
|
|
May 09 04:53:06 PM PDT 24 |
May 09 05:00:09 PM PDT 24 |
3436768064 ps |
| T492 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.4245573905 |
|
|
May 09 04:10:41 PM PDT 24 |
May 09 04:22:08 PM PDT 24 |
5024780902 ps |
| T1149 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.1326170514 |
|
|
May 09 04:45:27 PM PDT 24 |
May 09 05:05:28 PM PDT 24 |
7795507080 ps |
| T1150 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.3589319011 |
|
|
May 09 04:42:19 PM PDT 24 |
May 09 04:54:16 PM PDT 24 |
9707141986 ps |
| T714 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.3560929191 |
|
|
May 09 04:44:07 PM PDT 24 |
May 09 04:49:36 PM PDT 24 |
3703379272 ps |
| T306 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.729062953 |
|
|
May 09 04:22:31 PM PDT 24 |
May 09 04:49:16 PM PDT 24 |
8051128280 ps |