| T925 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.455598868 |
|
|
May 14 03:37:24 PM PDT 24 |
May 14 03:52:24 PM PDT 24 |
5496773504 ps |
| T146 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3894190123 |
|
|
May 14 03:33:00 PM PDT 24 |
May 14 03:42:32 PM PDT 24 |
5481026138 ps |
| T203 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.147982895 |
|
|
May 14 03:31:36 PM PDT 24 |
May 14 03:41:13 PM PDT 24 |
4545618968 ps |
| T751 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.2110344586 |
|
|
May 14 03:57:10 PM PDT 24 |
May 14 04:04:40 PM PDT 24 |
3987038088 ps |
| T926 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.935955779 |
|
|
May 14 03:41:49 PM PDT 24 |
May 14 04:04:12 PM PDT 24 |
5982463792 ps |
| T23 |
/workspace/coverage/default/2.chip_sw_gpio.3014992094 |
|
|
May 14 03:43:31 PM PDT 24 |
May 14 03:51:00 PM PDT 24 |
3899378630 ps |
| T927 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.2813563504 |
|
|
May 14 03:50:41 PM PDT 24 |
May 14 03:55:54 PM PDT 24 |
3355521360 ps |
| T928 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1799739696 |
|
|
May 14 03:34:37 PM PDT 24 |
May 14 03:44:22 PM PDT 24 |
4596608680 ps |
| T173 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2168095802 |
|
|
May 14 03:53:53 PM PDT 24 |
May 14 04:49:29 PM PDT 24 |
24109700334 ps |
| T190 |
/workspace/coverage/default/3.chip_tap_straps_dev.3405895264 |
|
|
May 14 03:51:53 PM PDT 24 |
May 14 04:00:57 PM PDT 24 |
6592411777 ps |
| T749 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.2368379407 |
|
|
May 14 03:53:28 PM PDT 24 |
May 14 03:59:18 PM PDT 24 |
3319095372 ps |
| T929 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.3694559811 |
|
|
May 14 03:34:22 PM PDT 24 |
May 14 03:41:04 PM PDT 24 |
7298935192 ps |
| T754 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.1635094509 |
|
|
May 14 03:58:24 PM PDT 24 |
May 14 04:08:15 PM PDT 24 |
4604982128 ps |
| T278 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.2130196256 |
|
|
May 14 03:55:09 PM PDT 24 |
May 14 04:00:54 PM PDT 24 |
3962134540 ps |
| T229 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.1486100839 |
|
|
May 14 03:58:45 PM PDT 24 |
May 14 04:05:18 PM PDT 24 |
2924373656 ps |
| T930 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1854529186 |
|
|
May 14 03:31:29 PM PDT 24 |
May 14 03:38:59 PM PDT 24 |
4274970247 ps |
| T779 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.53777604 |
|
|
May 14 03:59:42 PM PDT 24 |
May 14 04:13:14 PM PDT 24 |
5221080248 ps |
| T817 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.2764618917 |
|
|
May 14 03:58:20 PM PDT 24 |
May 14 04:06:37 PM PDT 24 |
4212378982 ps |
| T54 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.1898526416 |
|
|
May 14 03:42:30 PM PDT 24 |
May 14 03:45:53 PM PDT 24 |
2629521750 ps |
| T388 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.499996455 |
|
|
May 14 03:36:20 PM PDT 24 |
May 14 03:40:41 PM PDT 24 |
2842586433 ps |
| T389 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.1170997813 |
|
|
May 14 03:59:38 PM PDT 24 |
May 14 04:04:44 PM PDT 24 |
3644719640 ps |
| T390 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1857646141 |
|
|
May 14 03:49:24 PM PDT 24 |
May 14 03:59:14 PM PDT 24 |
3846569540 ps |
| T291 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.457077884 |
|
|
May 14 03:32:01 PM PDT 24 |
May 14 03:43:23 PM PDT 24 |
3756840880 ps |
| T24 |
/workspace/coverage/default/0.chip_sw_gpio.1597751979 |
|
|
May 14 03:31:04 PM PDT 24 |
May 14 03:36:59 PM PDT 24 |
3740990325 ps |
| T391 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.33543313 |
|
|
May 14 03:43:50 PM PDT 24 |
May 14 03:52:12 PM PDT 24 |
3294806936 ps |
| T392 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.3005665077 |
|
|
May 14 03:33:32 PM PDT 24 |
May 14 03:38:27 PM PDT 24 |
2548555591 ps |
| T51 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.2865903742 |
|
|
May 14 03:39:33 PM PDT 24 |
May 14 03:47:14 PM PDT 24 |
3924645104 ps |
| T393 |
/workspace/coverage/default/2.chip_sw_edn_kat.1976865656 |
|
|
May 14 03:46:30 PM PDT 24 |
May 14 03:56:12 PM PDT 24 |
3664415644 ps |
| T147 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.835409203 |
|
|
May 14 03:49:00 PM PDT 24 |
May 14 03:59:03 PM PDT 24 |
4958414670 ps |
| T19 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.281007648 |
|
|
May 14 03:45:54 PM PDT 24 |
May 14 04:14:59 PM PDT 24 |
22636888628 ps |
| T152 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.3979434999 |
|
|
May 14 03:48:48 PM PDT 24 |
May 14 04:02:53 PM PDT 24 |
9537953870 ps |
| T721 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.2551611033 |
|
|
May 14 03:38:58 PM PDT 24 |
May 14 03:45:43 PM PDT 24 |
3419241960 ps |
| T163 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3381604627 |
|
|
May 14 03:40:10 PM PDT 24 |
May 14 03:47:50 PM PDT 24 |
4299347241 ps |
| T303 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.1214523356 |
|
|
May 14 03:34:28 PM PDT 24 |
May 14 03:46:13 PM PDT 24 |
4803006450 ps |
| T722 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3558554032 |
|
|
May 14 03:34:37 PM PDT 24 |
May 14 03:38:55 PM PDT 24 |
2772134982 ps |
| T293 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3347897414 |
|
|
May 14 03:49:44 PM PDT 24 |
May 14 04:02:27 PM PDT 24 |
5020650892 ps |
| T792 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.1866709232 |
|
|
May 14 03:59:06 PM PDT 24 |
May 14 04:07:19 PM PDT 24 |
4200547800 ps |
| T21 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.1234268926 |
|
|
May 14 03:34:35 PM PDT 24 |
May 14 05:26:40 PM PDT 24 |
31348237910 ps |
| T812 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.2761493626 |
|
|
May 14 03:59:04 PM PDT 24 |
May 14 04:05:34 PM PDT 24 |
3451386248 ps |
| T72 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.1855259031 |
|
|
May 14 03:43:59 PM PDT 24 |
May 14 07:34:42 PM PDT 24 |
77405906195 ps |
| T737 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.883313791 |
|
|
May 14 04:04:01 PM PDT 24 |
May 14 04:15:17 PM PDT 24 |
5305738816 ps |
| T931 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.2596410211 |
|
|
May 14 03:52:51 PM PDT 24 |
May 14 04:22:29 PM PDT 24 |
8135307610 ps |
| T932 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.116564214 |
|
|
May 14 03:35:12 PM PDT 24 |
May 14 03:38:47 PM PDT 24 |
3292170376 ps |
| T933 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.1758283272 |
|
|
May 14 03:45:31 PM PDT 24 |
May 14 03:52:39 PM PDT 24 |
4606480068 ps |
| T22 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.770229618 |
|
|
May 14 03:35:34 PM PDT 24 |
May 14 04:51:27 PM PDT 24 |
18957305888 ps |
| T757 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.2913875108 |
|
|
May 14 04:00:05 PM PDT 24 |
May 14 04:06:17 PM PDT 24 |
3724512384 ps |
| T191 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.2276776614 |
|
|
May 14 03:41:47 PM PDT 24 |
May 14 03:45:42 PM PDT 24 |
2671000710 ps |
| T108 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.690259009 |
|
|
May 14 03:34:02 PM PDT 24 |
May 14 03:42:13 PM PDT 24 |
6164277404 ps |
| T934 |
/workspace/coverage/default/0.chip_sw_aes_idle.2303148985 |
|
|
May 14 03:33:53 PM PDT 24 |
May 14 03:37:48 PM PDT 24 |
2573693096 ps |
| T935 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.202635081 |
|
|
May 14 03:35:09 PM PDT 24 |
May 14 04:21:10 PM PDT 24 |
37055678248 ps |
| T731 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.2241957111 |
|
|
May 14 03:57:49 PM PDT 24 |
May 14 04:05:16 PM PDT 24 |
3339764698 ps |
| T155 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.790098534 |
|
|
May 14 03:38:34 PM PDT 24 |
May 14 03:49:26 PM PDT 24 |
8175473724 ps |
| T936 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3141869086 |
|
|
May 14 03:36:00 PM PDT 24 |
May 14 03:43:30 PM PDT 24 |
5427596888 ps |
| T937 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3767681048 |
|
|
May 14 03:46:22 PM PDT 24 |
May 14 03:54:07 PM PDT 24 |
5979047918 ps |
| T938 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.1014607358 |
|
|
May 14 03:39:12 PM PDT 24 |
May 14 04:23:01 PM PDT 24 |
25330350571 ps |
| T708 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.3034258337 |
|
|
May 14 03:35:41 PM PDT 24 |
May 14 03:39:42 PM PDT 24 |
2894234110 ps |
| T939 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1371128261 |
|
|
May 14 03:37:33 PM PDT 24 |
May 14 03:48:49 PM PDT 24 |
4553753300 ps |
| T940 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1081756744 |
|
|
May 14 03:36:18 PM PDT 24 |
May 14 03:55:17 PM PDT 24 |
10204301954 ps |
| T941 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.1527193589 |
|
|
May 14 03:52:07 PM PDT 24 |
May 14 04:04:25 PM PDT 24 |
4464259140 ps |
| T942 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.3489621432 |
|
|
May 14 03:35:54 PM PDT 24 |
May 14 03:40:31 PM PDT 24 |
3487364925 ps |
| T772 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.4236034346 |
|
|
May 14 03:59:09 PM PDT 24 |
May 14 04:10:02 PM PDT 24 |
5158499480 ps |
| T340 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.33094178 |
|
|
May 14 03:36:37 PM PDT 24 |
May 14 03:46:53 PM PDT 24 |
3126130248 ps |
| T109 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.1027856303 |
|
|
May 14 03:36:09 PM PDT 24 |
May 14 03:47:53 PM PDT 24 |
7466636727 ps |
| T346 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.2016858483 |
|
|
May 14 03:49:56 PM PDT 24 |
May 14 03:53:16 PM PDT 24 |
2840181960 ps |
| T734 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2222532600 |
|
|
May 14 04:00:01 PM PDT 24 |
May 14 04:05:57 PM PDT 24 |
3958290928 ps |
| T943 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.3822904303 |
|
|
May 14 03:32:51 PM PDT 24 |
May 14 03:40:09 PM PDT 24 |
3924229400 ps |
| T169 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.1903404922 |
|
|
May 14 03:36:09 PM PDT 24 |
May 14 04:17:49 PM PDT 24 |
11922153797 ps |
| T944 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.3221814295 |
|
|
May 14 03:51:12 PM PDT 24 |
May 14 03:57:17 PM PDT 24 |
3071518100 ps |
| T945 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.112352104 |
|
|
May 14 03:39:06 PM PDT 24 |
May 14 03:45:53 PM PDT 24 |
4328914452 ps |
| T946 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.2977882669 |
|
|
May 14 03:35:50 PM PDT 24 |
May 14 03:44:38 PM PDT 24 |
4134909020 ps |
| T38 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.2978718123 |
|
|
May 14 03:34:11 PM PDT 24 |
May 14 03:41:17 PM PDT 24 |
3703217618 ps |
| T947 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.4143210785 |
|
|
May 14 03:45:37 PM PDT 24 |
May 14 04:00:03 PM PDT 24 |
8076432148 ps |
| T292 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.2382232760 |
|
|
May 14 03:44:24 PM PDT 24 |
May 14 03:55:52 PM PDT 24 |
4449166941 ps |
| T32 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.618312776 |
|
|
May 14 03:43:40 PM PDT 24 |
May 14 03:48:20 PM PDT 24 |
3228702648 ps |
| T948 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.4022656496 |
|
|
May 14 03:41:34 PM PDT 24 |
May 14 03:46:09 PM PDT 24 |
2901207050 ps |
| T780 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.3638796005 |
|
|
May 14 03:53:25 PM PDT 24 |
May 14 04:02:22 PM PDT 24 |
4132150140 ps |
| T227 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2963375532 |
|
|
May 14 03:52:50 PM PDT 24 |
May 14 04:02:52 PM PDT 24 |
4397478220 ps |
| T826 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.2667678035 |
|
|
May 14 03:59:54 PM PDT 24 |
May 14 04:08:40 PM PDT 24 |
5316450900 ps |
| T803 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.3592381911 |
|
|
May 14 03:59:32 PM PDT 24 |
May 14 04:05:46 PM PDT 24 |
3692951362 ps |
| T949 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.991177168 |
|
|
May 14 03:47:27 PM PDT 24 |
May 14 03:56:05 PM PDT 24 |
3848988792 ps |
| T950 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.185164473 |
|
|
May 14 03:33:08 PM PDT 24 |
May 14 03:36:28 PM PDT 24 |
2662947384 ps |
| T750 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.3813687251 |
|
|
May 14 03:55:22 PM PDT 24 |
May 14 04:01:48 PM PDT 24 |
3576874160 ps |
| T951 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.1128276549 |
|
|
May 14 03:56:13 PM PDT 24 |
May 14 04:24:06 PM PDT 24 |
7700857816 ps |
| T255 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.1753652614 |
|
|
May 14 03:35:07 PM PDT 24 |
May 14 03:44:20 PM PDT 24 |
4133798830 ps |
| T952 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.2641717437 |
|
|
May 14 03:35:18 PM PDT 24 |
May 14 03:47:49 PM PDT 24 |
4519155120 ps |
| T127 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.1314563025 |
|
|
May 14 03:41:36 PM PDT 24 |
May 14 03:48:42 PM PDT 24 |
7049773798 ps |
| T797 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.24614173 |
|
|
May 14 04:01:14 PM PDT 24 |
May 14 04:06:28 PM PDT 24 |
3501438072 ps |
| T787 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.1516022458 |
|
|
May 14 03:58:20 PM PDT 24 |
May 14 04:04:17 PM PDT 24 |
4352678040 ps |
| T953 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.4097968234 |
|
|
May 14 03:34:07 PM PDT 24 |
May 14 03:46:43 PM PDT 24 |
9238443500 ps |
| T954 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.3271188618 |
|
|
May 14 03:54:26 PM PDT 24 |
May 14 04:38:20 PM PDT 24 |
12910286344 ps |
| T955 |
/workspace/coverage/default/1.chip_sw_kmac_idle.979715896 |
|
|
May 14 03:35:39 PM PDT 24 |
May 14 03:40:41 PM PDT 24 |
2830776040 ps |
| T219 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1636091007 |
|
|
May 14 03:35:31 PM PDT 24 |
May 14 04:12:24 PM PDT 24 |
9744007472 ps |
| T128 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3832941189 |
|
|
May 14 03:32:41 PM PDT 24 |
May 14 03:40:43 PM PDT 24 |
7205621338 ps |
| T956 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.2714252649 |
|
|
May 14 03:47:49 PM PDT 24 |
May 14 03:53:15 PM PDT 24 |
2875791896 ps |
| T806 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.3689401510 |
|
|
May 14 03:57:22 PM PDT 24 |
May 14 04:09:37 PM PDT 24 |
6676399064 ps |
| T161 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.711005549 |
|
|
May 14 03:36:49 PM PDT 24 |
May 14 03:44:35 PM PDT 24 |
7438662614 ps |
| T756 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.1607529364 |
|
|
May 14 03:55:12 PM PDT 24 |
May 14 04:03:47 PM PDT 24 |
3478759620 ps |
| T957 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3971098522 |
|
|
May 14 03:38:42 PM PDT 24 |
May 14 03:48:41 PM PDT 24 |
4173523192 ps |
| T55 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.157366110 |
|
|
May 14 03:33:22 PM PDT 24 |
May 14 03:38:20 PM PDT 24 |
3273310480 ps |
| T370 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.1550088079 |
|
|
May 14 03:54:54 PM PDT 24 |
May 14 04:07:07 PM PDT 24 |
4902978078 ps |
| T362 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.1582563274 |
|
|
May 14 03:48:19 PM PDT 24 |
May 14 04:04:36 PM PDT 24 |
5468527720 ps |
| T371 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.1448351340 |
|
|
May 14 04:01:13 PM PDT 24 |
May 14 04:06:57 PM PDT 24 |
4030059096 ps |
| T372 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.1848319715 |
|
|
May 14 04:01:03 PM PDT 24 |
May 14 04:07:08 PM PDT 24 |
3266184650 ps |
| T373 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.4067829416 |
|
|
May 14 03:57:47 PM PDT 24 |
May 14 04:08:55 PM PDT 24 |
4228380440 ps |
| T374 |
/workspace/coverage/default/1.chip_sw_edn_kat.1044476338 |
|
|
May 14 03:35:24 PM PDT 24 |
May 14 03:45:50 PM PDT 24 |
3316160750 ps |
| T375 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.1984569784 |
|
|
May 14 03:38:32 PM PDT 24 |
May 14 03:45:01 PM PDT 24 |
4494895332 ps |
| T376 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.395745072 |
|
|
May 14 03:55:58 PM PDT 24 |
May 14 04:03:47 PM PDT 24 |
3508979498 ps |
| T377 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.1202560435 |
|
|
May 14 03:41:59 PM PDT 24 |
May 14 03:46:55 PM PDT 24 |
2916889476 ps |
| T958 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1112618025 |
|
|
May 14 03:49:43 PM PDT 24 |
May 14 04:00:47 PM PDT 24 |
4093046120 ps |
| T959 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.2349124561 |
|
|
May 14 03:41:59 PM PDT 24 |
May 14 03:46:33 PM PDT 24 |
3760615670 ps |
| T960 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.1630000860 |
|
|
May 14 03:44:34 PM PDT 24 |
May 14 03:55:27 PM PDT 24 |
4185020436 ps |
| T66 |
/workspace/coverage/default/2.chip_jtag_csr_rw.2521219555 |
|
|
May 14 03:41:38 PM PDT 24 |
May 14 04:00:53 PM PDT 24 |
10877321690 ps |
| T961 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.699666058 |
|
|
May 14 03:37:32 PM PDT 24 |
May 14 03:48:20 PM PDT 24 |
6763038632 ps |
| T735 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.451365344 |
|
|
May 14 03:54:30 PM PDT 24 |
May 14 04:01:23 PM PDT 24 |
3712080440 ps |
| T20 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.643960696 |
|
|
May 14 03:37:07 PM PDT 24 |
May 14 04:30:49 PM PDT 24 |
20027376465 ps |
| T295 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.4282448880 |
|
|
May 14 03:38:57 PM PDT 24 |
May 14 03:51:05 PM PDT 24 |
5539406707 ps |
| T962 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.2914030226 |
|
|
May 14 03:51:07 PM PDT 24 |
May 14 04:00:52 PM PDT 24 |
3846243824 ps |
| T963 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.3360497191 |
|
|
May 14 03:46:51 PM PDT 24 |
May 14 03:54:31 PM PDT 24 |
4136855188 ps |
| T315 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.253701169 |
|
|
May 14 03:35:31 PM PDT 24 |
May 14 03:46:07 PM PDT 24 |
4932819765 ps |
| T769 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.2566897085 |
|
|
May 14 03:58:56 PM PDT 24 |
May 14 04:08:55 PM PDT 24 |
6045699292 ps |
| T964 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.1715902647 |
|
|
May 14 04:03:16 PM PDT 24 |
May 14 04:14:07 PM PDT 24 |
6278127188 ps |
| T153 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.2133679931 |
|
|
May 14 03:50:38 PM PDT 24 |
May 14 03:54:54 PM PDT 24 |
2955396653 ps |
| T793 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.1550221808 |
|
|
May 14 03:59:40 PM PDT 24 |
May 14 04:07:44 PM PDT 24 |
3643052256 ps |
| T766 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.1934884405 |
|
|
May 14 03:31:48 PM PDT 24 |
May 14 03:46:06 PM PDT 24 |
5644602520 ps |
| T111 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.4026179705 |
|
|
May 14 03:31:32 PM PDT 24 |
May 14 03:37:11 PM PDT 24 |
3138358114 ps |
| T801 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.2598948483 |
|
|
May 14 03:55:17 PM PDT 24 |
May 14 04:01:48 PM PDT 24 |
3870847410 ps |
| T965 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.4134330438 |
|
|
May 14 03:35:23 PM PDT 24 |
May 14 03:49:33 PM PDT 24 |
7603115660 ps |
| T966 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.1437723944 |
|
|
May 14 03:34:06 PM PDT 24 |
May 14 03:39:15 PM PDT 24 |
3047504072 ps |
| T967 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.2641870477 |
|
|
May 14 03:54:11 PM PDT 24 |
May 14 04:06:09 PM PDT 24 |
4343321400 ps |
| T968 |
/workspace/coverage/default/0.chip_sw_edn_kat.2219553198 |
|
|
May 14 03:33:52 PM PDT 24 |
May 14 03:44:13 PM PDT 24 |
3272617200 ps |
| T770 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.1996612902 |
|
|
May 14 03:54:27 PM PDT 24 |
May 14 04:00:45 PM PDT 24 |
4351622472 ps |
| T969 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.2971560247 |
|
|
May 14 03:32:37 PM PDT 24 |
May 14 03:40:15 PM PDT 24 |
3850279134 ps |
| T232 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.3946219326 |
|
|
May 14 03:34:22 PM PDT 24 |
May 14 03:40:24 PM PDT 24 |
3012423640 ps |
| T704 |
/workspace/coverage/default/1.chip_sw_power_idle_load.691704852 |
|
|
May 14 03:39:54 PM PDT 24 |
May 14 03:49:31 PM PDT 24 |
4179844246 ps |
| T970 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.784951211 |
|
|
May 14 03:32:55 PM PDT 24 |
May 14 03:36:47 PM PDT 24 |
2750975162 ps |
| T971 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.3129656569 |
|
|
May 14 03:48:47 PM PDT 24 |
May 14 03:57:59 PM PDT 24 |
4825116264 ps |
| T785 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.493639676 |
|
|
May 14 04:03:17 PM PDT 24 |
May 14 04:08:48 PM PDT 24 |
3947217080 ps |
| T972 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.2630614340 |
|
|
May 14 03:33:49 PM PDT 24 |
May 14 04:03:25 PM PDT 24 |
8512359680 ps |
| T973 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.3258511669 |
|
|
May 14 03:51:17 PM PDT 24 |
May 14 03:55:18 PM PDT 24 |
2297599798 ps |
| T786 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.4258525762 |
|
|
May 14 03:58:56 PM PDT 24 |
May 14 04:07:19 PM PDT 24 |
4488361360 ps |
| T974 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.1416751715 |
|
|
May 14 03:55:07 PM PDT 24 |
May 14 04:03:42 PM PDT 24 |
3377228136 ps |
| T139 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.4023626330 |
|
|
May 14 03:38:50 PM PDT 24 |
May 14 03:50:03 PM PDT 24 |
4266731926 ps |
| T474 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.831764280 |
|
|
May 14 03:48:09 PM PDT 24 |
May 14 04:04:30 PM PDT 24 |
5262268380 ps |
| T288 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.1723396424 |
|
|
May 14 03:50:47 PM PDT 24 |
May 14 04:09:13 PM PDT 24 |
5478762644 ps |
| T319 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.1741707220 |
|
|
May 14 03:43:59 PM PDT 24 |
May 14 03:52:27 PM PDT 24 |
4110081664 ps |
| T975 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.94287085 |
|
|
May 14 03:41:01 PM PDT 24 |
May 14 03:46:25 PM PDT 24 |
3381163910 ps |
| T299 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.94307547 |
|
|
May 14 03:47:06 PM PDT 24 |
May 14 04:06:49 PM PDT 24 |
5061908156 ps |
| T976 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.2106089533 |
|
|
May 14 03:43:20 PM PDT 24 |
May 14 03:47:14 PM PDT 24 |
3306059326 ps |
| T91 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.729078868 |
|
|
May 14 03:59:20 PM PDT 24 |
May 14 04:10:17 PM PDT 24 |
5128819284 ps |
| T977 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.3441896699 |
|
|
May 14 03:36:15 PM PDT 24 |
May 14 03:41:11 PM PDT 24 |
2471459692 ps |
| T363 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.1741208367 |
|
|
May 14 03:33:38 PM PDT 24 |
May 14 04:55:17 PM PDT 24 |
19147658732 ps |
| T978 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.497380122 |
|
|
May 14 03:50:40 PM PDT 24 |
May 14 03:56:47 PM PDT 24 |
3199061980 ps |
| T979 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.3657114998 |
|
|
May 14 03:33:53 PM PDT 24 |
May 14 03:49:06 PM PDT 24 |
8912612312 ps |
| T331 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.3038039186 |
|
|
May 14 03:55:27 PM PDT 24 |
May 14 04:06:53 PM PDT 24 |
5181791612 ps |
| T788 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.159295645 |
|
|
May 14 03:57:49 PM PDT 24 |
May 14 04:04:31 PM PDT 24 |
3237816214 ps |
| T67 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2452690626 |
|
|
May 14 03:49:08 PM PDT 24 |
May 14 03:56:42 PM PDT 24 |
4627703994 ps |
| T980 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.4126048444 |
|
|
May 14 03:51:57 PM PDT 24 |
May 14 03:55:50 PM PDT 24 |
3183358540 ps |
| T768 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.4184165540 |
|
|
May 14 04:00:07 PM PDT 24 |
May 14 04:11:44 PM PDT 24 |
5767724106 ps |
| T981 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.2794801183 |
|
|
May 14 03:45:28 PM PDT 24 |
May 14 03:54:33 PM PDT 24 |
8473655064 ps |
| T982 |
/workspace/coverage/default/0.chip_sw_kmac_idle.338337546 |
|
|
May 14 03:33:11 PM PDT 24 |
May 14 03:36:33 PM PDT 24 |
2675549948 ps |
| T983 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.1323515339 |
|
|
May 14 03:34:55 PM PDT 24 |
May 14 03:39:46 PM PDT 24 |
3334455492 ps |
| T984 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.2238484656 |
|
|
May 14 03:33:39 PM PDT 24 |
May 14 03:52:29 PM PDT 24 |
7129993372 ps |
| T985 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.962478214 |
|
|
May 14 03:33:56 PM PDT 24 |
May 14 03:38:13 PM PDT 24 |
2166171624 ps |
| T986 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.211532947 |
|
|
May 14 03:33:46 PM PDT 24 |
May 14 03:46:00 PM PDT 24 |
6007451056 ps |
| T987 |
/workspace/coverage/default/1.chip_sw_aes_enc.1133329255 |
|
|
May 14 03:39:35 PM PDT 24 |
May 14 03:46:03 PM PDT 24 |
2843332302 ps |
| T220 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1700356379 |
|
|
May 14 03:37:15 PM PDT 24 |
May 14 04:31:36 PM PDT 24 |
13429919580 ps |
| T988 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.2286416741 |
|
|
May 14 03:34:19 PM PDT 24 |
May 14 03:39:01 PM PDT 24 |
2689419150 ps |
| T989 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.818377296 |
|
|
May 14 03:35:52 PM PDT 24 |
May 14 03:42:25 PM PDT 24 |
4844207360 ps |
| T738 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.1407918101 |
|
|
May 14 03:55:27 PM PDT 24 |
May 14 04:07:08 PM PDT 24 |
5867935266 ps |
| T990 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2411916876 |
|
|
May 14 03:41:32 PM PDT 24 |
May 14 04:11:01 PM PDT 24 |
9386555578 ps |
| T300 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.2297829131 |
|
|
May 14 03:36:19 PM PDT 24 |
May 14 03:59:43 PM PDT 24 |
7138331826 ps |
| T102 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.2916614543 |
|
|
May 14 03:44:51 PM PDT 24 |
May 14 04:06:45 PM PDT 24 |
7935265256 ps |
| T991 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.4243685926 |
|
|
May 14 03:37:07 PM PDT 24 |
May 14 04:05:03 PM PDT 24 |
7837158760 ps |
| T95 |
/workspace/coverage/default/1.chip_sw_flash_init.1721965560 |
|
|
May 14 03:35:24 PM PDT 24 |
May 14 04:06:59 PM PDT 24 |
19116994888 ps |
| T350 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.3782773660 |
|
|
May 14 03:48:14 PM PDT 24 |
May 14 04:16:04 PM PDT 24 |
7516639534 ps |
| T992 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.3215477831 |
|
|
May 14 03:54:28 PM PDT 24 |
May 14 04:04:30 PM PDT 24 |
5727876700 ps |
| T807 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.968925756 |
|
|
May 14 03:58:32 PM PDT 24 |
May 14 04:06:20 PM PDT 24 |
3621915904 ps |
| T96 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.2892311647 |
|
|
May 14 03:38:56 PM PDT 24 |
May 14 04:11:40 PM PDT 24 |
17363644463 ps |
| T993 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.3836172163 |
|
|
May 14 03:48:49 PM PDT 24 |
May 14 03:54:03 PM PDT 24 |
3288248784 ps |
| T994 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.3652622514 |
|
|
May 14 03:41:23 PM PDT 24 |
May 14 03:54:17 PM PDT 24 |
5718539992 ps |
| T995 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1867954325 |
|
|
May 14 03:50:07 PM PDT 24 |
May 14 04:12:33 PM PDT 24 |
7902378292 ps |
| T742 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.351070775 |
|
|
May 14 03:55:52 PM PDT 24 |
May 14 04:06:18 PM PDT 24 |
5876096128 ps |
| T284 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.2794410189 |
|
|
May 14 03:33:31 PM PDT 24 |
May 14 04:09:44 PM PDT 24 |
12305868984 ps |
| T107 |
/workspace/coverage/default/3.chip_tap_straps_rma.1577254654 |
|
|
May 14 03:52:48 PM PDT 24 |
May 14 04:01:42 PM PDT 24 |
6031450634 ps |
| T268 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.323878173 |
|
|
May 14 03:40:11 PM PDT 24 |
May 14 03:44:34 PM PDT 24 |
2820784976 ps |
| T775 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.1473282920 |
|
|
May 14 04:01:21 PM PDT 24 |
May 14 04:08:36 PM PDT 24 |
3187981992 ps |
| T287 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.4095073122 |
|
|
May 14 03:48:29 PM PDT 24 |
May 14 03:59:44 PM PDT 24 |
4426502152 ps |
| T996 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.1340003289 |
|
|
May 14 03:33:33 PM PDT 24 |
May 14 03:36:43 PM PDT 24 |
2520330616 ps |
| T747 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.3222343283 |
|
|
May 14 03:58:43 PM PDT 24 |
May 14 04:05:11 PM PDT 24 |
3592342384 ps |
| T997 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.3605516621 |
|
|
May 14 03:34:53 PM PDT 24 |
May 14 03:40:21 PM PDT 24 |
3208486728 ps |
| T998 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.4053423006 |
|
|
May 14 03:44:23 PM PDT 24 |
May 14 03:47:23 PM PDT 24 |
1825898288 ps |
| T115 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2223311613 |
|
|
May 14 03:36:15 PM PDT 24 |
May 14 07:16:43 PM PDT 24 |
256328031660 ps |
| T999 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2224010087 |
|
|
May 14 03:34:05 PM PDT 24 |
May 14 03:43:08 PM PDT 24 |
4165059464 ps |
| T301 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.56609830 |
|
|
May 14 03:43:33 PM PDT 24 |
May 14 03:55:18 PM PDT 24 |
4117593206 ps |
| T1000 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.1451566376 |
|
|
May 14 03:54:06 PM PDT 24 |
May 14 04:20:50 PM PDT 24 |
8001374582 ps |
| T776 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.903165058 |
|
|
May 14 03:54:44 PM PDT 24 |
May 14 04:04:43 PM PDT 24 |
5174928840 ps |
| T1001 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.3130784033 |
|
|
May 14 03:33:42 PM PDT 24 |
May 14 03:49:28 PM PDT 24 |
6025631162 ps |
| T827 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.1562425676 |
|
|
May 14 03:55:21 PM PDT 24 |
May 14 04:03:08 PM PDT 24 |
3929665300 ps |
| T332 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.4076916597 |
|
|
May 14 04:04:01 PM PDT 24 |
May 14 04:09:24 PM PDT 24 |
3594320266 ps |
| T790 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.4048213880 |
|
|
May 14 03:58:14 PM PDT 24 |
May 14 04:07:13 PM PDT 24 |
4742085480 ps |
| T1002 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3151177152 |
|
|
May 14 03:39:15 PM PDT 24 |
May 14 03:43:49 PM PDT 24 |
3293727991 ps |
| T140 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.30288798 |
|
|
May 14 03:49:03 PM PDT 24 |
May 14 03:58:48 PM PDT 24 |
3827265534 ps |
| T1003 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.4057341013 |
|
|
May 14 03:50:23 PM PDT 24 |
May 14 03:57:19 PM PDT 24 |
5023492544 ps |
| T1004 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.1435956252 |
|
|
May 14 03:45:22 PM PDT 24 |
May 14 03:51:41 PM PDT 24 |
2925552060 ps |
| T764 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.3852747537 |
|
|
May 14 03:51:23 PM PDT 24 |
May 14 03:58:54 PM PDT 24 |
3897908528 ps |
| T1005 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1320862935 |
|
|
May 14 03:53:02 PM PDT 24 |
May 14 04:03:50 PM PDT 24 |
4395844549 ps |
| T142 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.1952991027 |
|
|
May 14 03:37:14 PM PDT 24 |
May 14 03:42:07 PM PDT 24 |
3369973818 ps |
| T720 |
/workspace/coverage/default/2.chip_sw_power_idle_load.238033537 |
|
|
May 14 03:51:01 PM PDT 24 |
May 14 04:02:52 PM PDT 24 |
4843436712 ps |
| T1006 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.3302147022 |
|
|
May 14 03:33:52 PM PDT 24 |
May 14 03:58:38 PM PDT 24 |
11039457907 ps |
| T256 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.558487959 |
|
|
May 14 03:33:53 PM PDT 24 |
May 14 03:41:34 PM PDT 24 |
3587382974 ps |
| T239 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.3698213611 |
|
|
May 14 03:53:13 PM PDT 24 |
May 14 04:02:20 PM PDT 24 |
4725462966 ps |
| T1007 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.2219499541 |
|
|
May 14 03:37:44 PM PDT 24 |
May 14 03:47:41 PM PDT 24 |
5514166266 ps |
| T809 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.525447550 |
|
|
May 14 03:43:24 PM PDT 24 |
May 14 03:53:23 PM PDT 24 |
6015120808 ps |
| T1008 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.2271254743 |
|
|
May 14 03:34:38 PM PDT 24 |
May 14 04:33:01 PM PDT 24 |
17564015128 ps |
| T804 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.1766937029 |
|
|
May 14 03:59:16 PM PDT 24 |
May 14 04:07:13 PM PDT 24 |
5662902606 ps |
| T1009 |
/workspace/coverage/default/0.chip_sw_power_idle_load.2158118166 |
|
|
May 14 03:34:53 PM PDT 24 |
May 14 03:46:08 PM PDT 24 |
4526670960 ps |
| T1010 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.129727932 |
|
|
May 14 03:37:22 PM PDT 24 |
May 14 03:41:34 PM PDT 24 |
3126840340 ps |
| T1011 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.1042159079 |
|
|
May 14 03:46:46 PM PDT 24 |
May 14 03:57:10 PM PDT 24 |
5383330982 ps |
| T1012 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.2566925873 |
|
|
May 14 03:56:29 PM PDT 24 |
May 14 04:04:26 PM PDT 24 |
3962934430 ps |
| T1013 |
/workspace/coverage/default/2.chip_sw_example_flash.1001380883 |
|
|
May 14 03:42:02 PM PDT 24 |
May 14 03:45:26 PM PDT 24 |
3071436632 ps |
| T257 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.580057051 |
|
|
May 14 03:49:02 PM PDT 24 |
May 14 03:58:59 PM PDT 24 |
5312642254 ps |
| T709 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.2587549011 |
|
|
May 14 03:47:05 PM PDT 24 |
May 14 03:51:48 PM PDT 24 |
3463695770 ps |
| T1014 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3124932480 |
|
|
May 14 03:49:33 PM PDT 24 |
May 14 04:03:05 PM PDT 24 |
4303664178 ps |
| T258 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.2165980546 |
|
|
May 14 03:33:42 PM PDT 24 |
May 14 03:45:07 PM PDT 24 |
5616489530 ps |
| T328 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.2926967463 |
|
|
May 14 03:50:41 PM PDT 24 |
May 14 03:55:28 PM PDT 24 |
2919362371 ps |
| T689 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.3903241271 |
|
|
May 14 03:45:28 PM PDT 24 |
May 14 03:57:48 PM PDT 24 |
5868807784 ps |
| T1015 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.3869149749 |
|
|
May 14 03:54:37 PM PDT 24 |
May 14 04:06:19 PM PDT 24 |
4952801320 ps |
| T1016 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.679068788 |
|
|
May 14 03:36:39 PM PDT 24 |
May 14 03:53:48 PM PDT 24 |
6400952792 ps |
| T1017 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1529223509 |
|
|
May 14 03:49:56 PM PDT 24 |
May 14 04:01:32 PM PDT 24 |
4727977870 ps |
| T1018 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.3079083741 |
|
|
May 14 03:51:56 PM PDT 24 |
May 14 04:09:28 PM PDT 24 |
5178908008 ps |
| T345 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.1399411451 |
|
|
May 14 03:39:22 PM PDT 24 |
May 14 03:41:51 PM PDT 24 |
2348653518 ps |
| T700 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.3772503025 |
|
|
May 14 03:59:23 PM PDT 24 |
May 14 04:10:13 PM PDT 24 |
5082313148 ps |
| T1019 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.1052752563 |
|
|
May 14 03:44:41 PM PDT 24 |
May 14 04:15:23 PM PDT 24 |
13019455571 ps |
| T755 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.1467850434 |
|
|
May 14 03:37:43 PM PDT 24 |
May 14 03:43:45 PM PDT 24 |
3940733950 ps |
| T1020 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.3522326331 |
|
|
May 14 03:34:09 PM PDT 24 |
May 14 03:47:50 PM PDT 24 |
6753960690 ps |
| T40 |
/workspace/coverage/default/2.rom_e2e_smoke.2533161146 |
|
|
May 14 03:55:12 PM PDT 24 |
May 14 05:01:42 PM PDT 24 |
18109944988 ps |
| T1021 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.553943368 |
|
|
May 14 03:36:49 PM PDT 24 |
May 14 03:42:32 PM PDT 24 |
3431643800 ps |
| T690 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.4229100170 |
|
|
May 14 03:51:01 PM PDT 24 |
May 14 03:59:06 PM PDT 24 |
6041449682 ps |
| T1022 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.51749113 |
|
|
May 14 03:34:13 PM PDT 24 |
May 14 03:40:06 PM PDT 24 |
3193646664 ps |
| T728 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.1075490366 |
|
|
May 14 03:34:12 PM PDT 24 |
May 14 04:07:32 PM PDT 24 |
22782168896 ps |
| T1023 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.737440337 |
|
|
May 14 03:38:58 PM PDT 24 |
May 14 03:52:22 PM PDT 24 |
7453313992 ps |
| T1024 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.3601269988 |
|
|
May 14 03:47:02 PM PDT 24 |
May 14 04:20:23 PM PDT 24 |
8250285120 ps |
| T166 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.3164813723 |
|
|
May 14 03:30:10 PM PDT 24 |
May 14 04:00:38 PM PDT 24 |
8156598052 ps |
| T1025 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.745346836 |
|
|
May 14 03:41:41 PM PDT 24 |
May 14 03:46:13 PM PDT 24 |
3226510060 ps |
| T1026 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.2809064965 |
|
|
May 14 03:48:42 PM PDT 24 |
May 14 03:53:03 PM PDT 24 |
2976824856 ps |
| T1027 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.3831829886 |
|
|
May 14 03:33:36 PM PDT 24 |
May 14 03:40:09 PM PDT 24 |
3650987318 ps |
| T1028 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.1926493633 |
|
|
May 14 03:30:09 PM PDT 24 |
May 14 03:43:31 PM PDT 24 |
4550902008 ps |
| T1029 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.2195769661 |
|
|
May 14 03:36:46 PM PDT 24 |
May 14 03:40:44 PM PDT 24 |
2742672266 ps |
| T1030 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.1843591401 |
|
|
May 14 03:33:22 PM PDT 24 |
May 14 03:37:08 PM PDT 24 |
3122284648 ps |
| T1031 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.1219741242 |
|
|
May 14 03:33:42 PM PDT 24 |
May 14 03:45:01 PM PDT 24 |
5121579300 ps |