| SCORE |
LINE |
COND |
TOGGLE |
FSM |
BRANCH |
ASSERT |
GROUP |
|
| TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | NAME |
| 48.99 |
48.99 |
43.91 |
43.91 |
44.13 |
44.13 |
31.03 |
31.03 |
|
|
57.59 |
57.59 |
58.74 |
58.74 |
58.55 |
58.55 |
/workspace/coverage/default/1.chip_sw_alert_test.2999604246 |
| 58.53 |
9.54 |
51.96 |
8.05 |
54.11 |
9.98 |
33.61 |
2.58 |
|
|
66.24 |
8.65 |
84.97 |
26.22 |
60.31 |
1.75 |
/workspace/coverage/default/1.chip_jtag_csr_rw.938795062 |
| 65.70 |
7.16 |
66.77 |
14.81 |
63.73 |
9.62 |
38.24 |
4.63 |
|
|
79.63 |
13.39 |
85.49 |
0.52 |
60.31 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.3969838066 |
| 71.53 |
5.84 |
78.61 |
11.84 |
69.88 |
6.15 |
42.64 |
4.40 |
|
|
83.25 |
3.61 |
88.81 |
3.32 |
66.01 |
5.70 |
/workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.1202239650 |
| 74.82 |
3.28 |
78.61 |
0.00 |
69.88 |
0.01 |
61.94 |
19.30 |
|
|
83.26 |
0.01 |
88.99 |
0.17 |
66.23 |
0.22 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.3758882105 |
| 76.64 |
1.82 |
78.88 |
0.27 |
70.04 |
0.16 |
71.74 |
9.81 |
|
|
83.44 |
0.18 |
89.51 |
0.52 |
66.23 |
0.00 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.38195154 |
| 78.29 |
1.65 |
81.62 |
2.74 |
72.98 |
2.94 |
71.98 |
0.24 |
|
|
86.71 |
3.27 |
90.21 |
0.70 |
66.23 |
0.00 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.1463329992 |
| 79.12 |
0.83 |
83.12 |
1.50 |
73.93 |
0.95 |
73.67 |
1.69 |
|
|
87.36 |
0.65 |
90.38 |
0.17 |
66.23 |
0.00 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.1616750775 |
| 79.87 |
0.76 |
83.46 |
0.34 |
74.09 |
0.17 |
73.69 |
0.01 |
|
|
87.55 |
0.19 |
94.23 |
3.85 |
66.23 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.939547583 |
| 80.61 |
0.74 |
84.62 |
1.16 |
75.27 |
1.18 |
75.23 |
1.54 |
|
|
88.09 |
0.54 |
94.23 |
0.00 |
66.23 |
0.00 |
/workspace/coverage/default/2.chip_jtag_csr_rw.2211413051 |
| 81.33 |
0.72 |
85.83 |
1.20 |
76.28 |
1.01 |
76.17 |
0.94 |
|
|
89.24 |
1.15 |
94.23 |
0.00 |
66.23 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.59351043 |
| 81.95 |
0.62 |
85.83 |
0.00 |
76.28 |
0.00 |
79.89 |
3.73 |
|
|
89.24 |
0.00 |
94.23 |
0.00 |
66.23 |
0.00 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.786742877 |
| 82.40 |
0.45 |
86.10 |
0.28 |
76.45 |
0.16 |
81.18 |
1.28 |
|
|
89.35 |
0.11 |
94.23 |
0.00 |
67.11 |
0.88 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.3270512235 |
| 82.83 |
0.42 |
86.63 |
0.53 |
76.93 |
0.48 |
81.64 |
0.47 |
|
|
89.89 |
0.55 |
94.76 |
0.52 |
67.11 |
0.00 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3041279040 |
| 83.19 |
0.36 |
87.41 |
0.78 |
77.46 |
0.53 |
82.15 |
0.50 |
|
|
90.26 |
0.37 |
94.76 |
0.00 |
67.11 |
0.00 |
/workspace/coverage/default/1.chip_sw_gpio.1726280280 |
| 83.52 |
0.33 |
87.90 |
0.49 |
77.93 |
0.47 |
82.73 |
0.59 |
|
|
90.70 |
0.44 |
94.76 |
0.00 |
67.11 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.2826888611 |
| 83.81 |
0.29 |
87.92 |
0.03 |
77.93 |
0.01 |
82.74 |
0.01 |
|
|
90.71 |
0.01 |
94.93 |
0.17 |
68.64 |
1.54 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.2116985786 |
| 84.03 |
0.21 |
87.93 |
0.01 |
77.93 |
0.01 |
84.00 |
1.27 |
|
|
90.71 |
0.00 |
94.93 |
0.00 |
68.64 |
0.00 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.250007294 |
| 84.22 |
0.19 |
87.93 |
0.00 |
77.93 |
0.00 |
85.16 |
1.16 |
|
|
90.71 |
0.00 |
94.93 |
0.00 |
68.64 |
0.00 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.4168112579 |
| 84.40 |
0.18 |
88.00 |
0.06 |
78.04 |
0.10 |
85.62 |
0.46 |
|
|
90.77 |
0.06 |
95.10 |
0.17 |
68.86 |
0.22 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.988639288 |
| 84.57 |
0.17 |
88.50 |
0.51 |
78.13 |
0.09 |
85.67 |
0.05 |
|
|
90.79 |
0.02 |
95.45 |
0.35 |
68.86 |
0.00 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.3160728694 |
| 84.73 |
0.17 |
88.81 |
0.31 |
78.45 |
0.32 |
86.02 |
0.36 |
|
|
90.79 |
0.00 |
95.45 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.824427102 |
| 84.86 |
0.13 |
89.02 |
0.20 |
78.62 |
0.17 |
86.12 |
0.09 |
|
|
91.09 |
0.30 |
95.45 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.2643140188 |
| 84.97 |
0.11 |
89.17 |
0.15 |
79.00 |
0.38 |
86.12 |
0.01 |
|
|
91.19 |
0.11 |
95.45 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.3740129140 |
| 85.06 |
0.09 |
89.17 |
0.01 |
79.02 |
0.02 |
86.42 |
0.30 |
|
|
91.21 |
0.02 |
95.45 |
0.00 |
69.08 |
0.22 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.3646701548 |
| 85.15 |
0.09 |
89.35 |
0.18 |
79.15 |
0.12 |
86.54 |
0.12 |
|
|
91.33 |
0.12 |
95.45 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.1478314394 |
| 85.24 |
0.09 |
89.39 |
0.04 |
79.34 |
0.19 |
86.62 |
0.07 |
|
|
91.38 |
0.05 |
95.63 |
0.17 |
69.08 |
0.00 |
/workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.2630258910 |
| 85.33 |
0.09 |
89.39 |
0.00 |
79.34 |
0.00 |
87.14 |
0.52 |
|
|
91.38 |
0.00 |
95.63 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.3008089623 |
| 85.41 |
0.09 |
89.43 |
0.05 |
79.39 |
0.05 |
87.15 |
0.01 |
|
|
91.40 |
0.02 |
95.80 |
0.17 |
69.30 |
0.22 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.3833288454 |
| 85.49 |
0.08 |
89.43 |
0.00 |
79.39 |
0.00 |
87.61 |
0.46 |
|
|
91.40 |
0.00 |
95.80 |
0.00 |
69.30 |
0.00 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.416787678 |
| 85.56 |
0.07 |
89.44 |
0.01 |
79.41 |
0.02 |
87.63 |
0.02 |
|
|
91.41 |
0.01 |
95.98 |
0.17 |
69.52 |
0.22 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.2022437894 |
| 85.64 |
0.07 |
89.45 |
0.01 |
79.42 |
0.01 |
87.63 |
0.00 |
|
|
91.43 |
0.02 |
96.15 |
0.17 |
69.74 |
0.22 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.9108780 |
| 85.71 |
0.07 |
89.46 |
0.01 |
79.62 |
0.20 |
87.63 |
0.00 |
|
|
91.66 |
0.23 |
96.15 |
0.00 |
69.74 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.2901968434 |
| 85.77 |
0.06 |
89.49 |
0.03 |
79.64 |
0.02 |
87.71 |
0.08 |
|
|
91.67 |
0.01 |
96.15 |
0.00 |
69.96 |
0.22 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.3062360210 |
| 85.82 |
0.06 |
89.56 |
0.07 |
79.66 |
0.02 |
87.95 |
0.24 |
|
|
91.68 |
0.01 |
96.15 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.4168638740 |
| 85.88 |
0.05 |
89.56 |
0.01 |
79.70 |
0.04 |
88.03 |
0.08 |
|
|
91.69 |
0.02 |
96.33 |
0.17 |
69.96 |
0.00 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.3409463854 |
| 85.92 |
0.04 |
89.56 |
0.00 |
79.70 |
0.00 |
88.28 |
0.25 |
|
|
91.69 |
0.00 |
96.33 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.2681069822 |
| 85.96 |
0.04 |
89.56 |
0.00 |
79.70 |
0.00 |
88.30 |
0.02 |
|
|
91.69 |
0.00 |
96.33 |
0.00 |
70.18 |
0.22 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.31570353 |
| 86.00 |
0.04 |
89.56 |
0.00 |
79.70 |
0.00 |
88.32 |
0.02 |
|
|
91.69 |
0.00 |
96.33 |
0.00 |
70.39 |
0.22 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.2771958100 |
| 86.04 |
0.04 |
89.56 |
0.00 |
79.70 |
0.00 |
88.34 |
0.02 |
|
|
91.69 |
0.00 |
96.33 |
0.00 |
70.61 |
0.22 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.3724305558 |
| 86.08 |
0.04 |
89.57 |
0.01 |
79.80 |
0.10 |
88.35 |
0.02 |
|
|
91.81 |
0.11 |
96.33 |
0.00 |
70.61 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.3345271933 |
| 86.12 |
0.04 |
89.57 |
0.00 |
79.80 |
0.01 |
88.36 |
0.01 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
70.83 |
0.22 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.2174916313 |
| 86.15 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.01 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
71.05 |
0.22 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.912072100 |
| 86.19 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
71.27 |
0.22 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2687845817 |
| 86.23 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
71.49 |
0.22 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.1823430136 |
| 86.26 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
71.71 |
0.22 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.3275657816 |
| 86.30 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
71.93 |
0.22 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.1602585597 |
| 86.34 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
72.15 |
0.22 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.2776577397 |
| 86.37 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
72.37 |
0.22 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.1088078584 |
| 86.41 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
72.59 |
0.22 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.130413034 |
| 86.44 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
72.81 |
0.22 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.3351808720 |
| 86.48 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
73.03 |
0.22 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.3433333681 |
| 86.52 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
73.25 |
0.22 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.1897766424 |
| 86.55 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
73.46 |
0.22 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.3150082953 |
| 86.59 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
73.68 |
0.22 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.1502192359 |
| 86.63 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
73.90 |
0.22 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.2186810348 |
| 86.66 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
74.12 |
0.22 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.643062655 |
| 86.70 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
74.34 |
0.22 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1109865474 |
| 86.74 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
74.56 |
0.22 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.1774428996 |
| 86.77 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
74.78 |
0.22 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.4198990822 |
| 86.81 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
75.00 |
0.22 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.2250576 |
| 86.85 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
75.22 |
0.22 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.3971227425 |
| 86.88 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
75.44 |
0.22 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.1140144324 |
| 86.92 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
75.66 |
0.22 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3421571188 |
| 86.96 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
75.88 |
0.22 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.3012573060 |
| 86.99 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
76.10 |
0.22 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.3070066219 |
| 87.03 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
76.32 |
0.22 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.3763571142 |
| 87.07 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
76.54 |
0.22 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.1650312130 |
| 87.10 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
76.75 |
0.22 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.1095379878 |
| 87.14 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
76.97 |
0.22 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.3545027177 |
| 87.18 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
77.19 |
0.22 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.1648227396 |
| 87.21 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
77.41 |
0.22 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.2609605134 |
| 87.25 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
77.63 |
0.22 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.2439332869 |
| 87.29 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
77.85 |
0.22 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.2602390963 |
| 87.32 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
78.07 |
0.22 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1596783917 |
| 87.36 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
78.29 |
0.22 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.2013075935 |
| 87.40 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
78.51 |
0.22 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.4219065668 |
| 87.43 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
78.73 |
0.22 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.3467815924 |
| 87.47 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
78.95 |
0.22 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.3569639542 |
| 87.50 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
79.17 |
0.22 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.2269849891 |
| 87.54 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
79.39 |
0.22 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.4142697900 |
| 87.58 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
79.61 |
0.22 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.120328698 |
| 87.61 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
79.82 |
0.22 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.3794418910 |
| 87.65 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
80.04 |
0.22 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.3714401180 |
| 87.69 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
80.26 |
0.22 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.3258183789 |
| 87.72 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
80.48 |
0.22 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.2375869630 |
| 87.76 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
80.70 |
0.22 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.1621284193 |
| 87.80 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
80.92 |
0.22 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.1468987379 |
| 87.83 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
81.14 |
0.22 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.867511474 |
| 87.87 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
81.36 |
0.22 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.1781751065 |
| 87.91 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
81.58 |
0.22 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.2208243985 |
| 87.94 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
81.80 |
0.22 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.1497987127 |
| 87.98 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
82.02 |
0.22 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.3401758735 |
| 88.02 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
82.24 |
0.22 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.2784047859 |
| 88.05 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
82.46 |
0.22 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.729150982 |
| 88.09 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
82.68 |
0.22 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.3526101095 |
| 88.13 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
82.89 |
0.22 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.1259914373 |
| 88.16 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
83.11 |
0.22 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.204068483 |
| 88.20 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
83.33 |
0.22 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.3311906621 |
| 88.24 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
83.55 |
0.22 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.3989267967 |
| 88.27 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
83.77 |
0.22 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.1554391510 |
| 88.31 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
83.99 |
0.22 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.961573249 |
| 88.35 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
84.21 |
0.22 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.2512812827 |
| 88.38 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
84.43 |
0.22 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.4221057897 |
| 88.42 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
84.65 |
0.22 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.1566672870 |
| 88.46 |
0.04 |
89.57 |
0.00 |
79.80 |
0.00 |
88.36 |
0.00 |
|
|
91.81 |
0.00 |
96.33 |
0.00 |
84.87 |
0.22 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.3433174425 |
| 88.49 |
0.04 |
89.61 |
0.05 |
79.87 |
0.07 |
88.41 |
0.05 |
|
|
91.86 |
0.05 |
96.33 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.1560306532 |
| 88.53 |
0.04 |
89.61 |
0.00 |
79.87 |
0.00 |
88.62 |
0.22 |
|
|
91.86 |
0.00 |
96.33 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.832431852 |
| 88.56 |
0.03 |
89.61 |
0.00 |
79.87 |
0.00 |
88.83 |
0.20 |
|
|
91.86 |
0.00 |
96.33 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_init.448091874 |
| 88.59 |
0.03 |
89.61 |
0.00 |
79.87 |
0.00 |
88.83 |
0.01 |
|
|
91.86 |
0.00 |
96.50 |
0.17 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.760446955 |
| 88.62 |
0.03 |
89.61 |
0.00 |
80.04 |
0.17 |
88.83 |
0.00 |
|
|
91.86 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.1839995870 |
| 88.64 |
0.03 |
89.62 |
0.01 |
80.06 |
0.02 |
88.94 |
0.11 |
|
|
91.87 |
0.02 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.4263723220 |
| 88.67 |
0.02 |
89.70 |
0.07 |
80.06 |
0.00 |
89.00 |
0.06 |
|
|
91.88 |
0.01 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.4073011231 |
| 88.69 |
0.02 |
89.70 |
0.00 |
80.06 |
0.00 |
89.14 |
0.13 |
|
|
91.88 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.399863167 |
| 88.71 |
0.02 |
89.75 |
0.05 |
80.10 |
0.05 |
89.14 |
0.00 |
|
|
91.90 |
0.02 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.3042562591 |
| 88.73 |
0.02 |
89.80 |
0.05 |
80.15 |
0.05 |
89.14 |
0.00 |
|
|
91.91 |
0.02 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.3104553307 |
| 88.75 |
0.02 |
89.85 |
0.05 |
80.17 |
0.02 |
89.14 |
0.01 |
|
|
91.95 |
0.03 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.179752563 |
| 88.76 |
0.02 |
89.85 |
0.00 |
80.17 |
0.00 |
89.25 |
0.11 |
|
|
91.95 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3911684541 |
| 88.78 |
0.02 |
89.88 |
0.03 |
80.21 |
0.04 |
89.26 |
0.01 |
|
|
91.97 |
0.02 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.3251686018 |
| 88.80 |
0.01 |
89.90 |
0.02 |
80.21 |
0.01 |
89.32 |
0.06 |
|
|
91.97 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.3153356585 |
| 88.81 |
0.01 |
89.90 |
0.00 |
80.21 |
0.00 |
89.40 |
0.08 |
|
|
91.97 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.215685134 |
| 88.82 |
0.01 |
89.97 |
0.07 |
80.22 |
0.01 |
89.40 |
0.00 |
|
|
91.97 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2258224805 |
| 88.84 |
0.01 |
89.97 |
0.00 |
80.22 |
0.00 |
89.48 |
0.07 |
|
|
91.97 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.4226719592 |
| 88.85 |
0.01 |
89.97 |
0.00 |
80.30 |
0.07 |
89.48 |
0.00 |
|
|
91.97 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.356543877 |
| 88.86 |
0.01 |
90.00 |
0.02 |
80.31 |
0.02 |
89.49 |
0.01 |
|
|
92.00 |
0.02 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.1187150538 |
| 88.87 |
0.01 |
90.02 |
0.03 |
80.32 |
0.01 |
89.51 |
0.03 |
|
|
92.00 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.3184907632 |
| 88.88 |
0.01 |
90.02 |
0.00 |
80.32 |
0.01 |
89.57 |
0.05 |
|
|
92.00 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.3088364126 |
| 88.89 |
0.01 |
90.03 |
0.01 |
80.32 |
0.00 |
89.62 |
0.05 |
|
|
92.00 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_jtag_csr_rw.3954766890 |
| 88.90 |
0.01 |
90.05 |
0.02 |
80.33 |
0.01 |
89.63 |
0.01 |
|
|
92.01 |
0.02 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.217763107 |
| 88.91 |
0.01 |
90.05 |
0.00 |
80.38 |
0.05 |
89.63 |
0.00 |
|
|
92.01 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.3913940712 |
| 88.92 |
0.01 |
90.05 |
0.00 |
80.38 |
0.00 |
89.67 |
0.05 |
|
|
92.01 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.3132403717 |
| 88.92 |
0.01 |
90.09 |
0.03 |
80.39 |
0.01 |
89.67 |
0.00 |
|
|
92.01 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.2483237483 |
| 88.93 |
0.01 |
90.09 |
0.00 |
80.40 |
0.01 |
89.70 |
0.02 |
|
|
92.01 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.3536627116 |
| 88.93 |
0.01 |
90.10 |
0.01 |
80.40 |
0.01 |
89.71 |
0.02 |
|
|
92.01 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.2633971427 |
| 88.94 |
0.01 |
90.10 |
0.00 |
80.44 |
0.04 |
89.71 |
0.00 |
|
|
92.01 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.2254511709 |
| 88.95 |
0.01 |
90.10 |
0.00 |
80.44 |
0.00 |
89.75 |
0.04 |
|
|
92.01 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.1416697406 |
| 88.95 |
0.01 |
90.10 |
0.00 |
80.44 |
0.00 |
89.78 |
0.03 |
|
|
92.01 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.177057966 |
| 88.96 |
0.01 |
90.10 |
0.00 |
80.44 |
0.00 |
89.81 |
0.03 |
|
|
92.01 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_jtag_mem_access.1992016811 |
| 88.96 |
0.01 |
90.10 |
0.00 |
80.44 |
0.00 |
89.84 |
0.03 |
|
|
92.01 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2050984194 |
| 88.97 |
0.01 |
90.10 |
0.00 |
80.44 |
0.00 |
89.86 |
0.02 |
|
|
92.02 |
0.01 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.2258925104 |
| 88.97 |
0.01 |
90.11 |
0.01 |
80.45 |
0.01 |
89.87 |
0.01 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.2825272999 |
| 88.97 |
0.01 |
90.11 |
0.00 |
80.48 |
0.02 |
89.87 |
0.00 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.2368816664 |
| 88.98 |
0.01 |
90.11 |
0.01 |
80.49 |
0.01 |
89.87 |
0.01 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.3404839326 |
| 88.98 |
0.01 |
90.11 |
0.00 |
80.51 |
0.02 |
89.87 |
0.00 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3613507565 |
| 88.98 |
0.01 |
90.11 |
0.00 |
80.53 |
0.02 |
89.87 |
0.00 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.1364608292 |
| 88.99 |
0.01 |
90.11 |
0.00 |
80.53 |
0.00 |
89.89 |
0.02 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.1308429860 |
| 88.99 |
0.01 |
90.11 |
0.00 |
80.53 |
0.00 |
89.91 |
0.02 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.2397793035 |
| 88.99 |
0.01 |
90.12 |
0.01 |
80.54 |
0.01 |
89.91 |
0.01 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.3921974723 |
| 89.00 |
0.01 |
90.13 |
0.01 |
80.54 |
0.01 |
89.92 |
0.01 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.1375608459 |
| 89.00 |
0.01 |
90.13 |
0.00 |
80.56 |
0.01 |
89.92 |
0.00 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.743689108 |
| 89.00 |
0.01 |
90.13 |
0.00 |
80.56 |
0.00 |
89.93 |
0.01 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.4278097141 |
| 89.00 |
0.01 |
90.13 |
0.00 |
80.56 |
0.00 |
89.94 |
0.01 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2322219626 |
| 89.01 |
0.01 |
90.13 |
0.00 |
80.56 |
0.00 |
89.95 |
0.01 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.1658141375 |
| 89.01 |
0.01 |
90.13 |
0.00 |
80.57 |
0.01 |
89.95 |
0.00 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3909455651 |
| 89.01 |
0.01 |
90.13 |
0.00 |
80.58 |
0.01 |
89.95 |
0.00 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.2718092871 |
| 89.01 |
0.01 |
90.13 |
0.00 |
80.59 |
0.01 |
89.95 |
0.00 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3415545044 |
| 89.01 |
0.01 |
90.13 |
0.00 |
80.59 |
0.00 |
89.96 |
0.01 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.1248622300 |
| 89.01 |
0.01 |
90.13 |
0.00 |
80.59 |
0.00 |
89.97 |
0.01 |
|
|
92.02 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.610146580 |
| 89.01 |
0.01 |
90.13 |
0.00 |
80.59 |
0.00 |
89.97 |
0.00 |
|
|
92.03 |
0.01 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_tap_straps_dev.3751906528 |
| 89.02 |
0.01 |
90.13 |
0.01 |
80.59 |
0.00 |
89.98 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.1198299645 |
| 89.02 |
0.01 |
90.13 |
0.00 |
80.60 |
0.01 |
89.98 |
0.00 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.779563734 |
| 89.02 |
0.01 |
90.13 |
0.00 |
80.61 |
0.01 |
89.98 |
0.00 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_gpio.1478364645 |
| 89.02 |
0.01 |
90.13 |
0.00 |
80.61 |
0.00 |
89.98 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.1792033381 |
| 89.02 |
0.01 |
90.13 |
0.00 |
80.61 |
0.00 |
89.99 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.3527271419 |
| 89.02 |
0.01 |
90.13 |
0.00 |
80.61 |
0.00 |
90.00 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.466960503 |
| 89.02 |
0.01 |
90.13 |
0.00 |
80.61 |
0.00 |
90.00 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.2458335794 |
| 89.02 |
0.01 |
90.13 |
0.00 |
80.61 |
0.00 |
90.01 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.20729756 |
| 89.02 |
0.01 |
90.13 |
0.00 |
80.61 |
0.00 |
90.01 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_hmac_enc.1469058058 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.61 |
0.00 |
90.02 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.2995086575 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.61 |
0.00 |
90.02 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.3781102242 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.61 |
0.00 |
90.03 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.840436592 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.61 |
0.01 |
90.03 |
0.00 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.85999050 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.61 |
0.01 |
90.03 |
0.00 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.1447122117 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.62 |
0.01 |
90.03 |
0.00 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_gpio.2778249639 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.62 |
0.00 |
90.03 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.1273838870 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.62 |
0.00 |
90.03 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.2817052716 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.62 |
0.00 |
90.03 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.188780805 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.62 |
0.00 |
90.03 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.2769683169 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.62 |
0.00 |
90.04 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.275121462 |
| 89.03 |
0.01 |
90.13 |
0.00 |
80.62 |
0.00 |
90.04 |
0.01 |
|
|
92.03 |
0.00 |
96.50 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.4231003541 |
| Name |
| /workspace/coverage/default/0.chip_sival_flash_info_access.3551359685 |
| /workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3869133701 |
| /workspace/coverage/default/0.chip_sw_aes_enc.2100969350 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.1380763626 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.2259965206 |
| /workspace/coverage/default/0.chip_sw_aes_entropy.1080437091 |
| /workspace/coverage/default/0.chip_sw_aes_idle.3246097410 |
| /workspace/coverage/default/0.chip_sw_aes_masking_off.2597127055 |
| /workspace/coverage/default/0.chip_sw_aes_smoketest.4035286043 |
| /workspace/coverage/default/0.chip_sw_alert_handler_entropy.4129755429 |
| /workspace/coverage/default/0.chip_sw_alert_handler_escalation.765721216 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.4271620230 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.3650962404 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.424035801 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.2547206873 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.3213838246 |
| /workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1700446228 |
| /workspace/coverage/default/0.chip_sw_alert_test.197677230 |
| /workspace/coverage/default/0.chip_sw_aon_timer_irq.2751988122 |
| /workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.3479123888 |
| /workspace/coverage/default/0.chip_sw_aon_timer_smoketest.453823060 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.3879093520 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.4205242132 |
| /workspace/coverage/default/0.chip_sw_ast_clk_outputs.4137120723 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2167022547 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.832787051 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.88487707 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2139215093 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.4273902053 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3430058514 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter.3644442170 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.776511826 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.525658606 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.3769663318 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.3562226319 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.584135829 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.260018938 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_peri.3567479258 |
| /workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.2949588000 |
| /workspace/coverage/default/0.chip_sw_clkmgr_smoketest.2333255191 |
| /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.2582712963 |
| /workspace/coverage/default/0.chip_sw_csrng_kat_test.1355707252 |
| /workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.2727493557 |
| /workspace/coverage/default/0.chip_sw_csrng_smoketest.3410943960 |
| /workspace/coverage/default/0.chip_sw_data_integrity_escalation.1712686544 |
| /workspace/coverage/default/0.chip_sw_edn_auto_mode.1410513281 |
| /workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2026381816 |
| /workspace/coverage/default/0.chip_sw_edn_kat.220754029 |
| /workspace/coverage/default/0.chip_sw_edn_sw_mode.3170244358 |
| /workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.3699136850 |
| /workspace/coverage/default/0.chip_sw_entropy_src_kat_test.2538156855 |
| /workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3806779673 |
| /workspace/coverage/default/0.chip_sw_example_concurrency.1775210093 |
| /workspace/coverage/default/0.chip_sw_example_flash.2491813718 |
| /workspace/coverage/default/0.chip_sw_example_manufacturer.3316816102 |
| /workspace/coverage/default/0.chip_sw_example_rom.1039187024 |
| /workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.1157490587 |
| /workspace/coverage/default/0.chip_sw_flash_crash_alert.3832420415 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access.1641497124 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.1394066709 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2382519059 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.303394199 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.1044194827 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.3161992020 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.1410908913 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2428378528 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.1093612125 |
| /workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.226177455 |
| /workspace/coverage/default/0.chip_sw_gpio_smoketest.728983597 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_idle.2172074500 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.2491382056 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.4009975071 |
| /workspace/coverage/default/0.chip_sw_hmac_multistream.2959286638 |
| /workspace/coverage/default/0.chip_sw_hmac_smoketest.2404878629 |
| /workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.3412606711 |
| /workspace/coverage/default/0.chip_sw_inject_scramble_seed.2540512941 |
| /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.3045857425 |
| /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1849609060 |
| /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.3416897826 |
| /workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.1785631582 |
| /workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.1424816765 |
| /workspace/coverage/default/0.chip_sw_kmac_idle.2962564715 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_cshake.4281475394 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_kmac.1322015069 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.3620374538 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.527669459 |
| /workspace/coverage/default/0.chip_sw_kmac_smoketest.3853417079 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.2853183079 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.4009087098 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.4084250032 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.1475621129 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_transition.3504980409 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.474402795 |
| /workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.587702648 |
| /workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.654426193 |
| /workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.791498777 |
| /workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.1115497824 |
| /workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.594626061 |
| /workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1535429780 |
| /workspace/coverage/default/0.chip_sw_otbn_randomness.2015265480 |
| /workspace/coverage/default/0.chip_sw_otbn_smoketest.50585389 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.4229829698 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.899138095 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.3641108066 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.1243823836 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.409645984 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3906137290 |
| /workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.3468184603 |
| /workspace/coverage/default/0.chip_sw_pattgen_ios.2240118610 |
| /workspace/coverage/default/0.chip_sw_plic_sw_irq.4032518667 |
| /workspace/coverage/default/0.chip_sw_power_idle_load.1099000631 |
| /workspace/coverage/default/0.chip_sw_power_sleep_load.1826307374 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.2281459085 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.208567656 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.276717609 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1543789099 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.3333081664 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.468087989 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3655022731 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.1179152153 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2602814124 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.4278739309 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.3750584856 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.2321029123 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.4064387796 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.1017744287 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.1904377989 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.3047120147 |
| /workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.232200624 |
| /workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.933538762 |
| /workspace/coverage/default/0.chip_sw_rstmgr_alert_info.339295457 |
| /workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.2213395537 |
| /workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.3928670229 |
| /workspace/coverage/default/0.chip_sw_rstmgr_smoketest.910856664 |
| /workspace/coverage/default/0.chip_sw_rstmgr_sw_req.670770356 |
| /workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.1803227590 |
| /workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.3671040497 |
| /workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.4270831027 |
| /workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.4004331272 |
| /workspace/coverage/default/0.chip_sw_rv_plic_smoketest.2373292185 |
| /workspace/coverage/default/0.chip_sw_rv_timer_irq.1411883646 |
| /workspace/coverage/default/0.chip_sw_rv_timer_smoketest.194676048 |
| /workspace/coverage/default/0.chip_sw_sensor_ctrl_status.2953658129 |
| /workspace/coverage/default/0.chip_sw_sleep_pin_retention.468449199 |
| /workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.1504260766 |
| /workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.4210344886 |
| /workspace/coverage/default/0.chip_sw_spi_device_pass_through.1603906670 |
| /workspace/coverage/default/0.chip_sw_spi_host_tx_rx.568275360 |
| /workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.4205157903 |
| /workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.439876740 |
| /workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1229652779 |
| /workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.298454894 |
| /workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.1802313135 |
| /workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.1651894094 |
| /workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.2794181849 |
| /workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.3914709420 |
| /workspace/coverage/default/0.chip_sw_uart_rand_baudrate.2599882440 |
| /workspace/coverage/default/0.chip_sw_uart_smoketest.1744994553 |
| /workspace/coverage/default/0.chip_sw_uart_tx_rx.3928582473 |
| /workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.2388465059 |
| /workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.1308833190 |
| /workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.549721811 |
| /workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.257127764 |
| /workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.2484578721 |
| /workspace/coverage/default/0.chip_sw_usbdev_config_host.269337231 |
| /workspace/coverage/default/0.chip_sw_usbdev_dpi.1202044065 |
| /workspace/coverage/default/0.chip_sw_usbdev_pullup.2285574078 |
| /workspace/coverage/default/0.chip_sw_usbdev_setuprx.1106511917 |
| /workspace/coverage/default/0.chip_sw_usbdev_stream.3445776802 |
| /workspace/coverage/default/0.chip_sw_usbdev_vbus.79459946 |
| /workspace/coverage/default/0.chip_tap_straps_prod.2363630085 |
| /workspace/coverage/default/0.chip_tap_straps_rma.3864810689 |
| /workspace/coverage/default/0.chip_tap_straps_testunlock0.3947263833 |
| /workspace/coverage/default/0.rom_e2e_asm_init_dev.612812802 |
| /workspace/coverage/default/0.rom_e2e_asm_init_prod.1545960933 |
| /workspace/coverage/default/0.rom_e2e_asm_init_prod_end.3716624486 |
| /workspace/coverage/default/0.rom_e2e_asm_init_rma.562253751 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.3607951107 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.3304430752 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.2242114238 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.1760388907 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.3336429512 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.2908341149 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.3021309068 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.2271382674 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.2895453855 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.3940830858 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.2064291165 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.233735449 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.3605463201 |
| /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.2661688835 |
| /workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.3214457973 |
| /workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.2584689291 |
| /workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.3003608177 |
| /workspace/coverage/default/0.rom_e2e_shutdown_exception_c.1827098948 |
| /workspace/coverage/default/0.rom_e2e_shutdown_output.1944495717 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.2016117862 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.394296966 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.3963847547 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.3922494241 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.1750496293 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.1479429259 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.1477685930 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.2744168367 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.84183624 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.570982691 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.2666085138 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.3192309510 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.41107567 |
| /workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.873761628 |
| /workspace/coverage/default/0.rom_e2e_smoke.1217203405 |
| /workspace/coverage/default/0.rom_keymgr_functest.3420144745 |
| /workspace/coverage/default/0.rom_volatile_raw_unlock.588677586 |
| /workspace/coverage/default/1.chip_jtag_mem_access.4143422913 |
| /workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.3614855620 |
| /workspace/coverage/default/1.chip_sival_flash_info_access.487634788 |
| /workspace/coverage/default/1.chip_sw_aes_enc.2067021297 |
| /workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.4141111822 |
| /workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.3085545630 |
| /workspace/coverage/default/1.chip_sw_aes_entropy.2924023349 |
| /workspace/coverage/default/1.chip_sw_aes_idle.3383420127 |
| /workspace/coverage/default/1.chip_sw_aes_masking_off.3573352139 |
| /workspace/coverage/default/1.chip_sw_aes_smoketest.3576099292 |
| /workspace/coverage/default/1.chip_sw_alert_handler_entropy.3175181785 |
| /workspace/coverage/default/1.chip_sw_alert_handler_escalation.1951724884 |
| /workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.3188120660 |
| /workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.127410530 |
| /workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.3886802724 |
| /workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.369087761 |
| /workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.2720700887 |
| /workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.834925558 |
| /workspace/coverage/default/1.chip_sw_aon_timer_irq.3894662609 |
| /workspace/coverage/default/1.chip_sw_aon_timer_smoketest.3087301310 |
| /workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.2669854450 |
| /workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.1070224511 |
| /workspace/coverage/default/1.chip_sw_ast_clk_outputs.2510286461 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.799224155 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3560098991 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2072465969 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1883637315 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.339989027 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.3305850642 |
| /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2376082876 |
| /workspace/coverage/default/1.chip_sw_clkmgr_jitter.1977484284 |
| /workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.3044888431 |
| /workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.1395813780 |
| /workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.3213646895 |
| /workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.1243383119 |
| /workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.1429222945 |
| /workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.72171782 |
| /workspace/coverage/default/1.chip_sw_clkmgr_off_peri.3623596862 |
| /workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.388971054 |
| /workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.2810360253 |
| /workspace/coverage/default/1.chip_sw_clkmgr_smoketest.3568754932 |
| /workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.1052170458 |
| /workspace/coverage/default/1.chip_sw_csrng_kat_test.2990484257 |
| /workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.968803369 |
| /workspace/coverage/default/1.chip_sw_csrng_smoketest.3967730094 |
| /workspace/coverage/default/1.chip_sw_edn_auto_mode.2166039955 |
| /workspace/coverage/default/1.chip_sw_edn_boot_mode.232323574 |
| /workspace/coverage/default/1.chip_sw_edn_entropy_reqs.1201057620 |
| /workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.1646900861 |
| /workspace/coverage/default/1.chip_sw_edn_kat.3577129969 |
| /workspace/coverage/default/1.chip_sw_edn_sw_mode.2996456491 |
| /workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.4162257329 |
| /workspace/coverage/default/1.chip_sw_entropy_src_csrng.1850383495 |
| /workspace/coverage/default/1.chip_sw_entropy_src_kat_test.922925565 |
| /workspace/coverage/default/1.chip_sw_entropy_src_smoketest.460201800 |
| /workspace/coverage/default/1.chip_sw_example_concurrency.3650292251 |
| /workspace/coverage/default/1.chip_sw_example_flash.3044239123 |
| /workspace/coverage/default/1.chip_sw_example_manufacturer.3440231082 |
| /workspace/coverage/default/1.chip_sw_example_rom.3453402937 |
| /workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.1653382888 |
| /workspace/coverage/default/1.chip_sw_flash_crash_alert.3107152143 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_access.3265655620 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.2724302604 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2544890569 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.612294874 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.142167254 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.3323065069 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.1862650529 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3138876719 |
| /workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.3411312724 |
| /workspace/coverage/default/1.chip_sw_flash_init.873608442 |
| /workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.2735994531 |
| /workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.3624506228 |
| /workspace/coverage/default/1.chip_sw_gpio_smoketest.3227656740 |
| /workspace/coverage/default/1.chip_sw_hmac_enc.2386687083 |
| /workspace/coverage/default/1.chip_sw_hmac_enc_idle.403830413 |
| /workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.1626821023 |
| /workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.651360655 |
| /workspace/coverage/default/1.chip_sw_hmac_multistream.2162020392 |
| /workspace/coverage/default/1.chip_sw_hmac_smoketest.829835463 |
| /workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.866826832 |
| /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.886616793 |
| /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.1296770479 |
| /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.4137061350 |
| /workspace/coverage/default/1.chip_sw_inject_scramble_seed.206466382 |
| /workspace/coverage/default/1.chip_sw_keymgr_key_derivation.3094854161 |
| /workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1135801207 |
| /workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2363925142 |
| /workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.1763457407 |
| /workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.783784294 |
| /workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.2848388092 |
| /workspace/coverage/default/1.chip_sw_kmac_app_rom.3152720342 |
| /workspace/coverage/default/1.chip_sw_kmac_entropy.995507253 |
| /workspace/coverage/default/1.chip_sw_kmac_idle.2756121048 |
| /workspace/coverage/default/1.chip_sw_kmac_mode_cshake.2768862936 |
| /workspace/coverage/default/1.chip_sw_kmac_mode_kmac.2077605629 |
| /workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.1485595377 |
| /workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3112983548 |
| /workspace/coverage/default/1.chip_sw_kmac_smoketest.674911630 |
| /workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.1004563247 |
| /workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.1728002568 |
| /workspace/coverage/default/1.chip_sw_lc_ctrl_transition.2635639246 |
| /workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.1226923693 |
| /workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3579386177 |
| /workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.68224806 |
| /workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.807034567 |
| /workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.96035370 |
| /workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.286760313 |
| /workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.126675583 |
| /workspace/coverage/default/1.chip_sw_otbn_mem_scramble.997204034 |
| /workspace/coverage/default/1.chip_sw_otbn_randomness.917952793 |
| /workspace/coverage/default/1.chip_sw_otbn_smoketest.3259873966 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.2843758986 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.96529180 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.1030760180 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.1650026328 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2068265280 |
| /workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.4188907931 |
| /workspace/coverage/default/1.chip_sw_pattgen_ios.1379945807 |
| /workspace/coverage/default/1.chip_sw_plic_sw_irq.3032068338 |
| /workspace/coverage/default/1.chip_sw_power_idle_load.4243919529 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.46826432 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.2721577746 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.995299795 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3154654567 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.1251821901 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1413397932 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.995154449 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.1488844097 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1743852249 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.346780833 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.3171623175 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1633605644 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.2778662691 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3357732259 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.4190984792 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.147252542 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.1198371604 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1750963592 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.171522447 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.1996603931 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.2319956211 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.2826533177 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.3660303850 |
| /workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.2687634336 |
| /workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.3322359146 |
| /workspace/coverage/default/1.chip_sw_rstmgr_alert_info.2339951771 |
| /workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.1224950802 |
| /workspace/coverage/default/1.chip_sw_rstmgr_smoketest.124061055 |
| /workspace/coverage/default/1.chip_sw_rstmgr_sw_req.3250888831 |
| /workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.2452545385 |
| /workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.628315853 |
| /workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.2657111921 |
| /workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.3671134371 |
| /workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.774022264 |
| /workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.1363253818 |
| /workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3708304136 |
| /workspace/coverage/default/1.chip_sw_rv_plic_smoketest.2981268049 |
| /workspace/coverage/default/1.chip_sw_rv_timer_irq.1957063377 |
| /workspace/coverage/default/1.chip_sw_rv_timer_smoketest.1123221030 |
| /workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.1945336713 |
| /workspace/coverage/default/1.chip_sw_sensor_ctrl_status.450821246 |
| /workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.2599216952 |
| /workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.3184915673 |
| /workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.3120982089 |
| /workspace/coverage/default/1.chip_sw_spi_device_pass_through.2653148300 |
| /workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.1139509675 |
| /workspace/coverage/default/1.chip_sw_spi_device_tpm.3802657839 |
| /workspace/coverage/default/1.chip_sw_spi_host_tx_rx.3869245039 |
| /workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.1826268180 |
| /workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.4218295871 |
| /workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.3398219101 |
| /workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.401322639 |
| /workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.4069455569 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.3090837297 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.1762112959 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.2825669355 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.4084464724 |
| /workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3296078045 |
| /workspace/coverage/default/1.chip_sw_uart_smoketest.4229567496 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx.1833676688 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.2996112272 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3962607819 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.1271439642 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.260901601 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.3554870013 |
| /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.3658644129 |
| /workspace/coverage/default/1.chip_tap_straps_dev.1647263464 |
| /workspace/coverage/default/1.chip_tap_straps_prod.3583476324 |
| /workspace/coverage/default/1.chip_tap_straps_rma.2627370977 |
| /workspace/coverage/default/1.chip_tap_straps_testunlock0.1325917458 |
| /workspace/coverage/default/1.rom_e2e_asm_init_dev.1870601263 |
| /workspace/coverage/default/1.rom_e2e_asm_init_prod.56181999 |
| /workspace/coverage/default/1.rom_e2e_asm_init_prod_end.270089527 |
| /workspace/coverage/default/1.rom_e2e_asm_init_rma.3934269717 |
| /workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.2803057606 |
| /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.3873482329 |
| /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.986855843 |
| /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.943065632 |
| /workspace/coverage/default/1.rom_e2e_shutdown_exception_c.2048156257 |
| /workspace/coverage/default/1.rom_e2e_shutdown_output.1059904391 |
| /workspace/coverage/default/1.rom_e2e_smoke.3661982219 |
| /workspace/coverage/default/1.rom_keymgr_functest.1224172645 |
| /workspace/coverage/default/1.rom_volatile_raw_unlock.3366933323 |
| /workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.4288814137 |
| /workspace/coverage/default/10.chip_sw_lc_ctrl_transition.615342040 |
| /workspace/coverage/default/10.chip_sw_uart_rand_baudrate.26438984 |
| /workspace/coverage/default/11.chip_sw_lc_ctrl_transition.510775963 |
| /workspace/coverage/default/11.chip_sw_uart_rand_baudrate.1022167029 |
| /workspace/coverage/default/12.chip_sw_lc_ctrl_transition.820203704 |
| /workspace/coverage/default/12.chip_sw_uart_rand_baudrate.3084773059 |
| /workspace/coverage/default/13.chip_sw_all_escalation_resets.60304076 |
| /workspace/coverage/default/13.chip_sw_lc_ctrl_transition.4281047966 |
| /workspace/coverage/default/13.chip_sw_uart_rand_baudrate.1257293343 |
| /workspace/coverage/default/14.chip_sw_lc_ctrl_transition.1541698281 |
| /workspace/coverage/default/14.chip_sw_uart_rand_baudrate.1501684358 |
| /workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.2426801968 |
| /workspace/coverage/default/15.chip_sw_uart_rand_baudrate.1227220500 |
| /workspace/coverage/default/16.chip_sw_all_escalation_resets.260245626 |
| /workspace/coverage/default/16.chip_sw_uart_rand_baudrate.2502469917 |
| /workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.2882885723 |
| /workspace/coverage/default/17.chip_sw_uart_rand_baudrate.650709655 |
| /workspace/coverage/default/18.chip_sw_all_escalation_resets.3748271487 |
| /workspace/coverage/default/18.chip_sw_uart_rand_baudrate.3322690321 |
| /workspace/coverage/default/19.chip_sw_uart_rand_baudrate.2052668513 |
| /workspace/coverage/default/2.chip_jtag_mem_access.4116645826 |
| /workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.3819860273 |
| /workspace/coverage/default/2.chip_sival_flash_info_access.3742153090 |
| /workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3599957860 |
| /workspace/coverage/default/2.chip_sw_aes_enc.1214132219 |
| /workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.1795465384 |
| /workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.1216309523 |
| /workspace/coverage/default/2.chip_sw_aes_entropy.1076802863 |
| /workspace/coverage/default/2.chip_sw_aes_idle.1454609435 |
| /workspace/coverage/default/2.chip_sw_aes_masking_off.2822188427 |
| /workspace/coverage/default/2.chip_sw_aes_smoketest.1261626436 |
| /workspace/coverage/default/2.chip_sw_alert_handler_entropy.3103951694 |
| /workspace/coverage/default/2.chip_sw_alert_handler_escalation.481623010 |
| /workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.213795862 |
| /workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.3676289089 |
| /workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.3646643565 |
| /workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.797204992 |
| /workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1061698231 |
| /workspace/coverage/default/2.chip_sw_alert_test.2519898444 |
| /workspace/coverage/default/2.chip_sw_aon_timer_irq.673274653 |
| /workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.3965879534 |
| /workspace/coverage/default/2.chip_sw_aon_timer_smoketest.3203072779 |
| /workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.4191106725 |
| /workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.2398733543 |
| /workspace/coverage/default/2.chip_sw_ast_clk_outputs.1490930890 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.1830807546 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1598481998 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2323143592 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2312871460 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1020942865 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.732126370 |
| /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.341713010 |
| /workspace/coverage/default/2.chip_sw_clkmgr_jitter.4282464863 |
| /workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.3274759658 |
| /workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.3766282360 |
| /workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.1524226971 |
| /workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.2781715278 |
| /workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.2424894008 |
| /workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.3987384093 |
| /workspace/coverage/default/2.chip_sw_clkmgr_off_peri.1154238490 |
| /workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.2499716931 |
| /workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.1858627364 |
| /workspace/coverage/default/2.chip_sw_clkmgr_smoketest.2548781267 |
| /workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.1234067272 |
| /workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.959456232 |
| /workspace/coverage/default/2.chip_sw_csrng_kat_test.3248042634 |
| /workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.2514336070 |
| /workspace/coverage/default/2.chip_sw_csrng_smoketest.1895167959 |
| /workspace/coverage/default/2.chip_sw_data_integrity_escalation.1433500299 |
| /workspace/coverage/default/2.chip_sw_edn_auto_mode.3437018854 |
| /workspace/coverage/default/2.chip_sw_edn_boot_mode.1575845010 |
| /workspace/coverage/default/2.chip_sw_edn_entropy_reqs.3536214385 |
| /workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.311794174 |
| /workspace/coverage/default/2.chip_sw_edn_kat.1843051297 |
| /workspace/coverage/default/2.chip_sw_edn_sw_mode.1453687716 |
| /workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.4001643879 |
| /workspace/coverage/default/2.chip_sw_entropy_src_csrng.3386472782 |
| /workspace/coverage/default/2.chip_sw_entropy_src_kat_test.4273994674 |
| /workspace/coverage/default/2.chip_sw_entropy_src_smoketest.4156072585 |
| /workspace/coverage/default/2.chip_sw_example_concurrency.4108497853 |
| /workspace/coverage/default/2.chip_sw_example_flash.512125909 |
| /workspace/coverage/default/2.chip_sw_example_manufacturer.4264787714 |
| /workspace/coverage/default/2.chip_sw_example_rom.3419709533 |
| /workspace/coverage/default/2.chip_sw_flash_crash_alert.4047012883 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_access.3915994024 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.4278723670 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.208992028 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.1941856898 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.1313766288 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.3965864127 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_ops.798307271 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.2589499432 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.591839825 |
| /workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.824584697 |
| /workspace/coverage/default/2.chip_sw_flash_init.3931037102 |
| /workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.105101182 |
| /workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.478094438 |
| /workspace/coverage/default/2.chip_sw_gpio_smoketest.300412819 |
| /workspace/coverage/default/2.chip_sw_hmac_enc.2598037008 |
| /workspace/coverage/default/2.chip_sw_hmac_enc_idle.3990856676 |
| /workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.2914534096 |
| /workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.4157103759 |
| /workspace/coverage/default/2.chip_sw_hmac_multistream.3821804868 |
| /workspace/coverage/default/2.chip_sw_hmac_smoketest.4224482868 |
| /workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.3138181657 |
| /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.273908534 |
| /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.3153321987 |
| /workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.2276441073 |
| /workspace/coverage/default/2.chip_sw_inject_scramble_seed.2993026016 |
| /workspace/coverage/default/2.chip_sw_keymgr_key_derivation.1697645094 |
| /workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.1644781816 |
| /workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.751976566 |
| /workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.3581569334 |
| /workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.2942818967 |
| /workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.2847240948 |
| /workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.4185214282 |
| /workspace/coverage/default/2.chip_sw_kmac_app_rom.162733557 |
| /workspace/coverage/default/2.chip_sw_kmac_entropy.3425858333 |
| /workspace/coverage/default/2.chip_sw_kmac_idle.903705808 |
| /workspace/coverage/default/2.chip_sw_kmac_mode_cshake.3683503917 |
| /workspace/coverage/default/2.chip_sw_kmac_mode_kmac.1610670756 |
| /workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.3898219191 |
| /workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.553183674 |
| /workspace/coverage/default/2.chip_sw_kmac_smoketest.3937806032 |
| /workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.1903331538 |
| /workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2892845291 |
| /workspace/coverage/default/2.chip_sw_lc_ctrl_transition.2881595822 |
| /workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.520847694 |
| /workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2918862776 |
| /workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.146130945 |
| /workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.3209452903 |
| /workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.2296936820 |
| /workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.1401196042 |
| /workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.3286321518 |
| /workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.2801537277 |
| /workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.4033230249 |
| /workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1796067102 |
| /workspace/coverage/default/2.chip_sw_otbn_mem_scramble.1066814832 |
| /workspace/coverage/default/2.chip_sw_otbn_randomness.3142890280 |
| /workspace/coverage/default/2.chip_sw_otbn_smoketest.2269980574 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.444483618 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.946083241 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.740342026 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.3319988623 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2698460212 |
| /workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.3395324847 |
| /workspace/coverage/default/2.chip_sw_plic_sw_irq.1769796272 |
| /workspace/coverage/default/2.chip_sw_power_idle_load.1457025891 |
| /workspace/coverage/default/2.chip_sw_power_sleep_load.1590306015 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.4197763582 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.3154703686 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.165782875 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3641895973 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.996092845 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2894571993 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.112634009 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.1941386359 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.730059489 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.334474549 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.331080444 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.3705191791 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.18200919 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.736553634 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.4235106081 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.4056559420 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1537965665 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.2523730590 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.3254639373 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.2203524297 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.908491984 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.386334542 |
| /workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.3204810823 |
| /workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.280272511 |
| /workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.2275393491 |
| /workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.3403912260 |
| /workspace/coverage/default/2.chip_sw_rstmgr_smoketest.995006073 |
| /workspace/coverage/default/2.chip_sw_rstmgr_sw_req.3695152863 |
| /workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.1931554819 |
| /workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.273194259 |
| /workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.4186765780 |
| /workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.3536795550 |
| /workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.1916672764 |
| /workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.2391592002 |
| /workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.811784187 |
| /workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3067842853 |
| /workspace/coverage/default/2.chip_sw_rv_plic_smoketest.2842719820 |
| /workspace/coverage/default/2.chip_sw_rv_timer_irq.32044740 |
| /workspace/coverage/default/2.chip_sw_rv_timer_smoketest.1808543618 |
| /workspace/coverage/default/2.chip_sw_sensor_ctrl_status.1645713285 |
| /workspace/coverage/default/2.chip_sw_sleep_pin_retention.3130550750 |
| /workspace/coverage/default/2.chip_sw_sleep_pin_wake.603005769 |
| /workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.2686211474 |
| /workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.3030406145 |
| /workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.2006384287 |
| /workspace/coverage/default/2.chip_sw_spi_device_pass_through.15740758 |
| /workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.3746691561 |
| /workspace/coverage/default/2.chip_sw_spi_device_tpm.2200000175 |
| /workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.510634074 |
| /workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.2364794463 |
| /workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.4256082918 |
| /workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.2669520447 |
| /workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.3391654488 |
| /workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.982997358 |
| /workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.2614206450 |
| /workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1467991321 |
| /workspace/coverage/default/2.chip_sw_uart_rand_baudrate.2619671193 |
| /workspace/coverage/default/2.chip_sw_uart_smoketest.4089216592 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx.2150963249 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1151830421 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.421414200 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.747940904 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.2299210322 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.3043543883 |
| /workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.3432833627 |
| /workspace/coverage/default/2.chip_tap_straps_dev.129173560 |
| /workspace/coverage/default/2.chip_tap_straps_prod.709697478 |
| /workspace/coverage/default/2.chip_tap_straps_rma.2007856897 |
| /workspace/coverage/default/2.chip_tap_straps_testunlock0.1773999177 |
| /workspace/coverage/default/2.rom_e2e_asm_init_dev.2629115860 |
| /workspace/coverage/default/2.rom_e2e_asm_init_prod.2535969314 |
| /workspace/coverage/default/2.rom_e2e_asm_init_prod_end.4032774298 |
| /workspace/coverage/default/2.rom_e2e_asm_init_rma.4247115315 |
| /workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.256991668 |
| /workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.2550087208 |
| /workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.364791504 |
| /workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.2703394197 |
| /workspace/coverage/default/2.rom_e2e_shutdown_exception_c.3768901823 |
| /workspace/coverage/default/2.rom_e2e_shutdown_output.1065669448 |
| /workspace/coverage/default/2.rom_e2e_smoke.1029967250 |
| /workspace/coverage/default/2.rom_keymgr_functest.1633794561 |
| /workspace/coverage/default/2.rom_volatile_raw_unlock.1385472269 |
| /workspace/coverage/default/23.chip_sw_all_escalation_resets.1603190978 |
| /workspace/coverage/default/24.chip_sw_all_escalation_resets.949721458 |
| /workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.3044369721 |
| /workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.778809414 |
| /workspace/coverage/default/26.chip_sw_all_escalation_resets.1228693357 |
| /workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.3696112147 |
| /workspace/coverage/default/27.chip_sw_all_escalation_resets.1214749281 |
| /workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.3671609316 |
| /workspace/coverage/default/28.chip_sw_all_escalation_resets.4214213690 |
| /workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.1528450902 |
| /workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.3669244047 |
| /workspace/coverage/default/3.chip_sw_all_escalation_resets.1613014686 |
| /workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.2674049667 |
| /workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.316617582 |
| /workspace/coverage/default/3.chip_sw_data_integrity_escalation.2657954044 |
| /workspace/coverage/default/3.chip_sw_lc_ctrl_transition.2440702426 |
| /workspace/coverage/default/3.chip_sw_uart_rand_baudrate.3793718365 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx.2898100108 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.4192468066 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2517609153 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.3591876995 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.3791219646 |
| /workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.1520292556 |
| /workspace/coverage/default/3.chip_tap_straps_dev.1926043884 |
| /workspace/coverage/default/3.chip_tap_straps_prod.342756501 |
| /workspace/coverage/default/3.chip_tap_straps_rma.882644035 |
| /workspace/coverage/default/3.chip_tap_straps_testunlock0.1667493990 |
| /workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.1196654895 |
| /workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.2101959914 |
| /workspace/coverage/default/31.chip_sw_all_escalation_resets.1463355162 |
| /workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.1050526581 |
| /workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.3845070886 |
| /workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.3304558506 |
| /workspace/coverage/default/36.chip_sw_all_escalation_resets.1338899165 |
| /workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.1785911166 |
| /workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.4051540928 |
| /workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.2406103724 |
| /workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.2100141135 |
| /workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.2113197695 |
| /workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.2509201717 |
| /workspace/coverage/default/4.chip_sw_data_integrity_escalation.2325886017 |
| /workspace/coverage/default/4.chip_sw_lc_ctrl_transition.1794612182 |
| /workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.172864425 |
| /workspace/coverage/default/4.chip_sw_uart_rand_baudrate.485964781 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx.1083371502 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3262921068 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.203027422 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.1185958860 |
| /workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.3988635529 |
| /workspace/coverage/default/4.chip_tap_straps_dev.110029252 |
| /workspace/coverage/default/4.chip_tap_straps_prod.1297760482 |
| /workspace/coverage/default/4.chip_tap_straps_rma.1719421367 |
| /workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.1578568295 |
| /workspace/coverage/default/41.chip_sw_all_escalation_resets.3013840684 |
| /workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.86399546 |
| /workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.4201260832 |
| /workspace/coverage/default/44.chip_sw_all_escalation_resets.3719887103 |
| /workspace/coverage/default/45.chip_sw_all_escalation_resets.3122434768 |
| /workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.420196789 |
| /workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.3425724203 |
| /workspace/coverage/default/47.chip_sw_all_escalation_resets.2439013445 |
| /workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.2613230064 |
| /workspace/coverage/default/49.chip_sw_all_escalation_resets.2455166393 |
| /workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.656100514 |
| /workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.3455364871 |
| /workspace/coverage/default/5.chip_sw_data_integrity_escalation.233352328 |
| /workspace/coverage/default/5.chip_sw_lc_ctrl_transition.3273926366 |
| /workspace/coverage/default/5.chip_sw_uart_rand_baudrate.3450233023 |
| /workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.3450703989 |
| /workspace/coverage/default/50.chip_sw_all_escalation_resets.2758012421 |
| /workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.2855591546 |
| /workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.899176566 |
| /workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.2904650309 |
| /workspace/coverage/default/53.chip_sw_all_escalation_resets.436909523 |
| /workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.3937625527 |
| /workspace/coverage/default/54.chip_sw_all_escalation_resets.2472727431 |
| /workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.3339562177 |
| /workspace/coverage/default/56.chip_sw_all_escalation_resets.3875890677 |
| /workspace/coverage/default/57.chip_sw_all_escalation_resets.2919623292 |
| /workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.277214324 |
| /workspace/coverage/default/58.chip_sw_all_escalation_resets.2721054540 |
| /workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.2583394465 |
| /workspace/coverage/default/59.chip_sw_all_escalation_resets.383161203 |
| /workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.504123207 |
| /workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.1901353303 |
| /workspace/coverage/default/6.chip_sw_lc_ctrl_transition.2084704800 |
| /workspace/coverage/default/6.chip_sw_uart_rand_baudrate.3117532011 |
| /workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.1823968213 |
| /workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.391596884 |
| /workspace/coverage/default/61.chip_sw_all_escalation_resets.4218553870 |
| /workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.2415050507 |
| /workspace/coverage/default/63.chip_sw_all_escalation_resets.3863383307 |
| /workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.3997278551 |
| /workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.3205966919 |
| /workspace/coverage/default/66.chip_sw_all_escalation_resets.1294209421 |
| /workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.4234692563 |
| /workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.3057999357 |
| /workspace/coverage/default/68.chip_sw_all_escalation_resets.1593025828 |
| /workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.2674190794 |
| /workspace/coverage/default/7.chip_sw_all_escalation_resets.1606354923 |
| /workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.1712143354 |
| /workspace/coverage/default/7.chip_sw_lc_ctrl_transition.1247858793 |
| /workspace/coverage/default/7.chip_sw_uart_rand_baudrate.809880180 |
| /workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.3623694703 |
| /workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.223379440 |
| /workspace/coverage/default/71.chip_sw_all_escalation_resets.1651380749 |
| /workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.2905590040 |
| /workspace/coverage/default/72.chip_sw_all_escalation_resets.1698161436 |
| /workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.2548041035 |
| /workspace/coverage/default/74.chip_sw_all_escalation_resets.3784019708 |
| /workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.3507464590 |
| /workspace/coverage/default/75.chip_sw_all_escalation_resets.1628961474 |
| /workspace/coverage/default/76.chip_sw_all_escalation_resets.4153320284 |
| /workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.3035869754 |
| /workspace/coverage/default/77.chip_sw_all_escalation_resets.1497016860 |
| /workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.1392623219 |
| /workspace/coverage/default/78.chip_sw_all_escalation_resets.1490937377 |
| /workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.1703796731 |
| /workspace/coverage/default/79.chip_sw_all_escalation_resets.4111961822 |
| /workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.1429112943 |
| /workspace/coverage/default/8.chip_sw_all_escalation_resets.1800839617 |
| /workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.1374459160 |
| /workspace/coverage/default/8.chip_sw_lc_ctrl_transition.1228105654 |
| /workspace/coverage/default/8.chip_sw_uart_rand_baudrate.3721101518 |
| /workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.2469130878 |
| /workspace/coverage/default/80.chip_sw_all_escalation_resets.3914899943 |
| /workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.3220888333 |
| /workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.4245295478 |
| /workspace/coverage/default/82.chip_sw_all_escalation_resets.3196907455 |
| /workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.758048897 |
| /workspace/coverage/default/83.chip_sw_all_escalation_resets.3000115602 |
| /workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.1353366160 |
| /workspace/coverage/default/85.chip_sw_all_escalation_resets.838585968 |
| /workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.1929178171 |
| /workspace/coverage/default/87.chip_sw_all_escalation_resets.2710231517 |
| /workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.2138886881 |
| /workspace/coverage/default/88.chip_sw_all_escalation_resets.2214167 |
| /workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.4071773135 |
| /workspace/coverage/default/89.chip_sw_all_escalation_resets.3940480399 |
| /workspace/coverage/default/9.chip_sw_all_escalation_resets.3108899041 |
| /workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.3054170944 |
| /workspace/coverage/default/9.chip_sw_lc_ctrl_transition.435515800 |
| /workspace/coverage/default/9.chip_sw_uart_rand_baudrate.1295103687 |
| /workspace/coverage/default/90.chip_sw_all_escalation_resets.3197860686 |
| /workspace/coverage/default/91.chip_sw_all_escalation_resets.203537985 |
| /workspace/coverage/default/92.chip_sw_all_escalation_resets.482701614 |
| /workspace/coverage/default/93.chip_sw_all_escalation_resets.1797101626 |
| /workspace/coverage/default/95.chip_sw_all_escalation_resets.2620158440 |
| /workspace/coverage/default/96.chip_sw_all_escalation_resets.1432134075 |
| /workspace/coverage/default/97.chip_sw_all_escalation_resets.1297521758 |
| /workspace/coverage/default/98.chip_sw_all_escalation_resets.517772657 |
| /workspace/coverage/pad_ctrl_test_mode/1.chip_padctrl_attributes.2880366076 |
| /workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.3727636659 |
| /workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.3217617739 |
| /workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.578591950 |
| /workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.2786455335 |
| /workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.4293840778 |
| /workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.1814758255 |
| /workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.4202278326 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T4 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.3671609316 |
|
|
Jun 04 03:47:28 PM PDT 24 |
Jun 04 03:53:02 PM PDT 24 |
3566511062 ps |
| T5 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.1355707252 |
|
|
Jun 04 03:13:44 PM PDT 24 |
Jun 04 03:18:40 PM PDT 24 |
2766725432 ps |
| T6 |
/workspace/coverage/default/1.chip_sw_alert_test.2999604246 |
|
|
Jun 04 03:24:20 PM PDT 24 |
Jun 04 03:29:32 PM PDT 24 |
2835243480 ps |
| T17 |
/workspace/coverage/default/0.chip_sw_hmac_enc.1469058058 |
|
|
Jun 04 03:16:16 PM PDT 24 |
Jun 04 03:21:27 PM PDT 24 |
2888470600 ps |
| T117 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.3316816102 |
|
|
Jun 04 03:13:32 PM PDT 24 |
Jun 04 03:17:30 PM PDT 24 |
3021260628 ps |
| T57 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.1616750775 |
|
|
Jun 04 03:20:40 PM PDT 24 |
Jun 04 05:02:17 PM PDT 24 |
22888975032 ps |
| T43 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.3758882105 |
|
|
Jun 04 03:12:58 PM PDT 24 |
Jun 04 03:33:37 PM PDT 24 |
7680640568 ps |
| T18 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.3832420415 |
|
|
Jun 04 03:13:58 PM PDT 24 |
Jun 04 03:24:07 PM PDT 24 |
4706190592 ps |
| T44 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.988639288 |
|
|
Jun 04 03:48:13 PM PDT 24 |
Jun 04 04:00:55 PM PDT 24 |
4910682456 ps |
| T19 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.38195154 |
|
|
Jun 04 03:20:46 PM PDT 24 |
Jun 04 03:51:43 PM PDT 24 |
22807040094 ps |
| T87 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.2391592002 |
|
|
Jun 04 03:35:15 PM PDT 24 |
Jun 04 03:50:48 PM PDT 24 |
6189659208 ps |
| T122 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.2633971427 |
|
|
Jun 04 03:31:08 PM PDT 24 |
Jun 04 03:35:04 PM PDT 24 |
2840705480 ps |
| T110 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.3062360210 |
|
|
Jun 04 03:53:20 PM PDT 24 |
Jun 04 04:03:23 PM PDT 24 |
4966747574 ps |
| T28 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.3432833627 |
|
|
Jun 04 03:32:16 PM PDT 24 |
Jun 04 03:41:44 PM PDT 24 |
3871637688 ps |
| T20 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.1475621129 |
|
|
Jun 04 03:13:17 PM PDT 24 |
Jun 04 03:15:19 PM PDT 24 |
3017362640 ps |
| T123 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.3969838066 |
|
|
Jun 04 03:36:34 PM PDT 24 |
Jun 04 03:54:55 PM PDT 24 |
5909245672 ps |
| T124 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.4089216592 |
|
|
Jun 04 03:40:59 PM PDT 24 |
Jun 04 03:45:14 PM PDT 24 |
2339382944 ps |
| T125 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.2771958100 |
|
|
Jun 04 03:50:21 PM PDT 24 |
Jun 04 04:00:24 PM PDT 24 |
6243995332 ps |
| T73 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.4157103759 |
|
|
Jun 04 03:39:13 PM PDT 24 |
Jun 04 03:44:00 PM PDT 24 |
2958334638 ps |
| T74 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3138876719 |
|
|
Jun 04 03:29:01 PM PDT 24 |
Jun 04 03:39:41 PM PDT 24 |
4771248185 ps |
| T58 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.4247115315 |
|
|
Jun 04 03:43:25 PM PDT 24 |
Jun 04 04:40:30 PM PDT 24 |
13873349497 ps |
| T180 |
/workspace/coverage/default/1.chip_sival_flash_info_access.487634788 |
|
|
Jun 04 03:20:22 PM PDT 24 |
Jun 04 03:25:52 PM PDT 24 |
3247967534 ps |
| T141 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.1070224511 |
|
|
Jun 04 03:23:29 PM PDT 24 |
Jun 04 03:29:38 PM PDT 24 |
4607121000 ps |
| T262 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.673274653 |
|
|
Jun 04 03:33:39 PM PDT 24 |
Jun 04 03:40:18 PM PDT 24 |
4350668262 ps |
| T59 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.3605463201 |
|
|
Jun 04 03:18:55 PM PDT 24 |
Jun 04 04:25:48 PM PDT 24 |
14528801930 ps |
| T75 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.3409463854 |
|
|
Jun 04 03:36:28 PM PDT 24 |
Jun 04 03:46:39 PM PDT 24 |
5225714912 ps |
| T84 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3909455651 |
|
|
Jun 04 03:15:41 PM PDT 24 |
Jun 04 03:34:33 PM PDT 24 |
5819267356 ps |
| T188 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.912072100 |
|
|
Jun 04 03:46:11 PM PDT 24 |
Jun 04 03:55:42 PM PDT 24 |
6035119960 ps |
| T1 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3041279040 |
|
|
Jun 04 03:37:50 PM PDT 24 |
Jun 04 03:45:38 PM PDT 24 |
7514100140 ps |
| T2 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.3740129140 |
|
|
Jun 04 03:17:44 PM PDT 24 |
Jun 04 03:22:33 PM PDT 24 |
3701470184 ps |
| T60 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.811784187 |
|
|
Jun 04 03:37:43 PM PDT 24 |
Jun 04 03:46:07 PM PDT 24 |
5294242635 ps |
| T128 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.1248622300 |
|
|
Jun 04 03:14:28 PM PDT 24 |
Jun 04 03:20:46 PM PDT 24 |
3432644778 ps |
| T129 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.4205242132 |
|
|
Jun 04 03:13:16 PM PDT 24 |
Jun 04 03:24:32 PM PDT 24 |
5071718990 ps |
| T72 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.3270512235 |
|
|
Jun 04 03:37:57 PM PDT 24 |
Jun 04 04:00:03 PM PDT 24 |
11066490220 ps |
| T130 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.2768862936 |
|
|
Jun 04 03:25:27 PM PDT 24 |
Jun 04 03:29:31 PM PDT 24 |
2275288216 ps |
| T104 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.2052668513 |
|
|
Jun 04 03:44:48 PM PDT 24 |
Jun 04 03:55:37 PM PDT 24 |
4231648060 ps |
| T131 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.2583394465 |
|
|
Jun 04 03:49:55 PM PDT 24 |
Jun 04 03:56:33 PM PDT 24 |
3425277610 ps |
| T61 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3708304136 |
|
|
Jun 04 03:27:50 PM PDT 24 |
Jun 04 03:37:43 PM PDT 24 |
5044926860 ps |
| T105 |
/workspace/coverage/default/2.chip_sw_power_idle_load.1457025891 |
|
|
Jun 04 03:39:18 PM PDT 24 |
Jun 04 03:51:26 PM PDT 24 |
4441246170 ps |
| T162 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.250007294 |
|
|
Jun 04 03:25:05 PM PDT 24 |
Jun 04 05:20:49 PM PDT 24 |
30272785360 ps |
| T264 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.4270831027 |
|
|
Jun 04 03:13:07 PM PDT 24 |
Jun 04 03:28:31 PM PDT 24 |
5279580712 ps |
| T157 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.3898219191 |
|
|
Jun 04 03:35:37 PM PDT 24 |
Jun 04 03:41:21 PM PDT 24 |
3459385268 ps |
| T168 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.3873482329 |
|
|
Jun 04 03:33:58 PM PDT 24 |
Jun 04 04:35:22 PM PDT 24 |
15154737274 ps |
| T537 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.4162257329 |
|
|
Jun 04 03:25:27 PM PDT 24 |
Jun 04 03:29:05 PM PDT 24 |
3254822270 ps |
| T169 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.3311906621 |
|
|
Jun 04 03:50:03 PM PDT 24 |
Jun 04 03:59:58 PM PDT 24 |
4437150742 ps |
| T147 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.162733557 |
|
|
Jun 04 03:36:07 PM PDT 24 |
Jun 04 03:39:37 PM PDT 24 |
2516681470 ps |
| T21 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.3646701548 |
|
|
Jun 04 03:19:55 PM PDT 24 |
Jun 04 04:25:08 PM PDT 24 |
13218265005 ps |
| T160 |
/workspace/coverage/default/2.chip_sw_aes_entropy.1076802863 |
|
|
Jun 04 03:38:37 PM PDT 24 |
Jun 04 03:42:33 PM PDT 24 |
2248145592 ps |
| T270 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.730059489 |
|
|
Jun 04 03:31:16 PM PDT 24 |
Jun 04 03:44:58 PM PDT 24 |
12042857870 ps |
| T247 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.188780805 |
|
|
Jun 04 03:13:04 PM PDT 24 |
Jun 04 03:21:30 PM PDT 24 |
3262051274 ps |
| T67 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.3366933323 |
|
|
Jun 04 03:29:28 PM PDT 24 |
Jun 04 03:31:12 PM PDT 24 |
2432625644 ps |
| T81 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.1401196042 |
|
|
Jun 04 03:33:42 PM PDT 24 |
Jun 04 05:00:52 PM PDT 24 |
48555453120 ps |
| T159 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.1243383119 |
|
|
Jun 04 03:27:05 PM PDT 24 |
Jun 04 03:38:02 PM PDT 24 |
5660095140 ps |
| T271 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.922925565 |
|
|
Jun 04 03:24:32 PM PDT 24 |
Jun 04 03:27:53 PM PDT 24 |
2994316380 ps |
| T78 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.1560306532 |
|
|
Jun 04 03:42:53 PM PDT 24 |
Jun 04 04:07:03 PM PDT 24 |
8113126014 ps |
| T161 |
/workspace/coverage/default/1.chip_sw_aes_enc.2067021297 |
|
|
Jun 04 03:23:41 PM PDT 24 |
Jun 04 03:27:47 PM PDT 24 |
3154854502 ps |
| T7 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.3614855620 |
|
|
Jun 04 03:28:09 PM PDT 24 |
Jun 04 03:37:05 PM PDT 24 |
4576692930 ps |
| T420 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.3989267967 |
|
|
Jun 04 03:52:51 PM PDT 24 |
Jun 04 04:00:26 PM PDT 24 |
3833586884 ps |
| T393 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.1554391510 |
|
|
Jun 04 03:50:38 PM PDT 24 |
Jun 04 03:56:32 PM PDT 24 |
4003746634 ps |
| T95 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.2643140188 |
|
|
Jun 04 03:41:50 PM PDT 24 |
Jun 04 03:53:25 PM PDT 24 |
6768904466 ps |
| T308 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.2150963249 |
|
|
Jun 04 03:30:00 PM PDT 24 |
Jun 04 03:40:46 PM PDT 24 |
5017074326 ps |
| T324 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.2898100108 |
|
|
Jun 04 03:40:42 PM PDT 24 |
Jun 04 03:49:52 PM PDT 24 |
4133535704 ps |
| T421 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.3250888831 |
|
|
Jun 04 03:20:14 PM PDT 24 |
Jun 04 03:25:30 PM PDT 24 |
3611581234 ps |
| T33 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.1478314394 |
|
|
Jun 04 03:33:46 PM PDT 24 |
Jun 04 04:00:21 PM PDT 24 |
23592042712 ps |
| T29 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.3227656740 |
|
|
Jun 04 03:30:16 PM PDT 24 |
Jun 04 03:34:09 PM PDT 24 |
2681184336 ps |
| T394 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.2904650309 |
|
|
Jun 04 03:52:25 PM PDT 24 |
Jun 04 04:00:23 PM PDT 24 |
3526922020 ps |
| T263 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.20729756 |
|
|
Jun 04 03:15:47 PM PDT 24 |
Jun 04 03:55:22 PM PDT 24 |
8132948632 ps |
| T156 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.829835463 |
|
|
Jun 04 03:30:34 PM PDT 24 |
Jun 04 03:38:40 PM PDT 24 |
3133846792 ps |
| T79 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2323143592 |
|
|
Jun 04 03:37:39 PM PDT 24 |
Jun 04 03:48:51 PM PDT 24 |
4457076320 ps |
| T132 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.3536627116 |
|
|
Jun 04 03:32:19 PM PDT 24 |
Jun 04 03:57:18 PM PDT 24 |
10065848864 ps |
| T158 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.527669459 |
|
|
Jun 04 03:13:57 PM PDT 24 |
Jun 04 03:18:42 PM PDT 24 |
2678942450 ps |
| T254 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.3607951107 |
|
|
Jun 04 03:19:27 PM PDT 24 |
Jun 04 04:49:37 PM PDT 24 |
22496139456 ps |
| T538 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.1380763626 |
|
|
Jun 04 03:15:06 PM PDT 24 |
Jun 04 03:19:44 PM PDT 24 |
2473039895 ps |
| T181 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.3286321518 |
|
|
Jun 04 03:32:48 PM PDT 24 |
Jun 04 04:08:21 PM PDT 24 |
33343157808 ps |
| T337 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.4278739309 |
|
|
Jun 04 03:15:36 PM PDT 24 |
Jun 04 03:20:24 PM PDT 24 |
3238050540 ps |
| T34 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.3914709420 |
|
|
Jun 04 03:13:59 PM PDT 24 |
Jun 04 03:49:25 PM PDT 24 |
25841268258 ps |
| T395 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.995507253 |
|
|
Jun 04 03:20:39 PM PDT 24 |
Jun 04 03:26:03 PM PDT 24 |
3259403654 ps |
| T350 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1743852249 |
|
|
Jun 04 03:20:41 PM PDT 24 |
Jun 04 03:43:55 PM PDT 24 |
13654819973 ps |
| T539 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.478094438 |
|
|
Jun 04 03:42:33 PM PDT 24 |
Jun 04 03:45:46 PM PDT 24 |
2577611080 ps |
| T376 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.4188907931 |
|
|
Jun 04 03:29:34 PM PDT 24 |
Jun 04 03:35:14 PM PDT 24 |
3102331500 ps |
| T400 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.2996456491 |
|
|
Jun 04 03:25:49 PM PDT 24 |
Jun 04 03:46:37 PM PDT 24 |
6540081924 ps |
| T540 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.1903331538 |
|
|
Jun 04 03:32:51 PM PDT 24 |
Jun 04 03:38:10 PM PDT 24 |
3027379848 ps |
| T347 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.3714401180 |
|
|
Jun 04 03:47:45 PM PDT 24 |
Jun 04 03:54:31 PM PDT 24 |
4085766414 ps |
| T541 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.3695152863 |
|
|
Jun 04 03:33:39 PM PDT 24 |
Jun 04 03:40:58 PM PDT 24 |
4143160296 ps |
| T82 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.1590306015 |
|
|
Jun 04 03:39:20 PM PDT 24 |
Jun 04 03:51:30 PM PDT 24 |
11106783880 ps |
| T373 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.31570353 |
|
|
Jun 04 03:50:49 PM PDT 24 |
Jun 04 03:59:49 PM PDT 24 |
5501388008 ps |
| T25 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.15740758 |
|
|
Jun 04 03:30:44 PM PDT 24 |
Jun 04 03:44:27 PM PDT 24 |
7603036221 ps |
| T435 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3421571188 |
|
|
Jun 04 03:45:48 PM PDT 24 |
Jun 04 03:51:26 PM PDT 24 |
4129666184 ps |
| T396 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.2681069822 |
|
|
Jun 04 03:13:39 PM PDT 24 |
Jun 04 03:19:19 PM PDT 24 |
2897073428 ps |
| T248 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.1066814832 |
|
|
Jun 04 03:33:53 PM PDT 24 |
Jun 04 03:42:29 PM PDT 24 |
3830633232 ps |
| T542 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.2584689291 |
|
|
Jun 04 03:20:40 PM PDT 24 |
Jun 04 04:19:04 PM PDT 24 |
15759077400 ps |
| T49 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1467991321 |
|
|
Jun 04 03:34:14 PM PDT 24 |
Jun 04 03:43:06 PM PDT 24 |
6919247900 ps |
| T111 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.2258925104 |
|
|
Jun 04 03:28:09 PM PDT 24 |
Jun 04 03:37:46 PM PDT 24 |
5497995344 ps |
| T185 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.786742877 |
|
|
Jun 04 03:28:36 PM PDT 24 |
Jun 04 04:17:38 PM PDT 24 |
13521103960 ps |
| T85 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.1308429860 |
|
|
Jun 04 03:14:52 PM PDT 24 |
Jun 04 03:24:10 PM PDT 24 |
3065424364 ps |
| T326 |
/workspace/coverage/default/3.chip_tap_straps_prod.342756501 |
|
|
Jun 04 03:42:03 PM PDT 24 |
Jun 04 03:44:21 PM PDT 24 |
2193829436 ps |
| T115 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.424035801 |
|
|
Jun 04 03:17:58 PM PDT 24 |
Jun 04 03:37:07 PM PDT 24 |
10789053632 ps |
| T229 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.982997358 |
|
|
Jun 04 03:34:36 PM PDT 24 |
Jun 04 03:45:24 PM PDT 24 |
4559557270 ps |
| T312 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.3988635529 |
|
|
Jun 04 03:42:06 PM PDT 24 |
Jun 04 03:51:14 PM PDT 24 |
3773557592 ps |
| T76 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.311794174 |
|
|
Jun 04 03:36:40 PM PDT 24 |
Jun 04 03:58:39 PM PDT 24 |
8442922335 ps |
| T138 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.1648227396 |
|
|
Jun 04 03:47:10 PM PDT 24 |
Jun 04 03:55:38 PM PDT 24 |
5138734376 ps |
| T315 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.3894662609 |
|
|
Jun 04 03:23:16 PM PDT 24 |
Jun 04 03:29:24 PM PDT 24 |
3842167764 ps |
| T219 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.4281047966 |
|
|
Jun 04 03:44:24 PM PDT 24 |
Jun 04 04:01:23 PM PDT 24 |
13425539213 ps |
| T77 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.466960503 |
|
|
Jun 04 03:13:21 PM PDT 24 |
Jun 04 03:25:18 PM PDT 24 |
6769223456 ps |
| T314 |
/workspace/coverage/default/1.chip_sw_power_idle_load.4243919529 |
|
|
Jun 04 03:28:17 PM PDT 24 |
Jun 04 03:43:22 PM PDT 24 |
4782662312 ps |
| T112 |
/workspace/coverage/default/0.chip_tap_straps_prod.2363630085 |
|
|
Jun 04 03:12:49 PM PDT 24 |
Jun 04 03:27:50 PM PDT 24 |
9952336594 ps |
| T209 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.2609605134 |
|
|
Jun 04 03:47:17 PM PDT 24 |
Jun 04 03:54:52 PM PDT 24 |
3810115738 ps |
| T80 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3262921068 |
|
|
Jun 04 03:44:38 PM PDT 24 |
Jun 04 03:54:32 PM PDT 24 |
5116574957 ps |
| T543 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.3248042634 |
|
|
Jun 04 03:40:12 PM PDT 24 |
Jun 04 03:44:50 PM PDT 24 |
3188661784 ps |
| T377 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.3395324847 |
|
|
Jun 04 03:41:18 PM PDT 24 |
Jun 04 03:46:12 PM PDT 24 |
2842595180 ps |
| T163 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.2424894008 |
|
|
Jun 04 03:36:20 PM PDT 24 |
Jun 04 03:47:18 PM PDT 24 |
5118914500 ps |
| T336 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.3716624486 |
|
|
Jun 04 03:19:49 PM PDT 24 |
Jun 04 04:18:08 PM PDT 24 |
13848396992 ps |
| T424 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.270089527 |
|
|
Jun 04 03:34:55 PM PDT 24 |
Jun 04 04:26:16 PM PDT 24 |
14454920576 ps |
| T319 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.3965879534 |
|
|
Jun 04 03:34:17 PM PDT 24 |
Jun 04 03:43:41 PM PDT 24 |
7356414908 ps |
| T360 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.203537985 |
|
|
Jun 04 03:53:22 PM PDT 24 |
Jun 04 04:06:21 PM PDT 24 |
6248655756 ps |
| T62 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.4168638740 |
|
|
Jun 04 03:31:57 PM PDT 24 |
Jun 04 06:15:17 PM PDT 24 |
57432447850 ps |
| T361 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.3107152143 |
|
|
Jun 04 03:29:44 PM PDT 24 |
Jun 04 03:41:15 PM PDT 24 |
5809218360 ps |
| T235 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.807034567 |
|
|
Jun 04 03:19:53 PM PDT 24 |
Jun 04 04:49:52 PM PDT 24 |
45850195097 ps |
| T327 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.946083241 |
|
|
Jun 04 03:33:27 PM PDT 24 |
Jun 04 03:54:41 PM PDT 24 |
7234130882 ps |
| T202 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.213795862 |
|
|
Jun 04 03:34:08 PM PDT 24 |
Jun 04 03:56:36 PM PDT 24 |
6449008328 ps |
| T544 |
/workspace/coverage/default/2.rom_e2e_smoke.1029967250 |
|
|
Jun 04 03:43:44 PM PDT 24 |
Jun 04 04:39:57 PM PDT 24 |
14848852264 ps |
| T451 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.4288814137 |
|
|
Jun 04 03:44:02 PM PDT 24 |
Jun 04 03:51:05 PM PDT 24 |
3590121260 ps |
| T251 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.2439013445 |
|
|
Jun 04 03:48:42 PM PDT 24 |
Jun 04 03:57:18 PM PDT 24 |
6121819152 ps |
| T294 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.4229829698 |
|
|
Jun 04 03:14:11 PM PDT 24 |
Jun 04 04:45:09 PM PDT 24 |
27758007172 ps |
| T295 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.2455166393 |
|
|
Jun 04 03:48:34 PM PDT 24 |
Jun 04 03:57:58 PM PDT 24 |
5665165016 ps |
| T296 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.4218553870 |
|
|
Jun 04 03:48:27 PM PDT 24 |
Jun 04 03:57:42 PM PDT 24 |
5288070428 ps |
| T252 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.3833288454 |
|
|
Jun 04 03:29:56 PM PDT 24 |
Jun 04 03:42:32 PM PDT 24 |
5771956236 ps |
| T297 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.204068483 |
|
|
Jun 04 03:51:52 PM PDT 24 |
Jun 04 04:01:03 PM PDT 24 |
5357668762 ps |
| T30 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.269337231 |
|
|
Jun 04 03:12:14 PM PDT 24 |
Jun 04 03:45:14 PM PDT 24 |
8434784424 ps |
| T298 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.1257293343 |
|
|
Jun 04 03:44:29 PM PDT 24 |
Jun 04 04:07:21 PM PDT 24 |
7791720390 ps |
| T68 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.747940904 |
|
|
Jun 04 03:30:47 PM PDT 24 |
Jun 04 07:17:32 PM PDT 24 |
76939103476 ps |
| T299 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.1996603931 |
|
|
Jun 04 03:31:03 PM PDT 24 |
Jun 04 03:40:17 PM PDT 24 |
5595078104 ps |
| T545 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.2271382674 |
|
|
Jun 04 03:20:45 PM PDT 24 |
Jun 04 04:19:03 PM PDT 24 |
14249966824 ps |
| T31 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.3660303850 |
|
|
Jun 04 03:30:11 PM PDT 24 |
Jun 04 03:36:29 PM PDT 24 |
5361153410 ps |
| T428 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.4032774298 |
|
|
Jun 04 03:48:43 PM PDT 24 |
Jun 04 04:32:53 PM PDT 24 |
14429363963 ps |
| T139 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.1602585597 |
|
|
Jun 04 03:19:28 PM PDT 24 |
Jun 04 03:29:29 PM PDT 24 |
6289244640 ps |
| T447 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.3035869754 |
|
|
Jun 04 03:50:20 PM PDT 24 |
Jun 04 03:56:05 PM PDT 24 |
4044647444 ps |
| T546 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.3161992020 |
|
|
Jun 04 03:13:59 PM PDT 24 |
Jun 04 03:32:17 PM PDT 24 |
5504915056 ps |
| T317 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2602814124 |
|
|
Jun 04 03:15:13 PM PDT 24 |
Jun 04 04:11:26 PM PDT 24 |
32659587710 ps |
| T547 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.1198371604 |
|
|
Jun 04 03:21:28 PM PDT 24 |
Jun 04 03:29:23 PM PDT 24 |
6459151205 ps |
| T69 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.995154449 |
|
|
Jun 04 03:20:59 PM PDT 24 |
Jun 04 03:29:54 PM PDT 24 |
7548235552 ps |
| T32 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.4263723220 |
|
|
Jun 04 03:15:50 PM PDT 24 |
Jun 04 05:12:11 PM PDT 24 |
31992933808 ps |
| T399 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.2509201717 |
|
|
Jun 04 03:42:55 PM PDT 24 |
Jun 04 04:54:09 PM PDT 24 |
19142199374 ps |
| T177 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.3132403717 |
|
|
Jun 04 03:13:08 PM PDT 24 |
Jun 04 03:16:30 PM PDT 24 |
2579623334 ps |
| T52 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.2483237483 |
|
|
Jun 04 03:15:10 PM PDT 24 |
Jun 04 03:22:14 PM PDT 24 |
3249787018 ps |
| T548 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.3188120660 |
|
|
Jun 04 03:24:38 PM PDT 24 |
Jun 04 03:42:29 PM PDT 24 |
6089595406 ps |
| T155 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.908491984 |
|
|
Jun 04 03:32:40 PM PDT 24 |
Jun 04 03:41:56 PM PDT 24 |
5644852874 ps |
| T164 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.72171782 |
|
|
Jun 04 03:27:35 PM PDT 24 |
Jun 04 03:35:15 PM PDT 24 |
4307366376 ps |
| T489 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.2512812827 |
|
|
Jun 04 03:52:55 PM PDT 24 |
Jun 04 04:02:27 PM PDT 24 |
4624933148 ps |
| T549 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.1545960933 |
|
|
Jun 04 03:24:07 PM PDT 24 |
Jun 04 04:25:25 PM PDT 24 |
14470940236 ps |
| T152 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.3567479258 |
|
|
Jun 04 03:15:45 PM PDT 24 |
Jun 04 03:45:01 PM PDT 24 |
10422881232 ps |
| T550 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.1216309523 |
|
|
Jun 04 03:38:34 PM PDT 24 |
Jun 04 03:41:47 PM PDT 24 |
2177083765 ps |
| T462 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.391596884 |
|
|
Jun 04 03:49:25 PM PDT 24 |
Jun 04 03:56:15 PM PDT 24 |
4343348440 ps |
| T551 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.2781715278 |
|
|
Jun 04 03:37:02 PM PDT 24 |
Jun 04 03:45:37 PM PDT 24 |
4459730134 ps |
| T260 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.32044740 |
|
|
Jun 04 03:33:35 PM PDT 24 |
Jun 04 03:37:29 PM PDT 24 |
2712124610 ps |
| T272 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.520847694 |
|
|
Jun 04 03:32:18 PM PDT 24 |
Jun 04 03:33:52 PM PDT 24 |
1773977016 ps |
| T450 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.3433174425 |
|
|
Jun 04 03:51:58 PM PDT 24 |
Jun 04 04:00:48 PM PDT 24 |
4953595380 ps |
| T552 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.1504260766 |
|
|
Jun 04 03:15:14 PM PDT 24 |
Jun 04 03:39:13 PM PDT 24 |
7995871826 ps |
| T35 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.3391654488 |
|
|
Jun 04 03:33:17 PM PDT 24 |
Jun 04 04:26:18 PM PDT 24 |
20785083619 ps |
| T553 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.4156072585 |
|
|
Jun 04 03:40:15 PM PDT 24 |
Jun 04 03:51:02 PM PDT 24 |
3941239232 ps |
| T339 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.2022437894 |
|
|
Jun 04 03:42:49 PM PDT 24 |
Jun 04 03:54:24 PM PDT 24 |
6306644908 ps |
| T343 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1633605644 |
|
|
Jun 04 03:23:03 PM PDT 24 |
Jun 04 03:54:16 PM PDT 24 |
27295106589 ps |
| T108 |
/workspace/coverage/default/2.chip_sw_alert_test.2519898444 |
|
|
Jun 04 03:34:52 PM PDT 24 |
Jun 04 03:39:28 PM PDT 24 |
2900956316 ps |
| T173 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.96035370 |
|
|
Jun 04 03:23:42 PM PDT 24 |
Jun 04 04:27:16 PM PDT 24 |
17453152640 ps |
| T344 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.56181999 |
|
|
Jun 04 03:33:05 PM PDT 24 |
Jun 04 04:25:59 PM PDT 24 |
14089591596 ps |
| T184 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.3008089623 |
|
|
Jun 04 03:21:00 PM PDT 24 |
Jun 04 05:00:48 PM PDT 24 |
50624243904 ps |
| T345 |
/workspace/coverage/default/0.chip_sw_aes_idle.3246097410 |
|
|
Jun 04 03:13:30 PM PDT 24 |
Jun 04 03:17:46 PM PDT 24 |
2814931368 ps |
| T246 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2428378528 |
|
|
Jun 04 03:15:12 PM PDT 24 |
Jun 04 03:25:13 PM PDT 24 |
4240062812 ps |
| T346 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.1247858793 |
|
|
Jun 04 03:43:08 PM PDT 24 |
Jun 04 03:55:24 PM PDT 24 |
12559495656 ps |
| T273 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.588677586 |
|
|
Jun 04 03:16:25 PM PDT 24 |
Jun 04 03:18:11 PM PDT 24 |
2209365096 ps |
| T118 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.3748271487 |
|
|
Jun 04 03:48:00 PM PDT 24 |
Jun 04 03:58:02 PM PDT 24 |
5088022598 ps |
| T523 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.2415050507 |
|
|
Jun 04 03:49:45 PM PDT 24 |
Jun 04 03:56:14 PM PDT 24 |
4150327020 ps |
| T55 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.3922494241 |
|
|
Jun 04 03:20:05 PM PDT 24 |
Jun 04 04:58:59 PM PDT 24 |
22706768484 ps |
| T135 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.2826888611 |
|
|
Jun 04 03:27:49 PM PDT 24 |
Jun 04 03:37:55 PM PDT 24 |
4554259960 ps |
| T554 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.1610670756 |
|
|
Jun 04 03:35:41 PM PDT 24 |
Jun 04 03:42:01 PM PDT 24 |
2971549816 ps |
| T555 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.2084704800 |
|
|
Jun 04 03:43:02 PM PDT 24 |
Jun 04 04:04:49 PM PDT 24 |
11876361279 ps |
| T106 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2376082876 |
|
|
Jun 04 03:26:30 PM PDT 24 |
Jun 04 03:36:31 PM PDT 24 |
4693927016 ps |
| T556 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.3251686018 |
|
|
Jun 04 03:15:15 PM PDT 24 |
Jun 04 03:24:44 PM PDT 24 |
4895497978 ps |
| T557 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.208992028 |
|
|
Jun 04 03:39:04 PM PDT 24 |
Jun 04 03:58:41 PM PDT 24 |
7443475393 ps |
| T558 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3906137290 |
|
|
Jun 04 03:14:22 PM PDT 24 |
Jun 04 03:23:41 PM PDT 24 |
3696544808 ps |
| T257 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.3032068338 |
|
|
Jun 04 03:26:53 PM PDT 24 |
Jun 04 03:32:18 PM PDT 24 |
2687071836 ps |
| T397 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2026381816 |
|
|
Jun 04 03:14:04 PM PDT 24 |
Jun 04 03:33:04 PM PDT 24 |
6654568372 ps |
| T153 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.2339951771 |
|
|
Jun 04 03:22:25 PM PDT 24 |
Jun 04 03:50:25 PM PDT 24 |
9940901232 ps |
| T103 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.2285574078 |
|
|
Jun 04 03:12:52 PM PDT 24 |
Jun 04 03:17:15 PM PDT 24 |
3381591112 ps |
| T559 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.3213646895 |
|
|
Jun 04 03:29:19 PM PDT 24 |
Jun 04 03:37:49 PM PDT 24 |
5244605144 ps |
| T83 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2322219626 |
|
|
Jun 04 03:23:30 PM PDT 24 |
Jun 04 03:31:29 PM PDT 24 |
18825652624 ps |
| T56 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.2048156257 |
|
|
Jun 04 03:33:28 PM PDT 24 |
Jun 04 04:32:22 PM PDT 24 |
13858525914 ps |
| T359 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.2914534096 |
|
|
Jun 04 03:35:33 PM PDT 24 |
Jun 04 03:39:46 PM PDT 24 |
2398448756 ps |
| T274 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.474402795 |
|
|
Jun 04 03:14:47 PM PDT 24 |
Jun 04 03:16:42 PM PDT 24 |
1974926939 ps |
| T190 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.939547583 |
|
|
Jun 04 03:13:01 PM PDT 24 |
Jun 04 03:18:34 PM PDT 24 |
3515276524 ps |
| T303 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2687845817 |
|
|
Jun 04 03:14:46 PM PDT 24 |
Jun 04 03:21:19 PM PDT 24 |
4302954424 ps |
| T170 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.832431852 |
|
|
Jun 04 03:15:38 PM PDT 24 |
Jun 04 03:26:37 PM PDT 24 |
8768443076 ps |
| T50 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2258224805 |
|
|
Jun 04 03:14:22 PM PDT 24 |
Jun 04 03:21:44 PM PDT 24 |
6280060560 ps |
| T304 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.656100514 |
|
|
Jun 04 03:43:09 PM PDT 24 |
Jun 04 03:49:03 PM PDT 24 |
3710474980 ps |
| T305 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.1429112943 |
|
|
Jun 04 03:44:07 PM PDT 24 |
Jun 04 03:51:10 PM PDT 24 |
3657354942 ps |
| T186 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.399863167 |
|
|
Jun 04 03:16:29 PM PDT 24 |
Jun 04 03:21:29 PM PDT 24 |
2896341847 ps |
| T306 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.4235106081 |
|
|
Jun 04 03:33:50 PM PDT 24 |
Jun 04 03:38:32 PM PDT 24 |
2869666424 ps |
| T8 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.2458335794 |
|
|
Jun 04 03:14:34 PM PDT 24 |
Jun 04 03:23:29 PM PDT 24 |
5349203420 ps |
| T144 |
/workspace/coverage/default/0.chip_sw_flash_init.448091874 |
|
|
Jun 04 03:12:36 PM PDT 24 |
Jun 04 03:53:35 PM PDT 24 |
22749092364 ps |
| T560 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.3323065069 |
|
|
Jun 04 03:29:31 PM PDT 24 |
Jun 04 03:48:40 PM PDT 24 |
5931302104 ps |
| T90 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.126675583 |
|
|
Jun 04 03:29:14 PM PDT 24 |
Jun 04 04:26:47 PM PDT 24 |
24111233518 ps |
| T100 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.4073011231 |
|
|
Jun 04 03:41:16 PM PDT 24 |
Jun 04 03:53:23 PM PDT 24 |
6485224546 ps |
| T561 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.2949588000 |
|
|
Jun 04 03:14:11 PM PDT 24 |
Jun 04 03:23:55 PM PDT 24 |
4627491204 ps |
| T275 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.570982691 |
|
|
Jun 04 03:20:37 PM PDT 24 |
Jun 04 04:08:02 PM PDT 24 |
10690417160 ps |
| T562 |
/workspace/coverage/default/1.chip_sw_kmac_idle.2756121048 |
|
|
Jun 04 03:25:59 PM PDT 24 |
Jun 04 03:30:46 PM PDT 24 |
2921055754 ps |
| T172 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.4205157903 |
|
|
Jun 04 03:12:14 PM PDT 24 |
Jun 04 03:22:10 PM PDT 24 |
4622005512 ps |
| T374 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.3545027177 |
|
|
Jun 04 03:50:14 PM PDT 24 |
Jun 04 03:59:10 PM PDT 24 |
5991301324 ps |
| T206 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.2825272999 |
|
|
Jun 04 03:14:31 PM PDT 24 |
Jun 04 03:26:54 PM PDT 24 |
4614400172 ps |
| T210 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.127410530 |
|
|
Jun 04 03:25:02 PM PDT 24 |
Jun 04 03:57:33 PM PDT 24 |
8322379800 ps |
| T145 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.4168112579 |
|
|
Jun 04 03:31:19 PM PDT 24 |
Jun 04 04:49:28 PM PDT 24 |
44156687444 ps |
| T348 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.1140144324 |
|
|
Jun 04 03:45:26 PM PDT 24 |
Jun 04 03:51:31 PM PDT 24 |
3692513528 ps |
| T276 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.1477685930 |
|
|
Jun 04 03:21:38 PM PDT 24 |
Jun 04 04:18:52 PM PDT 24 |
13263545027 ps |
| T456 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.1338899165 |
|
|
Jun 04 03:46:54 PM PDT 24 |
Jun 04 03:56:18 PM PDT 24 |
4371183478 ps |
| T563 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.303394199 |
|
|
Jun 04 03:13:38 PM PDT 24 |
Jun 04 03:29:24 PM PDT 24 |
5871685053 ps |
| T564 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.2548781267 |
|
|
Jun 04 03:46:14 PM PDT 24 |
Jun 04 03:50:36 PM PDT 24 |
3220971628 ps |
| T92 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1537965665 |
|
|
Jun 04 03:42:16 PM PDT 24 |
Jun 04 03:49:29 PM PDT 24 |
5461266480 ps |
| T401 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.3623694703 |
|
|
Jun 04 03:50:05 PM PDT 24 |
Jun 04 03:57:37 PM PDT 24 |
3802776756 ps |
| T536 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.2208243985 |
|
|
Jun 04 03:43:33 PM PDT 24 |
Jun 04 03:51:47 PM PDT 24 |
5218215328 ps |
| T3 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.3705191791 |
|
|
Jun 04 03:37:03 PM PDT 24 |
Jun 04 03:56:35 PM PDT 24 |
21008846238 ps |
| T15 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.85999050 |
|
|
Jun 04 03:17:15 PM PDT 24 |
Jun 04 03:44:44 PM PDT 24 |
25038756702 ps |
| T191 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.3671040497 |
|
|
Jun 04 03:16:58 PM PDT 24 |
Jun 04 03:21:55 PM PDT 24 |
3332095648 ps |
| T432 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.2250576 |
|
|
Jun 04 03:45:08 PM PDT 24 |
Jun 04 03:54:47 PM PDT 24 |
5070660520 ps |
| T565 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.3562226319 |
|
|
Jun 04 03:15:02 PM PDT 24 |
Jun 04 03:22:57 PM PDT 24 |
5339477032 ps |
| T311 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.2599882440 |
|
|
Jun 04 03:12:55 PM PDT 24 |
Jun 04 03:42:40 PM PDT 24 |
9137913768 ps |
| T256 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.1712686544 |
|
|
Jun 04 03:17:54 PM PDT 24 |
Jun 04 03:28:33 PM PDT 24 |
6132160552 ps |
| T525 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.3057999357 |
|
|
Jun 04 03:49:47 PM PDT 24 |
Jun 04 03:55:53 PM PDT 24 |
3043062050 ps |
| T518 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.1297521758 |
|
|
Jun 04 03:52:28 PM PDT 24 |
Jun 04 04:03:41 PM PDT 24 |
4947519012 ps |
| T96 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.172864425 |
|
|
Jun 04 03:43:14 PM PDT 24 |
Jun 04 03:57:09 PM PDT 24 |
7212350396 ps |
| T566 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.3990856676 |
|
|
Jun 04 03:35:21 PM PDT 24 |
Jun 04 03:41:37 PM PDT 24 |
3237526262 ps |
| T567 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.1941386359 |
|
|
Jun 04 03:32:23 PM PDT 24 |
Jun 04 03:38:41 PM PDT 24 |
5230069985 ps |
| T37 |
/workspace/coverage/default/1.chip_sw_gpio.1726280280 |
|
|
Jun 04 03:19:18 PM PDT 24 |
Jun 04 03:26:24 PM PDT 24 |
3696949608 ps |
| T390 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.3536795550 |
|
|
Jun 04 03:38:03 PM PDT 24 |
Jun 04 03:40:34 PM PDT 24 |
2492645902 ps |
| T568 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.3204810823 |
|
|
Jun 04 03:33:46 PM PDT 24 |
Jun 04 03:42:04 PM PDT 24 |
5281687956 ps |
| T98 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.179752563 |
|
|
Jun 04 03:16:49 PM PDT 24 |
Jun 04 03:30:16 PM PDT 24 |
8567018080 ps |
| T448 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.260245626 |
|
|
Jun 04 03:45:07 PM PDT 24 |
Jun 04 03:57:12 PM PDT 24 |
6595888402 ps |
| T569 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.3937806032 |
|
|
Jun 04 03:40:40 PM PDT 24 |
Jun 04 03:46:11 PM PDT 24 |
2850996528 ps |
| T570 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.26438984 |
|
|
Jun 04 03:43:33 PM PDT 24 |
Jun 04 04:26:03 PM PDT 24 |
12817931848 ps |
| T91 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.4033230249 |
|
|
Jun 04 03:35:21 PM PDT 24 |
Jun 04 04:32:54 PM PDT 24 |
19033778945 ps |
| T571 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.3934269717 |
|
|
Jun 04 03:33:23 PM PDT 24 |
Jun 04 04:29:55 PM PDT 24 |
14493898734 ps |
| T287 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.2657954044 |
|
|
Jun 04 03:41:01 PM PDT 24 |
Jun 04 03:49:46 PM PDT 24 |
5261617360 ps |
| T63 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.1653382888 |
|
|
Jun 04 03:18:35 PM PDT 24 |
Jun 04 06:09:21 PM PDT 24 |
58257409298 ps |
| T309 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.549721811 |
|
|
Jun 04 03:12:08 PM PDT 24 |
Jun 04 03:22:16 PM PDT 24 |
4213515524 ps |
| T249 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.4219065668 |
|
|
Jun 04 03:47:33 PM PDT 24 |
Jun 04 03:55:11 PM PDT 24 |
5160553748 ps |
| T529 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.3275657816 |
|
|
Jun 04 03:24:53 PM PDT 24 |
Jun 04 03:33:36 PM PDT 24 |
3891561384 ps |
| T320 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.1792033381 |
|
|
Jun 04 03:21:56 PM PDT 24 |
Jun 04 03:31:21 PM PDT 24 |
7615900016 ps |
| T321 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.2674049667 |
|
|
Jun 04 03:41:04 PM PDT 24 |
Jun 04 03:48:35 PM PDT 24 |
6172117800 ps |
| T86 |
/workspace/coverage/default/2.chip_sw_edn_kat.1843051297 |
|
|
Jun 04 03:36:39 PM PDT 24 |
Jun 04 03:48:10 PM PDT 24 |
3285161216 ps |
| T237 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.215685134 |
|
|
Jun 04 03:14:35 PM PDT 24 |
Jun 04 04:42:36 PM PDT 24 |
49886416042 ps |
| T277 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.3963847547 |
|
|
Jun 04 03:20:42 PM PDT 24 |
Jun 04 04:49:00 PM PDT 24 |
22782900550 ps |
| T487 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.3205966919 |
|
|
Jun 04 03:49:40 PM PDT 24 |
Jun 04 03:56:14 PM PDT 24 |
3908880472 ps |