| T142 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.3201163835 |
|
|
Jun 05 07:13:53 PM PDT 24 |
Jun 05 07:22:52 PM PDT 24 |
4220114600 ps |
| T131 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1255177595 |
|
|
Jun 05 07:37:12 PM PDT 24 |
Jun 05 07:45:40 PM PDT 24 |
5580663224 ps |
| T317 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.1605479435 |
|
|
Jun 05 07:48:10 PM PDT 24 |
Jun 05 08:03:43 PM PDT 24 |
6021500100 ps |
| T230 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.4276844471 |
|
|
Jun 05 07:12:54 PM PDT 24 |
Jun 05 07:36:31 PM PDT 24 |
7259141098 ps |
| T970 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2075685223 |
|
|
Jun 05 07:23:25 PM PDT 24 |
Jun 05 08:10:51 PM PDT 24 |
11547795007 ps |
| T971 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.440876200 |
|
|
Jun 05 07:40:44 PM PDT 24 |
Jun 05 07:53:37 PM PDT 24 |
4897953500 ps |
| T972 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.1927313525 |
|
|
Jun 05 07:27:10 PM PDT 24 |
Jun 05 07:45:47 PM PDT 24 |
8514993562 ps |
| T764 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.1559957863 |
|
|
Jun 05 07:47:38 PM PDT 24 |
Jun 05 07:55:00 PM PDT 24 |
3508254550 ps |
| T973 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.1460177787 |
|
|
Jun 05 07:35:43 PM PDT 24 |
Jun 05 07:52:23 PM PDT 24 |
7086654160 ps |
| T974 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.3066332110 |
|
|
Jun 05 07:41:57 PM PDT 24 |
Jun 05 07:49:07 PM PDT 24 |
7547474582 ps |
| T975 |
/workspace/coverage/default/0.chip_tap_straps_prod.3905820741 |
|
|
Jun 05 07:12:55 PM PDT 24 |
Jun 05 07:45:17 PM PDT 24 |
14589156114 ps |
| T976 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.3211677592 |
|
|
Jun 05 07:39:37 PM PDT 24 |
Jun 05 07:43:22 PM PDT 24 |
2984324044 ps |
| T35 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.4070833831 |
|
|
Jun 05 07:11:53 PM PDT 24 |
Jun 05 07:43:14 PM PDT 24 |
7872596868 ps |
| T977 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.3468224470 |
|
|
Jun 05 07:31:01 PM PDT 24 |
Jun 05 07:38:13 PM PDT 24 |
3996304366 ps |
| T978 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.947117116 |
|
|
Jun 05 07:17:30 PM PDT 24 |
Jun 05 07:22:28 PM PDT 24 |
3076707050 ps |
| T355 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.473677119 |
|
|
Jun 05 07:34:20 PM PDT 24 |
Jun 05 07:42:50 PM PDT 24 |
4330737180 ps |
| T979 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.1606565567 |
|
|
Jun 05 07:13:53 PM PDT 24 |
Jun 05 07:23:41 PM PDT 24 |
4197054444 ps |
| T232 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.3072433060 |
|
|
Jun 05 07:23:54 PM PDT 24 |
Jun 05 08:01:23 PM PDT 24 |
10203491220 ps |
| T736 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.2870786383 |
|
|
Jun 05 07:16:04 PM PDT 24 |
Jun 05 07:26:36 PM PDT 24 |
10807690618 ps |
| T980 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.1289694379 |
|
|
Jun 05 07:25:06 PM PDT 24 |
Jun 05 08:20:41 PM PDT 24 |
18041892643 ps |
| T185 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.244586357 |
|
|
Jun 05 07:11:46 PM PDT 24 |
Jun 05 07:19:16 PM PDT 24 |
4486887442 ps |
| T981 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.197490206 |
|
|
Jun 05 07:22:09 PM PDT 24 |
Jun 05 07:37:14 PM PDT 24 |
9375621064 ps |
| T982 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3322203427 |
|
|
Jun 05 07:18:22 PM PDT 24 |
Jun 05 07:35:30 PM PDT 24 |
7208582617 ps |
| T252 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.2280673903 |
|
|
Jun 05 07:51:29 PM PDT 24 |
Jun 05 08:01:33 PM PDT 24 |
4914229482 ps |
| T983 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.1067522057 |
|
|
Jun 05 07:27:34 PM PDT 24 |
Jun 05 07:34:22 PM PDT 24 |
4045921704 ps |
| T984 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.1897110412 |
|
|
Jun 05 07:12:44 PM PDT 24 |
Jun 05 07:38:12 PM PDT 24 |
6961806036 ps |
| T800 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.2616989697 |
|
|
Jun 05 07:46:31 PM PDT 24 |
Jun 05 07:54:18 PM PDT 24 |
4645506552 ps |
| T985 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.4026261524 |
|
|
Jun 05 07:28:44 PM PDT 24 |
Jun 05 07:34:17 PM PDT 24 |
2777591774 ps |
| T986 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.1900511155 |
|
|
Jun 05 07:29:46 PM PDT 24 |
Jun 05 07:53:16 PM PDT 24 |
8856280342 ps |
| T34 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.897512660 |
|
|
Jun 05 07:22:14 PM PDT 24 |
Jun 05 08:36:07 PM PDT 24 |
20515441317 ps |
| T534 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.1657582811 |
|
|
Jun 05 07:23:23 PM PDT 24 |
Jun 05 07:39:13 PM PDT 24 |
5241134904 ps |
| T11 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.699665518 |
|
|
Jun 05 07:30:06 PM PDT 24 |
Jun 05 07:34:53 PM PDT 24 |
3324375260 ps |
| T277 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.3742758250 |
|
|
Jun 05 07:23:54 PM PDT 24 |
Jun 05 08:20:20 PM PDT 24 |
13778563110 ps |
| T409 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.1848448277 |
|
|
Jun 05 07:48:14 PM PDT 24 |
Jun 05 07:54:17 PM PDT 24 |
3366777820 ps |
| T178 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.3982890018 |
|
|
Jun 05 07:35:53 PM PDT 24 |
Jun 05 07:52:52 PM PDT 24 |
8941349362 ps |
| T121 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.538082968 |
|
|
Jun 05 07:35:05 PM PDT 24 |
Jun 05 07:46:30 PM PDT 24 |
3851650920 ps |
| T410 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.2812564906 |
|
|
Jun 05 07:46:47 PM PDT 24 |
Jun 05 07:56:30 PM PDT 24 |
5394841112 ps |
| T117 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.1496867168 |
|
|
Jun 05 07:26:17 PM PDT 24 |
Jun 05 07:46:09 PM PDT 24 |
7258831376 ps |
| T411 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.1475883407 |
|
|
Jun 05 07:50:58 PM PDT 24 |
Jun 05 08:03:12 PM PDT 24 |
4911996832 ps |
| T412 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.1591071368 |
|
|
Jun 05 07:48:29 PM PDT 24 |
Jun 05 07:53:33 PM PDT 24 |
3994975748 ps |
| T413 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.3173853181 |
|
|
Jun 05 07:13:45 PM PDT 24 |
Jun 05 07:21:59 PM PDT 24 |
7216531080 ps |
| T987 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.3201290829 |
|
|
Jun 05 07:28:51 PM PDT 24 |
Jun 05 07:34:51 PM PDT 24 |
3552948090 ps |
| T988 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.3602100453 |
|
|
Jun 05 07:25:09 PM PDT 24 |
Jun 05 08:34:08 PM PDT 24 |
14285597050 ps |
| T382 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.3900737803 |
|
|
Jun 05 07:15:29 PM PDT 24 |
Jun 05 07:19:39 PM PDT 24 |
2925660932 ps |
| T241 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.1564921323 |
|
|
Jun 05 07:31:48 PM PDT 24 |
Jun 05 08:59:09 PM PDT 24 |
49877055334 ps |
| T231 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.3578812920 |
|
|
Jun 05 07:35:10 PM PDT 24 |
Jun 05 08:19:26 PM PDT 24 |
11740962080 ps |
| T771 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.4158876813 |
|
|
Jun 05 07:44:46 PM PDT 24 |
Jun 05 07:55:26 PM PDT 24 |
5420982352 ps |
| T321 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.792575096 |
|
|
Jun 05 07:35:32 PM PDT 24 |
Jun 05 07:56:50 PM PDT 24 |
6191967848 ps |
| T989 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.3469178004 |
|
|
Jun 05 07:33:13 PM PDT 24 |
Jun 05 07:43:32 PM PDT 24 |
7902184240 ps |
| T36 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.1730401974 |
|
|
Jun 05 07:12:07 PM PDT 24 |
Jun 05 07:59:26 PM PDT 24 |
11710902968 ps |
| T990 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1168557088 |
|
|
Jun 05 07:13:44 PM PDT 24 |
Jun 05 07:55:14 PM PDT 24 |
26395661736 ps |
| T782 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.468617355 |
|
|
Jun 05 07:45:49 PM PDT 24 |
Jun 05 07:52:40 PM PDT 24 |
3237262042 ps |
| T287 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.431934872 |
|
|
Jun 05 07:21:00 PM PDT 24 |
Jun 05 07:31:28 PM PDT 24 |
5744453128 ps |
| T991 |
/workspace/coverage/default/2.chip_sw_hmac_oneshot.193113267 |
|
|
Jun 05 07:34:01 PM PDT 24 |
Jun 05 07:42:02 PM PDT 24 |
3065830436 ps |
| T992 |
/workspace/coverage/default/1.rom_keymgr_functest.1047928526 |
|
|
Jun 05 07:29:23 PM PDT 24 |
Jun 05 07:41:30 PM PDT 24 |
5055604484 ps |
| T850 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.2772721637 |
|
|
Jun 05 07:48:43 PM PDT 24 |
Jun 05 07:55:44 PM PDT 24 |
4079957752 ps |
| T846 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.726684681 |
|
|
Jun 05 07:45:12 PM PDT 24 |
Jun 05 07:57:04 PM PDT 24 |
5328562408 ps |
| T993 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3828402470 |
|
|
Jun 05 07:27:54 PM PDT 24 |
Jun 05 07:59:38 PM PDT 24 |
12016629953 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_example_rom.1100917882 |
|
|
Jun 05 07:28:20 PM PDT 24 |
Jun 05 07:30:43 PM PDT 24 |
2991280380 ps |
| T179 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.3407425051 |
|
|
Jun 05 07:37:48 PM PDT 24 |
Jun 05 07:41:59 PM PDT 24 |
3333680640 ps |
| T709 |
/workspace/coverage/default/2.chip_tap_straps_dev.1701108384 |
|
|
Jun 05 07:36:10 PM PDT 24 |
Jun 05 08:00:51 PM PDT 24 |
13765130091 ps |
| T995 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.2600501529 |
|
|
Jun 05 07:47:52 PM PDT 24 |
Jun 05 07:54:57 PM PDT 24 |
3778244120 ps |
| T996 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.3721994747 |
|
|
Jun 05 07:40:12 PM PDT 24 |
Jun 05 07:45:45 PM PDT 24 |
6154986360 ps |
| T851 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.4111120981 |
|
|
Jun 05 07:44:20 PM PDT 24 |
Jun 05 07:50:51 PM PDT 24 |
3823805866 ps |
| T997 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.159613994 |
|
|
Jun 05 07:19:56 PM PDT 24 |
Jun 05 07:37:09 PM PDT 24 |
5944141187 ps |
| T707 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.652896250 |
|
|
Jun 05 07:37:33 PM PDT 24 |
Jun 05 07:48:06 PM PDT 24 |
5237145342 ps |
| T828 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.420608004 |
|
|
Jun 05 07:39:12 PM PDT 24 |
Jun 05 07:51:15 PM PDT 24 |
4376285336 ps |
| T758 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.3560446272 |
|
|
Jun 05 07:46:53 PM PDT 24 |
Jun 05 07:57:56 PM PDT 24 |
5066832712 ps |
| T998 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.1876782377 |
|
|
Jun 05 07:30:24 PM PDT 24 |
Jun 05 07:52:41 PM PDT 24 |
8538117400 ps |
| T999 |
/workspace/coverage/default/0.rom_keymgr_functest.1863043687 |
|
|
Jun 05 07:20:08 PM PDT 24 |
Jun 05 07:32:46 PM PDT 24 |
4483846708 ps |
| T783 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3818982382 |
|
|
Jun 05 07:43:36 PM PDT 24 |
Jun 05 07:49:58 PM PDT 24 |
3775934550 ps |
| T1000 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2036442072 |
|
|
Jun 05 07:32:09 PM PDT 24 |
Jun 05 07:48:55 PM PDT 24 |
9322965298 ps |
| T1001 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.3571425920 |
|
|
Jun 05 07:19:06 PM PDT 24 |
Jun 05 07:53:11 PM PDT 24 |
8559785563 ps |
| T1002 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.2559773115 |
|
|
Jun 05 07:12:35 PM PDT 24 |
Jun 05 07:30:04 PM PDT 24 |
5542106076 ps |
| T84 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.869347458 |
|
|
Jun 05 07:51:10 PM PDT 24 |
Jun 05 08:00:37 PM PDT 24 |
5122279900 ps |
| T1003 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.4052527682 |
|
|
Jun 05 07:21:52 PM PDT 24 |
Jun 05 07:30:18 PM PDT 24 |
3693614912 ps |
| T1004 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.2834973218 |
|
|
Jun 05 07:30:43 PM PDT 24 |
Jun 05 07:51:47 PM PDT 24 |
10766807508 ps |
| T822 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.2429313590 |
|
|
Jun 05 07:46:02 PM PDT 24 |
Jun 05 07:55:37 PM PDT 24 |
6013949894 ps |
| T1005 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.1128835368 |
|
|
Jun 05 07:34:30 PM PDT 24 |
Jun 05 07:40:01 PM PDT 24 |
2775364448 ps |
| T1006 |
/workspace/coverage/default/2.rom_e2e_smoke.548831299 |
|
|
Jun 05 07:42:46 PM PDT 24 |
Jun 05 08:38:01 PM PDT 24 |
14993983392 ps |
| T702 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.3522251419 |
|
|
Jun 05 07:43:32 PM PDT 24 |
Jun 05 09:13:14 PM PDT 24 |
24765441368 ps |
| T710 |
/workspace/coverage/default/0.chip_tap_straps_dev.2145812524 |
|
|
Jun 05 07:14:53 PM PDT 24 |
Jun 05 07:31:49 PM PDT 24 |
8658350128 ps |
| T1007 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.3291671081 |
|
|
Jun 05 07:39:31 PM PDT 24 |
Jun 05 07:58:12 PM PDT 24 |
4993903880 ps |
| T1008 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.973381244 |
|
|
Jun 05 07:33:51 PM PDT 24 |
Jun 05 07:39:27 PM PDT 24 |
2744144052 ps |
| T1009 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.4184901734 |
|
|
Jun 05 07:25:03 PM PDT 24 |
Jun 05 07:41:27 PM PDT 24 |
4240305160 ps |
| T257 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.3480928109 |
|
|
Jun 05 07:38:47 PM PDT 24 |
Jun 05 07:43:35 PM PDT 24 |
2485493108 ps |
| T319 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.1412605752 |
|
|
Jun 05 07:31:29 PM PDT 24 |
Jun 05 08:10:45 PM PDT 24 |
12235285696 ps |
| T14 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.125611064 |
|
|
Jun 05 07:18:37 PM PDT 24 |
Jun 05 07:23:59 PM PDT 24 |
4696866552 ps |
| T395 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.379274847 |
|
|
Jun 05 07:22:29 PM PDT 24 |
Jun 05 07:41:57 PM PDT 24 |
7416690856 ps |
| T396 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.220602040 |
|
|
Jun 05 07:18:38 PM PDT 24 |
Jun 05 07:28:09 PM PDT 24 |
4518114408 ps |
| T397 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.2708660237 |
|
|
Jun 05 07:31:26 PM PDT 24 |
Jun 05 08:04:02 PM PDT 24 |
8448943130 ps |
| T132 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.677308365 |
|
|
Jun 05 07:41:07 PM PDT 24 |
Jun 05 07:51:02 PM PDT 24 |
4853380552 ps |
| T81 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.3441569143 |
|
|
Jun 05 07:14:06 PM PDT 24 |
Jun 05 07:39:40 PM PDT 24 |
11692121680 ps |
| T398 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.1095652252 |
|
|
Jun 05 07:14:21 PM PDT 24 |
Jun 05 07:34:10 PM PDT 24 |
6042246120 ps |
| T399 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.4225810394 |
|
|
Jun 05 07:34:19 PM PDT 24 |
Jun 05 08:13:01 PM PDT 24 |
13054722979 ps |
| T400 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.2702100223 |
|
|
Jun 05 07:19:33 PM PDT 24 |
Jun 05 08:06:01 PM PDT 24 |
10474306350 ps |
| T175 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.355347143 |
|
|
Jun 05 07:14:40 PM PDT 24 |
Jun 05 07:22:33 PM PDT 24 |
5004525384 ps |
| T1010 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.1746699315 |
|
|
Jun 05 07:13:02 PM PDT 24 |
Jun 05 07:29:22 PM PDT 24 |
5756641508 ps |
| T1011 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.3513532063 |
|
|
Jun 05 07:42:57 PM PDT 24 |
Jun 05 07:54:05 PM PDT 24 |
7735641925 ps |
| T1012 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.368971179 |
|
|
Jun 05 07:23:31 PM PDT 24 |
Jun 05 07:33:02 PM PDT 24 |
7205208168 ps |
| T1013 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.3769858740 |
|
|
Jun 05 07:28:08 PM PDT 24 |
Jun 05 07:32:40 PM PDT 24 |
3135989036 ps |
| T1014 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.1531045710 |
|
|
Jun 05 07:27:00 PM PDT 24 |
Jun 05 07:37:06 PM PDT 24 |
4535352470 ps |
| T76 |
/workspace/coverage/default/2.chip_jtag_csr_rw.457512125 |
|
|
Jun 05 07:28:58 PM PDT 24 |
Jun 05 07:49:01 PM PDT 24 |
10382593720 ps |
| T1015 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.183118020 |
|
|
Jun 05 07:18:18 PM PDT 24 |
Jun 05 07:22:43 PM PDT 24 |
3618306760 ps |
| T760 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.3602189462 |
|
|
Jun 05 07:13:52 PM PDT 24 |
Jun 05 07:20:11 PM PDT 24 |
3596937932 ps |
| T1016 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.2041459282 |
|
|
Jun 05 07:10:21 PM PDT 24 |
Jun 05 07:20:19 PM PDT 24 |
3695785804 ps |
| T766 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.2660053891 |
|
|
Jun 05 07:47:15 PM PDT 24 |
Jun 05 07:53:01 PM PDT 24 |
3954303464 ps |
| T328 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.2021066715 |
|
|
Jun 05 07:42:21 PM PDT 24 |
Jun 05 07:51:56 PM PDT 24 |
4896316616 ps |
| T1017 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.1805060572 |
|
|
Jun 05 07:38:51 PM PDT 24 |
Jun 05 07:43:31 PM PDT 24 |
2496023902 ps |
| T333 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.1547182628 |
|
|
Jun 05 07:29:59 PM PDT 24 |
Jun 05 07:45:30 PM PDT 24 |
5036258928 ps |
| T167 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.1355476345 |
|
|
Jun 05 07:47:32 PM PDT 24 |
Jun 05 07:59:45 PM PDT 24 |
6453369068 ps |
| T1018 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.1820692043 |
|
|
Jun 05 07:27:21 PM PDT 24 |
Jun 05 07:33:40 PM PDT 24 |
4409378704 ps |
| T356 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2094660898 |
|
|
Jun 05 07:21:24 PM PDT 24 |
Jun 05 07:31:09 PM PDT 24 |
19073850696 ps |
| T825 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.1184623199 |
|
|
Jun 05 07:46:34 PM PDT 24 |
Jun 05 07:53:31 PM PDT 24 |
4104629640 ps |
| T1019 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.2083654517 |
|
|
Jun 05 07:17:04 PM PDT 24 |
Jun 05 07:25:14 PM PDT 24 |
4468524708 ps |
| T1020 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.168986480 |
|
|
Jun 05 07:32:05 PM PDT 24 |
Jun 05 07:43:13 PM PDT 24 |
10883060860 ps |
| T711 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.300563877 |
|
|
Jun 05 07:30:24 PM PDT 24 |
Jun 05 07:32:11 PM PDT 24 |
2605511207 ps |
| T204 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.3454473904 |
|
|
Jun 05 07:22:07 PM PDT 24 |
Jun 05 07:35:08 PM PDT 24 |
5339448096 ps |
| T85 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.737820251 |
|
|
Jun 05 07:48:33 PM PDT 24 |
Jun 05 07:56:38 PM PDT 24 |
4260189772 ps |
| T1021 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.2731295094 |
|
|
Jun 05 07:21:33 PM PDT 24 |
Jun 05 08:15:44 PM PDT 24 |
14670414448 ps |
| T1022 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.3998870901 |
|
|
Jun 05 07:13:28 PM PDT 24 |
Jun 05 07:58:20 PM PDT 24 |
26858786540 ps |
| T703 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2779138676 |
|
|
Jun 05 07:37:50 PM PDT 24 |
Jun 05 08:33:48 PM PDT 24 |
25253073528 ps |
| T785 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.2574792784 |
|
|
Jun 05 07:49:33 PM PDT 24 |
Jun 05 07:55:59 PM PDT 24 |
4133349400 ps |
| T769 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.3422539506 |
|
|
Jun 05 07:47:02 PM PDT 24 |
Jun 05 07:56:43 PM PDT 24 |
6171776940 ps |
| T329 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.896195446 |
|
|
Jun 05 07:21:11 PM PDT 24 |
Jun 05 07:32:28 PM PDT 24 |
4045071972 ps |
| T1023 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.3339258771 |
|
|
Jun 05 07:16:13 PM PDT 24 |
Jun 05 07:23:42 PM PDT 24 |
7458804390 ps |
| T1024 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.1258075151 |
|
|
Jun 05 07:44:33 PM PDT 24 |
Jun 05 08:28:44 PM PDT 24 |
11059938851 ps |
| T1025 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.1228783019 |
|
|
Jun 05 07:32:30 PM PDT 24 |
Jun 05 07:49:26 PM PDT 24 |
5869555953 ps |
| T1026 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.2551581476 |
|
|
Jun 05 07:33:48 PM PDT 24 |
Jun 05 08:08:04 PM PDT 24 |
10079133232 ps |
| T1027 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.4117150895 |
|
|
Jun 05 07:40:26 PM PDT 24 |
Jun 05 07:50:32 PM PDT 24 |
7001789393 ps |
| T161 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.630354353 |
|
|
Jun 05 07:34:06 PM PDT 24 |
Jun 05 10:32:21 PM PDT 24 |
255192809886 ps |
| T1028 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.2814028288 |
|
|
Jun 05 07:37:35 PM PDT 24 |
Jun 05 07:41:41 PM PDT 24 |
3041593379 ps |
| T1029 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.893115603 |
|
|
Jun 05 07:29:18 PM PDT 24 |
Jun 05 07:33:19 PM PDT 24 |
3073371686 ps |
| T1030 |
/workspace/coverage/default/1.chip_sw_example_rom.2617062037 |
|
|
Jun 05 07:18:20 PM PDT 24 |
Jun 05 07:20:35 PM PDT 24 |
2952223074 ps |
| T712 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.1217035552 |
|
|
Jun 05 07:38:17 PM PDT 24 |
Jun 05 07:40:20 PM PDT 24 |
3058110552 ps |
| T806 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.1932499853 |
|
|
Jun 05 07:18:12 PM PDT 24 |
Jun 05 07:30:16 PM PDT 24 |
4927840230 ps |
| T854 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.563152106 |
|
|
Jun 05 07:47:14 PM PDT 24 |
Jun 05 07:52:52 PM PDT 24 |
3519162930 ps |
| T1031 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.2707673811 |
|
|
Jun 05 07:17:44 PM PDT 24 |
Jun 05 07:28:01 PM PDT 24 |
4849890250 ps |
| T352 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.1656857744 |
|
|
Jun 05 07:47:29 PM PDT 24 |
Jun 05 07:57:50 PM PDT 24 |
5313780328 ps |
| T770 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.3334315210 |
|
|
Jun 05 07:49:10 PM PDT 24 |
Jun 05 07:59:35 PM PDT 24 |
6218439380 ps |
| T136 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.3559018615 |
|
|
Jun 05 07:35:57 PM PDT 24 |
Jun 05 07:49:18 PM PDT 24 |
6010546448 ps |
| T1032 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.2128216188 |
|
|
Jun 05 07:20:05 PM PDT 24 |
Jun 05 07:24:27 PM PDT 24 |
2502876718 ps |
| T240 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.3496311103 |
|
|
Jun 05 07:17:33 PM PDT 24 |
Jun 05 07:55:11 PM PDT 24 |
22577153696 ps |
| T384 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.2822235389 |
|
|
Jun 05 07:12:00 PM PDT 24 |
Jun 05 07:29:19 PM PDT 24 |
5580295332 ps |
| T1033 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.264087244 |
|
|
Jun 05 07:33:49 PM PDT 24 |
Jun 05 08:11:53 PM PDT 24 |
11529273592 ps |
| T375 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.2336746290 |
|
|
Jun 05 07:12:12 PM PDT 24 |
Jun 05 07:22:04 PM PDT 24 |
5816381112 ps |
| T360 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.511694824 |
|
|
Jun 05 07:34:51 PM PDT 24 |
Jun 05 07:38:51 PM PDT 24 |
2898757465 ps |
| T1034 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.994617226 |
|
|
Jun 05 07:22:10 PM PDT 24 |
Jun 05 07:35:02 PM PDT 24 |
10652120560 ps |
| T1035 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.3649050213 |
|
|
Jun 05 07:22:25 PM PDT 24 |
Jun 05 08:20:37 PM PDT 24 |
14560740508 ps |
| T379 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.2982540843 |
|
|
Jun 05 07:15:26 PM PDT 24 |
Jun 05 07:18:33 PM PDT 24 |
2544507138 ps |
| T1036 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.3817800846 |
|
|
Jun 05 07:32:26 PM PDT 24 |
Jun 05 07:36:16 PM PDT 24 |
2372485976 ps |
| T66 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.1121944784 |
|
|
Jun 05 07:40:32 PM PDT 24 |
Jun 05 07:44:49 PM PDT 24 |
3528113802 ps |
| T788 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.3278447404 |
|
|
Jun 05 07:45:36 PM PDT 24 |
Jun 05 07:54:25 PM PDT 24 |
5722143820 ps |
| T1037 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.4261927241 |
|
|
Jun 05 07:43:38 PM PDT 24 |
Jun 05 08:44:21 PM PDT 24 |
14907551197 ps |
| T431 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.702463342 |
|
|
Jun 05 07:44:58 PM PDT 24 |
Jun 05 07:54:50 PM PDT 24 |
5939761000 ps |
| T244 |
/workspace/coverage/default/0.chip_sw_flash_init.4151517918 |
|
|
Jun 05 07:17:41 PM PDT 24 |
Jun 05 07:55:23 PM PDT 24 |
21119760661 ps |
| T1038 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.2432717788 |
|
|
Jun 05 07:25:18 PM PDT 24 |
Jun 05 08:29:22 PM PDT 24 |
17362368200 ps |
| T1039 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.3169354299 |
|
|
Jun 05 07:43:07 PM PDT 24 |
Jun 05 07:52:23 PM PDT 24 |
6529242137 ps |
| T210 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.2069415491 |
|
|
Jun 05 07:28:49 PM PDT 24 |
Jun 05 07:35:27 PM PDT 24 |
3921424061 ps |
| T819 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.2514749868 |
|
|
Jun 05 07:48:16 PM PDT 24 |
Jun 05 07:55:09 PM PDT 24 |
3399768700 ps |
| T1040 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.553329225 |
|
|
Jun 05 07:43:24 PM PDT 24 |
Jun 05 08:00:56 PM PDT 24 |
9308447500 ps |
| T768 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.1358292290 |
|
|
Jun 05 07:45:03 PM PDT 24 |
Jun 05 07:52:26 PM PDT 24 |
4077951658 ps |
| T814 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.1019772549 |
|
|
Jun 05 07:50:22 PM PDT 24 |
Jun 05 07:55:37 PM PDT 24 |
4188390450 ps |
| T1041 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.618771594 |
|
|
Jun 05 07:14:32 PM PDT 24 |
Jun 05 07:27:43 PM PDT 24 |
4231690508 ps |
| T1042 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.3449666628 |
|
|
Jun 05 07:12:20 PM PDT 24 |
Jun 05 07:32:09 PM PDT 24 |
7431473880 ps |
| T1043 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1652948020 |
|
|
Jun 05 07:41:06 PM PDT 24 |
Jun 05 07:48:46 PM PDT 24 |
4464466042 ps |
| T168 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.3787189027 |
|
|
Jun 05 07:48:12 PM PDT 24 |
Jun 05 07:58:47 PM PDT 24 |
5448486200 ps |
| T835 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.4232876333 |
|
|
Jun 05 07:49:44 PM PDT 24 |
Jun 05 07:56:00 PM PDT 24 |
4261257280 ps |
| T1044 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.3273790749 |
|
|
Jun 05 07:22:39 PM PDT 24 |
Jun 05 07:26:54 PM PDT 24 |
2911995230 ps |
| T1045 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.2752290390 |
|
|
Jun 05 07:50:32 PM PDT 24 |
Jun 05 07:58:26 PM PDT 24 |
5268542340 ps |
| T1046 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.3202663803 |
|
|
Jun 05 07:15:36 PM PDT 24 |
Jun 05 07:26:10 PM PDT 24 |
10824331072 ps |
| T100 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.1101711853 |
|
|
Jun 05 07:15:04 PM PDT 24 |
Jun 05 07:20:22 PM PDT 24 |
7005846736 ps |
| T1047 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.952513163 |
|
|
Jun 05 07:42:59 PM PDT 24 |
Jun 05 08:25:42 PM PDT 24 |
13947065000 ps |
| T77 |
/workspace/coverage/default/2.chip_jtag_mem_access.3301861117 |
|
|
Jun 05 07:28:46 PM PDT 24 |
Jun 05 07:51:21 PM PDT 24 |
13675342650 ps |
| T1048 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.462326314 |
|
|
Jun 05 07:29:02 PM PDT 24 |
Jun 05 07:33:01 PM PDT 24 |
3253067560 ps |
| T1049 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.3393776110 |
|
|
Jun 05 07:16:38 PM PDT 24 |
Jun 05 07:20:23 PM PDT 24 |
3488941967 ps |
| T15 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.2498434565 |
|
|
Jun 05 07:31:45 PM PDT 24 |
Jun 05 07:35:41 PM PDT 24 |
2822143000 ps |
| T197 |
/workspace/coverage/default/0.chip_jtag_mem_access.1051748095 |
|
|
Jun 05 07:06:11 PM PDT 24 |
Jun 05 07:32:01 PM PDT 24 |
13272854058 ps |
| T270 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.2991585690 |
|
|
Jun 05 07:32:41 PM PDT 24 |
Jun 05 07:41:54 PM PDT 24 |
5237404948 ps |
| T1050 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.1195744227 |
|
|
Jun 05 07:36:10 PM PDT 24 |
Jun 05 07:59:47 PM PDT 24 |
8515516664 ps |
| T852 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.1149821784 |
|
|
Jun 05 07:46:28 PM PDT 24 |
Jun 05 07:54:19 PM PDT 24 |
3210733690 ps |
| T1051 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.1896507985 |
|
|
Jun 05 07:43:42 PM PDT 24 |
Jun 05 07:57:32 PM PDT 24 |
10393543893 ps |
| T271 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.3304421926 |
|
|
Jun 05 07:13:48 PM PDT 24 |
Jun 05 07:21:43 PM PDT 24 |
5282668092 ps |
| T1052 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.3401253859 |
|
|
Jun 05 07:43:05 PM PDT 24 |
Jun 05 08:32:26 PM PDT 24 |
14363338800 ps |
| T1053 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.2993463121 |
|
|
Jun 05 07:15:04 PM PDT 24 |
Jun 05 07:18:10 PM PDT 24 |
2729027288 ps |
| T1054 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.1288556653 |
|
|
Jun 05 07:14:10 PM PDT 24 |
Jun 05 07:17:57 PM PDT 24 |
2395595188 ps |
| T829 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.538291536 |
|
|
Jun 05 07:44:50 PM PDT 24 |
Jun 05 07:56:47 PM PDT 24 |
5570518884 ps |
| T1055 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.2286330459 |
|
|
Jun 05 07:21:37 PM PDT 24 |
Jun 05 08:19:27 PM PDT 24 |
14063634680 ps |
| T1056 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.3951428771 |
|
|
Jun 05 07:43:01 PM PDT 24 |
Jun 05 08:06:28 PM PDT 24 |
8151526036 ps |
| T37 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.4285503264 |
|
|
Jun 05 07:13:12 PM PDT 24 |
Jun 05 09:12:51 PM PDT 24 |
30995330388 ps |
| T52 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.2323056988 |
|
|
Jun 05 07:33:33 PM PDT 24 |
Jun 05 07:40:41 PM PDT 24 |
4053353813 ps |
| T786 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.1017920377 |
|
|
Jun 05 07:44:22 PM PDT 24 |
Jun 05 07:51:02 PM PDT 24 |
3772027650 ps |
| T1057 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.61549520 |
|
|
Jun 05 07:12:03 PM PDT 24 |
Jun 05 07:25:23 PM PDT 24 |
4635727000 ps |
| T1058 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.2755948878 |
|
|
Jun 05 07:10:50 PM PDT 24 |
Jun 05 07:15:21 PM PDT 24 |
3076010336 ps |
| T288 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2143766228 |
|
|
Jun 05 07:16:23 PM PDT 24 |
Jun 05 07:26:40 PM PDT 24 |
5458208603 ps |
| T1059 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.3226238537 |
|
|
Jun 05 07:23:55 PM PDT 24 |
Jun 05 08:13:51 PM PDT 24 |
10874881532 ps |
| T47 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.4286528656 |
|
|
Jun 05 07:31:25 PM PDT 24 |
Jun 05 07:35:06 PM PDT 24 |
2773898122 ps |
| T1060 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.747936545 |
|
|
Jun 05 07:14:35 PM PDT 24 |
Jun 05 07:33:25 PM PDT 24 |
7095247216 ps |
| T1061 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3313146920 |
|
|
Jun 05 07:20:07 PM PDT 24 |
Jun 05 07:32:40 PM PDT 24 |
3992808762 ps |
| T1062 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.3474377506 |
|
|
Jun 05 07:20:26 PM PDT 24 |
Jun 05 07:28:16 PM PDT 24 |
4285979584 ps |
| T361 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.81333396 |
|
|
Jun 05 07:38:29 PM PDT 24 |
Jun 05 07:42:44 PM PDT 24 |
3220014322 ps |
| T1063 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.2952847221 |
|
|
Jun 05 07:14:17 PM PDT 24 |
Jun 05 07:38:55 PM PDT 24 |
8181352364 ps |
| T1064 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.2347243362 |
|
|
Jun 05 07:14:06 PM PDT 24 |
Jun 05 07:18:32 PM PDT 24 |
2761283992 ps |
| T173 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.2780785239 |
|
|
Jun 05 07:12:23 PM PDT 24 |
Jun 05 07:14:57 PM PDT 24 |
2895356219 ps |
| T169 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.1996058624 |
|
|
Jun 05 07:44:00 PM PDT 24 |
Jun 05 07:54:51 PM PDT 24 |
4985043064 ps |
| T345 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.274949497 |
|
|
Jun 05 07:19:37 PM PDT 24 |
Jun 05 07:22:51 PM PDT 24 |
2145641664 ps |
| T1065 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.1695426189 |
|
|
Jun 05 07:42:06 PM PDT 24 |
Jun 05 08:26:18 PM PDT 24 |
10840795144 ps |
| T1066 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.3386357753 |
|
|
Jun 05 07:24:28 PM PDT 24 |
Jun 05 07:59:29 PM PDT 24 |
10706678850 ps |
| T353 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.2154989717 |
|
|
Jun 05 07:48:15 PM PDT 24 |
Jun 05 07:57:31 PM PDT 24 |
5219781352 ps |
| T815 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.4204252056 |
|
|
Jun 05 07:47:36 PM PDT 24 |
Jun 05 07:59:54 PM PDT 24 |
5507477830 ps |
| T1067 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.3382698090 |
|
|
Jun 05 07:12:27 PM PDT 24 |
Jun 05 07:34:04 PM PDT 24 |
7383342048 ps |
| T1068 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.1942147715 |
|
|
Jun 05 07:27:18 PM PDT 24 |
Jun 05 07:31:20 PM PDT 24 |
2734133340 ps |
| T838 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.3851641361 |
|
|
Jun 05 07:46:28 PM PDT 24 |
Jun 05 07:52:00 PM PDT 24 |
3889698464 ps |
| T1069 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.4010003576 |
|
|
Jun 05 07:34:19 PM PDT 24 |
Jun 05 07:48:19 PM PDT 24 |
3763285536 ps |
| T1070 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.1107771564 |
|
|
Jun 05 07:23:17 PM PDT 24 |
Jun 05 08:50:05 PM PDT 24 |
23046665592 ps |
| T1071 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.3030915011 |
|
|
Jun 05 07:18:02 PM PDT 24 |
Jun 05 07:21:11 PM PDT 24 |
2648734746 ps |
| T1072 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.864529047 |
|
|
Jun 05 07:28:45 PM PDT 24 |
Jun 05 07:32:36 PM PDT 24 |
2899204475 ps |
| T1073 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.1278435364 |
|
|
Jun 05 07:18:02 PM PDT 24 |
Jun 05 07:25:13 PM PDT 24 |
3697805060 ps |
| T795 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.146890957 |
|
|
Jun 05 07:50:58 PM PDT 24 |
Jun 05 08:00:45 PM PDT 24 |
5806499812 ps |
| T1074 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.298584273 |
|
|
Jun 05 07:42:58 PM PDT 24 |
Jun 05 08:42:03 PM PDT 24 |
17563971648 ps |
| T1075 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3191729900 |
|
|
Jun 05 07:32:20 PM PDT 24 |
Jun 05 07:41:39 PM PDT 24 |
5477239716 ps |
| T1076 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.2098832320 |
|
|
Jun 05 07:31:14 PM PDT 24 |
Jun 05 07:38:58 PM PDT 24 |
4627860255 ps |
| T1077 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.4166320125 |
|
|
Jun 05 07:20:35 PM PDT 24 |
Jun 05 07:32:03 PM PDT 24 |
4608133856 ps |
| T1078 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.570672989 |
|
|
Jun 05 07:14:45 PM PDT 24 |
Jun 05 07:19:13 PM PDT 24 |
3856349182 ps |
| T1079 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.3870229317 |
|
|
Jun 05 07:27:04 PM PDT 24 |
Jun 05 07:32:04 PM PDT 24 |
2869009748 ps |
| T1080 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2311605340 |
|
|
Jun 05 07:32:34 PM PDT 24 |
Jun 05 08:28:29 PM PDT 24 |
35850166930 ps |
| T787 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.2727764457 |
|
|
Jun 05 07:48:40 PM PDT 24 |
Jun 05 08:01:20 PM PDT 24 |
5687781556 ps |
| T1081 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.2997994385 |
|
|
Jun 05 07:12:54 PM PDT 24 |
Jun 05 07:19:53 PM PDT 24 |
5426465396 ps |
| T767 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.2151434656 |
|
|
Jun 05 07:51:20 PM PDT 24 |
Jun 05 07:57:20 PM PDT 24 |
3987541950 ps |
| T713 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.3877940962 |
|
|
Jun 05 07:23:06 PM PDT 24 |
Jun 05 07:24:58 PM PDT 24 |
2009872122 ps |
| T320 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.1929804102 |
|
|
Jun 05 07:20:21 PM PDT 24 |
Jun 05 07:47:38 PM PDT 24 |
9553808680 ps |
| T793 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.465183294 |
|
|
Jun 05 07:43:57 PM PDT 24 |
Jun 05 07:50:10 PM PDT 24 |
3892368542 ps |
| T1082 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.4191719062 |
|
|
Jun 05 07:38:38 PM PDT 24 |
Jun 05 07:49:29 PM PDT 24 |
3970416648 ps |
| T1083 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.3841044955 |
|
|
Jun 05 07:23:13 PM PDT 24 |
Jun 05 08:19:27 PM PDT 24 |
14111894800 ps |
| T824 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.98517947 |
|
|
Jun 05 07:46:36 PM PDT 24 |
Jun 05 07:58:26 PM PDT 24 |
6097585136 ps |
| T809 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.1117469421 |
|
|
Jun 05 07:43:06 PM PDT 24 |
Jun 05 07:53:41 PM PDT 24 |
4219395548 ps |
| T1084 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.807729256 |
|
|
Jun 05 07:22:02 PM PDT 24 |
Jun 05 08:23:46 PM PDT 24 |
13153020882 ps |
| T1085 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.3309572082 |
|
|
Jun 05 07:17:03 PM PDT 24 |
Jun 05 07:25:54 PM PDT 24 |
4397834960 ps |
| T1086 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.3981145343 |
|
|
Jun 05 07:12:04 PM PDT 24 |
Jun 05 07:28:41 PM PDT 24 |
4895609792 ps |
| T1087 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3241170591 |
|
|
Jun 05 07:27:50 PM PDT 24 |
Jun 05 07:40:00 PM PDT 24 |
3676458928 ps |
| T1088 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.1033555781 |
|
|
Jun 05 07:37:02 PM PDT 24 |
Jun 05 07:46:56 PM PDT 24 |
4117864568 ps |
| T48 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.4127874144 |
|
|
Jun 05 07:20:02 PM PDT 24 |
Jun 05 07:28:05 PM PDT 24 |
5546261192 ps |
| T1089 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.4193742771 |
|
|
Jun 05 07:26:15 PM PDT 24 |
Jun 05 07:34:44 PM PDT 24 |
4895812180 ps |
| T1090 |
/workspace/coverage/default/2.chip_sw_aes_enc.2320817436 |
|
|
Jun 05 07:32:41 PM PDT 24 |
Jun 05 07:36:21 PM PDT 24 |
3029446636 ps |
| T789 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.1152284429 |
|
|
Jun 05 07:31:45 PM PDT 24 |
Jun 05 07:39:44 PM PDT 24 |
4737355200 ps |
| T812 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.544401096 |
|
|
Jun 05 07:47:56 PM PDT 24 |
Jun 05 07:59:08 PM PDT 24 |
4764929332 ps |
| T1091 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.2274326529 |
|
|
Jun 05 07:19:05 PM PDT 24 |
Jun 05 07:31:33 PM PDT 24 |
4038565862 ps |
| T1092 |
/workspace/coverage/default/2.chip_sw_aes_idle.3939674790 |
|
|
Jun 05 07:31:43 PM PDT 24 |
Jun 05 07:35:17 PM PDT 24 |
3071302664 ps |
| T843 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.4081342678 |
|
|
Jun 05 07:45:04 PM PDT 24 |
Jun 05 07:51:12 PM PDT 24 |
3987414520 ps |
| T322 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.3983510091 |
|
|
Jun 05 07:12:43 PM PDT 24 |
Jun 05 07:27:10 PM PDT 24 |
5822329048 ps |