| T1093 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.3275971554 |
|
|
Jun 05 07:19:43 PM PDT 24 |
Jun 05 07:23:17 PM PDT 24 |
3348017780 ps |
| T1094 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.1086941745 |
|
|
Jun 05 07:37:25 PM PDT 24 |
Jun 05 07:44:52 PM PDT 24 |
4729552616 ps |
| T1095 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.1315183400 |
|
|
Jun 05 07:37:21 PM PDT 24 |
Jun 05 08:40:52 PM PDT 24 |
14781780738 ps |
| T342 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.2012377727 |
|
|
Jun 05 07:12:56 PM PDT 24 |
Jun 05 07:20:50 PM PDT 24 |
4144017356 ps |
| T1096 |
/workspace/coverage/default/1.chip_sw_edn_kat.782028235 |
|
|
Jun 05 07:24:53 PM PDT 24 |
Jun 05 07:34:32 PM PDT 24 |
3531516598 ps |
| T1097 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.861929958 |
|
|
Jun 05 07:16:15 PM PDT 24 |
Jun 05 07:25:51 PM PDT 24 |
6321737350 ps |
| T1098 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.1786485625 |
|
|
Jun 05 07:22:04 PM PDT 24 |
Jun 05 08:21:46 PM PDT 24 |
13833873552 ps |
| T1099 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.3567254797 |
|
|
Jun 05 07:11:50 PM PDT 24 |
Jun 05 07:33:24 PM PDT 24 |
8116713240 ps |
| T300 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.3859544122 |
|
|
Jun 05 07:15:31 PM PDT 24 |
Jun 05 07:21:41 PM PDT 24 |
3372915008 ps |
| T432 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.3768916962 |
|
|
Jun 05 07:25:33 PM PDT 24 |
Jun 05 07:29:19 PM PDT 24 |
2056477960 ps |
| T714 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.832365299 |
|
|
Jun 05 07:13:27 PM PDT 24 |
Jun 05 07:15:48 PM PDT 24 |
2980346570 ps |
| T1100 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.1088394281 |
|
|
Jun 05 07:20:09 PM PDT 24 |
Jun 05 07:23:36 PM PDT 24 |
2523150328 ps |
| T233 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.1225783879 |
|
|
Jun 05 07:15:06 PM PDT 24 |
Jun 05 08:00:42 PM PDT 24 |
13825952866 ps |
| T1101 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.4245403292 |
|
|
Jun 05 07:15:49 PM PDT 24 |
Jun 05 07:27:42 PM PDT 24 |
4100891636 ps |
| T722 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.1166214369 |
|
|
Jun 05 07:34:40 PM PDT 24 |
Jun 05 07:38:38 PM PDT 24 |
3632965558 ps |
| T1102 |
/workspace/coverage/default/0.chip_sw_power_idle_load.3833196871 |
|
|
Jun 05 07:13:47 PM PDT 24 |
Jun 05 07:22:27 PM PDT 24 |
4966364062 ps |
| T1103 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3052471768 |
|
|
Jun 05 07:40:04 PM PDT 24 |
Jun 05 07:49:32 PM PDT 24 |
4415790622 ps |
| T1104 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.352444370 |
|
|
Jun 05 07:40:42 PM PDT 24 |
Jun 05 07:52:17 PM PDT 24 |
5109951800 ps |
| T1105 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.984918721 |
|
|
Jun 05 07:20:54 PM PDT 24 |
Jun 05 07:25:35 PM PDT 24 |
3406505112 ps |
| T1106 |
/workspace/coverage/default/2.chip_sw_example_concurrency.3939225586 |
|
|
Jun 05 07:30:02 PM PDT 24 |
Jun 05 07:34:58 PM PDT 24 |
3505394900 ps |
| T242 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.3074875384 |
|
|
Jun 05 07:32:38 PM PDT 24 |
Jun 05 08:56:14 PM PDT 24 |
47769825600 ps |
| T1107 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3465400954 |
|
|
Jun 05 07:26:30 PM PDT 24 |
Jun 05 07:37:32 PM PDT 24 |
4225387988 ps |
| T823 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3543211278 |
|
|
Jun 05 07:46:12 PM PDT 24 |
Jun 05 07:54:43 PM PDT 24 |
3219418240 ps |
| T216 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.2085821803 |
|
|
Jun 05 07:29:00 PM PDT 24 |
Jun 05 11:04:24 PM PDT 24 |
76632283439 ps |
| T796 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.547149350 |
|
|
Jun 05 07:44:08 PM PDT 24 |
Jun 05 07:55:00 PM PDT 24 |
6323762740 ps |
| T61 |
/workspace/coverage/default/2.chip_sw_alert_test.1271482292 |
|
|
Jun 05 07:34:24 PM PDT 24 |
Jun 05 07:39:57 PM PDT 24 |
3433237240 ps |
| T1108 |
/workspace/coverage/default/0.chip_sw_kmac_idle.1206885831 |
|
|
Jun 05 07:14:38 PM PDT 24 |
Jun 05 07:17:55 PM PDT 24 |
2732649912 ps |
| T820 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.4069364737 |
|
|
Jun 05 07:49:53 PM PDT 24 |
Jun 05 07:57:35 PM PDT 24 |
4957355384 ps |
| T1109 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2891102126 |
|
|
Jun 05 07:13:26 PM PDT 24 |
Jun 05 07:22:42 PM PDT 24 |
18280898122 ps |
| T1110 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.2913590003 |
|
|
Jun 05 07:42:01 PM PDT 24 |
Jun 05 07:48:18 PM PDT 24 |
5716060902 ps |
| T318 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1558026993 |
|
|
Jun 05 07:23:07 PM PDT 24 |
Jun 05 10:28:13 PM PDT 24 |
255948416584 ps |
| T1111 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2650788144 |
|
|
Jun 05 07:25:56 PM PDT 24 |
Jun 05 07:35:47 PM PDT 24 |
4267724216 ps |
| T324 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.1699592271 |
|
|
Jun 05 07:32:16 PM PDT 24 |
Jun 05 07:43:39 PM PDT 24 |
4346458885 ps |
| T327 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.4254127352 |
|
|
Jun 05 07:13:31 PM PDT 24 |
Jun 05 07:23:23 PM PDT 24 |
3884941049 ps |
| T367 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.2537325464 |
|
|
Jun 05 07:46:47 PM PDT 24 |
Jun 05 07:58:20 PM PDT 24 |
5754633928 ps |
| T243 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.1184506453 |
|
|
Jun 05 07:36:34 PM PDT 24 |
Jun 05 08:08:03 PM PDT 24 |
21208818833 ps |
| T801 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.1361223951 |
|
|
Jun 05 07:48:09 PM PDT 24 |
Jun 05 07:58:10 PM PDT 24 |
4595122802 ps |
| T362 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.3632268962 |
|
|
Jun 05 07:11:53 PM PDT 24 |
Jun 05 10:33:51 PM PDT 24 |
62849136323 ps |
| T182 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.364999271 |
|
|
Jun 05 07:25:04 PM PDT 24 |
Jun 05 07:40:24 PM PDT 24 |
8611223712 ps |
| T1112 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3851804061 |
|
|
Jun 05 07:13:11 PM PDT 24 |
Jun 05 07:31:18 PM PDT 24 |
8710728153 ps |
| T774 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.1680381329 |
|
|
Jun 05 07:11:51 PM PDT 24 |
Jun 05 07:24:55 PM PDT 24 |
5203672324 ps |
| T1113 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.315937979 |
|
|
Jun 05 07:35:13 PM PDT 24 |
Jun 05 07:39:15 PM PDT 24 |
3086544661 ps |
| T1114 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.1465013015 |
|
|
Jun 05 07:17:30 PM PDT 24 |
Jun 05 07:21:00 PM PDT 24 |
3222082436 ps |
| T1115 |
/workspace/coverage/default/1.chip_sw_example_concurrency.4116991453 |
|
|
Jun 05 07:18:15 PM PDT 24 |
Jun 05 07:23:13 PM PDT 24 |
2896761264 ps |
| T1116 |
/workspace/coverage/default/2.chip_sw_power_idle_load.1333476387 |
|
|
Jun 05 07:37:25 PM PDT 24 |
Jun 05 07:50:22 PM PDT 24 |
4390360410 ps |
| T1117 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.3628706345 |
|
|
Jun 05 07:30:38 PM PDT 24 |
Jun 05 07:35:15 PM PDT 24 |
2923269100 ps |
| T1118 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.2581471187 |
|
|
Jun 05 07:23:11 PM PDT 24 |
Jun 05 07:25:15 PM PDT 24 |
2612020190 ps |
| T1119 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.2191969924 |
|
|
Jun 05 07:36:55 PM PDT 24 |
Jun 05 07:43:59 PM PDT 24 |
5045867980 ps |
| T831 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.2892418632 |
|
|
Jun 05 07:42:13 PM PDT 24 |
Jun 05 07:52:46 PM PDT 24 |
5787742184 ps |
| T1120 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.658410421 |
|
|
Jun 05 07:23:22 PM PDT 24 |
Jun 05 08:31:14 PM PDT 24 |
14095824520 ps |
| T1121 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.3263167710 |
|
|
Jun 05 07:15:42 PM PDT 24 |
Jun 05 07:23:02 PM PDT 24 |
5321235320 ps |
| T840 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.299350726 |
|
|
Jun 05 07:46:49 PM PDT 24 |
Jun 05 07:56:14 PM PDT 24 |
5955614920 ps |
| T810 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.1305369233 |
|
|
Jun 05 07:43:35 PM PDT 24 |
Jun 05 07:55:40 PM PDT 24 |
5178167048 ps |
| T1122 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1409143478 |
|
|
Jun 05 07:13:34 PM PDT 24 |
Jun 05 07:23:33 PM PDT 24 |
4733214000 ps |
| T1123 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.623775477 |
|
|
Jun 05 07:28:54 PM PDT 24 |
Jun 05 07:33:12 PM PDT 24 |
3467280549 ps |
| T1124 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.2973244412 |
|
|
Jun 05 07:18:39 PM PDT 24 |
Jun 05 07:24:59 PM PDT 24 |
4837846324 ps |
| T1125 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.3568853599 |
|
|
Jun 05 07:38:42 PM PDT 24 |
Jun 05 07:42:53 PM PDT 24 |
3010459080 ps |
| T289 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.2823946601 |
|
|
Jun 05 07:34:23 PM PDT 24 |
Jun 05 07:43:42 PM PDT 24 |
5422679630 ps |
| T1126 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.3320305560 |
|
|
Jun 05 07:15:34 PM PDT 24 |
Jun 05 07:26:06 PM PDT 24 |
4801752808 ps |
| T1127 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.1279454567 |
|
|
Jun 05 07:14:13 PM PDT 24 |
Jun 05 07:23:31 PM PDT 24 |
5774480128 ps |
| T1128 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.217276008 |
|
|
Jun 05 07:19:23 PM PDT 24 |
Jun 05 07:35:19 PM PDT 24 |
5511811468 ps |
| T301 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.233642157 |
|
|
Jun 05 07:18:31 PM PDT 24 |
Jun 05 07:23:11 PM PDT 24 |
2902785191 ps |
| T1129 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.2208957139 |
|
|
Jun 05 07:39:23 PM PDT 24 |
Jun 05 07:50:06 PM PDT 24 |
9113729247 ps |
| T1130 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.1313631854 |
|
|
Jun 05 07:12:09 PM PDT 24 |
Jun 05 07:17:34 PM PDT 24 |
2634423068 ps |
| T1131 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.1730083273 |
|
|
Jun 05 07:44:42 PM PDT 24 |
Jun 05 08:54:12 PM PDT 24 |
15663919304 ps |
| T348 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3336975577 |
|
|
Jun 05 07:18:35 PM PDT 24 |
Jun 05 07:30:30 PM PDT 24 |
5798776415 ps |
| T1132 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.626024101 |
|
|
Jun 05 07:29:28 PM PDT 24 |
Jun 05 07:40:26 PM PDT 24 |
5010616328 ps |
| T1133 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.3512454727 |
|
|
Jun 05 07:31:47 PM PDT 24 |
Jun 05 08:03:03 PM PDT 24 |
27125810440 ps |
| T834 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.3645653079 |
|
|
Jun 05 07:47:44 PM PDT 24 |
Jun 05 07:52:47 PM PDT 24 |
3942765816 ps |
| T302 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.2572275169 |
|
|
Jun 05 07:28:36 PM PDT 24 |
Jun 05 07:31:53 PM PDT 24 |
2683098771 ps |
| T1134 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3194653416 |
|
|
Jun 05 07:28:12 PM PDT 24 |
Jun 05 07:47:02 PM PDT 24 |
7449526865 ps |
| T1135 |
/workspace/coverage/default/1.rom_e2e_smoke.1546612544 |
|
|
Jun 05 07:32:30 PM PDT 24 |
Jun 05 08:24:29 PM PDT 24 |
14471105820 ps |
| T1136 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.613909394 |
|
|
Jun 05 07:15:44 PM PDT 24 |
Jun 05 07:33:35 PM PDT 24 |
7210773525 ps |
| T1137 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.4164637715 |
|
|
Jun 05 07:40:45 PM PDT 24 |
Jun 05 08:13:14 PM PDT 24 |
8864153136 ps |
| T1138 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.1237876373 |
|
|
Jun 05 07:30:24 PM PDT 24 |
Jun 05 07:33:52 PM PDT 24 |
2145205466 ps |
| T1139 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.2358865449 |
|
|
Jun 05 07:34:45 PM PDT 24 |
Jun 05 07:40:11 PM PDT 24 |
2858695280 ps |
| T268 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.4181609715 |
|
|
Jun 05 07:23:40 PM PDT 24 |
Jun 05 07:46:49 PM PDT 24 |
13051919194 ps |
| T1140 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.3805929271 |
|
|
Jun 05 07:34:59 PM PDT 24 |
Jun 05 07:55:41 PM PDT 24 |
7255558362 ps |
| T1141 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.1161301777 |
|
|
Jun 05 07:21:03 PM PDT 24 |
Jun 05 07:42:31 PM PDT 24 |
9677741104 ps |
| T1142 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.1093726455 |
|
|
Jun 05 07:47:07 PM PDT 24 |
Jun 05 07:53:55 PM PDT 24 |
3643584712 ps |
| T1143 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.2092510475 |
|
|
Jun 05 07:21:30 PM PDT 24 |
Jun 05 07:43:21 PM PDT 24 |
6740347620 ps |
| T1144 |
/workspace/coverage/default/0.chip_sw_example_flash.2407432877 |
|
|
Jun 05 07:13:24 PM PDT 24 |
Jun 05 07:18:31 PM PDT 24 |
2677852258 ps |
| T791 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.3377582140 |
|
|
Jun 05 07:46:00 PM PDT 24 |
Jun 05 07:53:00 PM PDT 24 |
5690572414 ps |
| T9 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.992872725 |
|
|
Jun 05 07:28:17 PM PDT 24 |
Jun 05 07:33:29 PM PDT 24 |
3299900136 ps |
| T290 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2606004605 |
|
|
Jun 05 07:37:33 PM PDT 24 |
Jun 05 07:46:29 PM PDT 24 |
5301971583 ps |
| T62 |
/workspace/coverage/default/1.chip_sw_alert_test.3702568773 |
|
|
Jun 05 07:22:43 PM PDT 24 |
Jun 05 07:27:23 PM PDT 24 |
2996392106 ps |
| T1145 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.260175618 |
|
|
Jun 05 07:42:32 PM PDT 24 |
Jun 05 07:58:39 PM PDT 24 |
13579497689 ps |
| T1146 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.2074366431 |
|
|
Jun 05 07:19:14 PM PDT 24 |
Jun 05 07:23:40 PM PDT 24 |
2410861672 ps |
| T86 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.493427904 |
|
|
Jun 05 07:48:58 PM PDT 24 |
Jun 05 07:59:18 PM PDT 24 |
5136050946 ps |
| T1147 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.299028841 |
|
|
Jun 05 07:21:43 PM PDT 24 |
Jun 05 07:29:33 PM PDT 24 |
4657335250 ps |
| T1148 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.278572303 |
|
|
Jun 05 07:23:54 PM PDT 24 |
Jun 05 08:28:55 PM PDT 24 |
15037918201 ps |
| T1149 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.3685629224 |
|
|
Jun 05 07:17:26 PM PDT 24 |
Jun 05 07:21:04 PM PDT 24 |
2990873072 ps |
| T198 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.334888187 |
|
|
Jun 05 07:12:16 PM PDT 24 |
Jun 05 07:22:23 PM PDT 24 |
3546533840 ps |
| T1150 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.4195058811 |
|
|
Jun 05 07:27:42 PM PDT 24 |
Jun 05 07:41:03 PM PDT 24 |
4657977724 ps |
| T153 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.2977537488 |
|
|
Jun 05 07:13:12 PM PDT 24 |
Jun 05 10:17:37 PM PDT 24 |
58803788220 ps |
| T1151 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.4115886681 |
|
|
Jun 05 07:43:33 PM PDT 24 |
Jun 05 07:55:02 PM PDT 24 |
4369421680 ps |
| T1152 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.131516436 |
|
|
Jun 05 07:15:10 PM PDT 24 |
Jun 05 07:44:57 PM PDT 24 |
11285768078 ps |
| T1153 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.665333054 |
|
|
Jun 05 07:21:33 PM PDT 24 |
Jun 05 07:30:14 PM PDT 24 |
5882618538 ps |
| T1154 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.3652590756 |
|
|
Jun 05 07:16:12 PM PDT 24 |
Jun 05 07:36:23 PM PDT 24 |
10325359252 ps |
| T1155 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.3097013197 |
|
|
Jun 05 07:48:40 PM PDT 24 |
Jun 05 07:57:17 PM PDT 24 |
5570856020 ps |
| T433 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.2216099 |
|
|
Jun 05 07:11:53 PM PDT 24 |
Jun 05 07:21:15 PM PDT 24 |
8424189392 ps |
| T1156 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.3093607335 |
|
|
Jun 05 07:24:17 PM PDT 24 |
Jun 05 08:23:37 PM PDT 24 |
14654530477 ps |
| T434 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.2642880111 |
|
|
Jun 05 07:34:29 PM PDT 24 |
Jun 05 07:44:25 PM PDT 24 |
9961570138 ps |
| T1157 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.1605975964 |
|
|
Jun 05 07:22:06 PM PDT 24 |
Jun 05 07:29:47 PM PDT 24 |
8335310550 ps |
| T10 |
/workspace/coverage/default/1.chip_jtag_csr_rw.3586513323 |
|
|
Jun 05 07:19:34 PM PDT 24 |
Jun 05 07:44:18 PM PDT 24 |
12889944859 ps |
| T402 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.1266603949 |
|
|
Jun 05 07:22:26 PM PDT 24 |
Jun 05 07:30:04 PM PDT 24 |
4742921464 ps |
| T258 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.856585967 |
|
|
Jun 05 07:26:54 PM PDT 24 |
Jun 05 07:32:59 PM PDT 24 |
2642225000 ps |
| T376 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.2360578264 |
|
|
Jun 05 07:12:56 PM PDT 24 |
Jun 05 07:22:31 PM PDT 24 |
3029172936 ps |
| T403 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.4160412096 |
|
|
Jun 05 07:39:48 PM PDT 24 |
Jun 05 07:47:51 PM PDT 24 |
3169289504 ps |
| T368 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.3861189896 |
|
|
Jun 05 07:42:48 PM PDT 24 |
Jun 05 07:49:53 PM PDT 24 |
4015985448 ps |
| T404 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.225430689 |
|
|
Jun 05 07:49:35 PM PDT 24 |
Jun 05 07:58:22 PM PDT 24 |
5201932032 ps |
| T405 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.1512423479 |
|
|
Jun 05 07:12:39 PM PDT 24 |
Jun 05 08:19:03 PM PDT 24 |
18726103230 ps |
| T406 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.1406422038 |
|
|
Jun 05 07:13:03 PM PDT 24 |
Jun 05 07:16:46 PM PDT 24 |
2877431372 ps |
| T407 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.3681643668 |
|
|
Jun 05 07:39:56 PM PDT 24 |
Jun 05 07:51:08 PM PDT 24 |
4243774460 ps |
| T1158 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.724321196 |
|
|
Jun 05 07:21:18 PM PDT 24 |
Jun 05 08:18:31 PM PDT 24 |
13754866107 ps |
| T1159 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.3556965198 |
|
|
Jun 05 07:31:38 PM PDT 24 |
Jun 05 07:35:23 PM PDT 24 |
2134677458 ps |
| T1160 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.903038985 |
|
|
Jun 05 07:38:23 PM PDT 24 |
Jun 05 07:49:34 PM PDT 24 |
4628692840 ps |
| T1161 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.4223956554 |
|
|
Jun 05 07:33:06 PM PDT 24 |
Jun 05 07:56:08 PM PDT 24 |
6824314728 ps |
| T837 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.309525572 |
|
|
Jun 05 07:43:32 PM PDT 24 |
Jun 05 07:52:39 PM PDT 24 |
6312571300 ps |
| T1162 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.4017022140 |
|
|
Jun 05 07:17:29 PM PDT 24 |
Jun 05 07:21:06 PM PDT 24 |
2938608946 ps |
| T343 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.3849981610 |
|
|
Jun 05 07:12:13 PM PDT 24 |
Jun 05 07:24:05 PM PDT 24 |
5408842944 ps |
| T12 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.1487448577 |
|
|
Jun 05 07:29:00 PM PDT 24 |
Jun 05 08:02:48 PM PDT 24 |
24156699050 ps |
| T1163 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.422263170 |
|
|
Jun 05 07:43:57 PM PDT 24 |
Jun 05 07:55:10 PM PDT 24 |
5480585026 ps |
| T1164 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.1075868535 |
|
|
Jun 05 07:43:26 PM PDT 24 |
Jun 05 08:03:05 PM PDT 24 |
7824761550 ps |
| T817 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.875196024 |
|
|
Jun 05 07:46:46 PM PDT 24 |
Jun 05 07:55:39 PM PDT 24 |
4613279462 ps |
| T1165 |
/workspace/coverage/default/1.chip_sw_hmac_enc.2467118439 |
|
|
Jun 05 07:24:14 PM PDT 24 |
Jun 05 07:29:12 PM PDT 24 |
3248417088 ps |
| T1166 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.864335376 |
|
|
Jun 05 07:27:04 PM PDT 24 |
Jun 05 07:39:13 PM PDT 24 |
5378792210 ps |
| T1167 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.2030461846 |
|
|
Jun 05 07:10:58 PM PDT 24 |
Jun 05 07:32:05 PM PDT 24 |
5390456160 ps |
| T1168 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.4000892272 |
|
|
Jun 05 07:41:31 PM PDT 24 |
Jun 05 07:50:37 PM PDT 24 |
5734607053 ps |
| T1169 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.2153425930 |
|
|
Jun 05 07:39:28 PM PDT 24 |
Jun 05 07:43:46 PM PDT 24 |
2640810488 ps |
| T1170 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.2041886058 |
|
|
Jun 05 07:34:27 PM PDT 24 |
Jun 05 08:35:29 PM PDT 24 |
14186701513 ps |
| T1171 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.2878307997 |
|
|
Jun 05 07:26:47 PM PDT 24 |
Jun 05 07:35:14 PM PDT 24 |
3508885870 ps |
| T1172 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.816578942 |
|
|
Jun 05 07:29:22 PM PDT 24 |
Jun 05 07:34:10 PM PDT 24 |
2256859170 ps |
| T1173 |
/workspace/coverage/default/2.chip_sw_kmac_idle.3567443965 |
|
|
Jun 05 07:35:42 PM PDT 24 |
Jun 05 07:39:10 PM PDT 24 |
2686277444 ps |
| T1174 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.151306906 |
|
|
Jun 05 07:12:01 PM PDT 24 |
Jun 05 07:27:40 PM PDT 24 |
11485364444 ps |
| T1175 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.2286264668 |
|
|
Jun 05 07:19:43 PM PDT 24 |
Jun 05 07:29:46 PM PDT 24 |
4215130314 ps |
| T842 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.2295185161 |
|
|
Jun 05 07:45:48 PM PDT 24 |
Jun 05 07:51:50 PM PDT 24 |
4204624056 ps |
| T1176 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.3459426832 |
|
|
Jun 05 07:25:18 PM PDT 24 |
Jun 05 07:39:04 PM PDT 24 |
9571239448 ps |
| T1177 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3174555008 |
|
|
Jun 05 07:36:56 PM PDT 24 |
Jun 05 07:55:16 PM PDT 24 |
7165687753 ps |
| T205 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.1337875539 |
|
|
Jun 05 07:32:27 PM PDT 24 |
Jun 05 07:37:09 PM PDT 24 |
2776696918 ps |
| T291 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.3287915700 |
|
|
Jun 05 07:34:49 PM PDT 24 |
Jun 05 07:49:32 PM PDT 24 |
7803507400 ps |
| T1178 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.2369235326 |
|
|
Jun 05 07:23:02 PM PDT 24 |
Jun 05 08:12:07 PM PDT 24 |
22844448730 ps |
| T1179 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.2128937256 |
|
|
Jun 05 07:38:46 PM PDT 24 |
Jun 05 07:42:33 PM PDT 24 |
2657940616 ps |
| T1180 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1660057454 |
|
|
Jun 05 07:15:39 PM PDT 24 |
Jun 05 07:25:50 PM PDT 24 |
3749495692 ps |
| T1181 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.1018160247 |
|
|
Jun 05 07:17:03 PM PDT 24 |
Jun 05 07:40:12 PM PDT 24 |
6737351000 ps |
| T1182 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.3385549638 |
|
|
Jun 05 07:41:41 PM PDT 24 |
Jun 05 08:22:07 PM PDT 24 |
13046861320 ps |
| T1183 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.2950984702 |
|
|
Jun 05 07:40:09 PM PDT 24 |
Jun 05 08:04:29 PM PDT 24 |
7928578529 ps |
| T1184 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.2049493954 |
|
|
Jun 05 07:32:08 PM PDT 24 |
Jun 05 07:56:14 PM PDT 24 |
9137584720 ps |
| T72 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.3180753992 |
|
|
Jun 05 07:17:23 PM PDT 24 |
Jun 05 07:22:30 PM PDT 24 |
3040217300 ps |
| T1185 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1609162987 |
|
|
Jun 05 07:40:39 PM PDT 24 |
Jun 05 07:50:11 PM PDT 24 |
3655088606 ps |
| T807 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.258678238 |
|
|
Jun 05 07:45:04 PM PDT 24 |
Jun 05 07:55:56 PM PDT 24 |
6015326800 ps |
| T1186 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.263246397 |
|
|
Jun 05 07:30:45 PM PDT 24 |
Jun 05 07:57:22 PM PDT 24 |
9049172846 ps |
| T1187 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.611385485 |
|
|
Jun 05 07:13:55 PM PDT 24 |
Jun 05 07:17:39 PM PDT 24 |
2827905198 ps |
| T832 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.2575151215 |
|
|
Jun 05 07:42:39 PM PDT 24 |
Jun 05 07:54:35 PM PDT 24 |
5294316308 ps |
| T841 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.1159144857 |
|
|
Jun 05 07:41:46 PM PDT 24 |
Jun 05 07:48:35 PM PDT 24 |
3350336200 ps |
| T325 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.3554340768 |
|
|
Jun 05 07:12:24 PM PDT 24 |
Jun 05 07:25:27 PM PDT 24 |
3548543868 ps |
| T1188 |
/workspace/coverage/default/2.chip_tap_straps_rma.737409396 |
|
|
Jun 05 07:35:36 PM PDT 24 |
Jun 05 07:42:01 PM PDT 24 |
4404448724 ps |
| T1189 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2599043820 |
|
|
Jun 05 07:32:37 PM PDT 24 |
Jun 05 08:15:24 PM PDT 24 |
24591846426 ps |
| T1190 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.327719747 |
|
|
Jun 05 07:42:38 PM PDT 24 |
Jun 05 08:40:32 PM PDT 24 |
14234109308 ps |
| T1191 |
/workspace/coverage/default/1.chip_tap_straps_dev.2980766753 |
|
|
Jun 05 07:26:29 PM PDT 24 |
Jun 05 07:29:19 PM PDT 24 |
2559971291 ps |
| T1192 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.1283119281 |
|
|
Jun 05 07:21:08 PM PDT 24 |
Jun 05 08:45:34 PM PDT 24 |
21642390282 ps |
| T1193 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.3417439886 |
|
|
Jun 05 07:32:52 PM PDT 24 |
Jun 05 08:24:53 PM PDT 24 |
15398018260 ps |
| T1194 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.282973378 |
|
|
Jun 05 07:47:35 PM PDT 24 |
Jun 05 07:55:43 PM PDT 24 |
4007504610 ps |
| T1195 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.2236334127 |
|
|
Jun 05 07:28:51 PM PDT 24 |
Jun 05 07:55:20 PM PDT 24 |
7287730656 ps |
| T1196 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.3314194890 |
|
|
Jun 05 07:48:50 PM PDT 24 |
Jun 05 07:54:21 PM PDT 24 |
4508766248 ps |
| T848 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.2759817439 |
|
|
Jun 05 07:48:52 PM PDT 24 |
Jun 05 07:55:58 PM PDT 24 |
3872047532 ps |
| T1197 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.526283113 |
|
|
Jun 05 07:40:30 PM PDT 24 |
Jun 05 07:51:40 PM PDT 24 |
5043721972 ps |
| T1198 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.3902326582 |
|
|
Jun 05 07:21:37 PM PDT 24 |
Jun 05 07:32:42 PM PDT 24 |
4818578356 ps |
| T1199 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.3795550498 |
|
|
Jun 05 07:12:30 PM PDT 24 |
Jun 05 07:24:16 PM PDT 24 |
4878624102 ps |
| T109 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.2568674797 |
|
|
Jun 05 07:16:37 PM PDT 24 |
Jun 05 08:28:01 PM PDT 24 |
21997465735 ps |
| T1200 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2016829905 |
|
|
Jun 05 07:50:05 PM PDT 24 |
Jun 05 07:56:17 PM PDT 24 |
3273443368 ps |
| T759 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.1468139745 |
|
|
Jun 05 07:48:11 PM PDT 24 |
Jun 05 07:53:13 PM PDT 24 |
3382516312 ps |
| T1201 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.808973374 |
|
|
Jun 05 07:29:23 PM PDT 24 |
Jun 05 07:40:35 PM PDT 24 |
6206243648 ps |
| T1202 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.3693880149 |
|
|
Jun 05 07:23:18 PM PDT 24 |
Jun 05 07:45:31 PM PDT 24 |
5447253678 ps |
| T1203 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.3909390267 |
|
|
Jun 05 07:33:31 PM PDT 24 |
Jun 05 07:38:15 PM PDT 24 |
3411986497 ps |
| T292 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.2084508083 |
|
|
Jun 05 07:24:39 PM PDT 24 |
Jun 05 07:35:13 PM PDT 24 |
5629862060 ps |
| T1204 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.3972346269 |
|
|
Jun 05 07:17:19 PM PDT 24 |
Jun 05 07:25:58 PM PDT 24 |
3995431454 ps |
| T1205 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.4132457780 |
|
|
Jun 05 07:14:29 PM PDT 24 |
Jun 05 07:20:20 PM PDT 24 |
3088640900 ps |
| T1206 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.416805363 |
|
|
Jun 05 07:24:52 PM PDT 24 |
Jun 05 07:41:30 PM PDT 24 |
6399447064 ps |
| T1207 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.948236075 |
|
|
Jun 05 07:41:44 PM PDT 24 |
Jun 05 08:17:31 PM PDT 24 |
13456318708 ps |
| T847 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.501274305 |
|
|
Jun 05 07:49:04 PM PDT 24 |
Jun 05 07:58:00 PM PDT 24 |
4467361650 ps |
| T1208 |
/workspace/coverage/default/0.chip_sw_aes_enc.3002343371 |
|
|
Jun 05 07:14:33 PM PDT 24 |
Jun 05 07:18:23 PM PDT 24 |
2880120332 ps |
| T1209 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.665887242 |
|
|
Jun 05 07:35:21 PM PDT 24 |
Jun 05 07:46:52 PM PDT 24 |
4792348694 ps |
| T1210 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.1501237323 |
|
|
Jun 05 07:39:37 PM PDT 24 |
Jun 05 07:58:54 PM PDT 24 |
9904056056 ps |
| T1211 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.3559875952 |
|
|
Jun 05 07:21:50 PM PDT 24 |
Jun 05 07:30:23 PM PDT 24 |
3732559000 ps |
| T794 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.1756484430 |
|
|
Jun 05 07:44:49 PM PDT 24 |
Jun 05 07:51:33 PM PDT 24 |
3809446258 ps |
| T1212 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.191309940 |
|
|
Jun 05 07:34:51 PM PDT 24 |
Jun 05 07:39:10 PM PDT 24 |
2651934360 ps |
| T839 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.3638225919 |
|
|
Jun 05 07:45:38 PM PDT 24 |
Jun 05 07:50:46 PM PDT 24 |
3818432840 ps |
| T199 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.2541095745 |
|
|
Jun 05 07:12:07 PM PDT 24 |
Jun 05 08:26:01 PM PDT 24 |
19331376320 ps |
| T1213 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.1293395830 |
|
|
Jun 05 07:22:53 PM PDT 24 |
Jun 05 09:01:12 PM PDT 24 |
22552574088 ps |
| T1214 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.564815940 |
|
|
Jun 05 07:13:54 PM PDT 24 |
Jun 05 07:24:17 PM PDT 24 |
3985136460 ps |
| T157 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.3491884424 |
|
|
Jun 05 07:26:10 PM PDT 24 |
Jun 05 07:36:18 PM PDT 24 |
4172988494 ps |
| T334 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.251274128 |
|
|
Jun 05 07:35:04 PM PDT 24 |
Jun 05 07:48:52 PM PDT 24 |
4355002144 ps |
| T381 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.3589445839 |
|
|
Jun 05 07:27:20 PM PDT 24 |
Jun 05 07:31:01 PM PDT 24 |
3085087188 ps |
| T1215 |
/workspace/coverage/default/0.chip_sw_hmac_enc.4234529747 |
|
|
Jun 05 07:14:28 PM PDT 24 |
Jun 05 07:18:30 PM PDT 24 |
3033437476 ps |
| T1216 |
/workspace/coverage/default/1.chip_sw_example_flash.1965594517 |
|
|
Jun 05 07:18:12 PM PDT 24 |
Jun 05 07:22:01 PM PDT 24 |
2916766390 ps |
| T1217 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1035386814 |
|
|
Jun 05 07:13:53 PM PDT 24 |
Jun 05 07:15:47 PM PDT 24 |
2524755329 ps |
| T1218 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.2551673094 |
|
|
Jun 05 07:31:23 PM PDT 24 |
Jun 05 07:48:40 PM PDT 24 |
8879963680 ps |
| T272 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.962712390 |
|
|
Jun 05 07:49:32 PM PDT 24 |
Jun 05 07:56:56 PM PDT 24 |
5186735256 ps |
| T1219 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.2078354176 |
|
|
Jun 05 07:38:19 PM PDT 24 |
Jun 05 07:41:54 PM PDT 24 |
2218480950 ps |
| T1220 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.2516047494 |
|
|
Jun 05 07:22:41 PM PDT 24 |
Jun 05 08:45:21 PM PDT 24 |
17539405104 ps |
| T1221 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.1869658377 |
|
|
Jun 05 07:20:17 PM PDT 24 |
Jun 05 07:23:36 PM PDT 24 |
2676494518 ps |
| T186 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.1954488452 |
|
|
Jun 05 07:11:53 PM PDT 24 |
Jun 05 07:23:14 PM PDT 24 |
6460752440 ps |
| T811 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.435360205 |
|
|
Jun 05 07:47:47 PM PDT 24 |
Jun 05 07:53:24 PM PDT 24 |
3397679246 ps |
| T262 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1838723985 |
|
|
Jun 05 07:27:25 PM PDT 24 |
Jun 05 07:37:26 PM PDT 24 |
4533473432 ps |
| T245 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.333868919 |
|
|
Jun 05 07:30:50 PM PDT 24 |
Jun 05 08:48:11 PM PDT 24 |
47962245416 ps |
| T1222 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.259262143 |
|
|
Jun 05 07:32:12 PM PDT 24 |
Jun 05 07:35:57 PM PDT 24 |
2976511370 ps |
| T827 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3064881634 |
|
|
Jun 05 07:46:51 PM PDT 24 |
Jun 05 07:53:50 PM PDT 24 |
5601683820 ps |
| T1223 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.3234514994 |
|
|
Jun 05 07:37:18 PM PDT 24 |
Jun 05 07:45:49 PM PDT 24 |
4972345660 ps |
| T1224 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.3411754380 |
|
|
Jun 05 07:35:11 PM PDT 24 |
Jun 05 07:59:03 PM PDT 24 |
7590668000 ps |
| T310 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.1364382259 |
|
|
Jun 05 07:48:47 PM PDT 24 |
Jun 05 07:59:24 PM PDT 24 |
4522847616 ps |
| T849 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.4080723087 |
|
|
Jun 05 07:50:07 PM PDT 24 |
Jun 05 07:58:46 PM PDT 24 |
4988143528 ps |
| T1225 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.1487029306 |
|
|
Jun 05 07:32:19 PM PDT 24 |
Jun 05 07:44:25 PM PDT 24 |
7686144820 ps |
| T1226 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.862883324 |
|
|
Jun 05 07:34:07 PM PDT 24 |
Jun 05 07:42:30 PM PDT 24 |
3098761633 ps |
| T1227 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.4184680904 |
|
|
Jun 05 07:12:52 PM PDT 24 |
Jun 05 07:20:32 PM PDT 24 |
3443723910 ps |
| T137 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.2502409689 |
|
|
Jun 05 07:41:23 PM PDT 24 |
Jun 05 07:57:34 PM PDT 24 |
7332844624 ps |
| T67 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.1126784008 |
|
|
Jun 05 07:27:24 PM PDT 24 |
Jun 05 07:46:21 PM PDT 24 |
9849065600 ps |
| T1228 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.3654305378 |
|
|
Jun 05 07:33:23 PM PDT 24 |
Jun 05 07:44:11 PM PDT 24 |
5165052024 ps |
| T49 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1542210876 |
|
|
Jun 05 07:22:57 PM PDT 24 |
Jun 05 07:32:44 PM PDT 24 |
6335816680 ps |
| T797 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.676953939 |
|
|
Jun 05 07:47:52 PM PDT 24 |
Jun 05 07:54:32 PM PDT 24 |
3469461796 ps |
| T1229 |
/workspace/coverage/default/1.chip_tap_straps_rma.153177610 |
|
|
Jun 05 07:27:55 PM PDT 24 |
Jun 05 07:33:43 PM PDT 24 |
3989820064 ps |
| T723 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.2128735611 |
|
|
Jun 05 07:23:22 PM PDT 24 |
Jun 05 07:28:18 PM PDT 24 |
2921261388 ps |
| T844 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.2997791691 |
|
|
Jun 05 07:42:40 PM PDT 24 |
Jun 05 07:56:53 PM PDT 24 |
5668842320 ps |
| T1230 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.3591478111 |
|
|
Jun 05 07:38:14 PM PDT 24 |
Jun 05 07:48:33 PM PDT 24 |
7432717144 ps |
| T1231 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.689171959 |
|
|
Jun 05 07:33:57 PM PDT 24 |
Jun 05 07:38:27 PM PDT 24 |
3206709896 ps |
| T1232 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.1478884673 |
|
|
Jun 05 07:24:15 PM PDT 24 |
Jun 05 07:44:51 PM PDT 24 |
6973399966 ps |
| T1233 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.2674971837 |
|
|
Jun 05 07:20:46 PM PDT 24 |
Jun 05 08:23:40 PM PDT 24 |
14699449980 ps |
| T1234 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1026095087 |
|
|
Jun 05 07:45:14 PM PDT 24 |
Jun 05 07:51:26 PM PDT 24 |
3798602930 ps |
| T1235 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.1272554709 |
|
|
Jun 05 07:37:02 PM PDT 24 |
Jun 05 07:42:54 PM PDT 24 |
3111210200 ps |
| T1236 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.231822836 |
|
|
Jun 05 07:35:12 PM PDT 24 |
Jun 05 07:43:19 PM PDT 24 |
7719151920 ps |
| T154 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.16679565 |
|
|
Jun 05 07:21:56 PM PDT 24 |
Jun 05 10:13:30 PM PDT 24 |
58846115897 ps |
| T39 |
/workspace/coverage/default/2.chip_sw_gpio.278689113 |
|
|
Jun 05 07:30:19 PM PDT 24 |
Jun 05 07:38:23 PM PDT 24 |
4250812930 ps |
| T1237 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.4084883989 |
|
|
Jun 05 07:16:16 PM PDT 24 |
Jun 05 07:23:00 PM PDT 24 |
3058075720 ps |
| T717 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.1953368656 |
|
|
Jun 05 07:30:59 PM PDT 24 |
Jun 05 07:42:35 PM PDT 24 |
4522450520 ps |
| T1238 |
/workspace/coverage/default/2.chip_sw_aes_entropy.168289509 |
|
|
Jun 05 07:32:50 PM PDT 24 |
Jun 05 07:36:42 PM PDT 24 |
3177685070 ps |
| T803 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.504373697 |
|
|
Jun 05 07:48:54 PM PDT 24 |
Jun 05 07:59:41 PM PDT 24 |
5957217496 ps |
| T1239 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1289376926 |
|
|
Jun 05 07:32:43 PM PDT 24 |
Jun 05 07:52:48 PM PDT 24 |
14749195988 ps |
| T164 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.488931808 |
|
|
Jun 05 07:12:32 PM PDT 24 |
Jun 05 07:16:26 PM PDT 24 |
2874928208 ps |
| T1240 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.3996543333 |
|
|
Jun 05 07:20:50 PM PDT 24 |
Jun 05 07:23:52 PM PDT 24 |
2108144068 ps |
| T87 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.2251246210 |
|
|
Jun 05 07:43:36 PM PDT 24 |
Jun 05 07:49:53 PM PDT 24 |
4148619016 ps |
| T246 |
/workspace/coverage/default/2.chip_sw_flash_init.2877782724 |
|
|
Jun 05 07:30:43 PM PDT 24 |
Jun 05 08:04:54 PM PDT 24 |
15733381998 ps |
| T1241 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.3839281259 |
|
|
Jun 05 07:29:35 PM PDT 24 |
Jun 05 07:39:09 PM PDT 24 |
6450034360 ps |
| T1242 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3925013670 |
|
|
Jun 05 07:39:24 PM PDT 24 |
Jun 05 07:54:43 PM PDT 24 |
8214445196 ps |
| T1243 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.3627538855 |
|
|
Jun 05 07:14:13 PM PDT 24 |
Jun 05 07:21:32 PM PDT 24 |
5301825696 ps |
| T1244 |
/workspace/coverage/default/2.chip_sw_example_flash.3141901207 |
|
|
Jun 05 07:30:09 PM PDT 24 |
Jun 05 07:34:56 PM PDT 24 |
2517506890 ps |
| T234 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.354457788 |
|
|
Jun 05 07:33:58 PM PDT 24 |
Jun 05 08:13:59 PM PDT 24 |
12030677880 ps |
| T808 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.3099442580 |
|
|
Jun 05 07:47:29 PM PDT 24 |
Jun 05 07:54:25 PM PDT 24 |
3777185564 ps |
| T1245 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.565453466 |
|
|
Jun 05 07:24:58 PM PDT 24 |
Jun 05 07:38:43 PM PDT 24 |
5494800660 ps |
| T187 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.430269961 |
|
|
Jun 05 07:30:13 PM PDT 24 |
Jun 05 07:43:03 PM PDT 24 |
6415992326 ps |
| T365 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3414873258 |
|
|
Jun 05 07:14:42 PM PDT 24 |
Jun 05 07:22:22 PM PDT 24 |
5248123020 ps |