| T910 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.4057754522 |
|
|
Jun 26 08:00:28 PM PDT 24 |
Jun 26 08:16:01 PM PDT 24 |
7817535196 ps |
| T115 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.1630933108 |
|
|
Jun 26 08:04:29 PM PDT 24 |
Jun 26 08:34:34 PM PDT 24 |
7545716504 ps |
| T169 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.2807462791 |
|
|
Jun 26 08:04:47 PM PDT 24 |
Jun 26 08:18:53 PM PDT 24 |
9691135959 ps |
| T699 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.2869513214 |
|
|
Jun 26 08:27:52 PM PDT 24 |
Jun 26 08:34:49 PM PDT 24 |
4138121100 ps |
| T119 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3403111184 |
|
|
Jun 26 07:56:49 PM PDT 24 |
Jun 26 08:05:12 PM PDT 24 |
5765122120 ps |
| T911 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.1120136104 |
|
|
Jun 26 08:16:20 PM PDT 24 |
Jun 26 08:40:40 PM PDT 24 |
6450007236 ps |
| T912 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.5590539 |
|
|
Jun 26 08:02:26 PM PDT 24 |
Jun 26 09:02:50 PM PDT 24 |
11248466882 ps |
| T913 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.2008245424 |
|
|
Jun 26 08:22:42 PM PDT 24 |
Jun 26 08:31:15 PM PDT 24 |
4306438918 ps |
| T914 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.3775037101 |
|
|
Jun 26 08:17:04 PM PDT 24 |
Jun 26 08:44:17 PM PDT 24 |
8021251888 ps |
| T915 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.2151340566 |
|
|
Jun 26 08:08:40 PM PDT 24 |
Jun 26 08:59:49 PM PDT 24 |
11333115500 ps |
| T271 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.2811704183 |
|
|
Jun 26 08:04:42 PM PDT 24 |
Jun 26 08:17:08 PM PDT 24 |
4113277293 ps |
| T916 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.1326123911 |
|
|
Jun 26 08:00:03 PM PDT 24 |
Jun 26 08:03:45 PM PDT 24 |
2430623000 ps |
| T37 |
/workspace/coverage/default/2.chip_sw_gpio.152485951 |
|
|
Jun 26 08:13:56 PM PDT 24 |
Jun 26 08:22:50 PM PDT 24 |
4542054108 ps |
| T272 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.2531507112 |
|
|
Jun 26 07:56:59 PM PDT 24 |
Jun 26 08:10:45 PM PDT 24 |
5352268277 ps |
| T917 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3658752837 |
|
|
Jun 26 08:16:52 PM PDT 24 |
Jun 26 08:26:07 PM PDT 24 |
4859725896 ps |
| T256 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.3119033900 |
|
|
Jun 26 08:18:35 PM PDT 24 |
Jun 26 09:04:53 PM PDT 24 |
18431654584 ps |
| T918 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.2828011032 |
|
|
Jun 26 08:23:39 PM PDT 24 |
Jun 26 09:15:23 PM PDT 24 |
15117989160 ps |
| T710 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.2483195572 |
|
|
Jun 26 08:22:15 PM PDT 24 |
Jun 26 08:33:24 PM PDT 24 |
5330300056 ps |
| T919 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.3495150581 |
|
|
Jun 26 08:03:30 PM PDT 24 |
Jun 26 08:12:02 PM PDT 24 |
3423787688 ps |
| T333 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.3832199717 |
|
|
Jun 26 07:53:51 PM PDT 24 |
Jun 26 08:03:05 PM PDT 24 |
4187897313 ps |
| T920 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.3965654729 |
|
|
Jun 26 07:58:43 PM PDT 24 |
Jun 26 08:07:02 PM PDT 24 |
7454055376 ps |
| T921 |
/workspace/coverage/default/2.rom_e2e_smoke.1572785612 |
|
|
Jun 26 08:24:18 PM PDT 24 |
Jun 26 09:13:46 PM PDT 24 |
14756772800 ps |
| T922 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.3873126123 |
|
|
Jun 26 08:03:34 PM PDT 24 |
Jun 26 09:27:15 PM PDT 24 |
15458414229 ps |
| T349 |
/workspace/coverage/default/0.chip_sw_hmac_enc.4105373939 |
|
|
Jun 26 07:56:23 PM PDT 24 |
Jun 26 08:01:02 PM PDT 24 |
2906617516 ps |
| T170 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.742593662 |
|
|
Jun 26 08:18:15 PM PDT 24 |
Jun 26 08:23:54 PM PDT 24 |
2890081672 ps |
| T391 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.235739523 |
|
|
Jun 26 08:21:08 PM PDT 24 |
Jun 26 08:25:51 PM PDT 24 |
2519822744 ps |
| T32 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.441983881 |
|
|
Jun 26 07:57:04 PM PDT 24 |
Jun 26 08:46:13 PM PDT 24 |
20005072675 ps |
| T33 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.2525237170 |
|
|
Jun 26 08:14:34 PM PDT 24 |
Jun 26 09:14:45 PM PDT 24 |
20475231122 ps |
| T923 |
/workspace/coverage/default/0.chip_sw_example_rom.4287803569 |
|
|
Jun 26 07:52:43 PM PDT 24 |
Jun 26 07:54:57 PM PDT 24 |
2383429172 ps |
| T924 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.2161443866 |
|
|
Jun 26 07:54:21 PM PDT 24 |
Jun 26 08:01:35 PM PDT 24 |
3659963638 ps |
| T925 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.1588633054 |
|
|
Jun 26 08:12:30 PM PDT 24 |
Jun 26 08:33:28 PM PDT 24 |
9240798478 ps |
| T191 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.1049563518 |
|
|
Jun 26 07:53:37 PM PDT 24 |
Jun 26 11:00:16 PM PDT 24 |
65644318608 ps |
| T926 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.3986601232 |
|
|
Jun 26 07:57:54 PM PDT 24 |
Jun 26 08:20:40 PM PDT 24 |
8050930832 ps |
| T927 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.380841310 |
|
|
Jun 26 08:05:08 PM PDT 24 |
Jun 26 09:25:02 PM PDT 24 |
14786075070 ps |
| T928 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.1638715369 |
|
|
Jun 26 08:13:26 PM PDT 24 |
Jun 26 08:33:35 PM PDT 24 |
5344423048 ps |
| T707 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.1986766098 |
|
|
Jun 26 08:27:20 PM PDT 24 |
Jun 26 08:35:26 PM PDT 24 |
4056944008 ps |
| T25 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.254430892 |
|
|
Jun 26 08:12:31 PM PDT 24 |
Jun 26 08:27:40 PM PDT 24 |
8082570521 ps |
| T26 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.259143725 |
|
|
Jun 26 07:55:01 PM PDT 24 |
Jun 26 08:08:00 PM PDT 24 |
7228158398 ps |
| T259 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.2467578085 |
|
|
Jun 26 08:24:10 PM PDT 24 |
Jun 26 08:33:00 PM PDT 24 |
4774647434 ps |
| T731 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.1277455016 |
|
|
Jun 26 08:28:55 PM PDT 24 |
Jun 26 08:34:42 PM PDT 24 |
3107702136 ps |
| T929 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.3099885640 |
|
|
Jun 26 08:14:48 PM PDT 24 |
Jun 26 08:25:27 PM PDT 24 |
7477146344 ps |
| T781 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.2593418617 |
|
|
Jun 26 07:53:46 PM PDT 24 |
Jun 26 08:02:12 PM PDT 24 |
5599306440 ps |
| T682 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.2786663626 |
|
|
Jun 26 07:55:41 PM PDT 24 |
Jun 26 08:42:51 PM PDT 24 |
18462116400 ps |
| T930 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.3056595417 |
|
|
Jun 26 08:14:02 PM PDT 24 |
Jun 26 09:09:29 PM PDT 24 |
16485025768 ps |
| T931 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1473440536 |
|
|
Jun 26 07:59:56 PM PDT 24 |
Jun 26 08:12:29 PM PDT 24 |
4667774060 ps |
| T286 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.1693079789 |
|
|
Jun 26 08:17:24 PM PDT 24 |
Jun 26 08:23:38 PM PDT 24 |
3230683948 ps |
| T932 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.3926235006 |
|
|
Jun 26 08:03:43 PM PDT 24 |
Jun 26 08:16:21 PM PDT 24 |
9259507050 ps |
| T933 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.2542006748 |
|
|
Jun 26 08:13:22 PM PDT 24 |
Jun 26 08:29:13 PM PDT 24 |
9636299806 ps |
| T124 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.3983661726 |
|
|
Jun 26 08:17:10 PM PDT 24 |
Jun 26 08:32:05 PM PDT 24 |
6269926440 ps |
| T313 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.4259874787 |
|
|
Jun 26 07:59:12 PM PDT 24 |
Jun 26 08:10:29 PM PDT 24 |
5918395984 ps |
| T934 |
/workspace/coverage/default/1.chip_sw_hmac_enc.1838911890 |
|
|
Jun 26 08:05:34 PM PDT 24 |
Jun 26 08:10:03 PM PDT 24 |
2834232354 ps |
| T261 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.660366472 |
|
|
Jun 26 08:01:25 PM PDT 24 |
Jun 26 08:03:06 PM PDT 24 |
2321628500 ps |
| T273 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.2386412733 |
|
|
Jun 26 07:56:18 PM PDT 24 |
Jun 26 08:05:31 PM PDT 24 |
4505822424 ps |
| T935 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.4227858744 |
|
|
Jun 26 08:12:57 PM PDT 24 |
Jun 26 08:34:18 PM PDT 24 |
8801917750 ps |
| T936 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3440647807 |
|
|
Jun 26 07:58:32 PM PDT 24 |
Jun 26 08:10:13 PM PDT 24 |
4186848648 ps |
| T274 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.4089677224 |
|
|
Jun 26 08:06:32 PM PDT 24 |
Jun 26 08:18:57 PM PDT 24 |
5203373736 ps |
| T650 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.932658600 |
|
|
Jun 26 08:21:24 PM PDT 24 |
Jun 26 09:49:59 PM PDT 24 |
22818741570 ps |
| T937 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.1941500309 |
|
|
Jun 26 08:23:04 PM PDT 24 |
Jun 26 09:26:25 PM PDT 24 |
15707761147 ps |
| T207 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.4053864973 |
|
|
Jun 26 08:11:01 PM PDT 24 |
Jun 26 08:31:48 PM PDT 24 |
5627065540 ps |
| T938 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.3585880811 |
|
|
Jun 26 08:14:06 PM PDT 24 |
Jun 26 08:23:18 PM PDT 24 |
4420552632 ps |
| T939 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.2870600060 |
|
|
Jun 26 07:57:15 PM PDT 24 |
Jun 26 08:01:31 PM PDT 24 |
3086788378 ps |
| T940 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.4194849790 |
|
|
Jun 26 08:06:48 PM PDT 24 |
Jun 26 08:16:29 PM PDT 24 |
5255420046 ps |
| T192 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.2695958487 |
|
|
Jun 26 07:56:39 PM PDT 24 |
Jun 26 11:52:03 PM PDT 24 |
78676416406 ps |
| T156 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.3171121945 |
|
|
Jun 26 08:17:08 PM PDT 24 |
Jun 26 08:27:44 PM PDT 24 |
4603905596 ps |
| T724 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.1834845394 |
|
|
Jun 26 08:28:17 PM PDT 24 |
Jun 26 08:34:34 PM PDT 24 |
3506118100 ps |
| T941 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.1085699021 |
|
|
Jun 26 08:20:01 PM PDT 24 |
Jun 26 08:24:26 PM PDT 24 |
2708486680 ps |
| T138 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.3682508526 |
|
|
Jun 26 08:00:52 PM PDT 24 |
Jun 26 10:44:46 PM PDT 24 |
57949013386 ps |
| T292 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.502477355 |
|
|
Jun 26 07:56:48 PM PDT 24 |
Jun 26 08:09:04 PM PDT 24 |
8548888283 ps |
| T942 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.1482474534 |
|
|
Jun 26 07:59:22 PM PDT 24 |
Jun 26 08:04:00 PM PDT 24 |
2955512012 ps |
| T242 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.4224995007 |
|
|
Jun 26 08:25:21 PM PDT 24 |
Jun 26 08:32:25 PM PDT 24 |
4355224570 ps |
| T67 |
/workspace/coverage/default/3.chip_tap_straps_rma.3841169847 |
|
|
Jun 26 08:19:28 PM PDT 24 |
Jun 26 08:25:52 PM PDT 24 |
4574695610 ps |
| T943 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.2108329133 |
|
|
Jun 26 08:12:51 PM PDT 24 |
Jun 26 08:28:28 PM PDT 24 |
5552139438 ps |
| T944 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.604789490 |
|
|
Jun 26 07:59:56 PM PDT 24 |
Jun 26 08:09:18 PM PDT 24 |
3976789268 ps |
| T945 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1289824921 |
|
|
Jun 26 08:18:32 PM PDT 24 |
Jun 26 08:37:35 PM PDT 24 |
7151139394 ps |
| T262 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.2302793210 |
|
|
Jun 26 08:03:09 PM PDT 24 |
Jun 26 08:05:05 PM PDT 24 |
3017048475 ps |
| T946 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.3241475297 |
|
|
Jun 26 08:20:04 PM PDT 24 |
Jun 26 08:25:31 PM PDT 24 |
3297795576 ps |
| T762 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.3392965756 |
|
|
Jun 26 08:29:05 PM PDT 24 |
Jun 26 08:35:48 PM PDT 24 |
4192954184 ps |
| T947 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.766742997 |
|
|
Jun 26 08:12:17 PM PDT 24 |
Jun 26 08:23:24 PM PDT 24 |
4808299982 ps |
| T948 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.3294502505 |
|
|
Jun 26 07:57:16 PM PDT 24 |
Jun 26 08:27:10 PM PDT 24 |
10932912672 ps |
| T120 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3436183857 |
|
|
Jun 26 08:17:32 PM PDT 24 |
Jun 26 08:25:48 PM PDT 24 |
5440463216 ps |
| T692 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.566949240 |
|
|
Jun 26 08:24:21 PM PDT 24 |
Jun 26 08:31:59 PM PDT 24 |
3931077700 ps |
| T141 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.588635259 |
|
|
Jun 26 08:23:46 PM PDT 24 |
Jun 26 08:34:35 PM PDT 24 |
4319569420 ps |
| T700 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.3660939409 |
|
|
Jun 26 08:29:59 PM PDT 24 |
Jun 26 08:35:37 PM PDT 24 |
4265269624 ps |
| T949 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.640706873 |
|
|
Jun 26 07:59:00 PM PDT 24 |
Jun 26 08:05:38 PM PDT 24 |
2989682808 ps |
| T766 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.2336400342 |
|
|
Jun 26 08:30:19 PM PDT 24 |
Jun 26 08:35:09 PM PDT 24 |
4119276204 ps |
| T369 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.291744928 |
|
|
Jun 26 08:14:13 PM PDT 24 |
Jun 26 08:24:49 PM PDT 24 |
5099657212 ps |
| T950 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.3422320903 |
|
|
Jun 26 08:24:17 PM PDT 24 |
Jun 26 09:54:04 PM PDT 24 |
20978501308 ps |
| T951 |
/workspace/coverage/default/1.chip_tap_straps_dev.2596581297 |
|
|
Jun 26 08:07:23 PM PDT 24 |
Jun 26 08:10:26 PM PDT 24 |
2785780733 ps |
| T245 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.2991436155 |
|
|
Jun 26 08:15:55 PM PDT 24 |
Jun 26 08:20:31 PM PDT 24 |
2739601528 ps |
| T343 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2360643217 |
|
|
Jun 26 08:13:47 PM PDT 24 |
Jun 26 08:23:27 PM PDT 24 |
18316426128 ps |
| T952 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.1326552583 |
|
|
Jun 26 08:19:51 PM PDT 24 |
Jun 26 08:23:51 PM PDT 24 |
3220895614 ps |
| T118 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.3869378952 |
|
|
Jun 26 08:17:27 PM PDT 24 |
Jun 26 08:25:15 PM PDT 24 |
6547093864 ps |
| T953 |
/workspace/coverage/default/0.chip_sw_example_flash.85091249 |
|
|
Jun 26 07:53:11 PM PDT 24 |
Jun 26 07:57:13 PM PDT 24 |
2448634718 ps |
| T765 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.1217168083 |
|
|
Jun 26 08:24:28 PM PDT 24 |
Jun 26 08:30:31 PM PDT 24 |
3191609182 ps |
| T230 |
/workspace/coverage/default/2.chip_sw_flash_init.2994593663 |
|
|
Jun 26 08:11:16 PM PDT 24 |
Jun 26 08:46:27 PM PDT 24 |
21959158104 ps |
| T954 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.2608671972 |
|
|
Jun 26 08:08:59 PM PDT 24 |
Jun 26 08:30:03 PM PDT 24 |
5080219904 ps |
| T694 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.303865159 |
|
|
Jun 26 08:26:08 PM PDT 24 |
Jun 26 08:35:11 PM PDT 24 |
4685846702 ps |
| T775 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.1031985144 |
|
|
Jun 26 08:27:48 PM PDT 24 |
Jun 26 08:36:55 PM PDT 24 |
6044669538 ps |
| T334 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.150703369 |
|
|
Jun 26 08:11:38 PM PDT 24 |
Jun 26 08:25:09 PM PDT 24 |
3914932498 ps |
| T955 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.2784432425 |
|
|
Jun 26 08:19:50 PM PDT 24 |
Jun 26 08:23:31 PM PDT 24 |
2990126044 ps |
| T275 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.449421567 |
|
|
Jun 26 07:56:06 PM PDT 24 |
Jun 26 08:09:22 PM PDT 24 |
5812829996 ps |
| T749 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.58082861 |
|
|
Jun 26 08:29:03 PM PDT 24 |
Jun 26 08:38:35 PM PDT 24 |
4165350400 ps |
| T751 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.3125171675 |
|
|
Jun 26 08:26:10 PM PDT 24 |
Jun 26 08:32:53 PM PDT 24 |
4119437418 ps |
| T755 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.45734313 |
|
|
Jun 26 08:26:59 PM PDT 24 |
Jun 26 08:37:20 PM PDT 24 |
5956827446 ps |
| T763 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.2394454878 |
|
|
Jun 26 08:27:50 PM PDT 24 |
Jun 26 08:34:31 PM PDT 24 |
4242040104 ps |
| T956 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.2136424375 |
|
|
Jun 26 08:14:26 PM PDT 24 |
Jun 26 09:13:48 PM PDT 24 |
15097042600 ps |
| T957 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.3787985535 |
|
|
Jun 26 08:15:32 PM PDT 24 |
Jun 26 08:21:24 PM PDT 24 |
3473269125 ps |
| T728 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.3178596054 |
|
|
Jun 26 08:22:23 PM PDT 24 |
Jun 26 08:28:59 PM PDT 24 |
3575199148 ps |
| T958 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.346204730 |
|
|
Jun 26 08:00:47 PM PDT 24 |
Jun 26 08:05:14 PM PDT 24 |
2625572158 ps |
| T959 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.3356542540 |
|
|
Jun 26 08:07:13 PM PDT 24 |
Jun 26 08:14:18 PM PDT 24 |
3358581300 ps |
| T125 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.3667464992 |
|
|
Jun 26 08:06:12 PM PDT 24 |
Jun 26 08:21:28 PM PDT 24 |
7924150066 ps |
| T8 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.3586775230 |
|
|
Jun 26 08:02:11 PM PDT 24 |
Jun 26 08:09:02 PM PDT 24 |
3616507710 ps |
| T142 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.916541481 |
|
|
Jun 26 07:57:13 PM PDT 24 |
Jun 26 08:06:29 PM PDT 24 |
3359704538 ps |
| T410 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.1716415733 |
|
|
Jun 26 08:23:16 PM PDT 24 |
Jun 26 08:31:25 PM PDT 24 |
4444795134 ps |
| T411 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.3086913393 |
|
|
Jun 26 08:20:47 PM PDT 24 |
Jun 26 08:25:19 PM PDT 24 |
3132893573 ps |
| T412 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.2100469021 |
|
|
Jun 26 08:02:05 PM PDT 24 |
Jun 26 08:19:27 PM PDT 24 |
4810880384 ps |
| T10 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.292637579 |
|
|
Jun 26 07:56:49 PM PDT 24 |
Jun 26 08:17:05 PM PDT 24 |
20682532856 ps |
| T413 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.540606477 |
|
|
Jun 26 07:58:06 PM PDT 24 |
Jun 26 08:57:31 PM PDT 24 |
31926692183 ps |
| T414 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.3978601239 |
|
|
Jun 26 08:04:07 PM PDT 24 |
Jun 26 08:58:53 PM PDT 24 |
11780993862 ps |
| T164 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.1421320082 |
|
|
Jun 26 07:54:32 PM PDT 24 |
Jun 26 07:57:13 PM PDT 24 |
2465834059 ps |
| T228 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.709458038 |
|
|
Jun 26 08:12:39 PM PDT 24 |
Jun 26 09:41:49 PM PDT 24 |
45832754570 ps |
| T208 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.2643067756 |
|
|
Jun 26 07:57:07 PM PDT 24 |
Jun 26 08:02:29 PM PDT 24 |
3238084860 ps |
| T960 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.3729411056 |
|
|
Jun 26 07:56:58 PM PDT 24 |
Jun 26 08:02:03 PM PDT 24 |
2671603314 ps |
| T210 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.3103386661 |
|
|
Jun 26 08:10:58 PM PDT 24 |
Jun 26 08:31:36 PM PDT 24 |
9781310984 ps |
| T776 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.3426912029 |
|
|
Jun 26 08:31:07 PM PDT 24 |
Jun 26 08:35:52 PM PDT 24 |
3869912634 ps |
| T695 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.3857542359 |
|
|
Jun 26 08:26:05 PM PDT 24 |
Jun 26 08:32:22 PM PDT 24 |
3956465240 ps |
| T422 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.4081200080 |
|
|
Jun 26 08:04:24 PM PDT 24 |
Jun 26 08:19:02 PM PDT 24 |
6682683415 ps |
| T768 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.1556050842 |
|
|
Jun 26 08:27:11 PM PDT 24 |
Jun 26 08:34:08 PM PDT 24 |
4186420020 ps |
| T350 |
/workspace/coverage/default/2.chip_sw_hmac_enc.2479619562 |
|
|
Jun 26 08:16:39 PM PDT 24 |
Jun 26 08:21:07 PM PDT 24 |
2528245484 ps |
| T961 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.1989459442 |
|
|
Jun 26 08:06:06 PM PDT 24 |
Jun 26 08:25:36 PM PDT 24 |
6920267500 ps |
| T652 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2594468635 |
|
|
Jun 26 08:01:21 PM PDT 24 |
Jun 26 09:02:37 PM PDT 24 |
24764644902 ps |
| T103 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.3806087883 |
|
|
Jun 26 08:12:20 PM PDT 24 |
Jun 26 08:48:57 PM PDT 24 |
17107226056 ps |
| T666 |
/workspace/coverage/default/0.chip_sw_power_idle_load.1881586217 |
|
|
Jun 26 07:57:58 PM PDT 24 |
Jun 26 08:07:25 PM PDT 24 |
4571856076 ps |
| T320 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.3866415929 |
|
|
Jun 26 08:02:09 PM PDT 24 |
Jun 26 08:16:38 PM PDT 24 |
5275061690 ps |
| T68 |
/workspace/coverage/default/0.chip_tap_straps_rma.1262514835 |
|
|
Jun 26 07:55:36 PM PDT 24 |
Jun 26 08:08:59 PM PDT 24 |
7050664508 ps |
| T423 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.1157441423 |
|
|
Jun 26 07:56:28 PM PDT 24 |
Jun 26 08:17:21 PM PDT 24 |
6412682701 ps |
| T962 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.2736043166 |
|
|
Jun 26 08:02:47 PM PDT 24 |
Jun 26 08:10:38 PM PDT 24 |
5248655320 ps |
| T963 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.1229499382 |
|
|
Jun 26 08:23:19 PM PDT 24 |
Jun 26 08:43:20 PM PDT 24 |
11418279181 ps |
| T318 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.3786864533 |
|
|
Jun 26 08:12:46 PM PDT 24 |
Jun 26 08:23:11 PM PDT 24 |
4478653908 ps |
| T964 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.1192262454 |
|
|
Jun 26 07:56:36 PM PDT 24 |
Jun 26 08:06:46 PM PDT 24 |
5487653902 ps |
| T965 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.976287885 |
|
|
Jun 26 08:13:19 PM PDT 24 |
Jun 26 09:50:08 PM PDT 24 |
46725982334 ps |
| T253 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.3733272216 |
|
|
Jun 26 08:01:40 PM PDT 24 |
Jun 26 08:52:48 PM PDT 24 |
23855446451 ps |
| T966 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.3594001433 |
|
|
Jun 26 08:07:40 PM PDT 24 |
Jun 26 09:10:41 PM PDT 24 |
15214277631 ps |
| T967 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.1733404645 |
|
|
Jun 26 07:59:44 PM PDT 24 |
Jun 26 08:09:45 PM PDT 24 |
3822531856 ps |
| T740 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.4104189406 |
|
|
Jun 26 08:28:45 PM PDT 24 |
Jun 26 08:37:23 PM PDT 24 |
6481302968 ps |
| T968 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.1801013133 |
|
|
Jun 26 08:19:02 PM PDT 24 |
Jun 26 08:23:37 PM PDT 24 |
2943220088 ps |
| T130 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.68970500 |
|
|
Jun 26 08:02:12 PM PDT 24 |
Jun 26 08:08:54 PM PDT 24 |
8825049151 ps |
| T969 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.113655822 |
|
|
Jun 26 08:27:48 PM PDT 24 |
Jun 26 08:36:36 PM PDT 24 |
5370802280 ps |
| T970 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.2269425765 |
|
|
Jun 26 08:13:46 PM PDT 24 |
Jun 26 09:11:25 PM PDT 24 |
11779690417 ps |
| T971 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3997664887 |
|
|
Jun 26 08:11:18 PM PDT 24 |
Jun 26 08:29:19 PM PDT 24 |
8174156926 ps |
| T258 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.1067438261 |
|
|
Jun 26 07:59:53 PM PDT 24 |
Jun 26 08:28:12 PM PDT 24 |
13812331290 ps |
| T972 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.867162009 |
|
|
Jun 26 08:10:01 PM PDT 24 |
Jun 26 08:20:24 PM PDT 24 |
4646599400 ps |
| T34 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.488682089 |
|
|
Jun 26 08:02:41 PM PDT 24 |
Jun 26 08:09:24 PM PDT 24 |
3639586290 ps |
| T973 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.544350884 |
|
|
Jun 26 08:24:23 PM PDT 24 |
Jun 26 08:33:18 PM PDT 24 |
4627937416 ps |
| T974 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.944340960 |
|
|
Jun 26 08:22:19 PM PDT 24 |
Jun 26 08:31:21 PM PDT 24 |
3920264056 ps |
| T263 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2935879833 |
|
|
Jun 26 08:12:18 PM PDT 24 |
Jun 26 08:16:45 PM PDT 24 |
2846692588 ps |
| T975 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.2703094652 |
|
|
Jun 26 08:15:25 PM PDT 24 |
Jun 26 08:20:48 PM PDT 24 |
3560791688 ps |
| T713 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2829124065 |
|
|
Jun 26 07:56:19 PM PDT 24 |
Jun 26 08:03:21 PM PDT 24 |
4340998300 ps |
| T976 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.4229891405 |
|
|
Jun 26 07:55:59 PM PDT 24 |
Jun 26 08:13:26 PM PDT 24 |
5843757634 ps |
| T977 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.614878599 |
|
|
Jun 26 08:00:55 PM PDT 24 |
Jun 26 08:29:50 PM PDT 24 |
13765404849 ps |
| T978 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.3438684743 |
|
|
Jun 26 08:06:19 PM PDT 24 |
Jun 26 09:06:16 PM PDT 24 |
15412195512 ps |
| T722 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.2739745490 |
|
|
Jun 26 08:26:00 PM PDT 24 |
Jun 26 08:31:25 PM PDT 24 |
3853447516 ps |
| T979 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.1512506005 |
|
|
Jun 26 08:13:21 PM PDT 24 |
Jun 26 08:20:32 PM PDT 24 |
5076544040 ps |
| T980 |
/workspace/coverage/default/1.chip_sw_example_rom.1673139231 |
|
|
Jun 26 07:59:30 PM PDT 24 |
Jun 26 08:01:41 PM PDT 24 |
2731613810 ps |
| T981 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.2689965903 |
|
|
Jun 26 08:04:32 PM PDT 24 |
Jun 26 08:09:46 PM PDT 24 |
3008130576 ps |
| T733 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.1907489513 |
|
|
Jun 26 08:23:44 PM PDT 24 |
Jun 26 08:30:27 PM PDT 24 |
4269062412 ps |
| T982 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2371564238 |
|
|
Jun 26 08:02:35 PM PDT 24 |
Jun 26 08:26:45 PM PDT 24 |
13935536764 ps |
| T983 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.2770989329 |
|
|
Jun 26 07:57:11 PM PDT 24 |
Jun 26 08:55:40 PM PDT 24 |
16934319624 ps |
| T984 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.2621833097 |
|
|
Jun 26 07:59:26 PM PDT 24 |
Jun 26 08:03:30 PM PDT 24 |
3090225000 ps |
| T985 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.2238235103 |
|
|
Jun 26 08:08:45 PM PDT 24 |
Jun 26 08:12:52 PM PDT 24 |
3193665787 ps |
| T986 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.2827780212 |
|
|
Jun 26 07:59:16 PM PDT 24 |
Jun 26 08:04:32 PM PDT 24 |
3064142978 ps |
| T987 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.2095765885 |
|
|
Jun 26 08:23:34 PM PDT 24 |
Jun 26 08:31:35 PM PDT 24 |
7310022389 ps |
| T240 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.360104286 |
|
|
Jun 26 07:56:29 PM PDT 24 |
Jun 26 08:05:44 PM PDT 24 |
5193424203 ps |
| T988 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.2800871904 |
|
|
Jun 26 08:17:46 PM PDT 24 |
Jun 26 08:23:26 PM PDT 24 |
3206898646 ps |
| T308 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.3672091290 |
|
|
Jun 26 07:56:00 PM PDT 24 |
Jun 26 08:17:04 PM PDT 24 |
6439455928 ps |
| T708 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.2649848360 |
|
|
Jun 26 08:25:20 PM PDT 24 |
Jun 26 08:31:44 PM PDT 24 |
3793741252 ps |
| T989 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.976920234 |
|
|
Jun 26 08:13:00 PM PDT 24 |
Jun 26 08:25:23 PM PDT 24 |
7679683600 ps |
| T990 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.544605129 |
|
|
Jun 26 08:02:02 PM PDT 24 |
Jun 26 08:11:42 PM PDT 24 |
6278348770 ps |
| T991 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.2524850519 |
|
|
Jun 26 08:20:27 PM PDT 24 |
Jun 26 08:30:36 PM PDT 24 |
4503237632 ps |
| T501 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.3194389287 |
|
|
Jun 26 08:03:43 PM PDT 24 |
Jun 26 08:35:55 PM PDT 24 |
10013872147 ps |
| T698 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.993782300 |
|
|
Jun 26 08:28:48 PM PDT 24 |
Jun 26 08:34:43 PM PDT 24 |
3503363028 ps |
| T992 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.224446180 |
|
|
Jun 26 08:10:23 PM PDT 24 |
Jun 26 08:13:44 PM PDT 24 |
2263410180 ps |
| T993 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.1403287065 |
|
|
Jun 26 08:15:15 PM PDT 24 |
Jun 26 09:09:59 PM PDT 24 |
15627046351 ps |
| T994 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.348306096 |
|
|
Jun 26 07:55:15 PM PDT 24 |
Jun 26 08:01:30 PM PDT 24 |
3574707000 ps |
| T995 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.3870522414 |
|
|
Jun 26 08:23:25 PM PDT 24 |
Jun 26 08:33:10 PM PDT 24 |
3694772316 ps |
| T996 |
/workspace/coverage/default/4.chip_tap_straps_dev.2802892839 |
|
|
Jun 26 08:19:27 PM PDT 24 |
Jun 26 08:22:31 PM PDT 24 |
3255263415 ps |
| T997 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.1767427093 |
|
|
Jun 26 07:58:39 PM PDT 24 |
Jun 26 08:02:35 PM PDT 24 |
3164282492 ps |
| T998 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.456755558 |
|
|
Jun 26 08:00:38 PM PDT 24 |
Jun 26 08:29:29 PM PDT 24 |
7364271804 ps |
| T696 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.2741173882 |
|
|
Jun 26 08:28:27 PM PDT 24 |
Jun 26 08:36:25 PM PDT 24 |
3997651864 ps |
| T340 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.4197770013 |
|
|
Jun 26 07:57:14 PM PDT 24 |
Jun 26 08:08:36 PM PDT 24 |
4382980945 ps |
| T999 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.4160051124 |
|
|
Jun 26 07:56:22 PM PDT 24 |
Jun 26 08:00:54 PM PDT 24 |
3061416798 ps |
| T790 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.2274518655 |
|
|
Jun 26 08:28:05 PM PDT 24 |
Jun 26 08:35:33 PM PDT 24 |
4211619244 ps |
| T736 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.2765060987 |
|
|
Jun 26 08:29:30 PM PDT 24 |
Jun 26 08:36:45 PM PDT 24 |
3718518648 ps |
| T1000 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.784908034 |
|
|
Jun 26 08:00:45 PM PDT 24 |
Jun 26 08:11:07 PM PDT 24 |
7126081678 ps |
| T172 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.1359711539 |
|
|
Jun 26 07:52:54 PM PDT 24 |
Jun 26 09:20:58 PM PDT 24 |
43248855755 ps |
| T327 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.4268313179 |
|
|
Jun 26 08:01:05 PM PDT 24 |
Jun 26 08:12:38 PM PDT 24 |
3669403542 ps |
| T1001 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.2541803638 |
|
|
Jun 26 07:55:44 PM PDT 24 |
Jun 26 08:20:02 PM PDT 24 |
8317628484 ps |
| T21 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.2128805582 |
|
|
Jun 26 07:55:13 PM PDT 24 |
Jun 26 08:02:19 PM PDT 24 |
3533220465 ps |
| T1002 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.2948823666 |
|
|
Jun 26 08:06:10 PM PDT 24 |
Jun 26 08:45:34 PM PDT 24 |
12381014714 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.906533050 |
|
|
Jun 26 08:03:07 PM PDT 24 |
Jun 26 08:07:29 PM PDT 24 |
2657408440 ps |
| T51 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.2529981188 |
|
|
Jun 26 08:02:22 PM PDT 24 |
Jun 26 08:09:19 PM PDT 24 |
3720058183 ps |
| T709 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.1595655301 |
|
|
Jun 26 08:26:33 PM PDT 24 |
Jun 26 08:34:03 PM PDT 24 |
4458638630 ps |
| T1004 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.1971180082 |
|
|
Jun 26 08:09:04 PM PDT 24 |
Jun 26 08:14:50 PM PDT 24 |
2860224600 ps |
| T1005 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.1838772050 |
|
|
Jun 26 08:05:08 PM PDT 24 |
Jun 26 08:08:31 PM PDT 24 |
2691972158 ps |
| T1006 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1135482462 |
|
|
Jun 26 08:11:46 PM PDT 24 |
Jun 26 08:22:48 PM PDT 24 |
5154306848 ps |
| T1007 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2289695969 |
|
|
Jun 26 08:00:34 PM PDT 24 |
Jun 26 08:09:09 PM PDT 24 |
4025666780 ps |
| T1008 |
/workspace/coverage/default/1.chip_tap_straps_rma.3696813214 |
|
|
Jun 26 08:08:59 PM PDT 24 |
Jun 26 08:16:06 PM PDT 24 |
4743664710 ps |
| T743 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.2464124617 |
|
|
Jun 26 08:28:20 PM PDT 24 |
Jun 26 08:36:45 PM PDT 24 |
5038531872 ps |
| T1009 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.49268832 |
|
|
Jun 26 08:02:50 PM PDT 24 |
Jun 26 08:08:01 PM PDT 24 |
3264275000 ps |
| T654 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.2702548384 |
|
|
Jun 26 08:10:18 PM PDT 24 |
Jun 26 08:12:23 PM PDT 24 |
2853435016 ps |
| T276 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.828557140 |
|
|
Jun 26 07:59:26 PM PDT 24 |
Jun 26 08:15:38 PM PDT 24 |
6418280292 ps |
| T1010 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.2631876277 |
|
|
Jun 26 08:20:23 PM PDT 24 |
Jun 26 08:33:04 PM PDT 24 |
6299275052 ps |
| T734 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.3351103047 |
|
|
Jun 26 08:28:51 PM PDT 24 |
Jun 26 08:34:52 PM PDT 24 |
3602180024 ps |
| T498 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.3828263656 |
|
|
Jun 26 08:04:36 PM PDT 24 |
Jun 26 08:20:24 PM PDT 24 |
5373167514 ps |
| T711 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.829298584 |
|
|
Jun 26 08:27:44 PM PDT 24 |
Jun 26 08:37:51 PM PDT 24 |
4651547656 ps |
| T794 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.3773227527 |
|
|
Jun 26 08:19:32 PM PDT 24 |
Jun 26 08:26:36 PM PDT 24 |
3599145928 ps |
| T266 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.2863121346 |
|
|
Jun 26 07:55:38 PM PDT 24 |
Jun 26 08:06:51 PM PDT 24 |
8365633928 ps |
| T1011 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.916424345 |
|
|
Jun 26 07:57:13 PM PDT 24 |
Jun 26 08:22:16 PM PDT 24 |
9485646370 ps |
| T1012 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.238571582 |
|
|
Jun 26 08:14:42 PM PDT 24 |
Jun 26 09:26:07 PM PDT 24 |
15166299416 ps |
| T1013 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.2965857190 |
|
|
Jun 26 07:53:49 PM PDT 24 |
Jun 26 08:01:10 PM PDT 24 |
3995457064 ps |
| T22 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.4112226994 |
|
|
Jun 26 07:59:05 PM PDT 24 |
Jun 26 08:04:14 PM PDT 24 |
3250375644 ps |
| T298 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.1319455965 |
|
|
Jun 26 08:27:53 PM PDT 24 |
Jun 26 08:35:50 PM PDT 24 |
3953555680 ps |
| T1014 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.4255175192 |
|
|
Jun 26 08:11:36 PM PDT 24 |
Jun 26 08:17:57 PM PDT 24 |
5568817270 ps |
| T1015 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.2371410016 |
|
|
Jun 26 08:18:52 PM PDT 24 |
Jun 26 08:28:48 PM PDT 24 |
6966313736 ps |
| T1016 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.2878138329 |
|
|
Jun 26 08:05:08 PM PDT 24 |
Jun 26 08:10:16 PM PDT 24 |
3216562720 ps |
| T1017 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.2766608412 |
|
|
Jun 26 08:16:08 PM PDT 24 |
Jun 26 08:34:44 PM PDT 24 |
6203667810 ps |
| T1018 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.338177578 |
|
|
Jun 26 07:54:40 PM PDT 24 |
Jun 26 08:12:09 PM PDT 24 |
4916749010 ps |
| T760 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.240105644 |
|
|
Jun 26 08:25:03 PM PDT 24 |
Jun 26 08:31:33 PM PDT 24 |
3988153680 ps |
| T691 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.3829454149 |
|
|
Jun 26 08:23:30 PM PDT 24 |
Jun 26 08:30:41 PM PDT 24 |
4012709752 ps |
| T1019 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.2717568892 |
|
|
Jun 26 08:17:46 PM PDT 24 |
Jun 26 08:22:08 PM PDT 24 |
3071576944 ps |
| T344 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2271623382 |
|
|
Jun 26 08:02:40 PM PDT 24 |
Jun 26 08:52:34 PM PDT 24 |
31735620448 ps |
| T1020 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1358154402 |
|
|
Jun 26 07:59:52 PM PDT 24 |
Jun 26 08:09:21 PM PDT 24 |
4912904769 ps |
| T737 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.901132197 |
|
|
Jun 26 08:26:45 PM PDT 24 |
Jun 26 08:36:26 PM PDT 24 |
5074441608 ps |
| T45 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.2638906238 |
|
|
Jun 26 08:01:14 PM PDT 24 |
Jun 26 08:05:29 PM PDT 24 |
2492341100 ps |
| T1021 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.1653988588 |
|
|
Jun 26 07:54:14 PM PDT 24 |
Jun 26 08:02:42 PM PDT 24 |
9219269320 ps |
| T1022 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.1245111169 |
|
|
Jun 26 07:56:39 PM PDT 24 |
Jun 26 08:14:35 PM PDT 24 |
5424828306 ps |
| T345 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.2178125441 |
|
|
Jun 26 08:02:20 PM PDT 24 |
Jun 26 08:08:58 PM PDT 24 |
3731377040 ps |
| T218 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.2971763472 |
|
|
Jun 26 08:15:18 PM PDT 24 |
Jun 26 09:02:05 PM PDT 24 |
11539255976 ps |
| T1023 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.4120746301 |
|
|
Jun 26 08:14:36 PM PDT 24 |
Jun 26 09:13:47 PM PDT 24 |
15375979044 ps |
| T1024 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.4268603860 |
|
|
Jun 26 08:03:03 PM PDT 24 |
Jun 26 08:15:10 PM PDT 24 |
4638122440 ps |
| T1025 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.3386869587 |
|
|
Jun 26 08:19:38 PM PDT 24 |
Jun 26 08:30:35 PM PDT 24 |
4017050220 ps |
| T1026 |
/workspace/coverage/default/4.chip_tap_straps_rma.1231268269 |
|
|
Jun 26 08:19:14 PM PDT 24 |
Jun 26 08:21:26 PM PDT 24 |
2453243548 ps |
| T1027 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.2311010282 |
|
|
Jun 26 08:05:04 PM PDT 24 |
Jun 26 09:12:43 PM PDT 24 |
18873671716 ps |
| T267 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.3411793047 |
|
|
Jun 26 07:53:59 PM PDT 24 |
Jun 26 07:56:43 PM PDT 24 |
2887534708 ps |
| T1028 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.346982139 |
|
|
Jun 26 08:02:05 PM PDT 24 |
Jun 26 09:38:50 PM PDT 24 |
51372243967 ps |
| T1029 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.375323914 |
|
|
Jun 26 08:22:50 PM PDT 24 |
Jun 26 08:32:55 PM PDT 24 |
6404361122 ps |
| T729 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.234485993 |
|
|
Jun 26 08:27:02 PM PDT 24 |
Jun 26 08:32:47 PM PDT 24 |
3732918056 ps |
| T1030 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.521841224 |
|
|
Jun 26 08:23:49 PM PDT 24 |
Jun 26 08:33:52 PM PDT 24 |
3881273430 ps |
| T370 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.2088239667 |
|
|
Jun 26 08:05:06 PM PDT 24 |
Jun 26 09:41:19 PM PDT 24 |
24040738904 ps |
| T1031 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.2891900250 |
|
|
Jun 26 08:03:37 PM PDT 24 |
Jun 26 08:11:11 PM PDT 24 |
3210825688 ps |