| T785 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.3127398534 |
|
|
Jun 26 08:23:27 PM PDT 24 |
Jun 26 08:35:10 PM PDT 24 |
4726875092 ps |
| T786 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.2145051830 |
|
|
Jun 26 08:24:51 PM PDT 24 |
Jun 26 08:30:23 PM PDT 24 |
3758068824 ps |
| T14 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.1316192629 |
|
|
Jun 26 08:01:34 PM PDT 24 |
Jun 26 08:06:05 PM PDT 24 |
3802332096 ps |
| T398 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.503374438 |
|
|
Jun 26 08:11:45 PM PDT 24 |
Jun 26 08:15:08 PM PDT 24 |
2812068308 ps |
| T399 |
/workspace/coverage/default/2.chip_sw_rv_timer_smoketest.627724386 |
|
|
Jun 26 08:19:26 PM PDT 24 |
Jun 26 08:24:37 PM PDT 24 |
2912293400 ps |
| T400 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.2531955449 |
|
|
Jun 26 08:28:14 PM PDT 24 |
Jun 26 08:38:58 PM PDT 24 |
5003883028 ps |
| T233 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.4292444715 |
|
|
Jun 26 08:17:40 PM PDT 24 |
Jun 26 08:49:29 PM PDT 24 |
21751206229 ps |
| T401 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.4186539717 |
|
|
Jun 26 08:17:31 PM PDT 24 |
Jun 26 08:35:14 PM PDT 24 |
8180701630 ps |
| T186 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.1039167259 |
|
|
Jun 26 08:11:03 PM PDT 24 |
Jun 26 08:18:07 PM PDT 24 |
4886106718 ps |
| T402 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.820272440 |
|
|
Jun 26 08:24:35 PM PDT 24 |
Jun 26 08:31:41 PM PDT 24 |
4964291318 ps |
| T403 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.2876654306 |
|
|
Jun 26 08:16:53 PM PDT 24 |
Jun 26 08:27:15 PM PDT 24 |
4727926508 ps |
| T404 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.2772701538 |
|
|
Jun 26 08:06:29 PM PDT 24 |
Jun 26 08:24:24 PM PDT 24 |
7070244624 ps |
| T797 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.3575925472 |
|
|
Jun 26 08:23:56 PM PDT 24 |
Jun 26 08:32:14 PM PDT 24 |
4652180732 ps |
| T1196 |
/workspace/coverage/default/0.chip_sw_edn_kat.284621399 |
|
|
Jun 26 07:57:59 PM PDT 24 |
Jun 26 08:09:11 PM PDT 24 |
3828553752 ps |
| T1197 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.3621238832 |
|
|
Jun 26 07:55:33 PM PDT 24 |
Jun 26 07:59:04 PM PDT 24 |
3046650684 ps |
| T1198 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.2291720236 |
|
|
Jun 26 08:13:28 PM PDT 24 |
Jun 26 08:24:07 PM PDT 24 |
6075981768 ps |
| T1199 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.2030212106 |
|
|
Jun 26 08:15:07 PM PDT 24 |
Jun 26 08:54:24 PM PDT 24 |
12614082750 ps |
| T1200 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.1409232059 |
|
|
Jun 26 08:31:05 PM PDT 24 |
Jun 26 08:40:44 PM PDT 24 |
4246425652 ps |
| T1201 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.4199593835 |
|
|
Jun 26 08:07:19 PM PDT 24 |
Jun 26 08:41:13 PM PDT 24 |
8283797176 ps |
| T726 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.3140618383 |
|
|
Jun 26 08:30:23 PM PDT 24 |
Jun 26 08:36:50 PM PDT 24 |
3845449060 ps |
| T1202 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.2149899884 |
|
|
Jun 26 07:55:45 PM PDT 24 |
Jun 26 08:05:50 PM PDT 24 |
5919444168 ps |
| T1203 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.2282695385 |
|
|
Jun 26 08:06:23 PM PDT 24 |
Jun 26 08:35:07 PM PDT 24 |
9501231322 ps |
| T780 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.2590765422 |
|
|
Jun 26 08:06:23 PM PDT 24 |
Jun 26 08:13:38 PM PDT 24 |
3771254784 ps |
| T1204 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.477999481 |
|
|
Jun 26 08:11:04 PM PDT 24 |
Jun 26 08:23:48 PM PDT 24 |
3816307110 ps |
| T329 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.317957455 |
|
|
Jun 26 08:27:38 PM PDT 24 |
Jun 26 08:34:19 PM PDT 24 |
3346617178 ps |
| T1205 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2277381863 |
|
|
Jun 26 08:18:27 PM PDT 24 |
Jun 26 08:38:15 PM PDT 24 |
8860140488 ps |
| T1206 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.686096033 |
|
|
Jun 26 07:56:07 PM PDT 24 |
Jun 26 08:19:21 PM PDT 24 |
6532987544 ps |
| T302 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.3029115888 |
|
|
Jun 26 08:24:33 PM PDT 24 |
Jun 26 08:35:53 PM PDT 24 |
4641255600 ps |
| T1207 |
/workspace/coverage/default/2.rom_keymgr_functest.3741429638 |
|
|
Jun 26 08:19:19 PM PDT 24 |
Jun 26 08:26:45 PM PDT 24 |
4796982618 ps |
| T1208 |
/workspace/coverage/default/2.rom_e2e_static_critical.2729009382 |
|
|
Jun 26 08:24:00 PM PDT 24 |
Jun 26 09:32:15 PM PDT 24 |
16944821208 ps |
| T1209 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.1244089191 |
|
|
Jun 26 07:57:24 PM PDT 24 |
Jun 26 08:15:29 PM PDT 24 |
5579849868 ps |
| T1210 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.244622284 |
|
|
Jun 26 08:17:17 PM PDT 24 |
Jun 26 08:30:32 PM PDT 24 |
6223088968 ps |
| T321 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.2953137786 |
|
|
Jun 26 07:58:20 PM PDT 24 |
Jun 26 08:11:56 PM PDT 24 |
4626569992 ps |
| T1211 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.4065887823 |
|
|
Jun 26 07:54:32 PM PDT 24 |
Jun 26 07:57:21 PM PDT 24 |
3155266426 ps |
| T312 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.2211627141 |
|
|
Jun 26 08:07:11 PM PDT 24 |
Jun 26 08:18:43 PM PDT 24 |
5276824312 ps |
| T1212 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.961287278 |
|
|
Jun 26 08:00:51 PM PDT 24 |
Jun 26 08:04:56 PM PDT 24 |
2596974153 ps |
| T1213 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.1870085153 |
|
|
Jun 26 08:16:06 PM PDT 24 |
Jun 26 08:51:24 PM PDT 24 |
12101932090 ps |
| T1214 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.690617454 |
|
|
Jun 26 07:55:01 PM PDT 24 |
Jun 26 09:30:18 PM PDT 24 |
45971680042 ps |
| T393 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.3096871817 |
|
|
Jun 26 08:07:38 PM PDT 24 |
Jun 26 08:15:25 PM PDT 24 |
3947193332 ps |
| T1215 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.1684223218 |
|
|
Jun 26 08:07:02 PM PDT 24 |
Jun 26 08:42:16 PM PDT 24 |
7575479796 ps |
| T1216 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.4255165176 |
|
|
Jun 26 08:06:39 PM PDT 24 |
Jun 26 08:10:51 PM PDT 24 |
2591331252 ps |
| T346 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.1722198551 |
|
|
Jun 26 07:57:47 PM PDT 24 |
Jun 26 08:04:37 PM PDT 24 |
3623655388 ps |
| T1217 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.4206765312 |
|
|
Jun 26 08:11:06 PM PDT 24 |
Jun 26 08:15:36 PM PDT 24 |
3074774504 ps |
| T1218 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.1269124128 |
|
|
Jun 26 07:56:57 PM PDT 24 |
Jun 26 08:07:37 PM PDT 24 |
4162059448 ps |
| T1219 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.2217058270 |
|
|
Jun 26 08:05:26 PM PDT 24 |
Jun 26 08:26:04 PM PDT 24 |
5909543652 ps |
| T1220 |
/workspace/coverage/default/0.rom_e2e_smoke.865022772 |
|
|
Jun 26 08:03:34 PM PDT 24 |
Jun 26 09:11:03 PM PDT 24 |
14464766420 ps |
| T11 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.2180856400 |
|
|
Jun 26 07:58:30 PM PDT 24 |
Jun 26 08:02:45 PM PDT 24 |
2608848524 ps |
| T1221 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.479273490 |
|
|
Jun 26 08:20:33 PM PDT 24 |
Jun 26 08:26:37 PM PDT 24 |
3459672596 ps |
| T1222 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1422004604 |
|
|
Jun 26 08:03:55 PM PDT 24 |
Jun 26 08:30:15 PM PDT 24 |
13415927527 ps |
| T1223 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.4182677306 |
|
|
Jun 26 08:01:04 PM PDT 24 |
Jun 26 08:20:11 PM PDT 24 |
6343385159 ps |
| T1224 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1264220018 |
|
|
Jun 26 08:13:07 PM PDT 24 |
Jun 26 08:22:39 PM PDT 24 |
3766057632 ps |
| T53 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.2915606615 |
|
|
Jun 26 07:55:08 PM PDT 24 |
Jun 26 08:01:01 PM PDT 24 |
3141037353 ps |
| T351 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3738653250 |
|
|
Jun 26 08:08:00 PM PDT 24 |
Jun 26 08:19:18 PM PDT 24 |
6921236200 ps |
| T1225 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.1605497478 |
|
|
Jun 26 08:02:15 PM PDT 24 |
Jun 26 08:32:45 PM PDT 24 |
25412681755 ps |
| T1226 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.1141239056 |
|
|
Jun 26 07:57:05 PM PDT 24 |
Jun 26 08:02:25 PM PDT 24 |
3126379384 ps |
| T1227 |
/workspace/coverage/default/4.chip_tap_straps_prod.3171792329 |
|
|
Jun 26 08:21:05 PM PDT 24 |
Jun 26 08:44:06 PM PDT 24 |
10812536164 ps |
| T1228 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.3952717970 |
|
|
Jun 26 08:14:23 PM PDT 24 |
Jun 26 08:18:45 PM PDT 24 |
2345205018 ps |
| T798 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.3434347566 |
|
|
Jun 26 08:29:38 PM PDT 24 |
Jun 26 08:37:43 PM PDT 24 |
5336003224 ps |
| T1229 |
/workspace/coverage/default/1.chip_sw_power_idle_load.1316643091 |
|
|
Jun 26 08:09:12 PM PDT 24 |
Jun 26 08:22:40 PM PDT 24 |
4728221448 ps |
| T1230 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1984739447 |
|
|
Jun 26 08:04:51 PM PDT 24 |
Jun 26 08:12:21 PM PDT 24 |
6779535800 ps |
| T1231 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.2799676974 |
|
|
Jun 26 08:13:55 PM PDT 24 |
Jun 26 08:23:12 PM PDT 24 |
4140101272 ps |
| T1232 |
/workspace/coverage/default/1.rom_keymgr_functest.1779578135 |
|
|
Jun 26 08:10:46 PM PDT 24 |
Jun 26 08:18:09 PM PDT 24 |
3504424920 ps |
| T1233 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.3718464344 |
|
|
Jun 26 07:54:10 PM PDT 24 |
Jun 26 08:05:16 PM PDT 24 |
4487811280 ps |
| T243 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.1980330231 |
|
|
Jun 26 08:27:29 PM PDT 24 |
Jun 26 08:38:24 PM PDT 24 |
5024975480 ps |
| T1234 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.2078139522 |
|
|
Jun 26 08:25:30 PM PDT 24 |
Jun 26 08:37:04 PM PDT 24 |
5679061032 ps |
| T226 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.2356782163 |
|
|
Jun 26 08:01:27 PM PDT 24 |
Jun 26 09:24:29 PM PDT 24 |
48139290290 ps |
| T1235 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.1552011504 |
|
|
Jun 26 08:05:05 PM PDT 24 |
Jun 26 08:28:39 PM PDT 24 |
7607975790 ps |
| T1236 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.219858315 |
|
|
Jun 26 07:55:23 PM PDT 24 |
Jun 26 09:27:48 PM PDT 24 |
48515579725 ps |
| T1237 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.4273020271 |
|
|
Jun 26 07:55:24 PM PDT 24 |
Jun 26 07:59:58 PM PDT 24 |
2735761986 ps |
| T1238 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.2857800471 |
|
|
Jun 26 08:19:16 PM PDT 24 |
Jun 26 08:23:59 PM PDT 24 |
2240315412 ps |
| T1239 |
/workspace/coverage/default/1.rom_e2e_smoke.1163875736 |
|
|
Jun 26 08:13:30 PM PDT 24 |
Jun 26 09:07:47 PM PDT 24 |
14620017354 ps |
| T1240 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.1932007338 |
|
|
Jun 26 08:17:12 PM PDT 24 |
Jun 26 08:25:33 PM PDT 24 |
5935786636 ps |
| T1241 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.621274338 |
|
|
Jun 26 07:56:26 PM PDT 24 |
Jun 26 08:01:07 PM PDT 24 |
3230712930 ps |
| T352 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3303693299 |
|
|
Jun 26 08:17:03 PM PDT 24 |
Jun 26 08:25:58 PM PDT 24 |
6370096200 ps |
| T1242 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.2576458413 |
|
|
Jun 26 08:22:09 PM PDT 24 |
Jun 26 08:50:43 PM PDT 24 |
8345461500 ps |
| T354 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.190474188 |
|
|
Jun 26 08:26:54 PM PDT 24 |
Jun 26 08:33:36 PM PDT 24 |
3863843838 ps |
| T389 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.1960286901 |
|
|
Jun 26 07:58:51 PM PDT 24 |
Jun 26 08:04:57 PM PDT 24 |
2836188127 ps |
| T1243 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.2497299932 |
|
|
Jun 26 08:26:50 PM PDT 24 |
Jun 26 08:34:35 PM PDT 24 |
4142998680 ps |
| T1244 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.2651825378 |
|
|
Jun 26 07:54:45 PM PDT 24 |
Jun 26 08:00:32 PM PDT 24 |
5430869320 ps |
| T134 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.812663903 |
|
|
Jun 26 07:56:00 PM PDT 24 |
Jun 26 08:07:48 PM PDT 24 |
4774875160 ps |
| T330 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.3307574417 |
|
|
Jun 26 08:00:59 PM PDT 24 |
Jun 26 08:12:52 PM PDT 24 |
4147008295 ps |
| T1245 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2830317433 |
|
|
Jun 26 08:18:19 PM PDT 24 |
Jun 26 08:28:26 PM PDT 24 |
4580803664 ps |
| T12 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.4126514430 |
|
|
Jun 26 08:01:09 PM PDT 24 |
Jun 26 08:05:00 PM PDT 24 |
3593413806 ps |
| T1246 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.4161153578 |
|
|
Jun 26 08:01:15 PM PDT 24 |
Jun 26 08:09:37 PM PDT 24 |
6055646110 ps |
| T223 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.3775098080 |
|
|
Jun 26 08:16:13 PM PDT 24 |
Jun 26 08:59:15 PM PDT 24 |
12668832652 ps |
| T752 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.2208691106 |
|
|
Jun 26 08:24:44 PM PDT 24 |
Jun 26 08:33:45 PM PDT 24 |
5264853600 ps |
| T278 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.542340149 |
|
|
Jun 26 08:26:18 PM PDT 24 |
Jun 26 08:38:55 PM PDT 24 |
6066519560 ps |
| T1247 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2189196394 |
|
|
Jun 26 07:57:43 PM PDT 24 |
Jun 26 08:02:27 PM PDT 24 |
3646877986 ps |
| T1248 |
/workspace/coverage/default/2.chip_sw_example_concurrency.3248488956 |
|
|
Jun 26 08:11:00 PM PDT 24 |
Jun 26 08:14:12 PM PDT 24 |
2051449330 ps |
| T1249 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2471588712 |
|
|
Jun 26 07:56:19 PM PDT 24 |
Jun 26 08:06:48 PM PDT 24 |
4207126410 ps |
| T1250 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.263773278 |
|
|
Jun 26 08:17:20 PM PDT 24 |
Jun 26 08:28:21 PM PDT 24 |
5762825662 ps |
| T316 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.218647026 |
|
|
Jun 26 08:12:22 PM PDT 24 |
Jun 26 08:38:36 PM PDT 24 |
10358279800 ps |
| T1251 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.2619756635 |
|
|
Jun 26 08:27:15 PM PDT 24 |
Jun 26 08:34:43 PM PDT 24 |
4329513676 ps |
| T1252 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.241068614 |
|
|
Jun 26 07:53:42 PM PDT 24 |
Jun 26 07:55:32 PM PDT 24 |
1893017754 ps |
| T1253 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.1248600844 |
|
|
Jun 26 08:07:50 PM PDT 24 |
Jun 26 08:16:55 PM PDT 24 |
5137460000 ps |
| T753 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.3781178565 |
|
|
Jun 26 08:00:38 PM PDT 24 |
Jun 26 08:10:49 PM PDT 24 |
5877370740 ps |
| T1254 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.1412987889 |
|
|
Jun 26 07:59:49 PM PDT 24 |
Jun 26 11:14:01 PM PDT 24 |
65427815837 ps |
| T1255 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.1903910343 |
|
|
Jun 26 08:09:57 PM PDT 24 |
Jun 26 08:13:32 PM PDT 24 |
2597333070 ps |
| T174 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.2168328736 |
|
|
Jun 26 08:01:22 PM PDT 24 |
Jun 26 09:26:29 PM PDT 24 |
44307548203 ps |
| T1256 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.1633020042 |
|
|
Jun 26 08:01:36 PM PDT 24 |
Jun 26 08:14:02 PM PDT 24 |
5174836170 ps |
| T1257 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1889643972 |
|
|
Jun 26 08:12:35 PM PDT 24 |
Jun 26 08:14:24 PM PDT 24 |
3062468316 ps |
| T39 |
/workspace/coverage/default/1.chip_sw_gpio.2134039091 |
|
|
Jun 26 08:01:52 PM PDT 24 |
Jun 26 08:11:04 PM PDT 24 |
4162603800 ps |
| T742 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.990531253 |
|
|
Jun 26 08:27:50 PM PDT 24 |
Jun 26 08:39:10 PM PDT 24 |
5923231672 ps |
| T1258 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.2363473556 |
|
|
Jun 26 08:03:48 PM PDT 24 |
Jun 26 08:14:51 PM PDT 24 |
7830313353 ps |
| T1259 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.2020016358 |
|
|
Jun 26 08:09:53 PM PDT 24 |
Jun 26 08:18:08 PM PDT 24 |
3265154992 ps |
| T1260 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.2849131210 |
|
|
Jun 26 08:19:10 PM PDT 24 |
Jun 26 08:25:24 PM PDT 24 |
2922223800 ps |
| T13 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.3251649124 |
|
|
Jun 26 08:12:11 PM PDT 24 |
Jun 26 08:16:37 PM PDT 24 |
3806124800 ps |
| T1261 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.1344294832 |
|
|
Jun 26 07:58:05 PM PDT 24 |
Jun 26 08:11:27 PM PDT 24 |
3883712614 ps |
| T771 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.1835462466 |
|
|
Jun 26 08:27:24 PM PDT 24 |
Jun 26 08:33:18 PM PDT 24 |
3878041280 ps |
| T1262 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2429514037 |
|
|
Jun 26 08:00:29 PM PDT 24 |
Jun 26 08:12:52 PM PDT 24 |
10070478532 ps |
| T1263 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.891747821 |
|
|
Jun 26 08:23:37 PM PDT 24 |
Jun 26 08:37:39 PM PDT 24 |
10088862185 ps |
| T1264 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.2145559639 |
|
|
Jun 26 08:27:53 PM PDT 24 |
Jun 26 08:35:01 PM PDT 24 |
4156463260 ps |
| T1265 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.2293316817 |
|
|
Jun 26 08:06:27 PM PDT 24 |
Jun 26 08:11:48 PM PDT 24 |
2677230382 ps |
| T1266 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.2398431152 |
|
|
Jun 26 08:03:02 PM PDT 24 |
Jun 26 08:07:44 PM PDT 24 |
3322717238 ps |
| T1267 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.2013200737 |
|
|
Jun 26 07:59:12 PM PDT 24 |
Jun 26 08:03:59 PM PDT 24 |
2815687692 ps |
| T1268 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2056128906 |
|
|
Jun 26 07:54:31 PM PDT 24 |
Jun 26 08:00:00 PM PDT 24 |
4063315400 ps |
| T201 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.3935827582 |
|
|
Jun 26 08:04:06 PM PDT 24 |
Jun 26 08:32:55 PM PDT 24 |
24360482936 ps |
| T1269 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.2517273894 |
|
|
Jun 26 08:03:37 PM PDT 24 |
Jun 26 08:07:48 PM PDT 24 |
2868497135 ps |
| T1270 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.4290299537 |
|
|
Jun 26 08:21:58 PM PDT 24 |
Jun 26 08:23:42 PM PDT 24 |
1974447718 ps |
| T1271 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.3014329013 |
|
|
Jun 26 08:04:19 PM PDT 24 |
Jun 26 08:27:36 PM PDT 24 |
5059066940 ps |
| T739 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.3725323030 |
|
|
Jun 26 08:27:21 PM PDT 24 |
Jun 26 08:35:07 PM PDT 24 |
4848327640 ps |
| T1272 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.823325030 |
|
|
Jun 26 07:56:44 PM PDT 24 |
Jun 26 08:03:05 PM PDT 24 |
3982524148 ps |
| T1273 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.2170019375 |
|
|
Jun 26 08:06:12 PM PDT 24 |
Jun 26 08:16:27 PM PDT 24 |
5228472072 ps |
| T1274 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.3044235196 |
|
|
Jun 26 08:06:10 PM PDT 24 |
Jun 26 08:33:53 PM PDT 24 |
5987363696 ps |
| T1275 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1642539259 |
|
|
Jun 26 07:55:45 PM PDT 24 |
Jun 26 08:06:33 PM PDT 24 |
7339278426 ps |
| T746 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.3002628548 |
|
|
Jun 26 08:25:59 PM PDT 24 |
Jun 26 08:33:01 PM PDT 24 |
3649844148 ps |
| T154 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.4097391248 |
|
|
Jun 26 08:21:41 PM PDT 24 |
Jun 26 08:30:26 PM PDT 24 |
5064199400 ps |
| T1276 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.4150933637 |
|
|
Jun 26 08:03:08 PM PDT 24 |
Jun 26 08:07:03 PM PDT 24 |
2760966848 ps |
| T1277 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.1429913605 |
|
|
Jun 26 08:18:54 PM PDT 24 |
Jun 26 08:24:40 PM PDT 24 |
2676832680 ps |
| T758 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.2205342798 |
|
|
Jun 26 08:25:31 PM PDT 24 |
Jun 26 08:37:15 PM PDT 24 |
5059412180 ps |
| T1278 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.388466950 |
|
|
Jun 26 08:05:13 PM PDT 24 |
Jun 26 10:00:31 PM PDT 24 |
24567118784 ps |
| T16 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.190231131 |
|
|
Jun 26 08:16:46 PM PDT 24 |
Jun 26 08:49:31 PM PDT 24 |
23364790560 ps |
| T1279 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.4058127814 |
|
|
Jun 26 08:12:56 PM PDT 24 |
Jun 26 08:18:40 PM PDT 24 |
3397154432 ps |
| T723 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.1942811097 |
|
|
Jun 26 08:26:40 PM PDT 24 |
Jun 26 08:38:45 PM PDT 24 |
6470543294 ps |
| T1280 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.4277996535 |
|
|
Jun 26 08:12:03 PM PDT 24 |
Jun 26 08:16:42 PM PDT 24 |
3155889397 ps |
| T1281 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.961094166 |
|
|
Jun 26 07:58:38 PM PDT 24 |
Jun 26 08:07:44 PM PDT 24 |
5727027670 ps |
| T1282 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.1266197000 |
|
|
Jun 26 08:13:14 PM PDT 24 |
Jun 26 08:27:40 PM PDT 24 |
8182188412 ps |
| T716 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2335237278 |
|
|
Jun 26 08:26:13 PM PDT 24 |
Jun 26 08:35:40 PM PDT 24 |
6134376110 ps |
| T1283 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.2389715085 |
|
|
Jun 26 08:21:11 PM PDT 24 |
Jun 26 09:44:18 PM PDT 24 |
22724187400 ps |
| T9 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.862342018 |
|
|
Jun 26 08:16:49 PM PDT 24 |
Jun 26 08:22:37 PM PDT 24 |
4692623856 ps |
| T293 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.128154037 |
|
|
Jun 26 08:23:00 PM PDT 24 |
Jun 26 08:33:33 PM PDT 24 |
8559400953 ps |
| T1284 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.1581855909 |
|
|
Jun 26 07:56:08 PM PDT 24 |
Jun 26 07:58:57 PM PDT 24 |
2908333584 ps |
| T220 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.464128247 |
|
|
Jun 26 08:05:25 PM PDT 24 |
Jun 26 08:26:02 PM PDT 24 |
7714151636 ps |
| T1285 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.363269438 |
|
|
Jun 26 08:13:22 PM PDT 24 |
Jun 26 08:41:13 PM PDT 24 |
8096433218 ps |
| T1286 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.4147162417 |
|
|
Jun 26 08:03:34 PM PDT 24 |
Jun 26 09:10:30 PM PDT 24 |
15006962214 ps |
| T1287 |
/workspace/coverage/default/2.chip_sw_edn_kat.2173971439 |
|
|
Jun 26 08:15:50 PM PDT 24 |
Jun 26 08:26:44 PM PDT 24 |
3331614680 ps |
| T1288 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.2145539305 |
|
|
Jun 26 08:11:32 PM PDT 24 |
Jun 26 08:15:39 PM PDT 24 |
2257684200 ps |
| T418 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.431947695 |
|
|
Jun 26 08:00:00 PM PDT 24 |
Jun 26 08:43:14 PM PDT 24 |
31939393092 ps |
| T1289 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.1351680654 |
|
|
Jun 26 08:29:21 PM PDT 24 |
Jun 26 08:36:16 PM PDT 24 |
3540898768 ps |
| T1290 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.884577295 |
|
|
Jun 26 07:59:05 PM PDT 24 |
Jun 26 08:08:11 PM PDT 24 |
3893233842 ps |
| T1291 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.1942931911 |
|
|
Jun 26 08:32:05 PM PDT 24 |
Jun 26 08:41:15 PM PDT 24 |
5428450860 ps |
| T1292 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.702887638 |
|
|
Jun 26 08:23:18 PM PDT 24 |
Jun 26 08:34:51 PM PDT 24 |
9059694500 ps |
| T772 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.3342382850 |
|
|
Jun 26 08:24:41 PM PDT 24 |
Jun 26 08:31:31 PM PDT 24 |
3971076668 ps |
| T1293 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.3368827396 |
|
|
Jun 26 08:05:46 PM PDT 24 |
Jun 26 08:48:15 PM PDT 24 |
19239380045 ps |
| T1294 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.3824475097 |
|
|
Jun 26 07:59:29 PM PDT 24 |
Jun 26 08:03:29 PM PDT 24 |
3308768724 ps |
| T224 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.3322433333 |
|
|
Jun 26 08:05:09 PM PDT 24 |
Jun 26 09:09:35 PM PDT 24 |
12458676064 ps |
| T1295 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.405032206 |
|
|
Jun 26 08:26:23 PM PDT 24 |
Jun 26 08:33:19 PM PDT 24 |
4452114280 ps |
| T372 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.1896232398 |
|
|
Jun 26 08:08:31 PM PDT 24 |
Jun 26 08:10:47 PM PDT 24 |
2661383480 ps |
| T1296 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.1011936937 |
|
|
Jun 26 07:55:26 PM PDT 24 |
Jun 26 08:00:01 PM PDT 24 |
3422216488 ps |
| T287 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.951532670 |
|
|
Jun 26 07:58:28 PM PDT 24 |
Jun 26 08:02:55 PM PDT 24 |
2980098300 ps |
| T1297 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.4081251372 |
|
|
Jun 26 07:57:39 PM PDT 24 |
Jun 26 08:05:50 PM PDT 24 |
5195965430 ps |
| T147 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.3914098219 |
|
|
Jun 26 08:01:48 PM PDT 24 |
Jun 26 08:03:44 PM PDT 24 |
2352894373 ps |
| T288 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.2671991632 |
|
|
Jun 26 08:09:19 PM PDT 24 |
Jun 26 08:14:44 PM PDT 24 |
2728005364 ps |
| T89 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.636233418 |
|
|
Jun 26 08:29:19 PM PDT 24 |
Jun 26 08:40:39 PM PDT 24 |
5523869592 ps |
| T90 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1504736617 |
|
|
Jun 26 08:17:11 PM PDT 24 |
Jun 26 08:41:28 PM PDT 24 |
20848123628 ps |
| T91 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.507035823 |
|
|
Jun 26 08:20:04 PM PDT 24 |
Jun 26 08:31:12 PM PDT 24 |
7360803394 ps |
| T92 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.130864901 |
|
|
Jun 26 07:57:32 PM PDT 24 |
Jun 26 08:07:28 PM PDT 24 |
5346326150 ps |
| T46 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.3805935822 |
|
|
Jun 26 08:13:55 PM PDT 24 |
Jun 26 08:17:31 PM PDT 24 |
2845427342 ps |
| T93 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.4249557041 |
|
|
Jun 26 08:16:03 PM PDT 24 |
Jun 26 08:21:35 PM PDT 24 |
3581965559 ps |
| T94 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.2247586334 |
|
|
Jun 26 08:21:29 PM PDT 24 |
Jun 26 08:39:45 PM PDT 24 |
13847034294 ps |
| T95 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.3865188739 |
|
|
Jun 26 08:25:10 PM PDT 24 |
Jun 26 08:30:44 PM PDT 24 |
4544551868 ps |
| T47 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.659335273 |
|
|
Jun 26 07:53:24 PM PDT 24 |
Jun 26 07:58:20 PM PDT 24 |
2880312600 ps |
| T96 |
/workspace/coverage/default/2.chip_sw_aes_enc.679823029 |
|
|
Jun 26 08:15:13 PM PDT 24 |
Jun 26 08:21:00 PM PDT 24 |
3040319154 ps |
| T1298 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.2091234041 |
|
|
Jun 26 08:03:20 PM PDT 24 |
Jun 26 08:13:56 PM PDT 24 |
5655522440 ps |
| T1299 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.1333124146 |
|
|
Jun 26 08:20:59 PM PDT 24 |
Jun 26 08:28:01 PM PDT 24 |
6590235192 ps |
| T62 |
/workspace/coverage/default/2.chip_sw_alert_test.2811894469 |
|
|
Jun 26 08:15:39 PM PDT 24 |
Jun 26 08:21:33 PM PDT 24 |
3172790820 ps |
| T1300 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.2207719653 |
|
|
Jun 26 07:57:05 PM PDT 24 |
Jun 26 08:05:04 PM PDT 24 |
4744159232 ps |
| T139 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.1993502328 |
|
|
Jun 26 08:11:02 PM PDT 24 |
Jun 26 11:05:54 PM PDT 24 |
59797259452 ps |
| T1301 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.238579766 |
|
|
Jun 26 07:58:55 PM PDT 24 |
Jun 26 08:09:23 PM PDT 24 |
3835122616 ps |
| T721 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.68123866 |
|
|
Jun 26 08:29:15 PM PDT 24 |
Jun 26 08:36:37 PM PDT 24 |
3363048790 ps |
| T1302 |
/workspace/coverage/default/2.chip_sw_power_idle_load.3415501346 |
|
|
Jun 26 08:20:34 PM PDT 24 |
Jun 26 08:29:40 PM PDT 24 |
4399182936 ps |
| T1303 |
/workspace/coverage/default/1.chip_sw_example_flash.2906653440 |
|
|
Jun 26 07:57:56 PM PDT 24 |
Jun 26 08:01:41 PM PDT 24 |
2421653000 ps |
| T1304 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.2903140631 |
|
|
Jun 26 08:06:14 PM PDT 24 |
Jun 26 08:11:28 PM PDT 24 |
2534386568 ps |
| T187 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.3167491960 |
|
|
Jun 26 08:00:39 PM PDT 24 |
Jun 26 08:09:44 PM PDT 24 |
5576948691 ps |
| T1305 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.1819664139 |
|
|
Jun 26 07:53:52 PM PDT 24 |
Jun 26 08:27:06 PM PDT 24 |
7699603680 ps |
| T1306 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.2652889416 |
|
|
Jun 26 07:55:05 PM PDT 24 |
Jun 26 08:24:29 PM PDT 24 |
10886519191 ps |
| T782 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.3121790930 |
|
|
Jun 26 08:26:24 PM PDT 24 |
Jun 26 08:37:44 PM PDT 24 |
6480569072 ps |
| T1307 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1183856919 |
|
|
Jun 26 08:03:21 PM PDT 24 |
Jun 26 11:21:08 PM PDT 24 |
254273844872 ps |
| T1308 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.1535690172 |
|
|
Jun 26 07:55:52 PM PDT 24 |
Jun 26 08:05:43 PM PDT 24 |
3854552344 ps |
| T1309 |
/workspace/coverage/default/2.chip_sw_example_flash.305738409 |
|
|
Jun 26 08:09:58 PM PDT 24 |
Jun 26 08:14:01 PM PDT 24 |
2752647830 ps |
| T1310 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.775235145 |
|
|
Jun 26 08:15:03 PM PDT 24 |
Jun 26 08:39:23 PM PDT 24 |
7241018298 ps |
| T1311 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.4171202261 |
|
|
Jun 26 08:05:42 PM PDT 24 |
Jun 26 09:14:32 PM PDT 24 |
15842799160 ps |
| T1312 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.212507499 |
|
|
Jun 26 08:00:00 PM PDT 24 |
Jun 26 11:41:28 PM PDT 24 |
77923408481 ps |
| T1313 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.3949294131 |
|
|
Jun 26 08:09:42 PM PDT 24 |
Jun 26 08:12:51 PM PDT 24 |
3224418640 ps |
| T787 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.3578075370 |
|
|
Jun 26 08:23:34 PM PDT 24 |
Jun 26 08:34:06 PM PDT 24 |
5394224700 ps |
| T1314 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2747716782 |
|
|
Jun 26 08:00:25 PM PDT 24 |
Jun 26 08:09:59 PM PDT 24 |
4026781832 ps |
| T1315 |
/workspace/coverage/default/2.chip_sw_kmac_idle.557347395 |
|
|
Jun 26 08:17:04 PM PDT 24 |
Jun 26 08:21:47 PM PDT 24 |
2633259352 ps |
| T1316 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.213889690 |
|
|
Jun 26 08:15:32 PM PDT 24 |
Jun 26 08:34:07 PM PDT 24 |
5949722034 ps |
| T319 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.4220495623 |
|
|
Jun 26 08:00:39 PM PDT 24 |
Jun 26 08:13:35 PM PDT 24 |
5270821202 ps |
| T1317 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.2755104907 |
|
|
Jun 26 07:54:48 PM PDT 24 |
Jun 26 08:18:28 PM PDT 24 |
13064782413 ps |
| T1318 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.3799755545 |
|
|
Jun 26 07:59:34 PM PDT 24 |
Jun 26 08:09:09 PM PDT 24 |
4356310898 ps |
| T1319 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.1135642877 |
|
|
Jun 26 08:12:15 PM PDT 24 |
Jun 26 08:30:30 PM PDT 24 |
8463033793 ps |
| T767 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.1790151951 |
|
|
Jun 26 08:25:27 PM PDT 24 |
Jun 26 08:32:21 PM PDT 24 |
3441926678 ps |
| T1320 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.4248870372 |
|
|
Jun 26 08:21:52 PM PDT 24 |
Jun 26 08:28:28 PM PDT 24 |
5147629981 ps |
| T1321 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.4151391096 |
|
|
Jun 26 08:23:32 PM PDT 24 |
Jun 26 08:43:15 PM PDT 24 |
7800363290 ps |
| T1322 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.2801935760 |
|
|
Jun 26 08:00:40 PM PDT 24 |
Jun 26 08:18:15 PM PDT 24 |
7414126168 ps |
| T1323 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.3377758077 |
|
|
Jun 26 08:11:20 PM PDT 24 |
Jun 26 08:32:14 PM PDT 24 |
5929332326 ps |
| T1324 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2288133106 |
|
|
Jun 26 08:11:58 PM PDT 24 |
Jun 26 08:22:00 PM PDT 24 |
4338862828 ps |
| T1325 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.1486286994 |
|
|
Jun 26 08:14:55 PM PDT 24 |
Jun 26 08:20:08 PM PDT 24 |
3411065928 ps |
| T1326 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.1528013547 |
|
|
Jun 26 07:56:31 PM PDT 24 |
Jun 26 08:02:03 PM PDT 24 |
3194366894 ps |
| T779 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.588700798 |
|
|
Jun 26 08:26:06 PM PDT 24 |
Jun 26 08:35:14 PM PDT 24 |
4604831118 ps |
| T295 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.4215618714 |
|
|
Jun 26 07:58:37 PM PDT 24 |
Jun 26 08:08:34 PM PDT 24 |
4126703840 ps |
| T730 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.4254369398 |
|
|
Jun 26 08:25:48 PM PDT 24 |
Jun 26 08:34:46 PM PDT 24 |
5348456450 ps |
| T1327 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.2640769885 |
|
|
Jun 26 07:54:11 PM PDT 24 |
Jun 26 08:12:26 PM PDT 24 |
5467524858 ps |
| T1328 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.4254669752 |
|
|
Jun 26 08:13:56 PM PDT 24 |
Jun 26 08:20:30 PM PDT 24 |
3690774192 ps |
| T1329 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.2878534834 |
|
|
Jun 26 08:18:48 PM PDT 24 |
Jun 26 08:23:59 PM PDT 24 |
3196433312 ps |
| T1330 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.1625472311 |
|
|
Jun 26 08:24:06 PM PDT 24 |
Jun 26 08:27:16 PM PDT 24 |
2261472140 ps |
| T322 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.534670613 |
|
|
Jun 26 08:16:11 PM PDT 24 |
Jun 26 08:33:36 PM PDT 24 |
5970747640 ps |
| T1331 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.1932142892 |
|
|
Jun 26 08:03:35 PM PDT 24 |
Jun 26 09:04:54 PM PDT 24 |
14701906394 ps |
| T1332 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.3240945617 |
|
|
Jun 26 08:00:21 PM PDT 24 |
Jun 26 08:04:23 PM PDT 24 |
3135794328 ps |
| T1333 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.3887258400 |
|
|
Jun 26 08:14:10 PM PDT 24 |
Jun 26 08:44:53 PM PDT 24 |
8810353784 ps |
| T1334 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.2657006560 |
|
|
Jun 26 08:22:30 PM PDT 24 |
Jun 26 09:26:18 PM PDT 24 |
16137909583 ps |
| T348 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.1948002981 |
|
|
Jun 26 07:54:51 PM PDT 24 |
Jun 26 08:04:46 PM PDT 24 |
4345309204 ps |
| T74 |
/workspace/coverage/cover_reg_top/40.xbar_error_random.1147980431 |
|
|
Jun 26 07:35:10 PM PDT 24 |
Jun 26 07:36:24 PM PDT 24 |
1909700973 ps |
| T75 |
/workspace/coverage/cover_reg_top/27.xbar_access_same_device_slow_rsp.1382479626 |
|
|
Jun 26 07:32:08 PM PDT 24 |
Jun 26 08:02:54 PM PDT 24 |
115471892131 ps |
| T76 |
/workspace/coverage/cover_reg_top/60.xbar_error_and_unmapped_addr.4181438139 |
|
|
Jun 26 07:39:12 PM PDT 24 |
Jun 26 07:39:25 PM PDT 24 |
70860053 ps |
| T78 |
/workspace/coverage/cover_reg_top/28.xbar_smoke_large_delays.2465476823 |
|
|
Jun 26 07:32:25 PM PDT 24 |
Jun 26 07:33:28 PM PDT 24 |
5615721700 ps |
| T79 |
/workspace/coverage/cover_reg_top/80.xbar_random_zero_delays.444894610 |
|
|
Jun 26 07:42:51 PM PDT 24 |
Jun 26 07:43:04 PM PDT 24 |
85033893 ps |
| T502 |
/workspace/coverage/cover_reg_top/51.xbar_access_same_device_slow_rsp.36185280 |
|
|
Jun 26 07:37:14 PM PDT 24 |
Jun 26 08:17:23 PM PDT 24 |
133909780963 ps |
| T80 |
/workspace/coverage/cover_reg_top/95.xbar_stress_all.2922669822 |
|
|
Jun 26 07:45:41 PM PDT 24 |
Jun 26 07:49:51 PM PDT 24 |
2937714872 ps |
| T424 |
/workspace/coverage/cover_reg_top/86.xbar_smoke_zero_delays.1054494038 |
|
|
Jun 26 07:43:56 PM PDT 24 |
Jun 26 07:44:03 PM PDT 24 |
46267937 ps |
| T244 |
/workspace/coverage/cover_reg_top/76.xbar_stress_all_with_reset_error.2216676143 |
|
|
Jun 26 07:41:54 PM PDT 24 |
Jun 26 07:42:11 PM PDT 24 |
40732306 ps |
| T514 |
/workspace/coverage/cover_reg_top/87.xbar_smoke.529033715 |
|
|
Jun 26 07:44:09 PM PDT 24 |
Jun 26 07:44:19 PM PDT 24 |
226178272 ps |
| T508 |
/workspace/coverage/cover_reg_top/55.xbar_random_large_delays.40626908 |
|
|
Jun 26 07:38:02 PM PDT 24 |
Jun 26 07:54:59 PM PDT 24 |
85467148072 ps |
| T497 |
/workspace/coverage/cover_reg_top/60.xbar_smoke.3598912805 |
|
|
Jun 26 07:38:44 PM PDT 24 |
Jun 26 07:38:51 PM PDT 24 |
41929868 ps |
| T513 |
/workspace/coverage/cover_reg_top/87.xbar_smoke_zero_delays.1687191806 |
|
|
Jun 26 07:44:09 PM PDT 24 |
Jun 26 07:44:17 PM PDT 24 |
53261370 ps |
| T515 |
/workspace/coverage/cover_reg_top/77.xbar_unmapped_addr.4259079499 |
|
|
Jun 26 07:42:12 PM PDT 24 |
Jun 26 07:42:22 PM PDT 24 |
49883543 ps |
| T504 |
/workspace/coverage/cover_reg_top/95.xbar_smoke.3194136038 |
|
|
Jun 26 07:45:40 PM PDT 24 |
Jun 26 07:45:51 PM PDT 24 |
182827759 ps |
| T507 |
/workspace/coverage/cover_reg_top/25.xbar_stress_all_with_error.2307525582 |
|
|
Jun 26 07:31:53 PM PDT 24 |
Jun 26 07:33:00 PM PDT 24 |
690529486 ps |
| T509 |
/workspace/coverage/cover_reg_top/16.xbar_stress_all_with_reset_error.2484837269 |
|
|
Jun 26 07:29:43 PM PDT 24 |
Jun 26 07:30:42 PM PDT 24 |
195524950 ps |
| T512 |
/workspace/coverage/cover_reg_top/46.xbar_random_zero_delays.704848801 |
|
|
Jun 26 07:35:57 PM PDT 24 |
Jun 26 07:36:12 PM PDT 24 |
121872045 ps |
| T511 |
/workspace/coverage/cover_reg_top/26.xbar_smoke.3821357402 |
|
|
Jun 26 07:31:54 PM PDT 24 |
Jun 26 07:32:02 PM PDT 24 |
53991069 ps |
| T715 |
/workspace/coverage/cover_reg_top/68.xbar_access_same_device_slow_rsp.962729824 |
|
|
Jun 26 07:40:29 PM PDT 24 |
Jun 26 07:58:04 PM PDT 24 |
56111552091 ps |
| T503 |
/workspace/coverage/cover_reg_top/23.chip_tl_errors.3874704903 |
|
|
Jun 26 07:31:13 PM PDT 24 |
Jun 26 07:35:21 PM PDT 24 |
3238140760 ps |
| T131 |
/workspace/coverage/cover_reg_top/11.chip_same_csr_outstanding.2886936390 |
|
|
Jun 26 07:28:41 PM PDT 24 |
Jun 26 08:17:21 PM PDT 24 |
27290178963 ps |
| T665 |
/workspace/coverage/cover_reg_top/93.xbar_access_same_device_slow_rsp.1674917727 |
|
|
Jun 26 07:45:26 PM PDT 24 |
Jun 26 07:55:18 PM PDT 24 |
30907927201 ps |
| T517 |
/workspace/coverage/cover_reg_top/83.xbar_smoke_large_delays.3839400425 |
|
|
Jun 26 07:43:24 PM PDT 24 |
Jun 26 07:45:09 PM PDT 24 |
9358812288 ps |
| T516 |
/workspace/coverage/cover_reg_top/16.xbar_smoke_slow_rsp.1337537645 |
|
|
Jun 26 07:29:44 PM PDT 24 |
Jun 26 07:31:24 PM PDT 24 |
5335778585 ps |
| T405 |
/workspace/coverage/cover_reg_top/63.xbar_stress_all_with_rand_reset.4014672957 |
|
|
Jun 26 07:39:41 PM PDT 24 |
Jun 26 07:48:04 PM PDT 24 |
11392253532 ps |
| T362 |
/workspace/coverage/cover_reg_top/2.chip_csr_rw.2298348126 |
|
|
Jun 26 07:27:17 PM PDT 24 |
Jun 26 07:35:00 PM PDT 24 |
4955539859 ps |