| T698 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.3442438500 |
|
|
Jul 01 01:10:54 PM PDT 24 |
Jul 01 02:20:06 PM PDT 24 |
14835564376 ps |
| T65 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.1078982666 |
|
|
Jul 01 01:20:32 PM PDT 24 |
Jul 01 01:25:45 PM PDT 24 |
3244397800 ps |
| T699 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.3726350741 |
|
|
Jul 01 01:32:51 PM PDT 24 |
Jul 01 02:32:49 PM PDT 24 |
15065567626 ps |
| T484 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.467575272 |
|
|
Jul 01 01:35:11 PM PDT 24 |
Jul 01 01:47:27 PM PDT 24 |
5679496570 ps |
| T700 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.2705794958 |
|
|
Jul 01 01:06:28 PM PDT 24 |
Jul 01 01:11:20 PM PDT 24 |
3270846908 ps |
| T372 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.3436540366 |
|
|
Jul 01 01:04:41 PM PDT 24 |
Jul 01 01:10:03 PM PDT 24 |
2275914532 ps |
| T383 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.1434770794 |
|
|
Jul 01 01:11:09 PM PDT 24 |
Jul 01 01:17:55 PM PDT 24 |
4061265582 ps |
| T495 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.3940602000 |
|
|
Jul 01 01:39:58 PM PDT 24 |
Jul 01 01:49:28 PM PDT 24 |
4828009752 ps |
| T701 |
/workspace/coverage/default/1.rom_e2e_smoke.3671659249 |
|
|
Jul 01 01:23:10 PM PDT 24 |
Jul 01 02:24:52 PM PDT 24 |
15096298068 ps |
| T702 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.1562385497 |
|
|
Jul 01 01:12:34 PM PDT 24 |
Jul 01 03:12:46 PM PDT 24 |
24764320160 ps |
| T703 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.4207225853 |
|
|
Jul 01 01:28:00 PM PDT 24 |
Jul 01 01:31:15 PM PDT 24 |
3237815470 ps |
| T393 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.4163683175 |
|
|
Jul 01 01:03:31 PM PDT 24 |
Jul 01 01:09:13 PM PDT 24 |
3851822456 ps |
| T471 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.2000862112 |
|
|
Jul 01 01:40:30 PM PDT 24 |
Jul 01 01:51:33 PM PDT 24 |
5368831258 ps |
| T27 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.3112115189 |
|
|
Jul 01 01:05:36 PM PDT 24 |
Jul 01 01:59:29 PM PDT 24 |
24044900475 ps |
| T209 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.1789164376 |
|
|
Jul 01 01:34:01 PM PDT 24 |
Jul 01 01:43:21 PM PDT 24 |
5186265212 ps |
| T704 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.2593711010 |
|
|
Jul 01 01:07:38 PM PDT 24 |
Jul 01 01:12:33 PM PDT 24 |
3422703576 ps |
| T118 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.3699627900 |
|
|
Jul 01 01:26:43 PM PDT 24 |
Jul 01 01:41:01 PM PDT 24 |
9126414977 ps |
| T705 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.3591636207 |
|
|
Jul 01 01:11:10 PM PDT 24 |
Jul 01 02:01:46 PM PDT 24 |
11170547312 ps |
| T371 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.1271576721 |
|
|
Jul 01 01:36:57 PM PDT 24 |
Jul 01 01:50:35 PM PDT 24 |
6312385032 ps |
| T706 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.510366 |
|
|
Jul 01 01:16:52 PM PDT 24 |
Jul 01 01:51:27 PM PDT 24 |
23200407258 ps |
| T707 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.4032797282 |
|
|
Jul 01 01:21:58 PM PDT 24 |
Jul 01 01:31:58 PM PDT 24 |
4223059172 ps |
| T708 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.2002628907 |
|
|
Jul 01 01:08:42 PM PDT 24 |
Jul 01 01:14:46 PM PDT 24 |
3444499890 ps |
| T709 |
/workspace/coverage/default/1.chip_sw_example_flash.1366817708 |
|
|
Jul 01 01:07:19 PM PDT 24 |
Jul 01 01:10:18 PM PDT 24 |
2738526890 ps |
| T710 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1662078849 |
|
|
Jul 01 01:16:39 PM PDT 24 |
Jul 01 01:26:40 PM PDT 24 |
3877886752 ps |
| T711 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.1497918924 |
|
|
Jul 01 01:16:59 PM PDT 24 |
Jul 01 01:30:36 PM PDT 24 |
6892743542 ps |
| T712 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.3281408598 |
|
|
Jul 01 01:02:58 PM PDT 24 |
Jul 01 01:20:10 PM PDT 24 |
5850257818 ps |
| T713 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.3976759375 |
|
|
Jul 01 01:34:45 PM PDT 24 |
Jul 01 02:40:41 PM PDT 24 |
15117816672 ps |
| T714 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.2888177454 |
|
|
Jul 01 01:37:33 PM PDT 24 |
Jul 01 01:48:19 PM PDT 24 |
4099158184 ps |
| T715 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.3563069775 |
|
|
Jul 01 01:04:27 PM PDT 24 |
Jul 01 01:18:14 PM PDT 24 |
6311840347 ps |
| T506 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.1300396046 |
|
|
Jul 01 01:34:21 PM PDT 24 |
Jul 01 01:42:04 PM PDT 24 |
3451975448 ps |
| T330 |
/workspace/coverage/default/1.chip_sw_power_idle_load.3366498957 |
|
|
Jul 01 01:18:51 PM PDT 24 |
Jul 01 01:33:53 PM PDT 24 |
4936425284 ps |
| T542 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.703455241 |
|
|
Jul 01 01:38:54 PM PDT 24 |
Jul 01 01:45:30 PM PDT 24 |
3351180636 ps |
| T716 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.3851672763 |
|
|
Jul 01 01:30:31 PM PDT 24 |
Jul 01 01:32:56 PM PDT 24 |
2827384621 ps |
| T717 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.1473299578 |
|
|
Jul 01 01:19:58 PM PDT 24 |
Jul 01 01:30:23 PM PDT 24 |
6679710640 ps |
| T718 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.1005254856 |
|
|
Jul 01 01:05:24 PM PDT 24 |
Jul 01 01:26:20 PM PDT 24 |
10597114934 ps |
| T391 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.1131006783 |
|
|
Jul 01 01:33:42 PM PDT 24 |
Jul 01 01:40:24 PM PDT 24 |
3373159976 ps |
| T55 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.2448902223 |
|
|
Jul 01 01:04:27 PM PDT 24 |
Jul 01 01:56:32 PM PDT 24 |
12111721820 ps |
| T719 |
/workspace/coverage/default/2.rom_e2e_smoke.545872007 |
|
|
Jul 01 01:32:43 PM PDT 24 |
Jul 01 02:39:34 PM PDT 24 |
14940231580 ps |
| T720 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.1947272334 |
|
|
Jul 01 01:10:47 PM PDT 24 |
Jul 01 02:32:05 PM PDT 24 |
15753091276 ps |
| T721 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2708054863 |
|
|
Jul 01 01:22:44 PM PDT 24 |
Jul 01 01:45:01 PM PDT 24 |
9890599446 ps |
| T387 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.1793474971 |
|
|
Jul 01 01:35:47 PM PDT 24 |
Jul 01 01:50:01 PM PDT 24 |
5724834930 ps |
| T722 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1002515693 |
|
|
Jul 01 01:26:23 PM PDT 24 |
Jul 01 01:38:48 PM PDT 24 |
3920515160 ps |
| T723 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.848568735 |
|
|
Jul 01 01:18:52 PM PDT 24 |
Jul 01 01:27:49 PM PDT 24 |
5621721270 ps |
| T724 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.1264094255 |
|
|
Jul 01 01:06:41 PM PDT 24 |
Jul 01 01:26:43 PM PDT 24 |
6411911018 ps |
| T365 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.14353492 |
|
|
Jul 01 01:21:29 PM PDT 24 |
Jul 01 01:32:28 PM PDT 24 |
4290148700 ps |
| T725 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.1256155587 |
|
|
Jul 01 01:20:41 PM PDT 24 |
Jul 01 01:24:45 PM PDT 24 |
2724380502 ps |
| T726 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1181978619 |
|
|
Jul 01 01:19:45 PM PDT 24 |
Jul 01 01:24:50 PM PDT 24 |
3067905984 ps |
| T252 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.1965279149 |
|
|
Jul 01 01:04:31 PM PDT 24 |
Jul 01 01:19:56 PM PDT 24 |
7384346066 ps |
| T158 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.1899700531 |
|
|
Jul 01 01:15:30 PM PDT 24 |
Jul 01 01:26:14 PM PDT 24 |
3647340960 ps |
| T727 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.2121368813 |
|
|
Jul 01 01:30:19 PM PDT 24 |
Jul 01 01:33:33 PM PDT 24 |
2636546610 ps |
| T14 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.1577381230 |
|
|
Jul 01 01:19:55 PM PDT 24 |
Jul 01 01:23:52 PM PDT 24 |
2608201272 ps |
| T438 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1344282521 |
|
|
Jul 01 01:21:44 PM PDT 24 |
Jul 01 02:08:35 PM PDT 24 |
32767492009 ps |
| T439 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.3930371081 |
|
|
Jul 01 01:34:51 PM PDT 24 |
Jul 01 01:43:06 PM PDT 24 |
3766870040 ps |
| T440 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.648905213 |
|
|
Jul 01 01:23:36 PM PDT 24 |
Jul 01 01:33:09 PM PDT 24 |
3502902360 ps |
| T127 |
/workspace/coverage/default/4.chip_tap_straps_rma.1120221425 |
|
|
Jul 01 01:30:31 PM PDT 24 |
Jul 01 01:44:12 PM PDT 24 |
8003029074 ps |
| T441 |
/workspace/coverage/default/2.chip_sw_rv_timer_smoketest.2430221557 |
|
|
Jul 01 01:30:46 PM PDT 24 |
Jul 01 01:34:48 PM PDT 24 |
2953948632 ps |
| T442 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1331758811 |
|
|
Jul 01 01:08:57 PM PDT 24 |
Jul 01 01:17:22 PM PDT 24 |
4599032580 ps |
| T443 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.1570896316 |
|
|
Jul 01 01:10:52 PM PDT 24 |
Jul 01 01:19:20 PM PDT 24 |
5050258836 ps |
| T315 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.2311422235 |
|
|
Jul 01 01:10:08 PM PDT 24 |
Jul 01 02:24:03 PM PDT 24 |
20855462522 ps |
| T243 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.2335553848 |
|
|
Jul 01 01:05:06 PM PDT 24 |
Jul 01 01:30:33 PM PDT 24 |
6748581320 ps |
| T728 |
/workspace/coverage/default/0.chip_sw_aes_entropy.1583076967 |
|
|
Jul 01 01:07:03 PM PDT 24 |
Jul 01 01:11:35 PM PDT 24 |
3208478980 ps |
| T269 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.1710971021 |
|
|
Jul 01 01:39:44 PM PDT 24 |
Jul 01 01:45:41 PM PDT 24 |
3089846266 ps |
| T729 |
/workspace/coverage/default/2.chip_sw_aes_entropy.4275677864 |
|
|
Jul 01 01:27:23 PM PDT 24 |
Jul 01 01:31:57 PM PDT 24 |
2886908000 ps |
| T329 |
/workspace/coverage/default/0.chip_sw_flash_init.394762798 |
|
|
Jul 01 01:08:32 PM PDT 24 |
Jul 01 01:43:35 PM PDT 24 |
19705122368 ps |
| T730 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.3409760847 |
|
|
Jul 01 01:05:10 PM PDT 24 |
Jul 01 01:09:06 PM PDT 24 |
2959147560 ps |
| T731 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.2491623304 |
|
|
Jul 01 01:10:26 PM PDT 24 |
Jul 01 01:46:52 PM PDT 24 |
10267006188 ps |
| T732 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.2473551186 |
|
|
Jul 01 01:24:34 PM PDT 24 |
Jul 01 01:28:56 PM PDT 24 |
3047554810 ps |
| T733 |
/workspace/coverage/default/1.chip_tap_straps_dev.543757195 |
|
|
Jul 01 01:17:46 PM PDT 24 |
Jul 01 01:21:18 PM PDT 24 |
3113694436 ps |
| T41 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.2173217376 |
|
|
Jul 01 01:10:57 PM PDT 24 |
Jul 01 01:15:02 PM PDT 24 |
2196820194 ps |
| T734 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.1470058406 |
|
|
Jul 01 01:14:09 PM PDT 24 |
Jul 01 02:22:36 PM PDT 24 |
14882286173 ps |
| T735 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.1901957961 |
|
|
Jul 01 01:12:49 PM PDT 24 |
Jul 01 03:17:30 PM PDT 24 |
24495460430 ps |
| T71 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.981860147 |
|
|
Jul 01 01:20:49 PM PDT 24 |
Jul 01 01:27:20 PM PDT 24 |
3303498988 ps |
| T236 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.1719204663 |
|
|
Jul 01 01:11:31 PM PDT 24 |
Jul 01 01:25:18 PM PDT 24 |
4564886528 ps |
| T537 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.3809697909 |
|
|
Jul 01 01:37:13 PM PDT 24 |
Jul 01 01:43:30 PM PDT 24 |
4130896492 ps |
| T736 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.3173371036 |
|
|
Jul 01 01:10:47 PM PDT 24 |
Jul 01 01:17:31 PM PDT 24 |
4398044440 ps |
| T418 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.3552556220 |
|
|
Jul 01 01:24:26 PM PDT 24 |
Jul 01 01:32:08 PM PDT 24 |
4219642654 ps |
| T737 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.4242211849 |
|
|
Jul 01 01:06:14 PM PDT 24 |
Jul 01 02:23:06 PM PDT 24 |
24063117024 ps |
| T738 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.3747711950 |
|
|
Jul 01 01:31:13 PM PDT 24 |
Jul 01 01:37:17 PM PDT 24 |
3558372600 ps |
| T739 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.2913616139 |
|
|
Jul 01 01:13:58 PM PDT 24 |
Jul 01 01:18:28 PM PDT 24 |
2678718688 ps |
| T740 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.3934130464 |
|
|
Jul 01 01:04:25 PM PDT 24 |
Jul 01 01:11:06 PM PDT 24 |
3488057770 ps |
| T292 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2866356711 |
|
|
Jul 01 01:04:45 PM PDT 24 |
Jul 01 01:15:34 PM PDT 24 |
4542387357 ps |
| T741 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.340938726 |
|
|
Jul 01 01:41:09 PM PDT 24 |
Jul 01 01:52:36 PM PDT 24 |
4750865282 ps |
| T742 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.3864867830 |
|
|
Jul 01 01:05:05 PM PDT 24 |
Jul 01 01:36:26 PM PDT 24 |
30722537410 ps |
| T743 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.52989615 |
|
|
Jul 01 01:34:19 PM PDT 24 |
Jul 01 01:48:48 PM PDT 24 |
11660140104 ps |
| T744 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.2210483249 |
|
|
Jul 01 01:04:30 PM PDT 24 |
Jul 01 01:16:10 PM PDT 24 |
4526335804 ps |
| T745 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.744066012 |
|
|
Jul 01 01:32:51 PM PDT 24 |
Jul 01 02:09:40 PM PDT 24 |
12490480536 ps |
| T133 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.1417507422 |
|
|
Jul 01 01:36:49 PM PDT 24 |
Jul 01 01:43:54 PM PDT 24 |
4251062400 ps |
| T136 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.3394103377 |
|
|
Jul 01 01:10:57 PM PDT 24 |
Jul 01 01:14:42 PM PDT 24 |
3077165667 ps |
| T59 |
/workspace/coverage/default/0.chip_sw_gpio.2475921265 |
|
|
Jul 01 01:03:38 PM PDT 24 |
Jul 01 01:09:48 PM PDT 24 |
3704659230 ps |
| T137 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.3342124998 |
|
|
Jul 01 01:20:15 PM PDT 24 |
Jul 01 01:26:18 PM PDT 24 |
3165225166 ps |
| T138 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.1841570407 |
|
|
Jul 01 01:20:59 PM PDT 24 |
Jul 01 01:33:27 PM PDT 24 |
5051373450 ps |
| T139 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.3201453173 |
|
|
Jul 01 01:06:27 PM PDT 24 |
Jul 01 01:15:13 PM PDT 24 |
6720436600 ps |
| T126 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.2920343180 |
|
|
Jul 01 01:27:48 PM PDT 24 |
Jul 01 01:35:11 PM PDT 24 |
7164717164 ps |
| T116 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.3310773261 |
|
|
Jul 01 01:31:29 PM PDT 24 |
Jul 01 01:38:35 PM PDT 24 |
5157943767 ps |
| T140 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.3119983481 |
|
|
Jul 01 01:41:04 PM PDT 24 |
Jul 01 01:47:56 PM PDT 24 |
3576671856 ps |
| T141 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.3958676763 |
|
|
Jul 01 01:26:22 PM PDT 24 |
Jul 01 02:21:19 PM PDT 24 |
18671475169 ps |
| T746 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.3112806559 |
|
|
Jul 01 01:11:23 PM PDT 24 |
Jul 01 01:35:27 PM PDT 24 |
9252537096 ps |
| T257 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.3604746944 |
|
|
Jul 01 01:21:46 PM PDT 24 |
Jul 01 01:28:57 PM PDT 24 |
3414904570 ps |
| T524 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.621073250 |
|
|
Jul 01 01:39:09 PM PDT 24 |
Jul 01 01:53:29 PM PDT 24 |
6356468344 ps |
| T747 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.2078136486 |
|
|
Jul 01 01:09:28 PM PDT 24 |
Jul 01 02:17:59 PM PDT 24 |
25341786084 ps |
| T115 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.22657233 |
|
|
Jul 01 01:16:11 PM PDT 24 |
Jul 01 01:30:45 PM PDT 24 |
9017401232 ps |
| T310 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.4009591565 |
|
|
Jul 01 01:14:45 PM PDT 24 |
Jul 01 01:29:54 PM PDT 24 |
9260413746 ps |
| T208 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.1589654194 |
|
|
Jul 01 01:20:57 PM PDT 24 |
Jul 01 01:22:59 PM PDT 24 |
1934707669 ps |
| T748 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2745696376 |
|
|
Jul 01 01:09:05 PM PDT 24 |
Jul 01 02:05:34 PM PDT 24 |
11736209288 ps |
| T749 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.1152838844 |
|
|
Jul 01 01:14:42 PM PDT 24 |
Jul 01 01:21:45 PM PDT 24 |
5338873130 ps |
| T522 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.1207809559 |
|
|
Jul 01 01:43:22 PM PDT 24 |
Jul 01 01:55:09 PM PDT 24 |
5290032460 ps |
| T750 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.232044972 |
|
|
Jul 01 01:14:56 PM PDT 24 |
Jul 01 02:18:12 PM PDT 24 |
16779422900 ps |
| T751 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.3852982202 |
|
|
Jul 01 01:10:35 PM PDT 24 |
Jul 01 01:15:04 PM PDT 24 |
2631063144 ps |
| T465 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.3979058466 |
|
|
Jul 01 01:36:24 PM PDT 24 |
Jul 01 01:45:45 PM PDT 24 |
4616667150 ps |
| T15 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.3673324810 |
|
|
Jul 01 01:18:54 PM PDT 24 |
Jul 01 01:39:08 PM PDT 24 |
21853260060 ps |
| T752 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.3291588318 |
|
|
Jul 01 01:36:06 PM PDT 24 |
Jul 01 01:44:46 PM PDT 24 |
3470246520 ps |
| T753 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.2807787816 |
|
|
Jul 01 01:33:32 PM PDT 24 |
Jul 01 01:45:42 PM PDT 24 |
7314827853 ps |
| T754 |
/workspace/coverage/default/0.chip_sival_flash_info_access.244912419 |
|
|
Jul 01 01:05:33 PM PDT 24 |
Jul 01 01:11:16 PM PDT 24 |
3169508376 ps |
| T755 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.309251830 |
|
|
Jul 01 01:16:49 PM PDT 24 |
Jul 01 01:27:58 PM PDT 24 |
4252860400 ps |
| T142 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3796813129 |
|
|
Jul 01 01:05:21 PM PDT 24 |
Jul 01 01:30:56 PM PDT 24 |
24125339960 ps |
| T756 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.450878612 |
|
|
Jul 01 01:34:40 PM PDT 24 |
Jul 01 01:42:02 PM PDT 24 |
3481158956 ps |
| T539 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.1822780762 |
|
|
Jul 01 01:35:28 PM PDT 24 |
Jul 01 01:41:44 PM PDT 24 |
3061156416 ps |
| T757 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.2436600064 |
|
|
Jul 01 01:27:18 PM PDT 24 |
Jul 01 02:09:34 PM PDT 24 |
12623032994 ps |
| T758 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.1639827805 |
|
|
Jul 01 01:22:05 PM PDT 24 |
Jul 01 01:37:06 PM PDT 24 |
5819572980 ps |
| T156 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.2331209725 |
|
|
Jul 01 01:08:01 PM PDT 24 |
Jul 01 01:17:14 PM PDT 24 |
4651122584 ps |
| T320 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.3236598983 |
|
|
Jul 01 01:05:47 PM PDT 24 |
Jul 01 01:37:26 PM PDT 24 |
8685792344 ps |
| T509 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.1217101715 |
|
|
Jul 01 01:32:58 PM PDT 24 |
Jul 01 01:39:32 PM PDT 24 |
3685298384 ps |
| T759 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.2184443552 |
|
|
Jul 01 01:25:20 PM PDT 24 |
Jul 01 01:33:43 PM PDT 24 |
5980640192 ps |
| T394 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.3717310082 |
|
|
Jul 01 01:06:44 PM PDT 24 |
Jul 01 01:12:23 PM PDT 24 |
4030453692 ps |
| T760 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.1256685848 |
|
|
Jul 01 01:34:29 PM PDT 24 |
Jul 01 02:46:49 PM PDT 24 |
14427956220 ps |
| T254 |
/workspace/coverage/default/1.chip_jtag_mem_access.798757402 |
|
|
Jul 01 01:09:54 PM PDT 24 |
Jul 01 01:37:29 PM PDT 24 |
13057009948 ps |
| T761 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.2981167142 |
|
|
Jul 01 01:16:58 PM PDT 24 |
Jul 01 01:23:04 PM PDT 24 |
2680914152 ps |
| T293 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.3792854648 |
|
|
Jul 01 01:15:06 PM PDT 24 |
Jul 01 01:25:09 PM PDT 24 |
3768280388 ps |
| T321 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.3962443580 |
|
|
Jul 01 01:14:11 PM PDT 24 |
Jul 01 01:45:57 PM PDT 24 |
8499697620 ps |
| T468 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.4201132240 |
|
|
Jul 01 01:36:53 PM PDT 24 |
Jul 01 01:44:24 PM PDT 24 |
4101323032 ps |
| T341 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.1561753077 |
|
|
Jul 01 01:19:53 PM PDT 24 |
Jul 01 01:24:13 PM PDT 24 |
3176744808 ps |
| T762 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.466214725 |
|
|
Jul 01 01:33:03 PM PDT 24 |
Jul 01 01:59:43 PM PDT 24 |
7668016840 ps |
| T763 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.767133123 |
|
|
Jul 01 01:09:42 PM PDT 24 |
Jul 01 01:16:22 PM PDT 24 |
3410581204 ps |
| T366 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.525365552 |
|
|
Jul 01 01:09:05 PM PDT 24 |
Jul 01 01:19:47 PM PDT 24 |
3411331116 ps |
| T764 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3346455030 |
|
|
Jul 01 01:26:20 PM PDT 24 |
Jul 01 01:36:46 PM PDT 24 |
4567646898 ps |
| T765 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.3074914507 |
|
|
Jul 01 01:33:37 PM PDT 24 |
Jul 01 01:42:49 PM PDT 24 |
3955438082 ps |
| T489 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.1742935651 |
|
|
Jul 01 01:38:57 PM PDT 24 |
Jul 01 01:44:11 PM PDT 24 |
3356495886 ps |
| T766 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.1199082908 |
|
|
Jul 01 01:24:35 PM PDT 24 |
Jul 01 01:45:11 PM PDT 24 |
5772172776 ps |
| T767 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.3660336175 |
|
|
Jul 01 01:10:16 PM PDT 24 |
Jul 01 01:22:35 PM PDT 24 |
4184258920 ps |
| T768 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.1574764117 |
|
|
Jul 01 01:32:14 PM PDT 24 |
Jul 01 01:43:55 PM PDT 24 |
4242664080 ps |
| T258 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.1280898883 |
|
|
Jul 01 01:22:27 PM PDT 24 |
Jul 01 01:28:52 PM PDT 24 |
3733351627 ps |
| T769 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.550823622 |
|
|
Jul 01 01:23:40 PM PDT 24 |
Jul 01 02:36:27 PM PDT 24 |
17388873226 ps |
| T770 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.3446329665 |
|
|
Jul 01 01:10:32 PM PDT 24 |
Jul 01 02:02:44 PM PDT 24 |
11975023976 ps |
| T771 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.1654686103 |
|
|
Jul 01 01:04:11 PM PDT 24 |
Jul 01 01:07:38 PM PDT 24 |
3297684612 ps |
| T493 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.582722242 |
|
|
Jul 01 01:32:48 PM PDT 24 |
Jul 01 01:44:51 PM PDT 24 |
5581194100 ps |
| T772 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.1690371432 |
|
|
Jul 01 01:31:24 PM PDT 24 |
Jul 01 01:34:42 PM PDT 24 |
2379445680 ps |
| T773 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2190074283 |
|
|
Jul 01 01:04:56 PM PDT 24 |
Jul 01 01:14:13 PM PDT 24 |
4505246164 ps |
| T34 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.148874625 |
|
|
Jul 01 01:04:16 PM PDT 24 |
Jul 01 01:28:12 PM PDT 24 |
12224408654 ps |
| T774 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.1963053331 |
|
|
Jul 01 01:29:42 PM PDT 24 |
Jul 01 01:37:14 PM PDT 24 |
5968924226 ps |
| T775 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.231794026 |
|
|
Jul 01 01:33:30 PM PDT 24 |
Jul 01 02:29:34 PM PDT 24 |
29026684720 ps |
| T776 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.240305507 |
|
|
Jul 01 01:19:08 PM PDT 24 |
Jul 01 01:23:24 PM PDT 24 |
3226437472 ps |
| T143 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.881911116 |
|
|
Jul 01 01:29:27 PM PDT 24 |
Jul 01 02:00:48 PM PDT 24 |
21320301528 ps |
| T777 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.1678674423 |
|
|
Jul 01 01:16:41 PM PDT 24 |
Jul 01 01:38:13 PM PDT 24 |
11449441850 ps |
| T778 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.1674498528 |
|
|
Jul 01 01:25:28 PM PDT 24 |
Jul 01 01:43:41 PM PDT 24 |
7951332305 ps |
| T22 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1858776804 |
|
|
Jul 01 01:17:34 PM PDT 24 |
Jul 01 01:27:33 PM PDT 24 |
4698115032 ps |
| T779 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.319177974 |
|
|
Jul 01 01:23:20 PM PDT 24 |
Jul 01 02:21:50 PM PDT 24 |
15377106496 ps |
| T780 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.1876836291 |
|
|
Jul 01 01:35:09 PM PDT 24 |
Jul 01 01:44:17 PM PDT 24 |
3585023560 ps |
| T781 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2935401974 |
|
|
Jul 01 01:05:21 PM PDT 24 |
Jul 01 02:03:21 PM PDT 24 |
36788208467 ps |
| T782 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.3775227564 |
|
|
Jul 01 01:34:03 PM PDT 24 |
Jul 01 01:41:39 PM PDT 24 |
3154310312 ps |
| T239 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.2326902293 |
|
|
Jul 01 01:21:10 PM PDT 24 |
Jul 01 01:36:14 PM PDT 24 |
5269073340 ps |
| T783 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.3314836023 |
|
|
Jul 01 01:33:35 PM PDT 24 |
Jul 01 02:52:43 PM PDT 24 |
22602373996 ps |
| T169 |
/workspace/coverage/default/1.chip_jtag_csr_rw.3586128611 |
|
|
Jul 01 01:09:50 PM PDT 24 |
Jul 01 01:35:06 PM PDT 24 |
12343860180 ps |
| T469 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.74936808 |
|
|
Jul 01 01:36:27 PM PDT 24 |
Jul 01 01:46:21 PM PDT 24 |
4950195152 ps |
| T266 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.2018396291 |
|
|
Jul 01 01:39:40 PM PDT 24 |
Jul 01 01:52:10 PM PDT 24 |
5544687060 ps |
| T784 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.4084684736 |
|
|
Jul 01 01:14:25 PM PDT 24 |
Jul 01 01:49:53 PM PDT 24 |
10310852850 ps |
| T785 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.2055801777 |
|
|
Jul 01 01:26:03 PM PDT 24 |
Jul 01 01:52:08 PM PDT 24 |
7564887334 ps |
| T388 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.2179699919 |
|
|
Jul 01 01:20:13 PM PDT 24 |
Jul 01 01:32:41 PM PDT 24 |
4859835520 ps |
| T545 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.1412134023 |
|
|
Jul 01 01:37:20 PM PDT 24 |
Jul 01 01:46:01 PM PDT 24 |
4008214280 ps |
| T786 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1730037617 |
|
|
Jul 01 01:05:36 PM PDT 24 |
Jul 01 01:33:29 PM PDT 24 |
10154075975 ps |
| T327 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.1095921516 |
|
|
Jul 01 01:18:07 PM PDT 24 |
Jul 01 01:53:06 PM PDT 24 |
20444515488 ps |
| T787 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.1142658638 |
|
|
Jul 01 01:19:00 PM PDT 24 |
Jul 01 01:22:18 PM PDT 24 |
2560614880 ps |
| T788 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2343188608 |
|
|
Jul 01 01:11:46 PM PDT 24 |
Jul 01 02:14:55 PM PDT 24 |
39037819560 ps |
| T502 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.2424712715 |
|
|
Jul 01 01:38:30 PM PDT 24 |
Jul 01 01:51:27 PM PDT 24 |
4911405900 ps |
| T789 |
/workspace/coverage/default/2.chip_tap_straps_prod.97048556 |
|
|
Jul 01 01:26:21 PM PDT 24 |
Jul 01 01:57:00 PM PDT 24 |
16908229009 ps |
| T790 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.3093798571 |
|
|
Jul 01 01:08:05 PM PDT 24 |
Jul 01 01:40:38 PM PDT 24 |
8326243628 ps |
| T791 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.4039797387 |
|
|
Jul 01 01:18:58 PM PDT 24 |
Jul 01 01:25:02 PM PDT 24 |
2797442664 ps |
| T792 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.1961684575 |
|
|
Jul 01 01:08:27 PM PDT 24 |
Jul 01 01:23:04 PM PDT 24 |
4543832516 ps |
| T295 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.86748195 |
|
|
Jul 01 01:40:08 PM PDT 24 |
Jul 01 01:51:46 PM PDT 24 |
5060718940 ps |
| T793 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.415318410 |
|
|
Jul 01 01:33:38 PM PDT 24 |
Jul 01 02:30:19 PM PDT 24 |
14638388680 ps |
| T472 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.2525448350 |
|
|
Jul 01 01:39:14 PM PDT 24 |
Jul 01 01:51:33 PM PDT 24 |
4966234136 ps |
| T134 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.638822343 |
|
|
Jul 01 01:39:14 PM PDT 24 |
Jul 01 01:45:57 PM PDT 24 |
4222164824 ps |
| T794 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2901220392 |
|
|
Jul 01 01:23:41 PM PDT 24 |
Jul 01 01:36:30 PM PDT 24 |
7457209062 ps |
| T795 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.2666684998 |
|
|
Jul 01 01:19:24 PM PDT 24 |
Jul 01 01:24:38 PM PDT 24 |
3186206240 ps |
| T796 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.2528881917 |
|
|
Jul 01 01:32:00 PM PDT 24 |
Jul 01 01:40:25 PM PDT 24 |
3262864652 ps |
| T797 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.3550782299 |
|
|
Jul 01 01:06:49 PM PDT 24 |
Jul 01 01:16:07 PM PDT 24 |
4619235164 ps |
| T798 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.719589196 |
|
|
Jul 01 01:28:09 PM PDT 24 |
Jul 01 01:52:15 PM PDT 24 |
9060417363 ps |
| T799 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.3620573362 |
|
|
Jul 01 01:06:45 PM PDT 24 |
Jul 01 01:18:55 PM PDT 24 |
4613384586 ps |
| T259 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.157315347 |
|
|
Jul 01 01:09:12 PM PDT 24 |
Jul 01 01:15:58 PM PDT 24 |
3422921210 ps |
| T362 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.1379437727 |
|
|
Jul 01 01:20:36 PM PDT 24 |
Jul 01 01:34:14 PM PDT 24 |
3849499976 ps |
| T800 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.4279990358 |
|
|
Jul 01 01:07:05 PM PDT 24 |
Jul 01 01:27:08 PM PDT 24 |
4269140840 ps |
| T801 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.1147985374 |
|
|
Jul 01 01:18:00 PM PDT 24 |
Jul 01 01:23:09 PM PDT 24 |
3432663865 ps |
| T381 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.659094294 |
|
|
Jul 01 01:08:29 PM PDT 24 |
Jul 01 01:18:44 PM PDT 24 |
5970364904 ps |
| T10 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.1596802263 |
|
|
Jul 01 01:27:11 PM PDT 24 |
Jul 01 01:33:17 PM PDT 24 |
4614020352 ps |
| T802 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.1657055160 |
|
|
Jul 01 01:06:43 PM PDT 24 |
Jul 01 01:44:44 PM PDT 24 |
8441559732 ps |
| T803 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.1677945828 |
|
|
Jul 01 01:19:35 PM PDT 24 |
Jul 01 01:22:54 PM PDT 24 |
2407992016 ps |
| T98 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.4248803334 |
|
|
Jul 01 01:05:39 PM PDT 24 |
Jul 01 01:45:12 PM PDT 24 |
7992374920 ps |
| T804 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.120080001 |
|
|
Jul 01 01:03:16 PM PDT 24 |
Jul 01 01:13:40 PM PDT 24 |
4411563402 ps |
| T805 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.3456530250 |
|
|
Jul 01 01:22:18 PM PDT 24 |
Jul 01 01:28:02 PM PDT 24 |
3388859426 ps |
| T416 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.972284688 |
|
|
Jul 01 01:12:35 PM PDT 24 |
Jul 01 01:24:19 PM PDT 24 |
2853502760 ps |
| T806 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.4090878877 |
|
|
Jul 01 01:07:02 PM PDT 24 |
Jul 01 01:18:03 PM PDT 24 |
4541736294 ps |
| T376 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2261772141 |
|
|
Jul 01 01:22:37 PM PDT 24 |
Jul 01 01:29:41 PM PDT 24 |
18088002768 ps |
| T807 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.1777891825 |
|
|
Jul 01 01:31:12 PM PDT 24 |
Jul 01 01:37:47 PM PDT 24 |
6963077550 ps |
| T808 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.3776078661 |
|
|
Jul 01 01:05:14 PM PDT 24 |
Jul 01 01:09:53 PM PDT 24 |
3243719684 ps |
| T227 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.2822667047 |
|
|
Jul 01 01:25:38 PM PDT 24 |
Jul 01 01:48:49 PM PDT 24 |
5538806184 ps |
| T491 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.256500968 |
|
|
Jul 01 01:42:11 PM PDT 24 |
Jul 01 01:51:46 PM PDT 24 |
5820460050 ps |
| T809 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.893321391 |
|
|
Jul 01 01:08:23 PM PDT 24 |
Jul 01 01:10:03 PM PDT 24 |
1812908505 ps |
| T810 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.547729194 |
|
|
Jul 01 01:28:02 PM PDT 24 |
Jul 01 01:32:36 PM PDT 24 |
3140109074 ps |
| T275 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.3914712891 |
|
|
Jul 01 01:35:51 PM PDT 24 |
Jul 01 01:47:51 PM PDT 24 |
5769220040 ps |
| T194 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3210589643 |
|
|
Jul 01 01:17:18 PM PDT 24 |
Jul 01 01:27:40 PM PDT 24 |
4824990426 ps |
| T514 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.1504987510 |
|
|
Jul 01 01:41:04 PM PDT 24 |
Jul 01 01:51:54 PM PDT 24 |
6096026246 ps |
| T480 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.3075215229 |
|
|
Jul 01 01:40:54 PM PDT 24 |
Jul 01 01:48:03 PM PDT 24 |
3434862006 ps |
| T811 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.1064007531 |
|
|
Jul 01 01:40:25 PM PDT 24 |
Jul 01 01:52:28 PM PDT 24 |
4575724934 ps |
| T812 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.451612515 |
|
|
Jul 01 01:05:54 PM PDT 24 |
Jul 01 01:14:21 PM PDT 24 |
5504739824 ps |
| T342 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.1688469368 |
|
|
Jul 01 01:08:37 PM PDT 24 |
Jul 01 01:13:17 PM PDT 24 |
2967213848 ps |
| T11 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.2280113616 |
|
|
Jul 01 01:07:06 PM PDT 24 |
Jul 01 01:13:06 PM PDT 24 |
4529036498 ps |
| T430 |
/workspace/coverage/default/1.chip_sw_example_concurrency.3963590499 |
|
|
Jul 01 01:10:00 PM PDT 24 |
Jul 01 01:14:26 PM PDT 24 |
2839624288 ps |
| T431 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.705691929 |
|
|
Jul 01 01:16:35 PM PDT 24 |
Jul 01 01:25:32 PM PDT 24 |
5814104022 ps |
| T432 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.1609305548 |
|
|
Jul 01 01:31:28 PM PDT 24 |
Jul 01 02:01:40 PM PDT 24 |
8600350425 ps |
| T433 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.1648284935 |
|
|
Jul 01 01:11:26 PM PDT 24 |
Jul 01 02:16:53 PM PDT 24 |
14774688798 ps |
| T434 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.2984746780 |
|
|
Jul 01 01:23:26 PM PDT 24 |
Jul 01 01:35:00 PM PDT 24 |
4945766656 ps |
| T435 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.4272851163 |
|
|
Jul 01 01:33:56 PM PDT 24 |
Jul 01 01:43:54 PM PDT 24 |
5154655708 ps |
| T436 |
/workspace/coverage/default/0.chip_tap_straps_dev.4087186532 |
|
|
Jul 01 01:04:12 PM PDT 24 |
Jul 01 01:27:33 PM PDT 24 |
12044618503 ps |
| T437 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.2483246296 |
|
|
Jul 01 01:38:52 PM PDT 24 |
Jul 01 01:46:14 PM PDT 24 |
3701405000 ps |
| T296 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.1313222408 |
|
|
Jul 01 01:36:17 PM PDT 24 |
Jul 01 01:48:41 PM PDT 24 |
5626964344 ps |
| T496 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.1888583135 |
|
|
Jul 01 01:38:05 PM PDT 24 |
Jul 01 01:51:22 PM PDT 24 |
5717707528 ps |
| T813 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.1820373959 |
|
|
Jul 01 01:25:21 PM PDT 24 |
Jul 01 01:33:46 PM PDT 24 |
4064338614 ps |
| T523 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.415817555 |
|
|
Jul 01 01:40:44 PM PDT 24 |
Jul 01 01:46:38 PM PDT 24 |
2964277016 ps |
| T814 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.2806163187 |
|
|
Jul 01 01:34:42 PM PDT 24 |
Jul 01 01:43:04 PM PDT 24 |
6148276859 ps |
| T815 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.2920266175 |
|
|
Jul 01 01:25:54 PM PDT 24 |
Jul 01 01:32:49 PM PDT 24 |
3828227320 ps |
| T816 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.377452797 |
|
|
Jul 01 01:19:19 PM PDT 24 |
Jul 01 05:32:30 PM PDT 24 |
79309824432 ps |
| T817 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.78593613 |
|
|
Jul 01 01:12:31 PM PDT 24 |
Jul 01 01:16:30 PM PDT 24 |
2861903590 ps |
| T818 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.2755779938 |
|
|
Jul 01 01:22:28 PM PDT 24 |
Jul 01 01:28:44 PM PDT 24 |
3539509580 ps |
| T819 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.2269960093 |
|
|
Jul 01 01:27:46 PM PDT 24 |
Jul 01 01:37:53 PM PDT 24 |
4828919992 ps |
| T820 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.894749299 |
|
|
Jul 01 01:19:02 PM PDT 24 |
Jul 01 01:27:21 PM PDT 24 |
3819625608 ps |
| T821 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3262207759 |
|
|
Jul 01 01:21:08 PM PDT 24 |
Jul 01 01:43:36 PM PDT 24 |
8307120009 ps |
| T260 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.1328248301 |
|
|
Jul 01 01:13:16 PM PDT 24 |
Jul 01 01:18:13 PM PDT 24 |
3655716076 ps |
| T29 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3088097822 |
|
|
Jul 01 01:27:44 PM PDT 24 |
Jul 01 01:35:01 PM PDT 24 |
4779716560 ps |
| T519 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.259537107 |
|
|
Jul 01 01:39:01 PM PDT 24 |
Jul 01 01:45:53 PM PDT 24 |
3800513458 ps |
| T822 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.1373665650 |
|
|
Jul 01 01:27:20 PM PDT 24 |
Jul 01 01:42:27 PM PDT 24 |
8136934166 ps |
| T823 |
/workspace/coverage/default/2.chip_tap_straps_rma.3956050732 |
|
|
Jul 01 01:26:54 PM PDT 24 |
Jul 01 01:40:21 PM PDT 24 |
7015725906 ps |
| T824 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.414840358 |
|
|
Jul 01 01:23:22 PM PDT 24 |
Jul 01 02:21:04 PM PDT 24 |
15430140758 ps |
| T825 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.746400355 |
|
|
Jul 01 01:07:33 PM PDT 24 |
Jul 01 02:41:35 PM PDT 24 |
45833705175 ps |
| T826 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.990783701 |
|
|
Jul 01 01:26:22 PM PDT 24 |
Jul 01 01:43:08 PM PDT 24 |
9252454450 ps |
| T159 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.3034926183 |
|
|
Jul 01 01:06:09 PM PDT 24 |
Jul 01 01:14:29 PM PDT 24 |
4051315368 ps |
| T827 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.2599833325 |
|
|
Jul 01 01:10:16 PM PDT 24 |
Jul 01 01:50:41 PM PDT 24 |
32515105975 ps |
| T543 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.3662466574 |
|
|
Jul 01 01:42:00 PM PDT 24 |
Jul 01 01:48:46 PM PDT 24 |
3835981064 ps |
| T828 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.3491908086 |
|
|
Jul 01 01:32:33 PM PDT 24 |
Jul 01 02:38:03 PM PDT 24 |
17893230368 ps |
| T829 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1415961520 |
|
|
Jul 01 01:20:20 PM PDT 24 |
Jul 01 01:32:58 PM PDT 24 |
4910917354 ps |
| T830 |
/workspace/coverage/default/1.chip_sw_aes_idle.2094650781 |
|
|
Jul 01 01:12:27 PM PDT 24 |
Jul 01 01:17:29 PM PDT 24 |
2855952632 ps |
| T831 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.4156488201 |
|
|
Jul 01 01:22:32 PM PDT 24 |
Jul 01 01:27:12 PM PDT 24 |
3442255408 ps |