| SCORE |
LINE |
COND |
TOGGLE |
FSM |
BRANCH |
ASSERT |
GROUP |
|
| TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | NAME |
| 40.77 |
40.77 |
44.96 |
44.96 |
43.00 |
43.00 |
32.11 |
32.11 |
|
|
57.86 |
57.86 |
59.44 |
59.44 |
7.24 |
7.24 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.3862877983 |
| 49.49 |
8.72 |
45.03 |
0.07 |
43.07 |
0.08 |
35.84 |
3.72 |
|
|
57.87 |
0.01 |
59.44 |
0.00 |
55.70 |
48.46 |
/workspace/coverage/default/1.chip_sw_alert_test.2483223985 |
| 55.83 |
6.34 |
56.70 |
11.67 |
49.12 |
6.04 |
40.99 |
5.15 |
|
|
61.27 |
3.40 |
63.99 |
4.55 |
62.94 |
7.24 |
/workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.3250437725 |
| 61.36 |
5.53 |
67.72 |
11.02 |
58.27 |
9.16 |
44.51 |
3.52 |
|
|
70.74 |
9.48 |
63.99 |
0.00 |
62.94 |
0.00 |
/workspace/coverage/default/0.chip_jtag_csr_rw.2010792444 |
| 64.30 |
2.94 |
72.30 |
4.58 |
64.74 |
6.46 |
44.74 |
0.23 |
|
|
77.10 |
6.36 |
63.99 |
0.00 |
62.94 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.4210064121 |
| 66.86 |
2.56 |
77.88 |
5.58 |
68.34 |
3.60 |
46.14 |
1.39 |
|
|
81.91 |
4.81 |
63.99 |
0.00 |
62.94 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.826202606 |
| 69.32 |
2.46 |
80.22 |
2.34 |
71.22 |
2.89 |
53.08 |
6.95 |
|
|
84.15 |
2.23 |
64.34 |
0.35 |
62.94 |
0.00 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.2410536116 |
| 71.57 |
2.24 |
80.22 |
0.00 |
71.22 |
0.00 |
66.54 |
13.46 |
|
|
84.15 |
0.00 |
64.34 |
0.00 |
62.94 |
0.00 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.4121039641 |
| 73.23 |
1.67 |
80.51 |
0.29 |
71.37 |
0.15 |
75.57 |
9.03 |
|
|
84.32 |
0.18 |
64.69 |
0.35 |
62.94 |
0.00 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.3476078007 |
| 74.52 |
1.29 |
82.78 |
2.28 |
73.08 |
1.71 |
77.09 |
1.52 |
|
|
86.52 |
2.20 |
64.69 |
0.00 |
62.94 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.4060661392 |
| 75.60 |
1.09 |
83.76 |
0.97 |
73.85 |
0.77 |
77.36 |
0.26 |
|
|
87.37 |
0.84 |
68.36 |
3.67 |
62.94 |
0.00 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.964605871 |
| 76.60 |
0.99 |
84.75 |
1.00 |
74.38 |
0.53 |
77.37 |
0.01 |
|
|
87.94 |
0.57 |
72.20 |
3.85 |
62.94 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.2283118882 |
| 77.21 |
0.62 |
84.76 |
0.01 |
74.38 |
0.01 |
81.07 |
3.70 |
|
|
87.94 |
0.00 |
72.20 |
0.00 |
62.94 |
0.00 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.1681121028 |
| 77.81 |
0.60 |
85.18 |
0.42 |
74.92 |
0.53 |
81.16 |
0.09 |
|
|
88.38 |
0.45 |
74.30 |
2.10 |
62.94 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.2280113616 |
| 78.32 |
0.51 |
86.20 |
1.02 |
75.83 |
0.92 |
81.36 |
0.20 |
|
|
89.07 |
0.69 |
74.30 |
0.00 |
63.16 |
0.22 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.2922948004 |
| 78.81 |
0.49 |
86.53 |
0.33 |
76.12 |
0.29 |
81.38 |
0.02 |
|
|
89.30 |
0.23 |
76.40 |
2.10 |
63.16 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.4060895116 |
| 79.29 |
0.48 |
86.82 |
0.29 |
76.38 |
0.26 |
81.38 |
0.00 |
|
|
89.52 |
0.22 |
78.50 |
2.10 |
63.16 |
0.00 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.1577381230 |
| 79.74 |
0.45 |
86.85 |
0.03 |
76.41 |
0.02 |
81.41 |
0.03 |
|
|
89.55 |
0.03 |
78.67 |
0.17 |
65.57 |
2.41 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.224226145 |
| 80.14 |
0.40 |
87.61 |
0.76 |
76.94 |
0.53 |
81.65 |
0.24 |
|
|
90.39 |
0.84 |
78.67 |
0.00 |
65.57 |
0.00 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.1567574070 |
| 80.47 |
0.33 |
87.61 |
0.00 |
76.94 |
0.00 |
82.32 |
0.67 |
|
|
90.39 |
0.00 |
78.67 |
0.00 |
66.89 |
1.32 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.3175066504 |
| 80.79 |
0.32 |
88.14 |
0.53 |
77.36 |
0.42 |
82.89 |
0.57 |
|
|
90.81 |
0.41 |
78.67 |
0.00 |
66.89 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.323912836 |
| 81.09 |
0.30 |
88.14 |
0.00 |
77.36 |
0.00 |
83.78 |
0.90 |
|
|
90.81 |
0.00 |
78.67 |
0.00 |
67.76 |
0.88 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.2654075000 |
| 81.37 |
0.29 |
88.27 |
0.13 |
77.75 |
0.39 |
83.91 |
0.12 |
|
|
91.17 |
0.37 |
79.37 |
0.70 |
67.76 |
0.00 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.964174650 |
| 81.64 |
0.26 |
88.34 |
0.07 |
77.79 |
0.04 |
84.25 |
0.35 |
|
|
91.20 |
0.03 |
79.37 |
0.00 |
68.86 |
1.10 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.3754143315 |
| 81.87 |
0.23 |
88.77 |
0.44 |
78.15 |
0.36 |
84.58 |
0.33 |
|
|
91.49 |
0.28 |
79.37 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/1.chip_sw_gpio.2298818664 |
| 82.09 |
0.22 |
88.88 |
0.11 |
78.23 |
0.08 |
84.61 |
0.02 |
|
|
91.56 |
0.07 |
80.42 |
1.05 |
68.86 |
0.00 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.1916049222 |
| 82.27 |
0.18 |
88.88 |
0.00 |
78.23 |
0.00 |
85.67 |
1.07 |
|
|
91.56 |
0.00 |
80.42 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.4269995290 |
| 82.43 |
0.15 |
89.35 |
0.47 |
78.28 |
0.05 |
85.74 |
0.06 |
|
|
91.56 |
0.00 |
80.77 |
0.35 |
68.86 |
0.00 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.1078982666 |
| 82.57 |
0.15 |
89.55 |
0.21 |
78.60 |
0.32 |
86.09 |
0.35 |
|
|
91.56 |
0.00 |
80.77 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2302407612 |
| 82.69 |
0.12 |
89.58 |
0.02 |
78.60 |
0.00 |
86.76 |
0.67 |
|
|
91.56 |
0.00 |
80.77 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/1.chip_jtag_csr_rw.3586128611 |
| 82.79 |
0.10 |
89.65 |
0.08 |
78.80 |
0.20 |
86.82 |
0.06 |
|
|
91.61 |
0.05 |
80.77 |
0.00 |
69.08 |
0.22 |
/workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.3912406476 |
| 82.89 |
0.10 |
89.65 |
0.00 |
78.81 |
0.01 |
86.97 |
0.16 |
|
|
91.61 |
0.00 |
80.77 |
0.00 |
69.52 |
0.44 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.1071892109 |
| 82.98 |
0.09 |
89.71 |
0.06 |
78.86 |
0.05 |
86.98 |
0.01 |
|
|
91.65 |
0.04 |
80.94 |
0.17 |
69.74 |
0.22 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.3099326247 |
| 83.07 |
0.09 |
89.71 |
0.00 |
78.86 |
0.00 |
87.52 |
0.54 |
|
|
91.65 |
0.00 |
80.94 |
0.00 |
69.74 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.3931486094 |
| 83.16 |
0.09 |
89.71 |
0.00 |
78.86 |
0.00 |
88.05 |
0.53 |
|
|
91.65 |
0.00 |
80.94 |
0.00 |
69.74 |
0.00 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.4055138467 |
| 83.24 |
0.08 |
89.72 |
0.01 |
79.02 |
0.16 |
88.17 |
0.12 |
|
|
91.68 |
0.02 |
81.12 |
0.17 |
69.74 |
0.00 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.2072646197 |
| 83.32 |
0.08 |
89.73 |
0.01 |
79.03 |
0.01 |
88.21 |
0.04 |
|
|
91.70 |
0.02 |
81.29 |
0.17 |
69.96 |
0.22 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.2064433060 |
| 83.39 |
0.07 |
89.74 |
0.01 |
79.23 |
0.20 |
88.21 |
0.00 |
|
|
91.93 |
0.23 |
81.29 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.2173217376 |
| 83.46 |
0.07 |
89.74 |
0.01 |
79.24 |
0.01 |
88.22 |
0.01 |
|
|
91.94 |
0.01 |
81.47 |
0.17 |
70.18 |
0.22 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.270426443 |
| 83.53 |
0.07 |
89.75 |
0.01 |
79.25 |
0.01 |
88.22 |
0.01 |
|
|
91.94 |
0.01 |
81.64 |
0.17 |
70.39 |
0.22 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.2348749688 |
| 83.58 |
0.05 |
89.75 |
0.00 |
79.25 |
0.00 |
88.28 |
0.05 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
70.61 |
0.22 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.1759078979 |
| 83.62 |
0.04 |
89.75 |
0.00 |
79.25 |
0.00 |
88.52 |
0.25 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
70.61 |
0.00 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3640061895 |
| 83.66 |
0.04 |
89.75 |
0.00 |
79.25 |
0.00 |
88.55 |
0.02 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
70.83 |
0.22 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.757708103 |
| 83.70 |
0.04 |
89.75 |
0.00 |
79.25 |
0.00 |
88.55 |
0.01 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
71.05 |
0.22 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.1415436968 |
| 83.74 |
0.04 |
89.75 |
0.00 |
79.25 |
0.00 |
88.56 |
0.01 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
71.27 |
0.22 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.661148164 |
| 83.77 |
0.04 |
89.75 |
0.00 |
79.25 |
0.00 |
88.56 |
0.01 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
71.49 |
0.22 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.2524857035 |
| 83.81 |
0.04 |
89.75 |
0.00 |
79.26 |
0.01 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
71.71 |
0.22 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.373110796 |
| 83.85 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.01 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
71.93 |
0.22 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.4179248318 |
| 83.88 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
72.15 |
0.22 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.1855292104 |
| 83.92 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
72.37 |
0.22 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.955435911 |
| 83.96 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
72.59 |
0.22 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.2176118371 |
| 83.99 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
72.81 |
0.22 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.3326896538 |
| 84.03 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
73.03 |
0.22 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.2944892300 |
| 84.07 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
73.25 |
0.22 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.1875605682 |
| 84.10 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
73.46 |
0.22 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.4272851163 |
| 84.14 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
73.68 |
0.22 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.2941116818 |
| 84.18 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
73.90 |
0.22 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.1300396046 |
| 84.21 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
74.12 |
0.22 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.2072446143 |
| 84.25 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
74.34 |
0.22 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1435371712 |
| 84.29 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
74.56 |
0.22 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.1523069639 |
| 84.32 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
74.78 |
0.22 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.2050107397 |
| 84.36 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
75.00 |
0.22 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.167074048 |
| 84.40 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
75.22 |
0.22 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.2248070647 |
| 84.43 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
75.44 |
0.22 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.2686854589 |
| 84.47 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
75.66 |
0.22 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.1678538650 |
| 84.51 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
75.88 |
0.22 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.3870896708 |
| 84.54 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
76.10 |
0.22 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.2739532836 |
| 84.58 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
76.32 |
0.22 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.1364804927 |
| 84.61 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
76.54 |
0.22 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.867961414 |
| 84.65 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
76.75 |
0.22 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.216065633 |
| 84.69 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
76.97 |
0.22 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.10797425 |
| 84.72 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
77.19 |
0.22 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.710815596 |
| 84.76 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
77.41 |
0.22 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.118484179 |
| 84.80 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
77.63 |
0.22 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.2615702071 |
| 84.83 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
77.85 |
0.22 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.3865946027 |
| 84.87 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
78.07 |
0.22 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.3809697909 |
| 84.91 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
78.29 |
0.22 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.3241299278 |
| 84.94 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
78.51 |
0.22 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.1014157950 |
| 84.98 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
78.73 |
0.22 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.4270589816 |
| 85.02 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
78.95 |
0.22 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.1007344601 |
| 85.05 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
79.17 |
0.22 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.2498797207 |
| 85.09 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
79.39 |
0.22 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.1412134023 |
| 85.13 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
79.61 |
0.22 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.813812254 |
| 85.16 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
79.82 |
0.22 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.1732602452 |
| 85.20 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
80.04 |
0.22 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.1374990337 |
| 85.24 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
80.26 |
0.22 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.1488499693 |
| 85.27 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
80.48 |
0.22 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.1985104498 |
| 85.31 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
80.70 |
0.22 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.2067948249 |
| 85.35 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
80.92 |
0.22 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.3160903826 |
| 85.38 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
81.14 |
0.22 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.1888583135 |
| 85.42 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
81.36 |
0.22 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.1742935651 |
| 85.46 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
81.58 |
0.22 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.4103683557 |
| 85.49 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
81.80 |
0.22 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.1562928817 |
| 85.53 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
82.02 |
0.22 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.1215535826 |
| 85.57 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
82.24 |
0.22 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.3560544783 |
| 85.60 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
82.46 |
0.22 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.2018396291 |
| 85.64 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
82.68 |
0.22 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2656876787 |
| 85.67 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
82.89 |
0.22 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.415817555 |
| 85.71 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.56 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
83.11 |
0.22 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.631384388 |
| 85.75 |
0.04 |
89.75 |
0.00 |
79.26 |
0.00 |
88.77 |
0.21 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2501261489 |
| 85.78 |
0.03 |
89.75 |
0.00 |
79.26 |
0.00 |
88.81 |
0.03 |
|
|
91.94 |
0.00 |
81.82 |
0.17 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.1210808770 |
| 85.81 |
0.03 |
89.77 |
0.02 |
79.28 |
0.02 |
88.96 |
0.16 |
|
|
91.94 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_power_idle_load.1178540267 |
| 85.85 |
0.03 |
89.77 |
0.00 |
79.28 |
0.00 |
89.15 |
0.19 |
|
|
91.94 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.4206746046 |
| 85.87 |
0.03 |
89.80 |
0.03 |
79.28 |
0.01 |
89.28 |
0.13 |
|
|
91.94 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.4143831704 |
| 85.90 |
0.03 |
89.90 |
0.09 |
79.31 |
0.03 |
89.30 |
0.02 |
|
|
91.97 |
0.02 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2731171083 |
| 85.93 |
0.03 |
89.96 |
0.07 |
79.34 |
0.03 |
89.32 |
0.01 |
|
|
92.02 |
0.05 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.1899042715 |
| 85.95 |
0.03 |
89.96 |
0.00 |
79.50 |
0.16 |
89.32 |
0.00 |
|
|
92.02 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.519835196 |
| 85.98 |
0.02 |
90.04 |
0.07 |
79.50 |
0.00 |
89.38 |
0.07 |
|
|
92.02 |
0.01 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.3699627900 |
| 86.00 |
0.02 |
90.05 |
0.01 |
79.52 |
0.02 |
89.45 |
0.06 |
|
|
92.04 |
0.02 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.1088620694 |
| 86.01 |
0.02 |
90.05 |
0.00 |
79.52 |
0.00 |
89.55 |
0.10 |
|
|
92.04 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.3776078661 |
| 86.03 |
0.02 |
90.05 |
0.00 |
79.52 |
0.00 |
89.65 |
0.10 |
|
|
92.04 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.3112115189 |
| 86.05 |
0.02 |
90.05 |
0.00 |
79.61 |
0.09 |
89.65 |
0.00 |
|
|
92.04 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3210589643 |
| 86.06 |
0.01 |
90.07 |
0.02 |
79.63 |
0.02 |
89.67 |
0.02 |
|
|
92.06 |
0.02 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.3521816425 |
| 86.07 |
0.01 |
90.08 |
0.01 |
79.64 |
0.01 |
89.72 |
0.05 |
|
|
92.06 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2246136496 |
| 86.08 |
0.01 |
90.08 |
0.00 |
79.64 |
0.00 |
89.79 |
0.07 |
|
|
92.06 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.3774567209 |
| 86.10 |
0.01 |
90.08 |
0.00 |
79.71 |
0.07 |
89.79 |
0.00 |
|
|
92.06 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.1899700531 |
| 86.11 |
0.01 |
90.08 |
0.00 |
79.71 |
0.00 |
89.85 |
0.06 |
|
|
92.06 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.3663573334 |
| 86.12 |
0.01 |
90.08 |
0.00 |
79.77 |
0.06 |
89.85 |
0.00 |
|
|
92.06 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.2822667047 |
| 86.13 |
0.01 |
90.08 |
0.01 |
79.79 |
0.01 |
89.88 |
0.03 |
|
|
92.07 |
0.01 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.791999631 |
| 86.13 |
0.01 |
90.12 |
0.03 |
79.80 |
0.01 |
89.88 |
0.00 |
|
|
92.09 |
0.02 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.1324690330 |
| 86.14 |
0.01 |
90.12 |
0.00 |
79.80 |
0.00 |
89.93 |
0.05 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.2108904399 |
| 86.15 |
0.01 |
90.12 |
0.01 |
79.82 |
0.02 |
89.94 |
0.01 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.2174432723 |
| 86.16 |
0.01 |
90.16 |
0.03 |
79.82 |
0.01 |
89.94 |
0.00 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.2728067797 |
| 86.16 |
0.01 |
90.16 |
0.00 |
79.82 |
0.00 |
89.98 |
0.04 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.3695672426 |
| 86.17 |
0.01 |
90.16 |
0.00 |
79.82 |
0.00 |
90.01 |
0.03 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.2452757906 |
| 86.17 |
0.01 |
90.16 |
0.00 |
79.82 |
0.00 |
90.04 |
0.03 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2878788081 |
| 86.18 |
0.01 |
90.16 |
0.00 |
79.83 |
0.01 |
90.07 |
0.02 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.2039218284 |
| 86.18 |
0.01 |
90.16 |
0.00 |
79.83 |
0.00 |
90.09 |
0.03 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1099037162 |
| 86.19 |
0.01 |
90.16 |
0.00 |
79.85 |
0.02 |
90.09 |
0.00 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.1603359485 |
| 86.19 |
0.01 |
90.16 |
0.00 |
79.88 |
0.02 |
90.09 |
0.00 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.1658204704 |
| 86.20 |
0.01 |
90.16 |
0.01 |
79.89 |
0.01 |
90.10 |
0.01 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.503858982 |
| 86.20 |
0.01 |
90.16 |
0.00 |
79.91 |
0.02 |
90.10 |
0.00 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.99670882 |
| 86.20 |
0.01 |
90.16 |
0.00 |
79.91 |
0.00 |
90.12 |
0.02 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_jtag_mem_access.3849381447 |
| 86.21 |
0.01 |
90.16 |
0.00 |
79.91 |
0.00 |
90.14 |
0.02 |
|
|
92.09 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.2829459434 |
| 86.21 |
0.01 |
90.16 |
0.00 |
79.91 |
0.00 |
90.15 |
0.01 |
|
|
92.10 |
0.01 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.1539651814 |
| 86.21 |
0.01 |
90.18 |
0.02 |
79.91 |
0.00 |
90.15 |
0.00 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.2705794958 |
| 86.21 |
0.01 |
90.18 |
0.01 |
79.92 |
0.01 |
90.15 |
0.01 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.1566334947 |
| 86.22 |
0.01 |
90.18 |
0.00 |
79.93 |
0.01 |
90.15 |
0.00 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_gpio.2475921265 |
| 86.22 |
0.01 |
90.18 |
0.00 |
79.94 |
0.01 |
90.15 |
0.00 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.94265145 |
| 86.22 |
0.01 |
90.18 |
0.00 |
79.94 |
0.00 |
90.16 |
0.01 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.1589654194 |
| 86.22 |
0.01 |
90.18 |
0.00 |
79.95 |
0.01 |
90.16 |
0.00 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.2138980638 |
| 86.22 |
0.01 |
90.18 |
0.00 |
79.97 |
0.01 |
90.16 |
0.00 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.659094294 |
| 86.23 |
0.01 |
90.18 |
0.00 |
79.98 |
0.01 |
90.16 |
0.00 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.3824294539 |
| 86.23 |
0.01 |
90.18 |
0.00 |
79.99 |
0.01 |
90.16 |
0.00 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.3620573362 |
| 86.23 |
0.01 |
90.18 |
0.00 |
80.00 |
0.01 |
90.16 |
0.00 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.14353492 |
| 86.23 |
0.01 |
90.18 |
0.00 |
80.00 |
0.00 |
90.17 |
0.01 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.3201453173 |
| 86.23 |
0.01 |
90.18 |
0.00 |
80.00 |
0.00 |
90.18 |
0.01 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.2380884838 |
| 86.23 |
0.01 |
90.18 |
0.00 |
80.00 |
0.00 |
90.19 |
0.01 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.4129161343 |
| 86.24 |
0.01 |
90.18 |
0.00 |
80.00 |
0.00 |
90.20 |
0.01 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.3104055521 |
| 86.24 |
0.01 |
90.18 |
0.00 |
80.00 |
0.00 |
90.21 |
0.01 |
|
|
92.10 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.2549630073 |
| 86.24 |
0.01 |
90.18 |
0.00 |
80.00 |
0.00 |
90.21 |
0.00 |
|
|
92.11 |
0.01 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_tap_straps_dev.4087186532 |
| 86.24 |
0.01 |
90.18 |
0.00 |
80.00 |
0.01 |
90.21 |
0.00 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.2036567702 |
| 86.24 |
0.01 |
90.18 |
0.00 |
80.01 |
0.01 |
90.21 |
0.00 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_sw_gpio.3374354210 |
| 86.24 |
0.01 |
90.18 |
0.00 |
80.02 |
0.01 |
90.21 |
0.00 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.2781014417 |
| 86.24 |
0.01 |
90.18 |
0.00 |
80.02 |
0.00 |
90.22 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.1324216229 |
| 86.24 |
0.01 |
90.18 |
0.00 |
80.02 |
0.00 |
90.22 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.4129575472 |
| 86.25 |
0.01 |
90.18 |
0.00 |
80.02 |
0.00 |
90.23 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.1932380885 |
| 86.25 |
0.01 |
90.19 |
0.01 |
80.02 |
0.00 |
90.23 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.2082106455 |
| 86.25 |
0.01 |
90.19 |
0.01 |
80.02 |
0.00 |
90.24 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.1688469368 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.02 |
0.00 |
90.24 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.2823333721 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.02 |
0.00 |
90.25 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_hmac_enc.1440648243 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.02 |
0.00 |
90.25 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.3902474554 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.02 |
0.00 |
90.26 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.3270566895 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.02 |
0.00 |
90.26 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.991905001 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.02 |
0.00 |
90.26 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.3229346547 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.02 |
0.01 |
90.26 |
0.00 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.3034926183 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.03 |
0.01 |
90.26 |
0.00 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.3860284276 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.03 |
0.01 |
90.26 |
0.00 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.3841586085 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.03 |
0.01 |
90.26 |
0.00 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.464436244 |
| 86.25 |
0.01 |
90.19 |
0.00 |
80.03 |
0.00 |
90.27 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/3.chip_tap_straps_rma.3117890332 |
| 86.26 |
0.01 |
90.19 |
0.00 |
80.03 |
0.00 |
90.27 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.625800117 |
| 86.26 |
0.01 |
90.19 |
0.00 |
80.03 |
0.00 |
90.27 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.1519500625 |
| 86.26 |
0.01 |
90.19 |
0.00 |
80.03 |
0.00 |
90.27 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.449314670 |
| 86.26 |
0.01 |
90.19 |
0.00 |
80.03 |
0.00 |
90.28 |
0.01 |
|
|
92.11 |
0.00 |
81.82 |
0.00 |
83.11 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.729644276 |
| Name |
| /workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.341697705 |
| /workspace/coverage/default/0.chip_sival_flash_info_access.244912419 |
| /workspace/coverage/default/0.chip_sw_aes_enc.3854922974 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.3235502633 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.3409760847 |
| /workspace/coverage/default/0.chip_sw_aes_entropy.1583076967 |
| /workspace/coverage/default/0.chip_sw_aes_idle.4178073695 |
| /workspace/coverage/default/0.chip_sw_aes_masking_off.2011332274 |
| /workspace/coverage/default/0.chip_sw_aes_smoketest.2703589567 |
| /workspace/coverage/default/0.chip_sw_alert_handler_escalation.1663349261 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.2335553848 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.4004317869 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.148874625 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.2419798523 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.712289741 |
| /workspace/coverage/default/0.chip_sw_alert_test.2566996329 |
| /workspace/coverage/default/0.chip_sw_aon_timer_irq.1496774676 |
| /workspace/coverage/default/0.chip_sw_aon_timer_smoketest.4152116001 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.3132471063 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.1423040778 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.833280492 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2664126890 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.135460505 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1972148916 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2190074283 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.4090878877 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter.686524941 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.3594178022 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.1617335798 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.1205826626 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.451612515 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.64378781 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.920605985 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_peri.40592480 |
| /workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.2354445626 |
| /workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.1393459402 |
| /workspace/coverage/default/0.chip_sw_clkmgr_smoketest.1605145483 |
| /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.1013746529 |
| /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.4043487150 |
| /workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.2162500634 |
| /workspace/coverage/default/0.chip_sw_csrng_kat_test.1863796442 |
| /workspace/coverage/default/0.chip_sw_csrng_smoketest.2348285792 |
| /workspace/coverage/default/0.chip_sw_edn_auto_mode.4279990358 |
| /workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.2024902287 |
| /workspace/coverage/default/0.chip_sw_edn_kat.502000858 |
| /workspace/coverage/default/0.chip_sw_edn_sw_mode.2030316133 |
| /workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.1134647005 |
| /workspace/coverage/default/0.chip_sw_entropy_src_csrng.4123968040 |
| /workspace/coverage/default/0.chip_sw_entropy_src_kat_test.1654686103 |
| /workspace/coverage/default/0.chip_sw_entropy_src_smoketest.663884096 |
| /workspace/coverage/default/0.chip_sw_example_concurrency.1570016323 |
| /workspace/coverage/default/0.chip_sw_example_flash.453655132 |
| /workspace/coverage/default/0.chip_sw_example_manufacturer.2591531764 |
| /workspace/coverage/default/0.chip_sw_example_rom.440460502 |
| /workspace/coverage/default/0.chip_sw_flash_crash_alert.2858885150 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access.3171806062 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.1550951839 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2670142828 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.3281408598 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.767133123 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.3919123837 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.262660498 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_ops.120080001 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.292794193 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3119220571 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.3620649169 |
| /workspace/coverage/default/0.chip_sw_flash_init.394762798 |
| /workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.4196687531 |
| /workspace/coverage/default/0.chip_sw_gpio_smoketest.3303734644 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_idle.3049398481 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.3025784780 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.1728802647 |
| /workspace/coverage/default/0.chip_sw_hmac_multistream.1657055160 |
| /workspace/coverage/default/0.chip_sw_hmac_oneshot.1404747029 |
| /workspace/coverage/default/0.chip_sw_hmac_smoketest.1248510147 |
| /workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.1763771564 |
| /workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.3103775246 |
| /workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.236993380 |
| /workspace/coverage/default/0.chip_sw_inject_scramble_seed.1521596871 |
| /workspace/coverage/default/0.chip_sw_keymgr_key_derivation.3815456772 |
| /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.2491623304 |
| /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1730037617 |
| /workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.588089360 |
| /workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.3236598983 |
| /workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.2084555257 |
| /workspace/coverage/default/0.chip_sw_kmac_idle.2684356186 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_cshake.3105408945 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_kmac.1126926633 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.2553837523 |
| /workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2161743395 |
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| /workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.2129084535 |
| /workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.1322028545 |
| /workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.3008536748 |
| /workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.1455187450 |
| /workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.3772965332 |
| /workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.3066770531 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T4 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.2410536116 |
|
|
Jul 01 01:12:03 PM PDT 24 |
Jul 01 02:13:56 PM PDT 24 |
15717985628 ps |
| T5 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.724863183 |
|
|
Jul 01 01:08:37 PM PDT 24 |
Jul 01 01:10:34 PM PDT 24 |
2597051049 ps |
| T6 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.1567574070 |
|
|
Jul 01 01:34:20 PM PDT 24 |
Jul 01 01:44:45 PM PDT 24 |
4149937468 ps |
| T20 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.3545525900 |
|
|
Jul 01 01:30:58 PM PDT 24 |
Jul 01 01:42:47 PM PDT 24 |
4650560336 ps |
| T21 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.2303125492 |
|
|
Jul 01 01:33:16 PM PDT 24 |
Jul 01 01:58:27 PM PDT 24 |
8900010300 ps |
| T132 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.1658204704 |
|
|
Jul 01 01:06:33 PM PDT 24 |
Jul 01 01:15:44 PM PDT 24 |
4403954900 ps |
| T17 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.3521816425 |
|
|
Jul 01 01:32:13 PM PDT 24 |
Jul 01 01:39:44 PM PDT 24 |
4707416738 ps |
| T18 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.3063017954 |
|
|
Jul 01 01:30:51 PM PDT 24 |
Jul 01 01:40:26 PM PDT 24 |
4516202480 ps |
| T19 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.3862877983 |
|
|
Jul 01 01:34:30 PM PDT 24 |
Jul 01 01:44:25 PM PDT 24 |
4737676154 ps |
| T91 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.2174432723 |
|
|
Jul 01 01:13:23 PM PDT 24 |
Jul 01 01:25:34 PM PDT 24 |
5214219480 ps |
| T31 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.1071892109 |
|
|
Jul 01 01:40:58 PM PDT 24 |
Jul 01 01:51:34 PM PDT 24 |
5235774078 ps |
| T101 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.3653407042 |
|
|
Jul 01 01:27:01 PM PDT 24 |
Jul 01 01:38:00 PM PDT 24 |
2699185700 ps |
| T251 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.1034580525 |
|
|
Jul 01 01:24:27 PM PDT 24 |
Jul 01 01:45:53 PM PDT 24 |
8463696860 ps |
| T82 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2246136496 |
|
|
Jul 01 01:30:21 PM PDT 24 |
Jul 01 01:58:46 PM PDT 24 |
13493158870 ps |
| T36 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.3476078007 |
|
|
Jul 01 01:21:22 PM PDT 24 |
Jul 01 02:52:44 PM PDT 24 |
48838535103 ps |
| T228 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.2082106455 |
|
|
Jul 01 01:10:02 PM PDT 24 |
Jul 01 01:17:42 PM PDT 24 |
3680628096 ps |
| T80 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.2592546573 |
|
|
Jul 01 01:23:16 PM PDT 24 |
Jul 01 01:25:16 PM PDT 24 |
2365305059 ps |
| T97 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1099037162 |
|
|
Jul 01 01:05:42 PM PDT 24 |
Jul 01 01:14:26 PM PDT 24 |
3433546848 ps |
| T76 |
/workspace/coverage/default/1.rom_e2e_static_critical.2864480576 |
|
|
Jul 01 01:23:32 PM PDT 24 |
Jul 01 02:37:59 PM PDT 24 |
17046029670 ps |
| T160 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.2064433060 |
|
|
Jul 01 01:37:45 PM PDT 24 |
Jul 01 01:50:12 PM PDT 24 |
5566461050 ps |
| T222 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.3876664241 |
|
|
Jul 01 01:05:01 PM PDT 24 |
Jul 01 01:15:25 PM PDT 24 |
5914481608 ps |
| T90 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.2922948004 |
|
|
Jul 01 01:39:21 PM PDT 24 |
Jul 01 01:47:14 PM PDT 24 |
4026412650 ps |
| T37 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.4269995290 |
|
|
Jul 01 01:05:27 PM PDT 24 |
Jul 01 01:20:39 PM PDT 24 |
5662733926 ps |
| T344 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.2138980638 |
|
|
Jul 01 01:04:46 PM PDT 24 |
Jul 01 01:13:42 PM PDT 24 |
3804767208 ps |
| T274 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.1750605184 |
|
|
Jul 01 01:10:47 PM PDT 24 |
Jul 01 01:18:47 PM PDT 24 |
3587335006 ps |
| T103 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.1681121028 |
|
|
Jul 01 01:30:45 PM PDT 24 |
Jul 01 02:41:58 PM PDT 24 |
18010076800 ps |
| T38 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.1521596871 |
|
|
Jul 01 01:04:00 PM PDT 24 |
Jul 01 04:31:45 PM PDT 24 |
63445608183 ps |
| T249 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.3754143315 |
|
|
Jul 01 01:06:51 PM PDT 24 |
Jul 01 01:30:53 PM PDT 24 |
12152989779 ps |
| T92 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3040870199 |
|
|
Jul 01 01:18:08 PM PDT 24 |
Jul 01 01:40:43 PM PDT 24 |
7199858897 ps |
| T345 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.2072446143 |
|
|
Jul 01 01:34:08 PM PDT 24 |
Jul 01 01:40:15 PM PDT 24 |
3693123196 ps |
| T176 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.661843439 |
|
|
Jul 01 01:20:49 PM PDT 24 |
Jul 01 01:44:36 PM PDT 24 |
7833517200 ps |
| T337 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.4257739314 |
|
|
Jul 01 01:22:59 PM PDT 24 |
Jul 01 01:33:37 PM PDT 24 |
6952695250 ps |
| T93 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.3403517283 |
|
|
Jul 01 01:21:25 PM PDT 24 |
Jul 01 01:40:13 PM PDT 24 |
5239059216 ps |
| T77 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.1932380885 |
|
|
Jul 01 01:12:14 PM PDT 24 |
Jul 01 02:47:05 PM PDT 24 |
18090692848 ps |
| T248 |
/workspace/coverage/default/0.chip_tap_straps_prod.280397499 |
|
|
Jul 01 01:06:53 PM PDT 24 |
Jul 01 01:09:40 PM PDT 24 |
2792481503 ps |
| T178 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.2703589567 |
|
|
Jul 01 01:10:42 PM PDT 24 |
Jul 01 01:14:22 PM PDT 24 |
2200726064 ps |
| T78 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.4049409948 |
|
|
Jul 01 01:15:31 PM PDT 24 |
Jul 01 01:31:57 PM PDT 24 |
12200671428 ps |
| T153 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.4004317869 |
|
|
Jul 01 01:05:00 PM PDT 24 |
Jul 01 01:33:20 PM PDT 24 |
7590288870 ps |
| T187 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.1891991712 |
|
|
Jul 01 01:05:47 PM PDT 24 |
Jul 01 01:15:20 PM PDT 24 |
4765364580 ps |
| T102 |
/workspace/coverage/default/1.chip_sw_edn_kat.3976679814 |
|
|
Jul 01 01:15:21 PM PDT 24 |
Jul 01 01:27:24 PM PDT 24 |
3254790286 ps |
| T294 |
/workspace/coverage/default/2.chip_sw_example_rom.3206546157 |
|
|
Jul 01 01:18:48 PM PDT 24 |
Jul 01 01:20:51 PM PDT 24 |
2519834184 ps |
| T79 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.4206746046 |
|
|
Jul 01 01:04:27 PM PDT 24 |
Jul 01 01:06:45 PM PDT 24 |
3063749569 ps |
| T231 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.1523069639 |
|
|
Jul 01 01:33:53 PM PDT 24 |
Jul 01 01:40:28 PM PDT 24 |
3081468360 ps |
| T152 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.2476478593 |
|
|
Jul 01 01:05:25 PM PDT 24 |
Jul 01 01:08:43 PM PDT 24 |
2446739274 ps |
| T23 |
/workspace/coverage/default/2.chip_jtag_mem_access.3450166022 |
|
|
Jul 01 01:19:49 PM PDT 24 |
Jul 01 01:46:45 PM PDT 24 |
14070973684 ps |
| T87 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.1201873406 |
|
|
Jul 01 01:09:08 PM PDT 24 |
Jul 01 01:23:45 PM PDT 24 |
9153790800 ps |
| T171 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.3025784780 |
|
|
Jul 01 01:06:05 PM PDT 24 |
Jul 01 01:10:29 PM PDT 24 |
3138774056 ps |
| T88 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.3132471063 |
|
|
Jul 01 01:07:33 PM PDT 24 |
Jul 01 01:18:30 PM PDT 24 |
7238968260 ps |
| T547 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.2002114510 |
|
|
Jul 01 01:19:01 PM PDT 24 |
Jul 01 01:24:58 PM PDT 24 |
3555244260 ps |
| T166 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.3841586085 |
|
|
Jul 01 01:10:50 PM PDT 24 |
Jul 01 01:44:52 PM PDT 24 |
12090080810 ps |
| T47 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.337314002 |
|
|
Jul 01 01:04:17 PM PDT 24 |
Jul 01 02:28:34 PM PDT 24 |
18405882664 ps |
| T174 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.658337573 |
|
|
Jul 01 01:24:59 PM PDT 24 |
Jul 01 01:30:55 PM PDT 24 |
3111857199 ps |
| T165 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.757708103 |
|
|
Jul 01 01:41:50 PM PDT 24 |
Jul 01 01:55:58 PM PDT 24 |
5142691130 ps |
| T346 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.2971344261 |
|
|
Jul 01 01:38:18 PM PDT 24 |
Jul 01 01:45:05 PM PDT 24 |
3978409088 ps |
| T548 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.629729227 |
|
|
Jul 01 01:36:43 PM PDT 24 |
Jul 01 02:00:43 PM PDT 24 |
8521367696 ps |
| T213 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.3774567209 |
|
|
Jul 01 01:07:26 PM PDT 24 |
Jul 01 02:33:25 PM PDT 24 |
43133017305 ps |
| T188 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.4179248318 |
|
|
Jul 01 01:40:06 PM PDT 24 |
Jul 01 01:50:24 PM PDT 24 |
6366873560 ps |
| T278 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.452260579 |
|
|
Jul 01 01:28:45 PM PDT 24 |
Jul 01 01:34:09 PM PDT 24 |
3716740168 ps |
| T172 |
/workspace/coverage/default/2.chip_sw_hmac_enc.1566753047 |
|
|
Jul 01 01:23:38 PM PDT 24 |
Jul 01 01:27:48 PM PDT 24 |
2500781784 ps |
| T45 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.2114186385 |
|
|
Jul 01 01:08:11 PM PDT 24 |
Jul 01 01:22:09 PM PDT 24 |
4221160444 ps |
| T241 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.1701163016 |
|
|
Jul 01 01:39:34 PM PDT 24 |
Jul 01 01:50:44 PM PDT 24 |
4882365222 ps |
| T279 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.3620649169 |
|
|
Jul 01 01:05:02 PM PDT 24 |
Jul 01 01:09:33 PM PDT 24 |
3060422276 ps |
| T280 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.663884096 |
|
|
Jul 01 01:08:28 PM PDT 24 |
Jul 01 01:15:31 PM PDT 24 |
3705837574 ps |
| T185 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.655245725 |
|
|
Jul 01 01:24:09 PM PDT 24 |
Jul 01 02:31:27 PM PDT 24 |
14723242848 ps |
| T73 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.2039218284 |
|
|
Jul 01 01:22:45 PM PDT 24 |
Jul 01 02:32:38 PM PDT 24 |
29617142782 ps |
| T191 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.3056792550 |
|
|
Jul 01 01:12:52 PM PDT 24 |
Jul 01 03:12:19 PM PDT 24 |
24861062824 ps |
| T235 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.1356341173 |
|
|
Jul 01 01:37:29 PM PDT 24 |
Jul 01 01:45:47 PM PDT 24 |
3915589892 ps |
| T549 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.1393459402 |
|
|
Jul 01 01:07:34 PM PDT 24 |
Jul 01 01:19:15 PM PDT 24 |
4528739344 ps |
| T214 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.2654075000 |
|
|
Jul 01 01:05:55 PM PDT 24 |
Jul 01 01:43:33 PM PDT 24 |
19245785849 ps |
| T46 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.3517651013 |
|
|
Jul 01 01:29:34 PM PDT 24 |
Jul 01 01:35:09 PM PDT 24 |
3219304250 ps |
| T173 |
/workspace/coverage/default/1.chip_sw_hmac_enc.2467504405 |
|
|
Jul 01 01:14:40 PM PDT 24 |
Jul 01 01:19:24 PM PDT 24 |
3031331776 ps |
| T550 |
/workspace/coverage/default/2.chip_sw_hmac_oneshot.3865585202 |
|
|
Jul 01 01:24:16 PM PDT 24 |
Jul 01 01:29:38 PM PDT 24 |
2944292046 ps |
| T551 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.1110986170 |
|
|
Jul 01 01:21:25 PM PDT 24 |
Jul 01 01:25:22 PM PDT 24 |
2457290412 ps |
| T114 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.2965699460 |
|
|
Jul 01 01:32:04 PM PDT 24 |
Jul 01 01:42:34 PM PDT 24 |
5311356816 ps |
| T552 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.1831911771 |
|
|
Jul 01 01:14:51 PM PDT 24 |
Jul 01 01:44:14 PM PDT 24 |
6978673498 ps |
| T195 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.1616115535 |
|
|
Jul 01 01:06:04 PM PDT 24 |
Jul 01 01:26:25 PM PDT 24 |
6358851360 ps |
| T24 |
/workspace/coverage/default/0.chip_jtag_mem_access.3849381447 |
|
|
Jul 01 12:56:46 PM PDT 24 |
Jul 01 01:23:34 PM PDT 24 |
13856186585 ps |
| T363 |
/workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.4044656977 |
|
|
Jul 01 01:16:48 PM PDT 24 |
Jul 01 01:26:29 PM PDT 24 |
4155882744 ps |
| T109 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.1899042715 |
|
|
Jul 01 01:05:51 PM PDT 24 |
Jul 01 01:22:35 PM PDT 24 |
6693342136 ps |
| T401 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.1449495023 |
|
|
Jul 01 01:20:59 PM PDT 24 |
Jul 01 01:40:05 PM PDT 24 |
5602061502 ps |
| T507 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.1007344601 |
|
|
Jul 01 01:38:18 PM PDT 24 |
Jul 01 01:45:42 PM PDT 24 |
4141515250 ps |
| T161 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.505182668 |
|
|
Jul 01 01:37:15 PM PDT 24 |
Jul 01 01:48:27 PM PDT 24 |
4880741520 ps |
| T175 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.1550332615 |
|
|
Jul 01 01:29:16 PM PDT 24 |
Jul 01 01:33:59 PM PDT 24 |
2759498660 ps |
| T423 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.712289741 |
|
|
Jul 01 01:07:20 PM PDT 24 |
Jul 01 01:14:39 PM PDT 24 |
4477894846 ps |
| T203 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3746443467 |
|
|
Jul 01 01:37:50 PM PDT 24 |
Jul 01 01:47:33 PM PDT 24 |
4671232656 ps |
| T215 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.2452757906 |
|
|
Jul 01 01:21:57 PM PDT 24 |
Jul 01 02:51:11 PM PDT 24 |
50139810185 ps |
| T553 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.4196687531 |
|
|
Jul 01 01:07:49 PM PDT 24 |
Jul 01 01:11:40 PM PDT 24 |
2291826724 ps |
| T89 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.4193199057 |
|
|
Jul 01 01:23:14 PM PDT 24 |
Jul 01 01:37:11 PM PDT 24 |
10036622060 ps |
| T83 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.1252002642 |
|
|
Jul 01 01:08:33 PM PDT 24 |
Jul 01 04:59:49 PM PDT 24 |
65925687948 ps |
| T177 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.4170163920 |
|
|
Jul 01 01:27:55 PM PDT 24 |
Jul 01 01:33:08 PM PDT 24 |
3261870410 ps |
| T181 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.709785439 |
|
|
Jul 01 01:33:32 PM PDT 24 |
Jul 01 03:11:48 PM PDT 24 |
26968473600 ps |
| T271 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.4022768997 |
|
|
Jul 01 01:30:05 PM PDT 24 |
Jul 01 01:36:08 PM PDT 24 |
2775830792 ps |
| T179 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.2774361548 |
|
|
Jul 01 01:24:40 PM PDT 24 |
Jul 01 01:42:52 PM PDT 24 |
4252600704 ps |
| T554 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.2660969817 |
|
|
Jul 01 01:09:31 PM PDT 24 |
Jul 01 01:32:07 PM PDT 24 |
5145413848 ps |
| T25 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.9530694 |
|
|
Jul 01 01:27:18 PM PDT 24 |
Jul 01 01:38:35 PM PDT 24 |
5899603648 ps |
| T358 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.4145041179 |
|
|
Jul 01 01:06:32 PM PDT 24 |
Jul 01 01:11:07 PM PDT 24 |
2895773328 ps |
| T354 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.1415436968 |
|
|
Jul 01 01:40:17 PM PDT 24 |
Jul 01 01:54:18 PM PDT 24 |
5089690688 ps |
| T504 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.334332100 |
|
|
Jul 01 01:36:07 PM PDT 24 |
Jul 01 01:46:33 PM PDT 24 |
5593312320 ps |
| T180 |
/workspace/coverage/default/2.chip_sw_aes_enc.4137617187 |
|
|
Jul 01 01:23:29 PM PDT 24 |
Jul 01 01:27:17 PM PDT 24 |
2686588496 ps |
| T267 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.3099326247 |
|
|
Jul 01 01:38:17 PM PDT 24 |
Jul 01 01:50:27 PM PDT 24 |
4410134230 ps |
| T48 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.1227072077 |
|
|
Jul 01 01:06:56 PM PDT 24 |
Jul 01 01:15:02 PM PDT 24 |
6946293992 ps |
| T297 |
/workspace/coverage/default/2.rom_e2e_static_critical.2680346260 |
|
|
Jul 01 01:32:49 PM PDT 24 |
Jul 01 02:36:01 PM PDT 24 |
17131577630 ps |
| T298 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.4027206683 |
|
|
Jul 01 01:30:50 PM PDT 24 |
Jul 01 01:41:10 PM PDT 24 |
4743971320 ps |
| T110 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.275268743 |
|
|
Jul 01 01:30:27 PM PDT 24 |
Jul 01 01:45:24 PM PDT 24 |
7809088316 ps |
| T299 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.3468935856 |
|
|
Jul 01 01:32:08 PM PDT 24 |
Jul 01 01:44:59 PM PDT 24 |
4647075000 ps |
| T170 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.4060661392 |
|
|
Jul 01 01:07:14 PM PDT 24 |
Jul 01 01:20:34 PM PDT 24 |
4913913058 ps |
| T300 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.1603359485 |
|
|
Jul 01 01:04:42 PM PDT 24 |
Jul 01 01:31:32 PM PDT 24 |
8278422680 ps |
| T26 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.638932020 |
|
|
Jul 01 01:08:29 PM PDT 24 |
Jul 01 01:46:03 PM PDT 24 |
32778503317 ps |
| T301 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.167074048 |
|
|
Jul 01 01:35:20 PM PDT 24 |
Jul 01 01:48:15 PM PDT 24 |
4773427064 ps |
| T555 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.3339865172 |
|
|
Jul 01 01:26:54 PM PDT 24 |
Jul 01 01:37:11 PM PDT 24 |
4226413386 ps |
| T104 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.2549630073 |
|
|
Jul 01 01:28:12 PM PDT 24 |
Jul 01 02:34:14 PM PDT 24 |
25300258047 ps |
| T395 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.991905001 |
|
|
Jul 01 01:06:30 PM PDT 24 |
Jul 01 01:15:26 PM PDT 24 |
5974008428 ps |
| T232 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.4153448861 |
|
|
Jul 01 01:38:45 PM PDT 24 |
Jul 01 01:47:24 PM PDT 24 |
3438134152 ps |
| T186 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.3663573334 |
|
|
Jul 01 01:08:04 PM PDT 24 |
Jul 01 01:18:32 PM PDT 24 |
5555584496 ps |
| T357 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.316534413 |
|
|
Jul 01 01:32:20 PM PDT 24 |
Jul 01 01:41:51 PM PDT 24 |
4463028520 ps |
| T281 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.1592306583 |
|
|
Jul 01 01:19:22 PM PDT 24 |
Jul 01 01:21:16 PM PDT 24 |
2645204311 ps |
| T556 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.1126926633 |
|
|
Jul 01 01:09:54 PM PDT 24 |
Jul 01 01:16:33 PM PDT 24 |
3321344360 ps |
| T557 |
/workspace/coverage/default/1.chip_sw_aes_enc.418054420 |
|
|
Jul 01 01:11:03 PM PDT 24 |
Jul 01 01:15:21 PM PDT 24 |
2787092044 ps |
| T389 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.1014157950 |
|
|
Jul 01 01:38:25 PM PDT 24 |
Jul 01 01:44:23 PM PDT 24 |
3424404354 ps |
| T405 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.3690723947 |
|
|
Jul 01 01:39:22 PM PDT 24 |
Jul 01 01:45:35 PM PDT 24 |
3476667188 ps |
| T421 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.1746554394 |
|
|
Jul 01 01:19:11 PM PDT 24 |
Jul 01 01:23:24 PM PDT 24 |
2393043583 ps |
| T422 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.2225582067 |
|
|
Jul 01 01:23:57 PM PDT 24 |
Jul 01 01:42:02 PM PDT 24 |
5487270450 ps |
| T157 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.323912836 |
|
|
Jul 01 01:28:59 PM PDT 24 |
Jul 01 01:40:57 PM PDT 24 |
4007320632 ps |
| T282 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.47200932 |
|
|
Jul 01 01:08:59 PM PDT 24 |
Jul 01 01:10:48 PM PDT 24 |
2984472037 ps |
| T263 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.1210808770 |
|
|
Jul 01 01:06:15 PM PDT 24 |
Jul 01 01:19:52 PM PDT 24 |
4870149688 ps |
| T283 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.1865540765 |
|
|
Jul 01 01:13:06 PM PDT 24 |
Jul 01 01:18:13 PM PDT 24 |
2391346164 ps |
| T264 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.2825897192 |
|
|
Jul 01 01:32:42 PM PDT 24 |
Jul 01 01:43:58 PM PDT 24 |
6292213900 ps |
| T216 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.3931486094 |
|
|
Jul 01 01:03:23 PM PDT 24 |
Jul 01 02:52:00 PM PDT 24 |
48059186755 ps |
| T284 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.2380884838 |
|
|
Jul 01 01:04:02 PM PDT 24 |
Jul 01 01:17:55 PM PDT 24 |
8779007608 ps |
| T285 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.743830837 |
|
|
Jul 01 01:27:49 PM PDT 24 |
Jul 01 01:39:14 PM PDT 24 |
4772733564 ps |
| T286 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.932282927 |
|
|
Jul 01 01:28:36 PM PDT 24 |
Jul 01 01:49:58 PM PDT 24 |
5792797000 ps |
| T287 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.1617335798 |
|
|
Jul 01 01:03:54 PM PDT 24 |
Jul 01 01:07:01 PM PDT 24 |
2392505604 ps |
| T84 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.3104055521 |
|
|
Jul 01 01:06:54 PM PDT 24 |
Jul 01 01:14:25 PM PDT 24 |
6189676810 ps |
| T288 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.493413627 |
|
|
Jul 01 01:06:51 PM PDT 24 |
Jul 01 01:15:41 PM PDT 24 |
6802723158 ps |
| T558 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.3978641322 |
|
|
Jul 01 01:24:36 PM PDT 24 |
Jul 01 01:46:51 PM PDT 24 |
5603838092 ps |
| T67 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2731171083 |
|
|
Jul 01 01:05:24 PM PDT 24 |
Jul 01 01:11:36 PM PDT 24 |
5429366120 ps |
| T219 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.3007650294 |
|
|
Jul 01 01:04:25 PM PDT 24 |
Jul 01 01:08:06 PM PDT 24 |
2207918508 ps |
| T305 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.3765787027 |
|
|
Jul 01 01:14:15 PM PDT 24 |
Jul 01 01:38:24 PM PDT 24 |
7443941688 ps |
| T30 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.1983239920 |
|
|
Jul 01 01:17:17 PM PDT 24 |
Jul 01 01:25:03 PM PDT 24 |
4840903290 ps |
| T306 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.4086437044 |
|
|
Jul 01 01:32:43 PM PDT 24 |
Jul 01 01:44:36 PM PDT 24 |
4174407956 ps |
| T220 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.2283118882 |
|
|
Jul 01 01:04:53 PM PDT 24 |
Jul 01 01:10:17 PM PDT 24 |
3292873022 ps |
| T307 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.3113704363 |
|
|
Jul 01 01:12:24 PM PDT 24 |
Jul 01 01:18:55 PM PDT 24 |
3198817687 ps |
| T308 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.1810845931 |
|
|
Jul 01 01:24:26 PM PDT 24 |
Jul 01 02:07:08 PM PDT 24 |
12007854040 ps |
| T309 |
/workspace/coverage/default/1.chip_sw_flash_init.878706789 |
|
|
Jul 01 01:09:11 PM PDT 24 |
Jul 01 01:48:12 PM PDT 24 |
19955679272 ps |
| T204 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.528175679 |
|
|
Jul 01 01:36:51 PM PDT 24 |
Jul 01 01:49:50 PM PDT 24 |
5835352668 ps |
| T182 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.920605985 |
|
|
Jul 01 01:04:41 PM PDT 24 |
Jul 01 01:10:59 PM PDT 24 |
4252737540 ps |
| T196 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.625800117 |
|
|
Jul 01 01:04:17 PM PDT 24 |
Jul 01 02:23:46 PM PDT 24 |
17797936160 ps |
| T409 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.3068245658 |
|
|
Jul 01 01:04:33 PM PDT 24 |
Jul 01 02:34:31 PM PDT 24 |
28935083472 ps |
| T332 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.4114218143 |
|
|
Jul 01 01:40:04 PM PDT 24 |
Jul 01 01:51:37 PM PDT 24 |
6363323108 ps |
| T410 |
/workspace/coverage/default/0.chip_sw_example_concurrency.1570016323 |
|
|
Jul 01 01:05:36 PM PDT 24 |
Jul 01 01:11:52 PM PDT 24 |
2946412130 ps |
| T559 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.3722520326 |
|
|
Jul 01 01:32:06 PM PDT 24 |
Jul 01 01:47:41 PM PDT 24 |
9558605724 ps |
| T107 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.4203630197 |
|
|
Jul 01 01:27:22 PM PDT 24 |
Jul 01 02:33:59 PM PDT 24 |
24951987858 ps |
| T560 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.815124766 |
|
|
Jul 01 01:12:56 PM PDT 24 |
Jul 01 01:31:07 PM PDT 24 |
5798063656 ps |
| T407 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.2620199824 |
|
|
Jul 01 01:16:37 PM PDT 24 |
Jul 01 01:24:57 PM PDT 24 |
3945374354 ps |
| T404 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.4199094316 |
|
|
Jul 01 01:42:00 PM PDT 24 |
Jul 01 01:49:00 PM PDT 24 |
3093222040 ps |
| T505 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.3440382566 |
|
|
Jul 01 01:37:08 PM PDT 24 |
Jul 01 01:44:42 PM PDT 24 |
3597387144 ps |
| T154 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.1250451931 |
|
|
Jul 01 01:24:57 PM PDT 24 |
Jul 01 01:53:29 PM PDT 24 |
7045132992 ps |
| T316 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.1245363778 |
|
|
Jul 01 01:11:55 PM PDT 24 |
Jul 01 01:38:58 PM PDT 24 |
7679508008 ps |
| T317 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.4121039641 |
|
|
Jul 01 01:26:28 PM PDT 24 |
Jul 01 02:04:22 PM PDT 24 |
10820517360 ps |
| T339 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.681734663 |
|
|
Jul 01 01:36:28 PM PDT 24 |
Jul 01 01:45:02 PM PDT 24 |
4589120024 ps |
| T331 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.2451414056 |
|
|
Jul 01 01:12:09 PM PDT 24 |
Jul 01 01:35:59 PM PDT 24 |
7326391540 ps |
| T482 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.3797512623 |
|
|
Jul 01 01:40:21 PM PDT 24 |
Jul 01 01:47:56 PM PDT 24 |
3545760412 ps |
| T128 |
/workspace/coverage/default/3.chip_tap_straps_prod.3072654583 |
|
|
Jul 01 01:30:26 PM PDT 24 |
Jul 01 01:51:38 PM PDT 24 |
9787709079 ps |
| T200 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.2057480107 |
|
|
Jul 01 01:37:32 PM PDT 24 |
Jul 01 01:50:15 PM PDT 24 |
5265863208 ps |
| T561 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.3733973826 |
|
|
Jul 01 01:35:22 PM PDT 24 |
Jul 01 01:44:35 PM PDT 24 |
7410242050 ps |
| T108 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2104556132 |
|
|
Jul 01 01:19:47 PM PDT 24 |
Jul 01 02:24:26 PM PDT 24 |
24539471573 ps |
| T94 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.2205192366 |
|
|
Jul 01 01:17:02 PM PDT 24 |
Jul 01 01:25:19 PM PDT 24 |
3771986184 ps |
| T184 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3223999420 |
|
|
Jul 01 01:24:24 PM PDT 24 |
Jul 01 01:35:04 PM PDT 24 |
6881285433 ps |
| T183 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.3263085507 |
|
|
Jul 01 01:16:43 PM PDT 24 |
Jul 01 01:26:51 PM PDT 24 |
4604441854 ps |
| T562 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3640061895 |
|
|
Jul 01 01:20:08 PM PDT 24 |
Jul 01 02:46:28 PM PDT 24 |
43903742320 ps |
| T563 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.310728242 |
|
|
Jul 01 01:33:53 PM PDT 24 |
Jul 01 02:02:24 PM PDT 24 |
8963908368 ps |
| T313 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.2679236925 |
|
|
Jul 01 01:19:42 PM PDT 24 |
Jul 01 01:36:13 PM PDT 24 |
8459324904 ps |
| T120 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.3445841058 |
|
|
Jul 01 01:31:38 PM PDT 24 |
Jul 01 01:47:03 PM PDT 24 |
4018621673 ps |
| T99 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.755803641 |
|
|
Jul 01 01:10:24 PM PDT 24 |
Jul 01 01:21:38 PM PDT 24 |
19334100896 ps |
| T223 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.324987167 |
|
|
Jul 01 01:36:17 PM PDT 24 |
Jul 01 01:43:56 PM PDT 24 |
3818942050 ps |
| T417 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.2011332274 |
|
|
Jul 01 01:05:19 PM PDT 24 |
Jul 01 01:09:41 PM PDT 24 |
2291574021 ps |
| T265 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.224226145 |
|
|
Jul 01 01:03:40 PM PDT 24 |
Jul 01 01:15:13 PM PDT 24 |
6374816200 ps |
| T564 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.680577669 |
|
|
Jul 01 01:32:27 PM PDT 24 |
Jul 01 01:39:53 PM PDT 24 |
4811199036 ps |
| T131 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3068764739 |
|
|
Jul 01 01:12:26 PM PDT 24 |
Jul 01 04:59:48 PM PDT 24 |
254862329304 ps |
| T95 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.600776251 |
|
|
Jul 01 01:19:18 PM PDT 24 |
Jul 01 01:28:42 PM PDT 24 |
5160465597 ps |
| T565 |
/workspace/coverage/default/2.chip_sw_example_concurrency.4061839388 |
|
|
Jul 01 01:19:27 PM PDT 24 |
Jul 01 01:22:37 PM PDT 24 |
2467056664 ps |
| T74 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.1727837664 |
|
|
Jul 01 01:33:28 PM PDT 24 |
Jul 01 02:44:42 PM PDT 24 |
15200328616 ps |
| T326 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.4129161343 |
|
|
Jul 01 01:03:46 PM PDT 24 |
Jul 01 02:43:44 PM PDT 24 |
49403889464 ps |
| T566 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.1087786611 |
|
|
Jul 01 01:30:16 PM PDT 24 |
Jul 01 01:33:38 PM PDT 24 |
2833591416 ps |
| T162 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.4197546667 |
|
|
Jul 01 01:17:55 PM PDT 24 |
Jul 01 01:21:26 PM PDT 24 |
3077776460 ps |
| T121 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2895244035 |
|
|
Jul 01 01:26:54 PM PDT 24 |
Jul 01 01:41:59 PM PDT 24 |
4017480100 ps |
| T396 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.4260368871 |
|
|
Jul 01 01:33:08 PM PDT 24 |
Jul 01 02:32:55 PM PDT 24 |
14836030510 ps |
| T122 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2664126890 |
|
|
Jul 01 01:05:08 PM PDT 24 |
Jul 01 01:13:11 PM PDT 24 |
4187369446 ps |
| T201 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.3005287329 |
|
|
Jul 01 01:36:17 PM PDT 24 |
Jul 01 01:42:53 PM PDT 24 |
4173986600 ps |
| T217 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.1909326315 |
|
|
Jul 01 01:21:41 PM PDT 24 |
Jul 01 01:24:13 PM PDT 24 |
2705126485 ps |
| T8 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.1916049222 |
|
|
Jul 01 01:18:13 PM PDT 24 |
Jul 01 01:26:52 PM PDT 24 |
4658749730 ps |
| T384 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.2733906565 |
|
|
Jul 01 01:39:14 PM PDT 24 |
Jul 01 01:48:15 PM PDT 24 |
4422593244 ps |
| T451 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.2295600075 |
|
|
Jul 01 01:23:06 PM PDT 24 |
Jul 01 02:28:47 PM PDT 24 |
14807377333 ps |
| T452 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.2101788479 |
|
|
Jul 01 01:03:30 PM PDT 24 |
Jul 01 01:11:15 PM PDT 24 |
4592606680 ps |
| T85 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.2661984826 |
|
|
Jul 01 01:15:13 PM PDT 24 |
Jul 01 01:18:46 PM PDT 24 |
3037676062 ps |
| T453 |
/workspace/coverage/default/1.chip_sw_aes_entropy.1741215375 |
|
|
Jul 01 01:12:47 PM PDT 24 |
Jul 01 01:19:06 PM PDT 24 |
2291433864 ps |
| T454 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.749675596 |
|
|
Jul 01 01:22:09 PM PDT 24 |
Jul 01 01:28:43 PM PDT 24 |
6442439496 ps |
| T353 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.1345155097 |
|
|
Jul 01 01:40:47 PM PDT 24 |
Jul 01 01:49:49 PM PDT 24 |
4222041520 ps |
| T105 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.4043487150 |
|
|
Jul 01 01:08:39 PM PDT 24 |
Jul 01 01:41:47 PM PDT 24 |
10553377183 ps |
| T350 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.1488499693 |
|
|
Jul 01 01:38:31 PM PDT 24 |
Jul 01 01:47:36 PM PDT 24 |
3693552760 ps |
| T225 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.826202606 |
|
|
Jul 01 01:07:26 PM PDT 24 |
Jul 01 01:27:27 PM PDT 24 |
5556602336 ps |
| T567 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.4216775649 |
|
|
Jul 01 01:15:02 PM PDT 24 |
Jul 01 02:18:57 PM PDT 24 |
18730221000 ps |
| T367 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.292794193 |
|
|
Jul 01 01:07:31 PM PDT 24 |
Jul 01 01:19:55 PM PDT 24 |
3837470884 ps |
| T568 |
/workspace/coverage/default/1.chip_sw_kmac_idle.1303067666 |
|
|
Jul 01 01:15:22 PM PDT 24 |
Jul 01 01:19:23 PM PDT 24 |
2675344480 ps |
| T81 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.1018631100 |
|
|
Jul 01 01:06:53 PM PDT 24 |
Jul 01 03:59:42 PM PDT 24 |
58666736184 ps |
| T569 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.4148140779 |
|
|
Jul 01 01:06:32 PM PDT 24 |
Jul 01 01:10:13 PM PDT 24 |
2535547624 ps |
| T570 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2012164384 |
|
|
Jul 01 01:03:24 PM PDT 24 |
Jul 01 01:13:57 PM PDT 24 |
4301068120 ps |
| T272 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.2747446578 |
|
|
Jul 01 01:16:15 PM PDT 24 |
Jul 01 01:21:07 PM PDT 24 |
2925200880 ps |
| T289 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.1617892048 |
|
|
Jul 01 01:25:06 PM PDT 24 |
Jul 01 01:34:01 PM PDT 24 |
4439844900 ps |
| T571 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.2189625100 |
|
|
Jul 01 01:13:56 PM PDT 24 |
Jul 01 01:19:26 PM PDT 24 |
3233198270 ps |
| T96 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.2072646197 |
|
|
Jul 01 01:26:02 PM PDT 24 |
Jul 01 01:39:06 PM PDT 24 |
5773117323 ps |
| T373 |
/workspace/coverage/default/2.chip_sival_flash_info_access.2834205558 |
|
|
Jul 01 01:20:08 PM PDT 24 |
Jul 01 01:25:04 PM PDT 24 |
2715101450 ps |
| T268 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.10797425 |
|
|
Jul 01 01:36:45 PM PDT 24 |
Jul 01 01:44:57 PM PDT 24 |
3631255158 ps |
| T572 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.1496780410 |
|
|
Jul 01 01:18:26 PM PDT 24 |
Jul 01 01:31:17 PM PDT 24 |
5005504474 ps |
| T385 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.2283491719 |
|
|
Jul 01 01:37:37 PM PDT 24 |
Jul 01 01:44:05 PM PDT 24 |
3426688244 ps |
| T573 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.738804254 |
|
|
Jul 01 01:17:25 PM PDT 24 |
Jul 01 01:27:35 PM PDT 24 |
4814603328 ps |
| T483 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.592837226 |
|
|
Jul 01 01:36:57 PM PDT 24 |
Jul 01 01:44:21 PM PDT 24 |
3633507250 ps |
| T49 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.503858982 |
|
|
Jul 01 01:03:09 PM PDT 24 |
Jul 01 01:12:59 PM PDT 24 |
4263243898 ps |
| T229 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.3103775246 |
|
|
Jul 01 01:08:14 PM PDT 24 |
Jul 01 01:24:50 PM PDT 24 |
4723358040 ps |
| T574 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.1328414153 |
|
|
Jul 01 01:31:19 PM PDT 24 |
Jul 01 02:42:23 PM PDT 24 |
20823101272 ps |
| T1 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.1324690330 |
|
|
Jul 01 01:07:14 PM PDT 24 |
Jul 01 01:12:36 PM PDT 24 |
5210353990 ps |
| T144 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.1364804927 |
|
|
Jul 01 01:35:45 PM PDT 24 |
Jul 01 01:47:58 PM PDT 24 |
5748397294 ps |
| T145 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.1855292104 |
|
|
Jul 01 01:07:07 PM PDT 24 |
Jul 01 01:15:27 PM PDT 24 |
3712381448 ps |
| T146 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.64378781 |
|
|
Jul 01 01:05:27 PM PDT 24 |
Jul 01 01:12:56 PM PDT 24 |
4957845920 ps |
| T147 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.2798079956 |
|
|
Jul 01 01:04:24 PM PDT 24 |
Jul 01 01:26:55 PM PDT 24 |
9417387288 ps |
| T148 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2060414609 |
|
|
Jul 01 01:30:48 PM PDT 24 |
Jul 01 01:39:55 PM PDT 24 |
3814184608 ps |
| T149 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.4192838257 |
|
|
Jul 01 01:38:30 PM PDT 24 |
Jul 01 01:48:25 PM PDT 24 |
5435783560 ps |
| T150 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.125052290 |
|
|
Jul 01 01:25:31 PM PDT 24 |
Jul 01 01:33:47 PM PDT 24 |
9670499702 ps |
| T151 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.3235502633 |
|
|
Jul 01 01:04:54 PM PDT 24 |
Jul 01 01:08:52 PM PDT 24 |
2934009072 ps |
| T50 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.3493200440 |
|
|
Jul 01 01:28:42 PM PDT 24 |
Jul 01 01:35:07 PM PDT 24 |
6812275448 ps |
| T374 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.2423497966 |
|
|
Jul 01 01:33:31 PM PDT 24 |
Jul 01 01:42:51 PM PDT 24 |
4746612940 ps |
| T39 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.4210064121 |
|
|
Jul 01 01:07:53 PM PDT 24 |
Jul 01 01:13:07 PM PDT 24 |
3197081807 ps |
| T70 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.2728067797 |
|
|
Jul 01 01:04:35 PM PDT 24 |
Jul 01 01:11:11 PM PDT 24 |
3420223368 ps |
| T347 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.118484179 |
|
|
Jul 01 01:30:56 PM PDT 24 |
Jul 01 01:41:11 PM PDT 24 |
3646579440 ps |
| T575 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.1423040778 |
|
|
Jul 01 01:07:07 PM PDT 24 |
Jul 01 01:22:04 PM PDT 24 |
5487333100 ps |
| T487 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2649927951 |
|
|
Jul 01 01:37:28 PM PDT 24 |
Jul 01 01:47:39 PM PDT 24 |
5081980700 ps |
| T576 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.1451003974 |
|
|
Jul 01 01:12:13 PM PDT 24 |
Jul 01 01:29:24 PM PDT 24 |
6820551180 ps |
| T577 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.176327189 |
|
|
Jul 01 01:33:20 PM PDT 24 |
Jul 01 01:41:12 PM PDT 24 |
3683169512 ps |
| T311 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.3860284276 |
|
|
Jul 01 01:03:58 PM PDT 24 |
Jul 01 01:19:57 PM PDT 24 |
5344523400 ps |
| T56 |
/workspace/coverage/default/1.chip_sw_gpio.2298818664 |
|
|
Jul 01 01:07:04 PM PDT 24 |
Jul 01 01:15:00 PM PDT 24 |
3904137074 ps |
| T578 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.4102948827 |
|
|
Jul 01 01:23:27 PM PDT 24 |
Jul 01 01:35:16 PM PDT 24 |
5153691256 ps |
| T319 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.3870896708 |
|
|
Jul 01 01:34:54 PM PDT 24 |
Jul 01 01:47:25 PM PDT 24 |
5617523440 ps |
| T406 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.3160112755 |
|
|
Jul 01 01:40:04 PM PDT 24 |
Jul 01 01:49:23 PM PDT 24 |
4979670760 ps |
| T579 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.46085081 |
|
|
Jul 01 01:04:39 PM PDT 24 |
Jul 01 01:13:34 PM PDT 24 |
4719052622 ps |
| T32 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.3821369765 |
|
|
Jul 01 01:41:09 PM PDT 24 |
Jul 01 01:50:14 PM PDT 24 |
5989894290 ps |
| T580 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.1460589398 |
|
|
Jul 01 01:11:41 PM PDT 24 |
Jul 01 02:18:30 PM PDT 24 |
15194618330 ps |
| T403 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.2739532836 |
|
|
Jul 01 01:35:23 PM PDT 24 |
Jul 01 01:42:40 PM PDT 24 |
4152595862 ps |
| T581 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.2097269660 |
|
|
Jul 01 01:22:55 PM PDT 24 |
Jul 01 01:43:33 PM PDT 24 |
8068457244 ps |
| T42 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.4143831704 |
|
|
Jul 01 01:03:12 PM PDT 24 |
Jul 01 01:11:55 PM PDT 24 |
4189678466 ps |
| T369 |
/workspace/coverage/default/1.chip_sival_flash_info_access.3228645112 |
|
|
Jul 01 01:08:36 PM PDT 24 |
Jul 01 01:14:18 PM PDT 24 |
3179791146 ps |