| T1226 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1421169600 |
|
|
Jul 02 11:18:01 AM PDT 24 |
Jul 02 11:27:35 AM PDT 24 |
7903059544 ps |
| T805 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.2178314018 |
|
|
Jul 02 11:35:36 AM PDT 24 |
Jul 02 11:41:39 AM PDT 24 |
4386894350 ps |
| T287 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.4134687893 |
|
|
Jul 02 11:22:22 AM PDT 24 |
Jul 02 11:26:58 AM PDT 24 |
3307419030 ps |
| T1227 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.2528071624 |
|
|
Jul 02 10:59:15 AM PDT 24 |
Jul 02 11:06:53 AM PDT 24 |
7124250703 ps |
| T1228 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.2877100626 |
|
|
Jul 02 11:07:54 AM PDT 24 |
Jul 02 11:14:20 AM PDT 24 |
3055953606 ps |
| T1229 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.3698270077 |
|
|
Jul 02 11:13:26 AM PDT 24 |
Jul 02 11:23:16 AM PDT 24 |
5667471384 ps |
| T1230 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.351548638 |
|
|
Jul 02 11:17:23 AM PDT 24 |
Jul 02 11:59:39 AM PDT 24 |
22174190174 ps |
| T792 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.3911765465 |
|
|
Jul 02 11:36:52 AM PDT 24 |
Jul 02 11:45:39 AM PDT 24 |
5879528880 ps |
| T1231 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.3036476853 |
|
|
Jul 02 11:01:41 AM PDT 24 |
Jul 02 11:11:11 AM PDT 24 |
3995205014 ps |
| T839 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.2537203095 |
|
|
Jul 02 11:28:44 AM PDT 24 |
Jul 02 11:37:48 AM PDT 24 |
4747247750 ps |
| T1232 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.349892531 |
|
|
Jul 02 11:03:51 AM PDT 24 |
Jul 02 11:16:09 AM PDT 24 |
3823640004 ps |
| T201 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.2268287774 |
|
|
Jul 02 11:03:50 AM PDT 24 |
Jul 02 02:15:58 PM PDT 24 |
63487650053 ps |
| T1233 |
/workspace/coverage/default/0.chip_sw_edn_kat.4098958044 |
|
|
Jul 02 10:59:42 AM PDT 24 |
Jul 02 11:12:16 AM PDT 24 |
3075191200 ps |
| T1234 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.2995409826 |
|
|
Jul 02 11:16:28 AM PDT 24 |
Jul 02 11:41:57 AM PDT 24 |
8702888608 ps |
| T1235 |
/workspace/coverage/default/2.rom_e2e_smoke.336430466 |
|
|
Jul 02 11:28:59 AM PDT 24 |
Jul 02 12:22:43 PM PDT 24 |
14395660984 ps |
| T67 |
/workspace/coverage/default/0.chip_tap_straps_rma.2850436985 |
|
|
Jul 02 11:01:16 AM PDT 24 |
Jul 02 11:03:30 AM PDT 24 |
2566809877 ps |
| T1236 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.2219687370 |
|
|
Jul 02 10:58:28 AM PDT 24 |
Jul 02 11:12:22 AM PDT 24 |
10182298150 ps |
| T1237 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.4265555834 |
|
|
Jul 02 11:26:44 AM PDT 24 |
Jul 02 11:37:29 AM PDT 24 |
4810759912 ps |
| T713 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.198324030 |
|
|
Jul 02 11:05:49 AM PDT 24 |
Jul 02 11:08:02 AM PDT 24 |
2842834317 ps |
| T1238 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.815990237 |
|
|
Jul 02 11:05:46 AM PDT 24 |
Jul 02 11:13:14 AM PDT 24 |
6899424920 ps |
| T1239 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.2425694586 |
|
|
Jul 02 11:16:25 AM PDT 24 |
Jul 02 11:38:57 AM PDT 24 |
6166029058 ps |
| T1240 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.968652869 |
|
|
Jul 02 11:10:12 AM PDT 24 |
Jul 02 11:17:11 AM PDT 24 |
4521548394 ps |
| T835 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.203813876 |
|
|
Jul 02 11:27:35 AM PDT 24 |
Jul 02 11:40:33 AM PDT 24 |
5772012112 ps |
| T1241 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.3855566985 |
|
|
Jul 02 11:24:34 AM PDT 24 |
Jul 02 11:32:48 AM PDT 24 |
5817797040 ps |
| T1242 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.1051228538 |
|
|
Jul 02 11:17:33 AM PDT 24 |
Jul 02 12:19:04 PM PDT 24 |
14769808602 ps |
| T1243 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.1541044092 |
|
|
Jul 02 11:20:22 AM PDT 24 |
Jul 02 11:30:49 AM PDT 24 |
5330628432 ps |
| T1244 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.849090745 |
|
|
Jul 02 11:20:35 AM PDT 24 |
Jul 02 11:25:07 AM PDT 24 |
2682450559 ps |
| T809 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.1625509598 |
|
|
Jul 02 11:03:16 AM PDT 24 |
Jul 02 11:17:07 AM PDT 24 |
5304072264 ps |
| T202 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.697780815 |
|
|
Jul 02 11:15:04 AM PDT 24 |
Jul 02 03:04:09 PM PDT 24 |
78788156552 ps |
| T1245 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1904102824 |
|
|
Jul 02 11:23:09 AM PDT 24 |
Jul 02 12:20:16 PM PDT 24 |
25312985346 ps |
| T782 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.522922532 |
|
|
Jul 02 11:35:14 AM PDT 24 |
Jul 02 11:43:17 AM PDT 24 |
3899756728 ps |
| T1246 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.2524313926 |
|
|
Jul 02 11:06:59 AM PDT 24 |
Jul 02 12:21:36 PM PDT 24 |
15983727618 ps |
| T779 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.3465589574 |
|
|
Jul 02 11:34:00 AM PDT 24 |
Jul 02 11:41:05 AM PDT 24 |
3472429564 ps |
| T795 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.1631659055 |
|
|
Jul 02 11:33:43 AM PDT 24 |
Jul 02 11:41:07 AM PDT 24 |
3757726088 ps |
| T147 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.1294591647 |
|
|
Jul 02 11:04:49 AM PDT 24 |
Jul 02 02:11:08 PM PDT 24 |
58186347496 ps |
| T1247 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.4152404932 |
|
|
Jul 02 11:00:55 AM PDT 24 |
Jul 02 11:08:27 AM PDT 24 |
3570566016 ps |
| T241 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.3599604327 |
|
|
Jul 02 11:06:41 AM PDT 24 |
Jul 02 11:16:49 AM PDT 24 |
5108263050 ps |
| T761 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.1343375547 |
|
|
Jul 02 11:34:32 AM PDT 24 |
Jul 02 11:43:07 AM PDT 24 |
4173187408 ps |
| T1248 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.442764871 |
|
|
Jul 02 11:07:30 AM PDT 24 |
Jul 02 12:05:51 PM PDT 24 |
18634803977 ps |
| T1249 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.3020142858 |
|
|
Jul 02 11:26:54 AM PDT 24 |
Jul 02 11:35:27 AM PDT 24 |
6952240990 ps |
| T324 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.661850614 |
|
|
Jul 02 11:09:50 AM PDT 24 |
Jul 02 11:32:04 AM PDT 24 |
6365839900 ps |
| T1250 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.1310366501 |
|
|
Jul 02 11:13:55 AM PDT 24 |
Jul 02 11:35:00 AM PDT 24 |
6016915840 ps |
| T1251 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.922565817 |
|
|
Jul 02 10:59:37 AM PDT 24 |
Jul 02 11:11:19 AM PDT 24 |
5581402582 ps |
| T1252 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3159287385 |
|
|
Jul 02 11:05:37 AM PDT 24 |
Jul 02 11:16:42 AM PDT 24 |
4166408896 ps |
| T802 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.1931442914 |
|
|
Jul 02 11:33:52 AM PDT 24 |
Jul 02 11:43:02 AM PDT 24 |
5400521260 ps |
| T1253 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.1536190762 |
|
|
Jul 02 11:15:23 AM PDT 24 |
Jul 02 02:35:58 PM PDT 24 |
64998653896 ps |
| T1254 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.1974410981 |
|
|
Jul 02 11:04:45 AM PDT 24 |
Jul 02 11:20:52 AM PDT 24 |
5822166531 ps |
| T811 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.91068901 |
|
|
Jul 02 11:33:53 AM PDT 24 |
Jul 02 11:46:06 AM PDT 24 |
4722266576 ps |
| T1255 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.3660327715 |
|
|
Jul 02 11:10:53 AM PDT 24 |
Jul 02 11:16:25 AM PDT 24 |
3689625703 ps |
| T801 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.2431496997 |
|
|
Jul 02 11:35:48 AM PDT 24 |
Jul 02 11:42:42 AM PDT 24 |
3751033288 ps |
| T1256 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.3637353013 |
|
|
Jul 02 11:14:41 AM PDT 24 |
Jul 02 11:19:40 AM PDT 24 |
2112869752 ps |
| T1257 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.1818364454 |
|
|
Jul 02 11:01:24 AM PDT 24 |
Jul 02 11:10:06 AM PDT 24 |
3293763912 ps |
| T1258 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.3849757409 |
|
|
Jul 02 11:09:56 AM PDT 24 |
Jul 02 11:14:42 AM PDT 24 |
3025725680 ps |
| T1259 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.4127531792 |
|
|
Jul 02 11:07:54 AM PDT 24 |
Jul 02 11:16:01 AM PDT 24 |
3166352310 ps |
| T793 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.1873964981 |
|
|
Jul 02 11:34:52 AM PDT 24 |
Jul 02 11:44:26 AM PDT 24 |
4705920904 ps |
| T1260 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.1459749349 |
|
|
Jul 02 11:10:36 AM PDT 24 |
Jul 02 12:39:07 PM PDT 24 |
24159581828 ps |
| T1261 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.2131616779 |
|
|
Jul 02 11:28:51 AM PDT 24 |
Jul 02 12:31:15 PM PDT 24 |
15421284271 ps |
| T1262 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.4142760048 |
|
|
Jul 02 11:14:27 AM PDT 24 |
Jul 02 11:19:51 AM PDT 24 |
3405526400 ps |
| T716 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.387969643 |
|
|
Jul 02 11:17:20 AM PDT 24 |
Jul 02 11:20:59 AM PDT 24 |
2202418076 ps |
| T62 |
/workspace/coverage/default/1.chip_jtag_csr_rw.1062648084 |
|
|
Jul 02 11:04:08 AM PDT 24 |
Jul 02 11:22:17 AM PDT 24 |
9126026950 ps |
| T815 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.367570186 |
|
|
Jul 02 11:28:40 AM PDT 24 |
Jul 02 11:35:46 AM PDT 24 |
4502744452 ps |
| T11 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.481231639 |
|
|
Jul 02 11:15:37 AM PDT 24 |
Jul 02 11:22:02 AM PDT 24 |
4286933400 ps |
| T777 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.607543165 |
|
|
Jul 02 11:37:21 AM PDT 24 |
Jul 02 11:46:12 AM PDT 24 |
6251581166 ps |
| T1263 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.717629598 |
|
|
Jul 02 11:29:47 AM PDT 24 |
Jul 02 11:58:19 AM PDT 24 |
8307422920 ps |
| T1264 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.1747798779 |
|
|
Jul 02 11:10:31 AM PDT 24 |
Jul 02 11:51:54 AM PDT 24 |
12361330614 ps |
| T243 |
/workspace/coverage/default/2.chip_sw_alert_test.74215250 |
|
|
Jul 02 11:21:16 AM PDT 24 |
Jul 02 11:27:17 AM PDT 24 |
3197669916 ps |
| T714 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.2080055354 |
|
|
Jul 02 10:59:58 AM PDT 24 |
Jul 02 11:02:33 AM PDT 24 |
3237626281 ps |
| T1265 |
/workspace/coverage/default/1.chip_sw_aes_entropy.2584414742 |
|
|
Jul 02 11:08:03 AM PDT 24 |
Jul 02 11:12:39 AM PDT 24 |
3687268414 ps |
| T810 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.54394301 |
|
|
Jul 02 10:57:42 AM PDT 24 |
Jul 02 11:10:08 AM PDT 24 |
6320744200 ps |
| T1266 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.484276007 |
|
|
Jul 02 11:21:31 AM PDT 24 |
Jul 02 11:28:46 AM PDT 24 |
4272618362 ps |
| T1267 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.3211684708 |
|
|
Jul 02 11:21:04 AM PDT 24 |
Jul 02 11:28:30 AM PDT 24 |
3078098812 ps |
| T1268 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.1056210257 |
|
|
Jul 02 11:04:20 AM PDT 24 |
Jul 02 02:47:11 PM PDT 24 |
77449492520 ps |
| T794 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.137519384 |
|
|
Jul 02 11:30:00 AM PDT 24 |
Jul 02 11:39:48 AM PDT 24 |
5054160670 ps |
| T68 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.1019158425 |
|
|
Jul 02 11:25:54 AM PDT 24 |
Jul 02 11:31:10 AM PDT 24 |
3865370461 ps |
| T823 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.687005225 |
|
|
Jul 02 11:31:08 AM PDT 24 |
Jul 02 11:38:46 AM PDT 24 |
3595990134 ps |
| T1269 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.290808472 |
|
|
Jul 02 11:08:06 AM PDT 24 |
Jul 02 12:02:59 PM PDT 24 |
11189289940 ps |
| T1270 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.2286986078 |
|
|
Jul 02 11:32:09 AM PDT 24 |
Jul 02 11:42:28 AM PDT 24 |
4786249400 ps |
| T1271 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.4157114170 |
|
|
Jul 02 11:22:19 AM PDT 24 |
Jul 02 11:33:21 AM PDT 24 |
4900753830 ps |
| T1272 |
/workspace/coverage/default/1.chip_sw_kmac_idle.1507958938 |
|
|
Jul 02 11:10:10 AM PDT 24 |
Jul 02 11:15:04 AM PDT 24 |
2618649754 ps |
| T1273 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.2759487094 |
|
|
Jul 02 11:10:44 AM PDT 24 |
Jul 02 11:21:28 AM PDT 24 |
8110856294 ps |
| T262 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.795645645 |
|
|
Jul 02 10:59:34 AM PDT 24 |
Jul 02 11:10:40 AM PDT 24 |
7490919182 ps |
| T1274 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.807002047 |
|
|
Jul 02 11:09:02 AM PDT 24 |
Jul 02 11:22:33 AM PDT 24 |
7503609091 ps |
| T789 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.3501692695 |
|
|
Jul 02 11:36:19 AM PDT 24 |
Jul 02 11:41:40 AM PDT 24 |
4527979984 ps |
| T710 |
/workspace/coverage/default/3.chip_tap_straps_dev.1079688764 |
|
|
Jul 02 11:26:30 AM PDT 24 |
Jul 02 11:43:47 AM PDT 24 |
9663012559 ps |
| T709 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.1205014476 |
|
|
Jul 02 11:23:22 AM PDT 24 |
Jul 02 11:33:39 AM PDT 24 |
4657182046 ps |
| T288 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.2252606505 |
|
|
Jul 02 11:25:00 AM PDT 24 |
Jul 02 11:28:31 AM PDT 24 |
2206760174 ps |
| T1275 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.1071057630 |
|
|
Jul 02 11:07:06 AM PDT 24 |
Jul 02 11:15:12 AM PDT 24 |
4070538720 ps |
| T8 |
/workspace/coverage/default/0.chip_jtag_csr_rw.2138198902 |
|
|
Jul 02 10:52:24 AM PDT 24 |
Jul 02 11:19:46 AM PDT 24 |
13843856166 ps |
| T413 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.4070073073 |
|
|
Jul 02 11:09:54 AM PDT 24 |
Jul 02 11:21:42 AM PDT 24 |
4562042888 ps |
| T414 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.2698795591 |
|
|
Jul 02 11:04:46 AM PDT 24 |
Jul 02 11:08:30 AM PDT 24 |
2957356660 ps |
| T415 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.3471498844 |
|
|
Jul 02 11:31:55 AM PDT 24 |
Jul 02 11:38:05 AM PDT 24 |
3712887858 ps |
| T416 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.1632084749 |
|
|
Jul 02 11:03:33 AM PDT 24 |
Jul 02 11:06:18 AM PDT 24 |
3212289034 ps |
| T417 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.3633516436 |
|
|
Jul 02 11:28:50 AM PDT 24 |
Jul 02 11:38:57 AM PDT 24 |
4287495148 ps |
| T418 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.3543975222 |
|
|
Jul 02 11:29:43 AM PDT 24 |
Jul 02 11:41:10 AM PDT 24 |
8654843500 ps |
| T187 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.1749759413 |
|
|
Jul 02 10:57:45 AM PDT 24 |
Jul 02 12:32:31 PM PDT 24 |
44849774160 ps |
| T419 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.1767965839 |
|
|
Jul 02 11:00:18 AM PDT 24 |
Jul 02 11:10:44 AM PDT 24 |
5973979820 ps |
| T420 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.1997220039 |
|
|
Jul 02 11:36:43 AM PDT 24 |
Jul 02 11:42:20 AM PDT 24 |
3269270560 ps |
| T1276 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.1315050025 |
|
|
Jul 02 11:16:44 AM PDT 24 |
Jul 02 11:36:01 AM PDT 24 |
6630428968 ps |
| T1277 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.3441238781 |
|
|
Jul 02 11:17:38 AM PDT 24 |
Jul 02 11:55:45 AM PDT 24 |
11301660561 ps |
| T433 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1336087451 |
|
|
Jul 02 11:01:48 AM PDT 24 |
Jul 02 11:37:46 AM PDT 24 |
23470908314 ps |
| T1278 |
/workspace/coverage/default/1.chip_sw_aes_enc.3143195472 |
|
|
Jul 02 11:07:17 AM PDT 24 |
Jul 02 11:12:41 AM PDT 24 |
2782194976 ps |
| T130 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1545095255 |
|
|
Jul 02 11:25:18 AM PDT 24 |
Jul 02 11:32:14 AM PDT 24 |
5250528850 ps |
| T1279 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.239748417 |
|
|
Jul 02 11:02:18 AM PDT 24 |
Jul 02 12:17:00 PM PDT 24 |
15233357592 ps |
| T1280 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.2929532935 |
|
|
Jul 02 11:11:13 AM PDT 24 |
Jul 02 12:27:00 PM PDT 24 |
16262292526 ps |
| T197 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.3738115455 |
|
|
Jul 02 11:06:10 AM PDT 24 |
Jul 02 11:19:26 AM PDT 24 |
5835087882 ps |
| T1281 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.3170580691 |
|
|
Jul 02 10:59:41 AM PDT 24 |
Jul 02 02:13:13 PM PDT 24 |
64497612545 ps |
| T1282 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1272328034 |
|
|
Jul 02 11:12:23 AM PDT 24 |
Jul 02 11:18:00 AM PDT 24 |
2630447066 ps |
| T1283 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.1003286980 |
|
|
Jul 02 11:36:47 AM PDT 24 |
Jul 02 11:46:27 AM PDT 24 |
4786749178 ps |
| T1284 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.1676495532 |
|
|
Jul 02 11:08:03 AM PDT 24 |
Jul 02 11:11:21 AM PDT 24 |
2790365224 ps |
| T1285 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.2300539884 |
|
|
Jul 02 11:15:42 AM PDT 24 |
Jul 02 12:36:48 PM PDT 24 |
42200245143 ps |
| T53 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.4005207476 |
|
|
Jul 02 11:06:17 AM PDT 24 |
Jul 02 11:11:57 AM PDT 24 |
3612575615 ps |
| T1286 |
/workspace/coverage/default/0.chip_sw_power_idle_load.3408955626 |
|
|
Jul 02 11:04:55 AM PDT 24 |
Jul 02 11:14:53 AM PDT 24 |
4243644968 ps |
| T783 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.721602916 |
|
|
Jul 02 11:30:57 AM PDT 24 |
Jul 02 11:42:43 AM PDT 24 |
5177540032 ps |
| T717 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.273701823 |
|
|
Jul 02 11:00:29 AM PDT 24 |
Jul 02 11:04:48 AM PDT 24 |
2612430200 ps |
| T1287 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.2295209053 |
|
|
Jul 02 11:03:53 AM PDT 24 |
Jul 02 11:08:29 AM PDT 24 |
3467728342 ps |
| T1288 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.1577347536 |
|
|
Jul 02 10:58:41 AM PDT 24 |
Jul 02 11:58:29 AM PDT 24 |
20176931554 ps |
| T1289 |
/workspace/coverage/default/2.chip_sw_example_flash.516716654 |
|
|
Jul 02 11:13:50 AM PDT 24 |
Jul 02 11:19:28 AM PDT 24 |
2641706508 ps |
| T765 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.158922131 |
|
|
Jul 02 11:31:00 AM PDT 24 |
Jul 02 11:37:25 AM PDT 24 |
3860454670 ps |
| T1290 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.836900969 |
|
|
Jul 02 11:03:12 AM PDT 24 |
Jul 02 11:14:28 AM PDT 24 |
5561540440 ps |
| T1291 |
/workspace/coverage/default/0.chip_sw_aes_enc.2457450459 |
|
|
Jul 02 11:01:13 AM PDT 24 |
Jul 02 11:07:22 AM PDT 24 |
2750765992 ps |
| T715 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2837788397 |
|
|
Jul 02 11:16:59 AM PDT 24 |
Jul 02 11:19:03 AM PDT 24 |
2496789806 ps |
| T1292 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.975134966 |
|
|
Jul 02 11:26:36 AM PDT 24 |
Jul 02 11:36:04 AM PDT 24 |
4918192800 ps |
| T1293 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.1543004401 |
|
|
Jul 02 10:59:59 AM PDT 24 |
Jul 02 11:11:08 AM PDT 24 |
4410878664 ps |
| T1294 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.1053024702 |
|
|
Jul 02 11:18:01 AM PDT 24 |
Jul 02 11:28:22 AM PDT 24 |
3533555628 ps |
| T360 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2421016162 |
|
|
Jul 02 11:23:27 AM PDT 24 |
Jul 02 11:36:31 AM PDT 24 |
5208924626 ps |
| T1295 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.2694775082 |
|
|
Jul 02 11:06:19 AM PDT 24 |
Jul 02 11:23:49 AM PDT 24 |
7778397874 ps |
| T1296 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.66088308 |
|
|
Jul 02 11:20:07 AM PDT 24 |
Jul 02 11:24:50 AM PDT 24 |
3495947617 ps |
| T1297 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.3197302495 |
|
|
Jul 02 11:25:19 AM PDT 24 |
Jul 02 11:36:38 AM PDT 24 |
4745189392 ps |
| T1298 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.371207854 |
|
|
Jul 02 10:58:27 AM PDT 24 |
Jul 02 11:00:12 AM PDT 24 |
2357636278 ps |
| T1299 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.618197062 |
|
|
Jul 02 11:27:23 AM PDT 24 |
Jul 02 11:37:50 AM PDT 24 |
7076654992 ps |
| T1300 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.527671810 |
|
|
Jul 02 11:16:26 AM PDT 24 |
Jul 02 12:08:35 PM PDT 24 |
46864554784 ps |
| T325 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.743941459 |
|
|
Jul 02 11:22:05 AM PDT 24 |
Jul 02 11:54:23 AM PDT 24 |
8591774568 ps |
| T1301 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.499817657 |
|
|
Jul 02 11:27:16 AM PDT 24 |
Jul 02 11:31:45 AM PDT 24 |
2821159462 ps |
| T159 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.1856492456 |
|
|
Jul 02 10:59:04 AM PDT 24 |
Jul 02 11:09:50 AM PDT 24 |
4928568560 ps |
| T1302 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.2293769989 |
|
|
Jul 02 10:59:11 AM PDT 24 |
Jul 02 11:06:27 AM PDT 24 |
4821570029 ps |
| T1303 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.348621672 |
|
|
Jul 02 11:18:29 AM PDT 24 |
Jul 02 11:27:25 AM PDT 24 |
3794090812 ps |
| T816 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.3363534488 |
|
|
Jul 02 11:34:42 AM PDT 24 |
Jul 02 11:41:29 AM PDT 24 |
3942906070 ps |
| T1304 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.1134257297 |
|
|
Jul 02 11:02:13 AM PDT 24 |
Jul 02 11:11:31 AM PDT 24 |
7262848796 ps |
| T1305 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.1685728395 |
|
|
Jul 02 11:27:50 AM PDT 24 |
Jul 02 11:37:22 AM PDT 24 |
3516355664 ps |
| T1306 |
/workspace/coverage/default/2.chip_sw_edn_kat.2781222315 |
|
|
Jul 02 11:18:15 AM PDT 24 |
Jul 02 11:32:32 AM PDT 24 |
3286930420 ps |
| T1307 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.2816063477 |
|
|
Jul 02 10:59:49 AM PDT 24 |
Jul 02 11:04:25 AM PDT 24 |
2691264610 ps |
| T1308 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.1364889655 |
|
|
Jul 02 11:13:53 AM PDT 24 |
Jul 02 11:16:00 AM PDT 24 |
2195127239 ps |
| T1309 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.367793308 |
|
|
Jul 02 11:31:12 AM PDT 24 |
Jul 02 11:41:44 AM PDT 24 |
5176430112 ps |
| T1310 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.2922789946 |
|
|
Jul 02 11:26:08 AM PDT 24 |
Jul 02 11:37:05 AM PDT 24 |
4099955220 ps |
| T803 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.1461294871 |
|
|
Jul 02 11:28:33 AM PDT 24 |
Jul 02 11:35:52 AM PDT 24 |
3826437810 ps |
| T1311 |
/workspace/coverage/default/1.rom_keymgr_functest.4099586171 |
|
|
Jul 02 11:15:10 AM PDT 24 |
Jul 02 11:26:03 AM PDT 24 |
4805978544 ps |
| T1312 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.1639379081 |
|
|
Jul 02 10:58:55 AM PDT 24 |
Jul 02 12:08:07 PM PDT 24 |
18361797495 ps |
| T1313 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.4170916598 |
|
|
Jul 02 11:11:53 AM PDT 24 |
Jul 02 11:43:58 AM PDT 24 |
25812065360 ps |
| T1314 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.3532355196 |
|
|
Jul 02 11:21:35 AM PDT 24 |
Jul 02 11:33:43 AM PDT 24 |
4583861384 ps |
| T813 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.2514809725 |
|
|
Jul 02 11:30:51 AM PDT 24 |
Jul 02 11:36:38 AM PDT 24 |
4304839780 ps |
| T1315 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2566362434 |
|
|
Jul 02 10:59:39 AM PDT 24 |
Jul 02 11:06:47 AM PDT 24 |
4466381000 ps |
| T1316 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.4199063463 |
|
|
Jul 02 10:59:09 AM PDT 24 |
Jul 02 11:03:42 AM PDT 24 |
3462348600 ps |
| T1317 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.215396628 |
|
|
Jul 02 11:21:59 AM PDT 24 |
Jul 02 11:39:20 AM PDT 24 |
8008495372 ps |
| T12 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.3418107467 |
|
|
Jul 02 10:59:20 AM PDT 24 |
Jul 02 11:03:34 AM PDT 24 |
2868871190 ps |
| T1318 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.3994883417 |
|
|
Jul 02 11:10:13 AM PDT 24 |
Jul 02 11:35:14 AM PDT 24 |
7288209192 ps |
| T1319 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.3741259662 |
|
|
Jul 02 11:09:26 AM PDT 24 |
Jul 02 11:31:25 AM PDT 24 |
6243938797 ps |
| T1320 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.2108184254 |
|
|
Jul 02 11:14:40 AM PDT 24 |
Jul 02 11:19:54 AM PDT 24 |
3429132906 ps |
| T1321 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.3538489518 |
|
|
Jul 02 11:02:27 AM PDT 24 |
Jul 02 11:52:49 AM PDT 24 |
13773560504 ps |
| T1322 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.2919819575 |
|
|
Jul 02 11:12:33 AM PDT 24 |
Jul 02 11:18:07 AM PDT 24 |
3027642272 ps |
| T1323 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.2658623715 |
|
|
Jul 02 10:59:26 AM PDT 24 |
Jul 02 11:02:48 AM PDT 24 |
2726513000 ps |
| T1324 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.4096663142 |
|
|
Jul 02 11:32:09 AM PDT 24 |
Jul 02 11:38:50 AM PDT 24 |
3780785040 ps |
| T1325 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3738497371 |
|
|
Jul 02 11:19:00 AM PDT 24 |
Jul 02 11:29:15 AM PDT 24 |
6747230504 ps |
| T1326 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.1292275216 |
|
|
Jul 02 11:19:27 AM PDT 24 |
Jul 02 11:52:33 AM PDT 24 |
8787583103 ps |
| T1327 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.3410913315 |
|
|
Jul 02 11:31:53 AM PDT 24 |
Jul 02 11:50:10 AM PDT 24 |
10531447658 ps |
| T40 |
/workspace/coverage/default/0.chip_sw_gpio.2225603575 |
|
|
Jul 02 11:01:49 AM PDT 24 |
Jul 02 11:10:07 AM PDT 24 |
4056904940 ps |
| T1328 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.1666472157 |
|
|
Jul 02 10:59:55 AM PDT 24 |
Jul 02 11:47:22 AM PDT 24 |
14135144782 ps |
| T787 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.522048031 |
|
|
Jul 02 11:35:07 AM PDT 24 |
Jul 02 11:40:40 AM PDT 24 |
3782218568 ps |
| T1329 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.1031162592 |
|
|
Jul 02 11:18:53 AM PDT 24 |
Jul 02 11:35:35 AM PDT 24 |
5910562908 ps |
| T769 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.3309541726 |
|
|
Jul 02 11:36:59 AM PDT 24 |
Jul 02 11:44:13 AM PDT 24 |
3395877556 ps |
| T1330 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.3502752336 |
|
|
Jul 02 11:18:37 AM PDT 24 |
Jul 02 11:23:01 AM PDT 24 |
2242020689 ps |
| T50 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1795650195 |
|
|
Jul 02 11:18:45 AM PDT 24 |
Jul 02 11:24:28 AM PDT 24 |
6068766770 ps |
| T311 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.2870540521 |
|
|
Jul 02 11:35:09 AM PDT 24 |
Jul 02 11:43:03 AM PDT 24 |
3593940418 ps |
| T47 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.4079784240 |
|
|
Jul 02 11:15:48 AM PDT 24 |
Jul 02 11:22:13 AM PDT 24 |
2993553544 ps |
| T246 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.80222921 |
|
|
Jul 02 11:29:29 AM PDT 24 |
Jul 02 11:35:04 AM PDT 24 |
3503034606 ps |
| T1331 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.3899718126 |
|
|
Jul 02 11:01:13 AM PDT 24 |
Jul 02 11:05:35 AM PDT 24 |
2571825857 ps |
| T1332 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.3219704036 |
|
|
Jul 02 11:08:49 AM PDT 24 |
Jul 02 11:47:25 AM PDT 24 |
11533427832 ps |
| T1333 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.3273712101 |
|
|
Jul 02 11:21:29 AM PDT 24 |
Jul 02 11:27:06 AM PDT 24 |
3875780416 ps |
| T1334 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.831325393 |
|
|
Jul 02 11:01:43 AM PDT 24 |
Jul 02 11:03:32 AM PDT 24 |
2465295172 ps |
| T233 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.1397190494 |
|
|
Jul 02 11:05:26 AM PDT 24 |
Jul 02 12:39:21 PM PDT 24 |
48937141040 ps |
| T1335 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.109842394 |
|
|
Jul 02 11:00:18 AM PDT 24 |
Jul 02 11:07:05 AM PDT 24 |
4830716654 ps |
| T1336 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.715000376 |
|
|
Jul 02 11:15:12 AM PDT 24 |
Jul 02 11:24:55 AM PDT 24 |
2881028592 ps |
| T126 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.2706832410 |
|
|
Jul 02 11:10:48 AM PDT 24 |
Jul 02 11:20:09 AM PDT 24 |
5681074710 ps |
| T382 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.3261781370 |
|
|
Jul 02 10:58:08 AM PDT 24 |
Jul 02 11:11:20 AM PDT 24 |
4711631432 ps |
| T1337 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.4051619021 |
|
|
Jul 02 11:04:39 AM PDT 24 |
Jul 02 11:08:28 AM PDT 24 |
3436740060 ps |
| T1338 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.186073274 |
|
|
Jul 02 11:17:45 AM PDT 24 |
Jul 02 11:25:39 AM PDT 24 |
6677203150 ps |
| T198 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.1449587280 |
|
|
Jul 02 11:16:32 AM PDT 24 |
Jul 02 11:28:18 AM PDT 24 |
5668947266 ps |
| T151 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.462077752 |
|
|
Jul 02 11:09:59 AM PDT 24 |
Jul 02 11:19:45 AM PDT 24 |
3997801752 ps |
| T1339 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.1222474149 |
|
|
Jul 02 10:59:07 AM PDT 24 |
Jul 02 11:03:57 AM PDT 24 |
4065752316 ps |
| T356 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3451904878 |
|
|
Jul 02 11:08:29 AM PDT 24 |
Jul 02 11:20:05 AM PDT 24 |
19618309848 ps |
| T1340 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.2718459367 |
|
|
Jul 02 11:33:37 AM PDT 24 |
Jul 02 11:38:34 AM PDT 24 |
3431463000 ps |
| T41 |
/workspace/coverage/default/2.chip_sw_gpio.3677632281 |
|
|
Jul 02 11:15:54 AM PDT 24 |
Jul 02 11:25:34 AM PDT 24 |
4514495251 ps |
| T1341 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.3123928771 |
|
|
Jul 02 11:16:43 AM PDT 24 |
Jul 02 11:21:03 AM PDT 24 |
2916923766 ps |
| T1342 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2754886632 |
|
|
Jul 02 11:03:53 AM PDT 24 |
Jul 02 11:27:44 AM PDT 24 |
7848906659 ps |
| T1343 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.1405650394 |
|
|
Jul 02 11:19:34 AM PDT 24 |
Jul 02 11:22:50 AM PDT 24 |
2903525964 ps |
| T1344 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.3636223798 |
|
|
Jul 02 11:29:07 AM PDT 24 |
Jul 02 11:39:49 AM PDT 24 |
4308662560 ps |
| T1345 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.3632930768 |
|
|
Jul 02 11:25:51 AM PDT 24 |
Jul 02 11:27:49 AM PDT 24 |
2608908162 ps |
| T831 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.1436600222 |
|
|
Jul 02 11:37:00 AM PDT 24 |
Jul 02 11:48:10 AM PDT 24 |
4948400712 ps |
| T127 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.4127039578 |
|
|
Jul 02 11:27:33 AM PDT 24 |
Jul 02 11:40:00 AM PDT 24 |
6714669004 ps |
| T1346 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.100083352 |
|
|
Jul 02 11:03:30 AM PDT 24 |
Jul 02 11:09:31 AM PDT 24 |
4008416080 ps |
| T1347 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.98392377 |
|
|
Jul 02 11:12:04 AM PDT 24 |
Jul 02 11:25:21 AM PDT 24 |
3905675556 ps |
| T1348 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.178827967 |
|
|
Jul 02 11:11:35 AM PDT 24 |
Jul 02 11:16:42 AM PDT 24 |
3479026838 ps |
| T1349 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.2179075001 |
|
|
Jul 02 11:01:54 AM PDT 24 |
Jul 02 11:18:00 AM PDT 24 |
6333867074 ps |
| T1350 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1621325261 |
|
|
Jul 02 11:00:27 AM PDT 24 |
Jul 02 11:23:01 AM PDT 24 |
8377449890 ps |
| T1351 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.3753911977 |
|
|
Jul 02 11:16:29 AM PDT 24 |
Jul 02 11:25:49 AM PDT 24 |
6134772885 ps |
| T1352 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.77312579 |
|
|
Jul 02 11:20:53 AM PDT 24 |
Jul 02 12:25:58 PM PDT 24 |
15364535262 ps |
| T832 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.2305761420 |
|
|
Jul 02 11:32:35 AM PDT 24 |
Jul 02 11:42:50 AM PDT 24 |
3662849050 ps |
| T389 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.1733149299 |
|
|
Jul 02 11:14:22 AM PDT 24 |
Jul 02 11:19:22 AM PDT 24 |
2359467224 ps |
| T1353 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.3563548252 |
|
|
Jul 02 11:06:27 AM PDT 24 |
Jul 02 11:11:52 AM PDT 24 |
3156604290 ps |
| T1354 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.4278378569 |
|
|
Jul 02 10:59:12 AM PDT 24 |
Jul 02 11:08:22 AM PDT 24 |
4509830050 ps |
| T1355 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.1635956865 |
|
|
Jul 02 11:23:09 AM PDT 24 |
Jul 02 11:30:44 AM PDT 24 |
6184666204 ps |
| T1356 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.1195673776 |
|
|
Jul 02 11:32:14 AM PDT 24 |
Jul 02 11:38:49 AM PDT 24 |
4325218906 ps |
| T1357 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.4072692803 |
|
|
Jul 02 11:18:01 AM PDT 24 |
Jul 02 11:31:22 AM PDT 24 |
5565369936 ps |
| T106 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.1247594013 |
|
|
Jul 02 11:23:21 AM PDT 24 |
Jul 02 12:08:21 PM PDT 24 |
21652441635 ps |
| T1358 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3770704874 |
|
|
Jul 02 11:03:39 AM PDT 24 |
Jul 02 11:08:05 AM PDT 24 |
2686573832 ps |
| T1359 |
/workspace/coverage/default/2.chip_sw_hmac_enc.372093205 |
|
|
Jul 02 11:20:37 AM PDT 24 |
Jul 02 11:24:41 AM PDT 24 |
2729319288 ps |
| T232 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.2959434070 |
|
|
Jul 02 11:05:40 AM PDT 24 |
Jul 02 12:43:55 PM PDT 24 |
51369690434 ps |
| T199 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.1858604586 |
|
|
Jul 02 10:59:37 AM PDT 24 |
Jul 02 11:06:55 AM PDT 24 |
3575986637 ps |
| T800 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.234071028 |
|
|
Jul 02 11:34:12 AM PDT 24 |
Jul 02 11:44:02 AM PDT 24 |
4049261650 ps |
| T1360 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.2624666046 |
|
|
Jul 02 11:19:21 AM PDT 24 |
Jul 02 12:15:08 PM PDT 24 |
16646602818 ps |
| T1361 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.184823222 |
|
|
Jul 02 11:32:02 AM PDT 24 |
Jul 02 11:38:39 AM PDT 24 |
3883193060 ps |
| T768 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.3851861098 |
|
|
Jul 02 11:36:50 AM PDT 24 |
Jul 02 11:47:08 AM PDT 24 |
6005021684 ps |
| T333 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.93866890 |
|
|
Jul 02 10:58:15 AM PDT 24 |
Jul 02 11:12:09 AM PDT 24 |
4477311380 ps |
| T1362 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.2473783542 |
|
|
Jul 02 11:14:51 AM PDT 24 |
Jul 02 11:27:12 AM PDT 24 |
4827853528 ps |
| T781 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3697748703 |
|
|
Jul 02 11:29:51 AM PDT 24 |
Jul 02 11:37:00 AM PDT 24 |
3972266174 ps |
| T9 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.2585747994 |
|
|
Jul 02 11:10:57 AM PDT 24 |
Jul 02 11:17:41 AM PDT 24 |
4541059956 ps |
| T1363 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.545431082 |
|
|
Jul 02 11:33:15 AM PDT 24 |
Jul 02 11:40:06 AM PDT 24 |
3170357080 ps |
| T1364 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.3801349032 |
|
|
Jul 02 11:05:57 AM PDT 24 |
Jul 02 12:01:21 PM PDT 24 |
14373755683 ps |
| T1365 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.3853701546 |
|
|
Jul 02 11:27:53 AM PDT 24 |
Jul 02 11:35:07 AM PDT 24 |
3458812150 ps |
| T1366 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.2758733056 |
|
|
Jul 02 11:17:35 AM PDT 24 |
Jul 02 11:47:12 AM PDT 24 |
23068834998 ps |
| T1367 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.1953496308 |
|
|
Jul 02 11:30:15 AM PDT 24 |
Jul 02 11:45:15 AM PDT 24 |
5653284140 ps |
| T1368 |
/workspace/coverage/default/2.chip_sw_flash_init.757078083 |
|
|
Jul 02 11:16:06 AM PDT 24 |
Jul 02 11:56:44 AM PDT 24 |
16490564250 ps |
| T1369 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1417558406 |
|
|
Jul 02 11:12:45 AM PDT 24 |
Jul 02 11:32:06 AM PDT 24 |
7412612572 ps |
| T1370 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.3255809053 |
|
|
Jul 02 11:31:37 AM PDT 24 |
Jul 02 11:38:13 AM PDT 24 |
3861056808 ps |
| T1371 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.570913934 |
|
|
Jul 02 11:11:51 AM PDT 24 |
Jul 02 11:22:14 AM PDT 24 |
4792718414 ps |
| T1372 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.3478421005 |
|
|
Jul 02 11:17:09 AM PDT 24 |
Jul 02 12:47:02 PM PDT 24 |
52116632680 ps |
| T1373 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.232221552 |
|
|
Jul 02 11:17:19 AM PDT 24 |
Jul 02 12:14:50 PM PDT 24 |
27511776280 ps |
| T1374 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.785271965 |
|
|
Jul 02 11:14:42 AM PDT 24 |
Jul 02 11:43:53 AM PDT 24 |
7628657322 ps |
| T1375 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.299862731 |
|
|
Jul 02 11:31:45 AM PDT 24 |
Jul 02 11:37:34 AM PDT 24 |
4036513516 ps |
| T1376 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.2470606609 |
|
|
Jul 02 11:33:00 AM PDT 24 |
Jul 02 11:44:53 AM PDT 24 |
6142739820 ps |
| T1377 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.2878273040 |
|
|
Jul 02 11:18:50 AM PDT 24 |
Jul 02 11:27:44 AM PDT 24 |
4346360188 ps |
| T691 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.1736902096 |
|
|
Jul 02 11:02:46 AM PDT 24 |
Jul 02 06:11:49 PM PDT 24 |
180740355357 ps |
| T1378 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.1207126322 |
|
|
Jul 02 11:01:35 AM PDT 24 |
Jul 02 11:30:21 AM PDT 24 |
7517568300 ps |
| T1379 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.2012496996 |
|
|
Jul 02 11:17:07 AM PDT 24 |
Jul 02 11:45:22 AM PDT 24 |
13260526219 ps |
| T837 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.1389723445 |
|
|
Jul 02 11:30:10 AM PDT 24 |
Jul 02 11:35:44 AM PDT 24 |
3852600000 ps |
| T1380 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.2048815783 |
|
|
Jul 02 11:30:18 AM PDT 24 |
Jul 02 12:10:04 PM PDT 24 |
13696188008 ps |
| T1381 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.726907492 |
|
|
Jul 02 10:59:34 AM PDT 24 |
Jul 02 11:04:52 AM PDT 24 |
3627212816 ps |
| T1382 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.3827290831 |
|
|
Jul 02 11:36:40 AM PDT 24 |
Jul 02 11:42:54 AM PDT 24 |
4096787600 ps |
| T92 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.2126178604 |
|
|
Jul 02 11:34:31 AM PDT 24 |
Jul 02 11:42:23 AM PDT 24 |
4851815144 ps |
| T1383 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2709091764 |
|
|
Jul 02 11:13:07 AM PDT 24 |
Jul 02 11:35:07 AM PDT 24 |
7460430403 ps |
| T780 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.928162478 |
|
|
Jul 02 11:33:10 AM PDT 24 |
Jul 02 11:45:49 AM PDT 24 |
5725996260 ps |