| T560 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.3229067198 |
|
|
Jul 05 07:42:09 PM PDT 24 |
Jul 05 07:49:32 PM PDT 24 |
4514889228 ps |
| T7 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.3985346751 |
|
|
Jul 05 07:04:52 PM PDT 24 |
Jul 05 07:11:53 PM PDT 24 |
4253916936 ps |
| T443 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.841605988 |
|
|
Jul 05 07:46:18 PM PDT 24 |
Jul 05 07:55:52 PM PDT 24 |
5190854872 ps |
| T252 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.1807028724 |
|
|
Jul 05 07:12:09 PM PDT 24 |
Jul 05 09:02:32 PM PDT 24 |
24660469528 ps |
| T151 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.481780525 |
|
|
Jul 05 07:19:49 PM PDT 24 |
Jul 05 08:20:47 PM PDT 24 |
24691022805 ps |
| T444 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.2528629972 |
|
|
Jul 05 07:04:24 PM PDT 24 |
Jul 05 07:14:07 PM PDT 24 |
6481865560 ps |
| T345 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3916587778 |
|
|
Jul 05 06:59:31 PM PDT 24 |
Jul 05 07:05:36 PM PDT 24 |
18444108296 ps |
| T445 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.1135426882 |
|
|
Jul 05 07:36:31 PM PDT 24 |
Jul 05 07:46:55 PM PDT 24 |
6009140842 ps |
| T90 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.2810321523 |
|
|
Jul 05 07:35:15 PM PDT 24 |
Jul 05 07:48:41 PM PDT 24 |
7733596550 ps |
| T83 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.3879925173 |
|
|
Jul 05 07:01:35 PM PDT 24 |
Jul 05 07:10:28 PM PDT 24 |
5562771128 ps |
| T347 |
/workspace/coverage/default/2.rom_raw_unlock.1355601434 |
|
|
Jul 05 07:33:28 PM PDT 24 |
Jul 05 07:38:10 PM PDT 24 |
4765405381 ps |
| T284 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.4203509593 |
|
|
Jul 05 07:00:14 PM PDT 24 |
Jul 05 07:09:54 PM PDT 24 |
4239053310 ps |
| T607 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.3590551309 |
|
|
Jul 05 07:10:11 PM PDT 24 |
Jul 05 07:15:54 PM PDT 24 |
3313984760 ps |
| T608 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.1999594634 |
|
|
Jul 05 07:11:56 PM PDT 24 |
Jul 05 08:18:18 PM PDT 24 |
15692353872 ps |
| T609 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.1934421709 |
|
|
Jul 05 07:25:50 PM PDT 24 |
Jul 05 07:34:42 PM PDT 24 |
7097963446 ps |
| T466 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2043664124 |
|
|
Jul 05 07:36:15 PM PDT 24 |
Jul 05 07:49:06 PM PDT 24 |
5748818342 ps |
| T610 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.2719663839 |
|
|
Jul 05 07:11:01 PM PDT 24 |
Jul 05 08:22:04 PM PDT 24 |
15265713344 ps |
| T461 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.2581773269 |
|
|
Jul 05 07:39:05 PM PDT 24 |
Jul 05 07:51:00 PM PDT 24 |
5931744064 ps |
| T611 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.425079436 |
|
|
Jul 05 07:13:03 PM PDT 24 |
Jul 05 08:44:16 PM PDT 24 |
17406885055 ps |
| T35 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.1124337440 |
|
|
Jul 05 06:57:21 PM PDT 24 |
Jul 05 07:04:38 PM PDT 24 |
3463029750 ps |
| T612 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.2226087611 |
|
|
Jul 05 07:12:31 PM PDT 24 |
Jul 05 07:24:45 PM PDT 24 |
3984669880 ps |
| T30 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.76520726 |
|
|
Jul 05 07:35:48 PM PDT 24 |
Jul 05 07:46:43 PM PDT 24 |
4608533508 ps |
| T613 |
/workspace/coverage/default/1.chip_sw_example_rom.2852616592 |
|
|
Jul 05 07:09:45 PM PDT 24 |
Jul 05 07:11:42 PM PDT 24 |
2814304896 ps |
| T614 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.2785401202 |
|
|
Jul 05 07:18:08 PM PDT 24 |
Jul 05 07:27:06 PM PDT 24 |
5332331952 ps |
| T36 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.3284459348 |
|
|
Jul 05 06:56:25 PM PDT 24 |
Jul 05 07:53:39 PM PDT 24 |
12239938600 ps |
| T316 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.2536514892 |
|
|
Jul 05 07:17:27 PM PDT 24 |
Jul 05 07:48:53 PM PDT 24 |
9019824324 ps |
| T615 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1796372758 |
|
|
Jul 05 07:14:54 PM PDT 24 |
Jul 05 07:27:17 PM PDT 24 |
3880796744 ps |
| T616 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.1179033082 |
|
|
Jul 05 07:01:19 PM PDT 24 |
Jul 05 07:38:05 PM PDT 24 |
8265869460 ps |
| T617 |
/workspace/coverage/default/1.chip_sw_edn_kat.697596704 |
|
|
Jul 05 07:17:39 PM PDT 24 |
Jul 05 07:30:10 PM PDT 24 |
3759458000 ps |
| T457 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.3315844709 |
|
|
Jul 05 07:42:04 PM PDT 24 |
Jul 05 07:47:26 PM PDT 24 |
3851738108 ps |
| T298 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.3842696857 |
|
|
Jul 05 07:31:56 PM PDT 24 |
Jul 05 07:36:56 PM PDT 24 |
2365092646 ps |
| T310 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.1092296883 |
|
|
Jul 05 06:56:02 PM PDT 24 |
Jul 05 07:00:01 PM PDT 24 |
2347795496 ps |
| T37 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.1926517319 |
|
|
Jul 05 07:36:59 PM PDT 24 |
Jul 05 07:41:42 PM PDT 24 |
2397032008 ps |
| T33 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.2689825135 |
|
|
Jul 05 06:58:53 PM PDT 24 |
Jul 05 07:24:08 PM PDT 24 |
23652565684 ps |
| T317 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.200772366 |
|
|
Jul 05 06:58:30 PM PDT 24 |
Jul 05 07:23:24 PM PDT 24 |
8847162560 ps |
| T618 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.1121724585 |
|
|
Jul 05 07:03:39 PM PDT 24 |
Jul 05 07:09:20 PM PDT 24 |
3145250510 ps |
| T479 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.3689284204 |
|
|
Jul 05 07:43:54 PM PDT 24 |
Jul 05 07:49:26 PM PDT 24 |
3385892900 ps |
| T411 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.1253855831 |
|
|
Jul 05 07:38:41 PM PDT 24 |
Jul 05 07:49:10 PM PDT 24 |
5441920950 ps |
| T336 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.1062178935 |
|
|
Jul 05 07:44:31 PM PDT 24 |
Jul 05 07:54:49 PM PDT 24 |
4420258792 ps |
| T619 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.3456040887 |
|
|
Jul 05 07:31:04 PM PDT 24 |
Jul 05 07:52:01 PM PDT 24 |
7140735514 ps |
| T620 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.934900074 |
|
|
Jul 05 07:03:56 PM PDT 24 |
Jul 05 07:17:03 PM PDT 24 |
4558825998 ps |
| T164 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.363619502 |
|
|
Jul 05 06:58:17 PM PDT 24 |
Jul 05 08:37:19 PM PDT 24 |
49706710688 ps |
| T513 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.1236501686 |
|
|
Jul 05 07:42:00 PM PDT 24 |
Jul 05 07:48:04 PM PDT 24 |
3720541968 ps |
| T285 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.1710143879 |
|
|
Jul 05 07:27:55 PM PDT 24 |
Jul 05 07:36:16 PM PDT 24 |
3750037400 ps |
| T621 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.4265614921 |
|
|
Jul 05 07:36:14 PM PDT 24 |
Jul 05 07:39:28 PM PDT 24 |
2246918280 ps |
| T38 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.4133274770 |
|
|
Jul 05 07:23:02 PM PDT 24 |
Jul 05 07:29:06 PM PDT 24 |
3618833420 ps |
| T420 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.3041622416 |
|
|
Jul 05 07:29:26 PM PDT 24 |
Jul 05 07:42:32 PM PDT 24 |
5376249043 ps |
| T328 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.1330856250 |
|
|
Jul 05 07:20:39 PM PDT 24 |
Jul 05 08:05:36 PM PDT 24 |
24004768097 ps |
| T299 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.4016050770 |
|
|
Jul 05 07:05:45 PM PDT 24 |
Jul 05 07:12:00 PM PDT 24 |
3280847012 ps |
| T622 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.754942577 |
|
|
Jul 05 07:24:02 PM PDT 24 |
Jul 05 07:34:07 PM PDT 24 |
3458797092 ps |
| T623 |
/workspace/coverage/default/1.chip_sw_aes_enc.1166992720 |
|
|
Jul 05 07:17:51 PM PDT 24 |
Jul 05 07:22:06 PM PDT 24 |
2309915410 ps |
| T624 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.1857610411 |
|
|
Jul 05 07:29:29 PM PDT 24 |
Jul 05 07:34:01 PM PDT 24 |
3293426572 ps |
| T489 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.1328352485 |
|
|
Jul 05 07:36:34 PM PDT 24 |
Jul 05 07:48:00 PM PDT 24 |
4713205228 ps |
| T521 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.4254167066 |
|
|
Jul 05 07:46:01 PM PDT 24 |
Jul 05 07:51:24 PM PDT 24 |
3473846550 ps |
| T449 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2691067464 |
|
|
Jul 05 06:58:43 PM PDT 24 |
Jul 05 07:00:39 PM PDT 24 |
3015519180 ps |
| T406 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3698037514 |
|
|
Jul 05 07:20:07 PM PDT 24 |
Jul 05 07:30:25 PM PDT 24 |
6285442716 ps |
| T625 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.2587870111 |
|
|
Jul 05 07:20:02 PM PDT 24 |
Jul 05 07:30:54 PM PDT 24 |
5843265262 ps |
| T249 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.4160809291 |
|
|
Jul 05 07:44:16 PM PDT 24 |
Jul 05 07:54:28 PM PDT 24 |
4925331444 ps |
| T291 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.3545695762 |
|
|
Jul 05 07:09:00 PM PDT 24 |
Jul 05 07:11:01 PM PDT 24 |
2907450055 ps |
| T292 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.384318075 |
|
|
Jul 05 07:30:54 PM PDT 24 |
Jul 05 07:37:01 PM PDT 24 |
3362257334 ps |
| T34 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.3066604356 |
|
|
Jul 05 07:16:15 PM PDT 24 |
Jul 05 07:23:15 PM PDT 24 |
3396318024 ps |
| T293 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.2681853555 |
|
|
Jul 05 06:59:26 PM PDT 24 |
Jul 05 07:08:15 PM PDT 24 |
3995741550 ps |
| T294 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.1698465026 |
|
|
Jul 05 07:29:04 PM PDT 24 |
Jul 05 08:01:47 PM PDT 24 |
8091730336 ps |
| T136 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3030039448 |
|
|
Jul 05 07:20:15 PM PDT 24 |
Jul 05 07:41:42 PM PDT 24 |
20940777384 ps |
| T295 |
/workspace/coverage/default/0.rom_e2e_static_critical.3432711455 |
|
|
Jul 05 07:14:43 PM PDT 24 |
Jul 05 08:31:46 PM PDT 24 |
17273031808 ps |
| T296 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.427712757 |
|
|
Jul 05 07:36:52 PM PDT 24 |
Jul 05 07:45:56 PM PDT 24 |
3750856895 ps |
| T297 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.3617040854 |
|
|
Jul 05 07:31:52 PM PDT 24 |
Jul 05 07:43:40 PM PDT 24 |
6488052360 ps |
| T626 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.3384992490 |
|
|
Jul 05 06:59:52 PM PDT 24 |
Jul 05 07:04:24 PM PDT 24 |
3056745043 ps |
| T214 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.876420692 |
|
|
Jul 05 07:04:05 PM PDT 24 |
Jul 05 07:11:43 PM PDT 24 |
5610530500 ps |
| T627 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.2065955974 |
|
|
Jul 05 07:36:07 PM PDT 24 |
Jul 05 07:44:51 PM PDT 24 |
6222259924 ps |
| T628 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.2188900669 |
|
|
Jul 05 07:13:14 PM PDT 24 |
Jul 05 08:28:20 PM PDT 24 |
14871273080 ps |
| T629 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.2520639091 |
|
|
Jul 05 07:10:24 PM PDT 24 |
Jul 05 07:13:58 PM PDT 24 |
3279789504 ps |
| T391 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2392566023 |
|
|
Jul 05 07:15:59 PM PDT 24 |
Jul 05 08:05:06 PM PDT 24 |
30525382816 ps |
| T630 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.236913119 |
|
|
Jul 05 07:41:20 PM PDT 24 |
Jul 05 07:54:13 PM PDT 24 |
6216649276 ps |
| T348 |
/workspace/coverage/default/0.rom_raw_unlock.3570156939 |
|
|
Jul 05 07:09:05 PM PDT 24 |
Jul 05 07:13:38 PM PDT 24 |
6944019782 ps |
| T385 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.2374658958 |
|
|
Jul 05 07:37:01 PM PDT 24 |
Jul 05 07:58:00 PM PDT 24 |
7326736968 ps |
| T631 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.2166864089 |
|
|
Jul 05 07:26:28 PM PDT 24 |
Jul 05 07:35:40 PM PDT 24 |
7193750430 ps |
| T470 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.976842617 |
|
|
Jul 05 07:42:54 PM PDT 24 |
Jul 05 07:51:19 PM PDT 24 |
5335459506 ps |
| T632 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.3896982750 |
|
|
Jul 05 07:30:50 PM PDT 24 |
Jul 05 07:40:25 PM PDT 24 |
4836287728 ps |
| T633 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1077296998 |
|
|
Jul 05 06:57:49 PM PDT 24 |
Jul 05 07:16:54 PM PDT 24 |
8155944253 ps |
| T634 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.1875462599 |
|
|
Jul 05 07:27:01 PM PDT 24 |
Jul 05 07:46:44 PM PDT 24 |
6154825244 ps |
| T357 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.1791588016 |
|
|
Jul 05 07:27:52 PM PDT 24 |
Jul 05 07:43:50 PM PDT 24 |
5362211704 ps |
| T14 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.2298342465 |
|
|
Jul 05 06:57:19 PM PDT 24 |
Jul 05 07:01:40 PM PDT 24 |
2957722264 ps |
| T429 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.3121669369 |
|
|
Jul 05 07:17:18 PM PDT 24 |
Jul 05 07:43:54 PM PDT 24 |
9531275867 ps |
| T430 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.3124457298 |
|
|
Jul 05 07:37:06 PM PDT 24 |
Jul 05 08:47:31 PM PDT 24 |
19613133600 ps |
| T70 |
/workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.2856238767 |
|
|
Jul 05 07:24:37 PM PDT 24 |
Jul 05 07:35:25 PM PDT 24 |
8712348988 ps |
| T431 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.55032498 |
|
|
Jul 05 07:31:45 PM PDT 24 |
Jul 05 07:44:28 PM PDT 24 |
4258724200 ps |
| T432 |
/workspace/coverage/default/1.chip_sw_kmac_idle.764942014 |
|
|
Jul 05 07:19:30 PM PDT 24 |
Jul 05 07:23:46 PM PDT 24 |
2399182920 ps |
| T237 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.2434747691 |
|
|
Jul 05 07:11:58 PM PDT 24 |
Jul 05 10:39:14 PM PDT 24 |
66313549665 ps |
| T433 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.1750733520 |
|
|
Jul 05 07:31:26 PM PDT 24 |
Jul 05 07:48:11 PM PDT 24 |
7226963754 ps |
| T434 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.1279033872 |
|
|
Jul 05 07:02:38 PM PDT 24 |
Jul 05 07:09:40 PM PDT 24 |
3939223134 ps |
| T113 |
/workspace/coverage/default/1.chip_sw_alert_test.1391383372 |
|
|
Jul 05 07:16:05 PM PDT 24 |
Jul 05 07:21:57 PM PDT 24 |
2526485436 ps |
| T255 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.2304661000 |
|
|
Jul 05 07:02:38 PM PDT 24 |
Jul 05 07:07:05 PM PDT 24 |
3239309580 ps |
| T524 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.3782142359 |
|
|
Jul 05 07:38:40 PM PDT 24 |
Jul 05 07:44:29 PM PDT 24 |
3900588438 ps |
| T477 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2288640528 |
|
|
Jul 05 07:00:35 PM PDT 24 |
Jul 05 07:07:28 PM PDT 24 |
3534821176 ps |
| T635 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.1368226022 |
|
|
Jul 05 07:37:18 PM PDT 24 |
Jul 05 08:43:45 PM PDT 24 |
15450392010 ps |
| T636 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.732584737 |
|
|
Jul 05 07:27:20 PM PDT 24 |
Jul 05 08:31:56 PM PDT 24 |
14995406176 ps |
| T498 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.3932580171 |
|
|
Jul 05 07:22:42 PM PDT 24 |
Jul 05 07:32:18 PM PDT 24 |
5009541622 ps |
| T637 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.3559571947 |
|
|
Jul 05 06:58:17 PM PDT 24 |
Jul 05 07:17:44 PM PDT 24 |
10523601179 ps |
| T638 |
/workspace/coverage/default/2.chip_tap_straps_dev.446431809 |
|
|
Jul 05 07:33:08 PM PDT 24 |
Jul 05 07:39:31 PM PDT 24 |
4163654997 ps |
| T425 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.3184291563 |
|
|
Jul 05 06:57:08 PM PDT 24 |
Jul 05 08:22:49 PM PDT 24 |
18631980436 ps |
| T539 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.932287948 |
|
|
Jul 05 07:40:51 PM PDT 24 |
Jul 05 07:47:16 PM PDT 24 |
3669975470 ps |
| T450 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.924024164 |
|
|
Jul 05 07:33:28 PM PDT 24 |
Jul 05 07:35:21 PM PDT 24 |
2741768830 ps |
| T395 |
/workspace/coverage/default/1.chip_sival_flash_info_access.3294377455 |
|
|
Jul 05 07:20:16 PM PDT 24 |
Jul 05 07:26:17 PM PDT 24 |
3121553048 ps |
| T639 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.818778505 |
|
|
Jul 05 07:15:06 PM PDT 24 |
Jul 05 07:40:55 PM PDT 24 |
13570182539 ps |
| T559 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.567312603 |
|
|
Jul 05 07:42:47 PM PDT 24 |
Jul 05 07:49:56 PM PDT 24 |
3470907816 ps |
| T238 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.2691733134 |
|
|
Jul 05 07:12:49 PM PDT 24 |
Jul 05 11:15:52 PM PDT 24 |
78397376680 ps |
| T640 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.175367693 |
|
|
Jul 05 07:16:30 PM PDT 24 |
Jul 05 07:25:16 PM PDT 24 |
6428438542 ps |
| T169 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.2015143040 |
|
|
Jul 05 07:36:14 PM PDT 24 |
Jul 05 07:48:33 PM PDT 24 |
11815918576 ps |
| T641 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.451916988 |
|
|
Jul 05 07:03:12 PM PDT 24 |
Jul 05 07:15:01 PM PDT 24 |
8065026974 ps |
| T642 |
/workspace/coverage/default/0.chip_sw_example_flash.519808316 |
|
|
Jul 05 06:55:41 PM PDT 24 |
Jul 05 07:00:20 PM PDT 24 |
2776745426 ps |
| T643 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.2914974726 |
|
|
Jul 05 07:36:28 PM PDT 24 |
Jul 05 07:45:15 PM PDT 24 |
5806931602 ps |
| T644 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.3596567190 |
|
|
Jul 05 07:34:18 PM PDT 24 |
Jul 05 07:39:18 PM PDT 24 |
2606633688 ps |
| T421 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.3006345102 |
|
|
Jul 05 07:17:37 PM PDT 24 |
Jul 05 07:41:31 PM PDT 24 |
7276052283 ps |
| T463 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.2418456834 |
|
|
Jul 05 07:44:17 PM PDT 24 |
Jul 05 07:54:56 PM PDT 24 |
4928401328 ps |
| T215 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2418931050 |
|
|
Jul 05 07:31:52 PM PDT 24 |
Jul 05 07:41:28 PM PDT 24 |
5488430752 ps |
| T519 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.3127475785 |
|
|
Jul 05 07:39:09 PM PDT 24 |
Jul 05 07:51:37 PM PDT 24 |
6228311092 ps |
| T645 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.117384201 |
|
|
Jul 05 07:20:03 PM PDT 24 |
Jul 05 07:35:24 PM PDT 24 |
6019864560 ps |
| T480 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1203663206 |
|
|
Jul 05 07:41:50 PM PDT 24 |
Jul 05 07:49:42 PM PDT 24 |
3514870568 ps |
| T493 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.4031370563 |
|
|
Jul 05 07:43:55 PM PDT 24 |
Jul 05 07:51:00 PM PDT 24 |
4377845240 ps |
| T646 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.809280597 |
|
|
Jul 05 07:05:13 PM PDT 24 |
Jul 05 07:08:57 PM PDT 24 |
3124351891 ps |
| T647 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.2242030883 |
|
|
Jul 05 07:01:09 PM PDT 24 |
Jul 05 07:07:28 PM PDT 24 |
5017026686 ps |
| T648 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.2925716867 |
|
|
Jul 05 07:25:16 PM PDT 24 |
Jul 05 07:44:10 PM PDT 24 |
7747530896 ps |
| T241 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.737716363 |
|
|
Jul 05 07:15:15 PM PDT 24 |
Jul 05 07:45:19 PM PDT 24 |
22830033064 ps |
| T649 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.1533302879 |
|
|
Jul 05 07:16:18 PM PDT 24 |
Jul 05 07:23:04 PM PDT 24 |
3283863541 ps |
| T319 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.3733260593 |
|
|
Jul 05 07:19:47 PM PDT 24 |
Jul 05 07:57:54 PM PDT 24 |
9005044216 ps |
| T528 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.526094012 |
|
|
Jul 05 07:39:55 PM PDT 24 |
Jul 05 07:47:54 PM PDT 24 |
3321739896 ps |
| T358 |
/workspace/coverage/default/2.chip_sw_power_idle_load.4226942172 |
|
|
Jul 05 07:32:20 PM PDT 24 |
Jul 05 07:44:02 PM PDT 24 |
4514798112 ps |
| T650 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.3235506999 |
|
|
Jul 05 06:57:00 PM PDT 24 |
Jul 05 07:01:01 PM PDT 24 |
3243677864 ps |
| T651 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.2212307742 |
|
|
Jul 05 07:15:21 PM PDT 24 |
Jul 05 07:25:45 PM PDT 24 |
5304816980 ps |
| T561 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.1540886913 |
|
|
Jul 05 07:45:27 PM PDT 24 |
Jul 05 07:50:49 PM PDT 24 |
3796314768 ps |
| T392 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.337313385 |
|
|
Jul 05 06:57:33 PM PDT 24 |
Jul 05 07:02:57 PM PDT 24 |
3222908528 ps |
| T374 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2649624245 |
|
|
Jul 05 07:06:57 PM PDT 24 |
Jul 05 07:18:13 PM PDT 24 |
4564651965 ps |
| T652 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.3672329314 |
|
|
Jul 05 07:16:07 PM PDT 24 |
Jul 05 07:39:34 PM PDT 24 |
8375916834 ps |
| T653 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.4058735446 |
|
|
Jul 05 07:16:53 PM PDT 24 |
Jul 05 07:20:42 PM PDT 24 |
2821528710 ps |
| T654 |
/workspace/coverage/default/0.chip_sw_coremark.2111428029 |
|
|
Jul 05 07:01:27 PM PDT 24 |
Jul 05 11:15:42 PM PDT 24 |
71734248888 ps |
| T39 |
/workspace/coverage/default/0.chip_sw_gpio.683066734 |
|
|
Jul 05 06:56:30 PM PDT 24 |
Jul 05 07:03:31 PM PDT 24 |
3804826776 ps |
| T424 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.2917104462 |
|
|
Jul 05 07:10:12 PM PDT 24 |
Jul 05 07:20:42 PM PDT 24 |
5578126534 ps |
| T655 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.771241769 |
|
|
Jul 05 07:30:22 PM PDT 24 |
Jul 05 07:52:41 PM PDT 24 |
6015699960 ps |
| T656 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.3150122195 |
|
|
Jul 05 07:11:42 PM PDT 24 |
Jul 05 08:25:08 PM PDT 24 |
15042371924 ps |
| T657 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.702422991 |
|
|
Jul 05 07:28:20 PM PDT 24 |
Jul 05 10:57:03 PM PDT 24 |
256324960200 ps |
| T658 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.455261751 |
|
|
Jul 05 06:58:59 PM PDT 24 |
Jul 05 07:09:04 PM PDT 24 |
4852677912 ps |
| T286 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.1195157826 |
|
|
Jul 05 07:34:40 PM PDT 24 |
Jul 05 07:45:10 PM PDT 24 |
4932092000 ps |
| T659 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.99269735 |
|
|
Jul 05 07:22:52 PM PDT 24 |
Jul 05 07:35:00 PM PDT 24 |
5260230600 ps |
| T660 |
/workspace/coverage/default/2.chip_sw_aes_enc.2981791820 |
|
|
Jul 05 07:28:12 PM PDT 24 |
Jul 05 07:33:20 PM PDT 24 |
3363890368 ps |
| T446 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.3089603952 |
|
|
Jul 05 07:21:55 PM PDT 24 |
Jul 05 07:31:18 PM PDT 24 |
5725121504 ps |
| T517 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.2805128680 |
|
|
Jul 05 07:44:49 PM PDT 24 |
Jul 05 07:51:29 PM PDT 24 |
4343867500 ps |
| T91 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.356980697 |
|
|
Jul 05 07:02:08 PM PDT 24 |
Jul 05 07:19:41 PM PDT 24 |
9195991270 ps |
| T448 |
/workspace/coverage/default/3.chip_tap_straps_dev.523370925 |
|
|
Jul 05 07:35:16 PM PDT 24 |
Jul 05 08:00:50 PM PDT 24 |
15125725453 ps |
| T170 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.1909265516 |
|
|
Jul 05 07:36:57 PM PDT 24 |
Jul 05 07:54:35 PM PDT 24 |
10582013477 ps |
| T323 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.685829481 |
|
|
Jul 05 06:59:00 PM PDT 24 |
Jul 05 08:40:10 PM PDT 24 |
49304868040 ps |
| T393 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.4122714652 |
|
|
Jul 05 06:59:01 PM PDT 24 |
Jul 05 07:54:00 PM PDT 24 |
27131654449 ps |
| T216 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.611245295 |
|
|
Jul 05 07:22:01 PM PDT 24 |
Jul 05 07:30:05 PM PDT 24 |
5174528372 ps |
| T661 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.3482597791 |
|
|
Jul 05 07:22:53 PM PDT 24 |
Jul 05 07:37:17 PM PDT 24 |
5041064104 ps |
| T200 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.2679356506 |
|
|
Jul 05 07:24:39 PM PDT 24 |
Jul 05 07:42:16 PM PDT 24 |
5326952216 ps |
| T371 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.2121354387 |
|
|
Jul 05 07:14:03 PM PDT 24 |
Jul 05 07:28:08 PM PDT 24 |
4473088000 ps |
| T662 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.359522452 |
|
|
Jul 05 06:57:29 PM PDT 24 |
Jul 05 07:08:56 PM PDT 24 |
4566519836 ps |
| T552 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.3647367970 |
|
|
Jul 05 07:40:19 PM PDT 24 |
Jul 05 07:50:43 PM PDT 24 |
5854845132 ps |
| T92 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.1618002570 |
|
|
Jul 05 07:19:55 PM PDT 24 |
Jul 05 07:29:57 PM PDT 24 |
7100914864 ps |
| T8 |
/workspace/coverage/default/2.chip_jtag_csr_rw.2078388420 |
|
|
Jul 05 07:24:11 PM PDT 24 |
Jul 05 07:49:44 PM PDT 24 |
12633682116 ps |
| T435 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.513334064 |
|
|
Jul 05 07:37:20 PM PDT 24 |
Jul 05 07:44:02 PM PDT 24 |
3627506900 ps |
| T9 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.1590992172 |
|
|
Jul 05 07:31:39 PM PDT 24 |
Jul 05 07:41:13 PM PDT 24 |
3576896448 ps |
| T436 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.865617184 |
|
|
Jul 05 07:00:11 PM PDT 24 |
Jul 05 07:36:09 PM PDT 24 |
8207711800 ps |
| T242 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.2224649916 |
|
|
Jul 05 07:17:38 PM PDT 24 |
Jul 05 07:22:18 PM PDT 24 |
2454946429 ps |
| T437 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.2918841015 |
|
|
Jul 05 07:24:19 PM PDT 24 |
Jul 05 07:42:57 PM PDT 24 |
9505019622 ps |
| T438 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.2918151229 |
|
|
Jul 05 07:29:15 PM PDT 24 |
Jul 05 07:50:29 PM PDT 24 |
6098861980 ps |
| T146 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.1777260582 |
|
|
Jul 05 07:03:05 PM PDT 24 |
Jul 05 07:15:23 PM PDT 24 |
4536038680 ps |
| T439 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.738849008 |
|
|
Jul 05 07:11:23 PM PDT 24 |
Jul 05 07:49:20 PM PDT 24 |
11404544123 ps |
| T440 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.980646165 |
|
|
Jul 05 07:00:24 PM PDT 24 |
Jul 05 07:16:38 PM PDT 24 |
5379279014 ps |
| T663 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.3105419974 |
|
|
Jul 05 07:12:48 PM PDT 24 |
Jul 05 08:11:02 PM PDT 24 |
13917389893 ps |
| T664 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.3341767597 |
|
|
Jul 05 07:28:33 PM PDT 24 |
Jul 05 07:45:19 PM PDT 24 |
3853146712 ps |
| T118 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.3743089091 |
|
|
Jul 05 06:56:20 PM PDT 24 |
Jul 05 07:05:59 PM PDT 24 |
3586428164 ps |
| T665 |
/workspace/coverage/default/1.chip_sw_example_flash.4142490261 |
|
|
Jul 05 07:10:55 PM PDT 24 |
Jul 05 07:15:39 PM PDT 24 |
2799812904 ps |
| T666 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.968334491 |
|
|
Jul 05 07:25:17 PM PDT 24 |
Jul 05 07:33:39 PM PDT 24 |
4749615050 ps |
| T667 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.4206084266 |
|
|
Jul 05 07:28:12 PM PDT 24 |
Jul 05 07:33:35 PM PDT 24 |
3572920309 ps |
| T668 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.2383343369 |
|
|
Jul 05 07:31:12 PM PDT 24 |
Jul 05 07:37:34 PM PDT 24 |
3712084112 ps |
| T527 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.1101909827 |
|
|
Jul 05 07:40:30 PM PDT 24 |
Jul 05 07:47:30 PM PDT 24 |
3956189768 ps |
| T250 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.2541795232 |
|
|
Jul 05 07:42:44 PM PDT 24 |
Jul 05 07:50:24 PM PDT 24 |
3374265288 ps |
| T53 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.868459599 |
|
|
Jul 05 06:57:23 PM PDT 24 |
Jul 05 07:03:03 PM PDT 24 |
3381657686 ps |
| T326 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.1139006703 |
|
|
Jul 05 07:14:24 PM PDT 24 |
Jul 05 08:50:50 PM PDT 24 |
45050671804 ps |
| T510 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.819750227 |
|
|
Jul 05 07:41:56 PM PDT 24 |
Jul 05 07:47:41 PM PDT 24 |
4300387892 ps |
| T669 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.845852154 |
|
|
Jul 05 07:26:06 PM PDT 24 |
Jul 05 07:49:53 PM PDT 24 |
14184038803 ps |
| T670 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.3649679137 |
|
|
Jul 05 07:22:38 PM PDT 24 |
Jul 05 07:27:10 PM PDT 24 |
3279068408 ps |
| T516 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.3323655048 |
|
|
Jul 05 07:43:17 PM PDT 24 |
Jul 05 07:50:03 PM PDT 24 |
3659289576 ps |
| T554 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.2406809978 |
|
|
Jul 05 07:39:07 PM PDT 24 |
Jul 05 07:51:36 PM PDT 24 |
5331269576 ps |
| T27 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.2178250400 |
|
|
Jul 05 07:12:55 PM PDT 24 |
Jul 05 07:26:50 PM PDT 24 |
7357134135 ps |
| T346 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.374430456 |
|
|
Jul 05 07:23:42 PM PDT 24 |
Jul 05 07:28:54 PM PDT 24 |
3530130048 ps |
| T671 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.3120360446 |
|
|
Jul 05 07:22:52 PM PDT 24 |
Jul 05 07:30:05 PM PDT 24 |
3063015528 ps |
| T483 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.778628306 |
|
|
Jul 05 07:44:15 PM PDT 24 |
Jul 05 07:50:39 PM PDT 24 |
4149977976 ps |
| T672 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.2725155513 |
|
|
Jul 05 07:40:20 PM PDT 24 |
Jul 05 08:47:00 PM PDT 24 |
15491778312 ps |
| T673 |
/workspace/coverage/default/1.rom_keymgr_functest.2764907049 |
|
|
Jul 05 07:22:08 PM PDT 24 |
Jul 05 07:34:33 PM PDT 24 |
5885058890 ps |
| T674 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.3744043585 |
|
|
Jul 05 07:13:58 PM PDT 24 |
Jul 05 07:24:59 PM PDT 24 |
8010553807 ps |
| T675 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.2187617364 |
|
|
Jul 05 07:20:31 PM PDT 24 |
Jul 05 07:24:30 PM PDT 24 |
3299725863 ps |
| T676 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.2594097972 |
|
|
Jul 05 07:09:34 PM PDT 24 |
Jul 05 08:21:07 PM PDT 24 |
14986234811 ps |
| T171 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.379727327 |
|
|
Jul 05 06:58:01 PM PDT 24 |
Jul 05 07:00:01 PM PDT 24 |
2862451055 ps |
| T677 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.1808435326 |
|
|
Jul 05 07:34:44 PM PDT 24 |
Jul 05 07:40:26 PM PDT 24 |
3346295442 ps |
| T352 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.2615653728 |
|
|
Jul 05 07:20:39 PM PDT 24 |
Jul 05 07:24:15 PM PDT 24 |
2831522824 ps |
| T172 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.3533221811 |
|
|
Jul 05 07:24:35 PM PDT 24 |
Jul 05 07:27:24 PM PDT 24 |
3264581306 ps |
| T400 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.2344320496 |
|
|
Jul 05 07:14:49 PM PDT 24 |
Jul 05 07:37:39 PM PDT 24 |
9317838485 ps |
| T678 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.57398944 |
|
|
Jul 05 07:00:16 PM PDT 24 |
Jul 05 08:01:42 PM PDT 24 |
17206498890 ps |
| T679 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.230828307 |
|
|
Jul 05 07:31:51 PM PDT 24 |
Jul 05 07:35:07 PM PDT 24 |
2233841505 ps |
| T337 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1023005207 |
|
|
Jul 05 07:39:43 PM PDT 24 |
Jul 05 07:50:26 PM PDT 24 |
4612381000 ps |
| T680 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.3430822786 |
|
|
Jul 05 07:12:22 PM PDT 24 |
Jul 05 08:18:32 PM PDT 24 |
15387072600 ps |
| T375 |
/workspace/coverage/default/0.chip_sival_flash_info_access.3608460349 |
|
|
Jul 05 06:56:32 PM PDT 24 |
Jul 05 07:00:52 PM PDT 24 |
2907476168 ps |
| T681 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3539104042 |
|
|
Jul 05 07:09:10 PM PDT 24 |
Jul 05 07:14:23 PM PDT 24 |
3289013680 ps |
| T682 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.464591791 |
|
|
Jul 05 07:35:17 PM PDT 24 |
Jul 05 07:48:27 PM PDT 24 |
4618859320 ps |
| T683 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.602743868 |
|
|
Jul 05 07:19:19 PM PDT 24 |
Jul 05 07:23:39 PM PDT 24 |
3080398406 ps |
| T684 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.1591673371 |
|
|
Jul 05 07:24:56 PM PDT 24 |
Jul 05 07:32:04 PM PDT 24 |
3605203670 ps |
| T156 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.448563469 |
|
|
Jul 05 07:39:40 PM PDT 24 |
Jul 05 07:49:34 PM PDT 24 |
5284676460 ps |
| T485 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.3260315192 |
|
|
Jul 05 07:39:02 PM PDT 24 |
Jul 05 07:49:04 PM PDT 24 |
5968703978 ps |
| T486 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.3795874820 |
|
|
Jul 05 07:44:23 PM PDT 24 |
Jul 05 07:50:22 PM PDT 24 |
3498317414 ps |
| T394 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.1452615131 |
|
|
Jul 05 06:59:07 PM PDT 24 |
Jul 05 07:04:39 PM PDT 24 |
3529674944 ps |
| T685 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.4276745540 |
|
|
Jul 05 07:18:42 PM PDT 24 |
Jul 05 07:24:09 PM PDT 24 |
3222028218 ps |
| T329 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.1982919162 |
|
|
Jul 05 07:04:13 PM PDT 24 |
Jul 05 07:43:46 PM PDT 24 |
21281357037 ps |
| T686 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.3552267794 |
|
|
Jul 05 07:26:13 PM PDT 24 |
Jul 05 07:37:48 PM PDT 24 |
5476194400 ps |
| T687 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.777800623 |
|
|
Jul 05 06:56:57 PM PDT 24 |
Jul 05 07:50:05 PM PDT 24 |
12685454132 ps |
| T688 |
/workspace/coverage/default/0.rom_e2e_smoke.49944439 |
|
|
Jul 05 07:10:28 PM PDT 24 |
Jul 05 08:21:57 PM PDT 24 |
14812247246 ps |
| T689 |
/workspace/coverage/default/2.chip_tap_straps_prod.2451226064 |
|
|
Jul 05 07:31:27 PM PDT 24 |
Jul 05 07:34:26 PM PDT 24 |
3458370683 ps |
| T24 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.5989140 |
|
|
Jul 05 06:56:07 PM PDT 24 |
Jul 05 07:01:27 PM PDT 24 |
3667890525 ps |
| T462 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.1208747721 |
|
|
Jul 05 07:39:25 PM PDT 24 |
Jul 05 07:49:02 PM PDT 24 |
5947891884 ps |
| T209 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.1222971515 |
|
|
Jul 05 07:04:36 PM PDT 24 |
Jul 05 07:10:02 PM PDT 24 |
3378855086 ps |
| T690 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.2633492696 |
|
|
Jul 05 07:35:56 PM PDT 24 |
Jul 05 08:42:18 PM PDT 24 |
19520743840 ps |
| T691 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.488226069 |
|
|
Jul 05 07:00:10 PM PDT 24 |
Jul 05 07:15:54 PM PDT 24 |
6003711880 ps |
| T256 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.4002522458 |
|
|
Jul 05 07:29:49 PM PDT 24 |
Jul 05 07:34:01 PM PDT 24 |
3117633412 ps |
| T454 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.749911717 |
|
|
Jul 05 07:41:12 PM PDT 24 |
Jul 05 07:47:25 PM PDT 24 |
4101655840 ps |
| T202 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.2521961132 |
|
|
Jul 05 07:01:13 PM PDT 24 |
Jul 05 07:10:57 PM PDT 24 |
3472633032 ps |
| T518 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.517583596 |
|
|
Jul 05 07:44:39 PM PDT 24 |
Jul 05 07:55:59 PM PDT 24 |
6174754480 ps |
| T692 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.1658387263 |
|
|
Jul 05 07:13:56 PM PDT 24 |
Jul 05 07:21:06 PM PDT 24 |
3146155818 ps |
| T693 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.2421255836 |
|
|
Jul 05 07:18:06 PM PDT 24 |
Jul 05 08:34:34 PM PDT 24 |
19143440876 ps |
| T175 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.1220644048 |
|
|
Jul 05 07:30:40 PM PDT 24 |
Jul 05 07:41:52 PM PDT 24 |
4181220475 ps |
| T694 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.2592205169 |
|
|
Jul 05 07:11:46 PM PDT 24 |
Jul 05 07:16:01 PM PDT 24 |
3225685074 ps |
| T377 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.2620048255 |
|
|
Jul 05 07:38:55 PM PDT 24 |
Jul 05 07:50:31 PM PDT 24 |
5524264112 ps |
| T87 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1736160073 |
|
|
Jul 05 07:19:59 PM PDT 24 |
Jul 05 07:28:50 PM PDT 24 |
5763044450 ps |
| T507 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.1775174656 |
|
|
Jul 05 07:42:27 PM PDT 24 |
Jul 05 07:49:20 PM PDT 24 |
3879922152 ps |
| T695 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.418826347 |
|
|
Jul 05 06:58:23 PM PDT 24 |
Jul 05 07:15:40 PM PDT 24 |
5235801965 ps |
| T696 |
/workspace/coverage/default/4.chip_tap_straps_prod.833680275 |
|
|
Jul 05 07:34:18 PM PDT 24 |
Jul 05 07:36:32 PM PDT 24 |
2156696770 ps |
| T697 |
/workspace/coverage/default/4.chip_tap_straps_rma.1458639201 |
|
|
Jul 05 07:36:41 PM PDT 24 |
Jul 05 07:39:19 PM PDT 24 |
3160335376 ps |
| T698 |
/workspace/coverage/default/1.chip_sw_power_idle_load.1733421857 |
|
|
Jul 05 07:20:30 PM PDT 24 |
Jul 05 07:33:15 PM PDT 24 |
4869136264 ps |
| T699 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.2637633321 |
|
|
Jul 05 07:12:19 PM PDT 24 |
Jul 05 08:04:51 PM PDT 24 |
13234703321 ps |
| T15 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.3988530719 |
|
|
Jul 05 07:22:08 PM PDT 24 |
Jul 05 07:27:01 PM PDT 24 |
3310989000 ps |
| T506 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.4176216 |
|
|
Jul 05 07:39:23 PM PDT 24 |
Jul 05 07:48:30 PM PDT 24 |
4660338424 ps |
| T243 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.2231532170 |
|
|
Jul 05 07:28:03 PM PDT 24 |
Jul 05 07:54:05 PM PDT 24 |
24889454724 ps |
| T147 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.1733729048 |
|
|
Jul 05 07:30:26 PM PDT 24 |
Jul 05 07:44:00 PM PDT 24 |
5432992296 ps |
| T287 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.1008053663 |
|
|
Jul 05 07:35:33 PM PDT 24 |
Jul 05 07:47:37 PM PDT 24 |
5631757070 ps |
| T494 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.2413147083 |
|
|
Jul 05 07:44:08 PM PDT 24 |
Jul 05 07:54:56 PM PDT 24 |
5754071000 ps |
| T700 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3077359698 |
|
|
Jul 05 07:34:30 PM PDT 24 |
Jul 05 08:07:25 PM PDT 24 |
12877196013 ps |
| T499 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.820660438 |
|
|
Jul 05 07:41:40 PM PDT 24 |
Jul 05 07:50:31 PM PDT 24 |
5271631452 ps |
| T701 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.4061389809 |
|
|
Jul 05 07:09:51 PM PDT 24 |
Jul 05 07:18:03 PM PDT 24 |
3607709766 ps |
| T396 |
/workspace/coverage/default/0.chip_sw_hmac_enc.3945487223 |
|
|
Jul 05 07:01:56 PM PDT 24 |
Jul 05 07:06:36 PM PDT 24 |
2994315558 ps |
| T17 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.2586649680 |
|
|
Jul 05 06:56:13 PM PDT 24 |
Jul 05 07:03:17 PM PDT 24 |
7023186200 ps |