| T920 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.2751809596 |
|
|
Jul 10 08:20:59 PM PDT 24 |
Jul 10 08:27:19 PM PDT 24 |
4954485750 ps |
| T342 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.3572096930 |
|
|
Jul 10 08:15:44 PM PDT 24 |
Jul 10 08:27:22 PM PDT 24 |
4049803387 ps |
| T731 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.2387597399 |
|
|
Jul 10 08:29:33 PM PDT 24 |
Jul 10 08:35:19 PM PDT 24 |
3873877780 ps |
| T168 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.2900747076 |
|
|
Jul 10 08:04:17 PM PDT 24 |
Jul 10 08:09:54 PM PDT 24 |
3818103487 ps |
| T921 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2111012236 |
|
|
Jul 10 08:17:13 PM PDT 24 |
Jul 10 08:35:51 PM PDT 24 |
8684109050 ps |
| T331 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.3055444530 |
|
|
Jul 10 07:56:01 PM PDT 24 |
Jul 10 08:42:26 PM PDT 24 |
13385565800 ps |
| T119 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.1664460683 |
|
|
Jul 10 08:21:00 PM PDT 24 |
Jul 10 08:27:56 PM PDT 24 |
5292041068 ps |
| T303 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.680915726 |
|
|
Jul 10 08:04:16 PM PDT 24 |
Jul 10 09:41:44 PM PDT 24 |
46420684036 ps |
| T29 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1446059347 |
|
|
Jul 10 08:13:41 PM PDT 24 |
Jul 10 08:43:25 PM PDT 24 |
7953478846 ps |
| T922 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.3193179972 |
|
|
Jul 10 08:42:55 PM PDT 24 |
Jul 10 08:52:37 PM PDT 24 |
4274707624 ps |
| T295 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.3119811773 |
|
|
Jul 10 08:14:36 PM PDT 24 |
Jul 10 08:37:34 PM PDT 24 |
6754820664 ps |
| T923 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.2526432312 |
|
|
Jul 10 08:28:12 PM PDT 24 |
Jul 10 09:00:36 PM PDT 24 |
12858728956 ps |
| T249 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3462705350 |
|
|
Jul 10 07:59:08 PM PDT 24 |
Jul 10 08:09:23 PM PDT 24 |
4956106007 ps |
| T351 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.425441225 |
|
|
Jul 10 08:25:10 PM PDT 24 |
Jul 10 08:36:16 PM PDT 24 |
5374335568 ps |
| T3 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.2466271889 |
|
|
Jul 10 08:13:46 PM PDT 24 |
Jul 10 08:33:31 PM PDT 24 |
19342044180 ps |
| T924 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.2965736641 |
|
|
Jul 10 08:08:15 PM PDT 24 |
Jul 10 08:46:43 PM PDT 24 |
12226839686 ps |
| T63 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.2927175761 |
|
|
Jul 10 08:22:48 PM PDT 24 |
Jul 10 08:28:31 PM PDT 24 |
4215157891 ps |
| T317 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.3926960162 |
|
|
Jul 10 07:58:59 PM PDT 24 |
Jul 10 08:12:20 PM PDT 24 |
5052164140 ps |
| T925 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.3668640318 |
|
|
Jul 10 08:06:46 PM PDT 24 |
Jul 10 09:08:27 PM PDT 24 |
15765250099 ps |
| T926 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.2648140205 |
|
|
Jul 10 08:04:55 PM PDT 24 |
Jul 10 08:38:13 PM PDT 24 |
8105462136 ps |
| T747 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.193930805 |
|
|
Jul 10 08:30:16 PM PDT 24 |
Jul 10 08:37:06 PM PDT 24 |
4093561334 ps |
| T122 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1056045376 |
|
|
Jul 10 08:18:58 PM PDT 24 |
Jul 10 08:28:48 PM PDT 24 |
3979974578 ps |
| T927 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.266121114 |
|
|
Jul 10 08:24:35 PM PDT 24 |
Jul 10 08:35:24 PM PDT 24 |
11700128943 ps |
| T355 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.2862345879 |
|
|
Jul 10 08:11:56 PM PDT 24 |
Jul 10 08:16:42 PM PDT 24 |
2955159573 ps |
| T928 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1042363404 |
|
|
Jul 10 08:00:54 PM PDT 24 |
Jul 10 08:11:55 PM PDT 24 |
4244821604 ps |
| T663 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.1284928539 |
|
|
Jul 10 08:25:27 PM PDT 24 |
Jul 10 10:04:03 PM PDT 24 |
27055043956 ps |
| T787 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.553202197 |
|
|
Jul 10 08:29:45 PM PDT 24 |
Jul 10 08:40:11 PM PDT 24 |
4549435742 ps |
| T154 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.2568284215 |
|
|
Jul 10 08:29:45 PM PDT 24 |
Jul 10 08:34:49 PM PDT 24 |
3757552520 ps |
| T929 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1977447724 |
|
|
Jul 10 08:10:07 PM PDT 24 |
Jul 10 08:24:16 PM PDT 24 |
4321940792 ps |
| T250 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.3772938360 |
|
|
Jul 10 08:02:47 PM PDT 24 |
Jul 10 08:13:34 PM PDT 24 |
4715914558 ps |
| T733 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.2986019857 |
|
|
Jul 10 07:57:24 PM PDT 24 |
Jul 10 08:09:30 PM PDT 24 |
5581206398 ps |
| T760 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.2424370378 |
|
|
Jul 10 08:28:16 PM PDT 24 |
Jul 10 08:34:53 PM PDT 24 |
3735916640 ps |
| T82 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.2637459969 |
|
|
Jul 10 07:59:20 PM PDT 24 |
Jul 10 08:20:41 PM PDT 24 |
11215160472 ps |
| T930 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.511213439 |
|
|
Jul 10 08:05:32 PM PDT 24 |
Jul 10 09:09:56 PM PDT 24 |
18650507855 ps |
| T384 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.864416227 |
|
|
Jul 10 08:01:34 PM PDT 24 |
Jul 10 08:06:18 PM PDT 24 |
2846372420 ps |
| T25 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.692036123 |
|
|
Jul 10 08:14:04 PM PDT 24 |
Jul 10 08:18:53 PM PDT 24 |
2759006140 ps |
| T931 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.2152703690 |
|
|
Jul 10 08:26:15 PM PDT 24 |
Jul 10 08:48:19 PM PDT 24 |
12407215625 ps |
| T932 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.4180075876 |
|
|
Jul 10 08:24:40 PM PDT 24 |
Jul 10 08:34:08 PM PDT 24 |
6766678878 ps |
| T933 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.4172735428 |
|
|
Jul 10 07:57:28 PM PDT 24 |
Jul 10 08:18:46 PM PDT 24 |
14995346216 ps |
| T934 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.1757054462 |
|
|
Jul 10 08:11:17 PM PDT 24 |
Jul 10 08:21:13 PM PDT 24 |
4000877100 ps |
| T935 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.1090358122 |
|
|
Jul 10 08:17:54 PM PDT 24 |
Jul 10 08:25:45 PM PDT 24 |
5740277291 ps |
| T936 |
/workspace/coverage/default/1.chip_sw_kmac_idle.279730131 |
|
|
Jul 10 08:09:54 PM PDT 24 |
Jul 10 08:14:26 PM PDT 24 |
2574967582 ps |
| T937 |
/workspace/coverage/default/0.chip_sw_example_flash.1001907968 |
|
|
Jul 10 07:55:57 PM PDT 24 |
Jul 10 07:59:30 PM PDT 24 |
2484454644 ps |
| T661 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.3318625538 |
|
|
Jul 10 08:02:09 PM PDT 24 |
Jul 10 08:13:42 PM PDT 24 |
3454266380 ps |
| T299 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.3346303330 |
|
|
Jul 10 08:08:37 PM PDT 24 |
Jul 10 08:41:02 PM PDT 24 |
10306928044 ps |
| T938 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.3449343031 |
|
|
Jul 10 08:22:36 PM PDT 24 |
Jul 10 08:33:09 PM PDT 24 |
4370126218 ps |
| T307 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.1669977425 |
|
|
Jul 10 07:55:59 PM PDT 24 |
Jul 10 08:05:43 PM PDT 24 |
4970282556 ps |
| T939 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2429000184 |
|
|
Jul 10 08:13:31 PM PDT 24 |
Jul 10 08:24:36 PM PDT 24 |
4236611280 ps |
| T136 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.1913613789 |
|
|
Jul 10 08:21:38 PM PDT 24 |
Jul 10 08:41:10 PM PDT 24 |
10006539000 ps |
| T940 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.67164492 |
|
|
Jul 10 08:21:31 PM PDT 24 |
Jul 10 08:27:07 PM PDT 24 |
2375813740 ps |
| T304 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.1910520720 |
|
|
Jul 10 08:10:48 PM PDT 24 |
Jul 10 08:45:08 PM PDT 24 |
24468928129 ps |
| T941 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.1926892679 |
|
|
Jul 10 08:12:55 PM PDT 24 |
Jul 10 08:17:45 PM PDT 24 |
3025234070 ps |
| T942 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1289509538 |
|
|
Jul 10 08:20:44 PM PDT 24 |
Jul 10 08:46:17 PM PDT 24 |
11858509296 ps |
| T943 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.1058674339 |
|
|
Jul 10 08:26:15 PM PDT 24 |
Jul 10 09:39:45 PM PDT 24 |
14170329058 ps |
| T944 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.3153888138 |
|
|
Jul 10 08:25:01 PM PDT 24 |
Jul 10 08:32:46 PM PDT 24 |
6643360016 ps |
| T9 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.1466682339 |
|
|
Jul 10 08:13:05 PM PDT 24 |
Jul 10 08:19:26 PM PDT 24 |
3429632112 ps |
| T945 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.807577467 |
|
|
Jul 10 08:06:49 PM PDT 24 |
Jul 10 08:11:06 PM PDT 24 |
3268958608 ps |
| T309 |
/workspace/coverage/default/2.chip_sw_flash_init.3341861883 |
|
|
Jul 10 08:13:00 PM PDT 24 |
Jul 10 08:44:21 PM PDT 24 |
24419183040 ps |
| T946 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.1465942829 |
|
|
Jul 10 08:07:57 PM PDT 24 |
Jul 10 09:47:22 PM PDT 24 |
24033776522 ps |
| T947 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.421576050 |
|
|
Jul 10 08:05:03 PM PDT 24 |
Jul 10 09:03:40 PM PDT 24 |
15640718785 ps |
| T513 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.2612355612 |
|
|
Jul 10 07:58:17 PM PDT 24 |
Jul 10 08:13:03 PM PDT 24 |
4781299158 ps |
| T948 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.27615242 |
|
|
Jul 10 08:20:37 PM PDT 24 |
Jul 10 08:29:45 PM PDT 24 |
8666005468 ps |
| T949 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.1817112485 |
|
|
Jul 10 08:20:28 PM PDT 24 |
Jul 10 08:23:43 PM PDT 24 |
2919474070 ps |
| T950 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.1087848288 |
|
|
Jul 10 08:24:22 PM PDT 24 |
Jul 10 08:34:21 PM PDT 24 |
7458215061 ps |
| T237 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3812900739 |
|
|
Jul 10 08:19:32 PM PDT 24 |
Jul 10 08:26:31 PM PDT 24 |
3966324552 ps |
| T951 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3717672693 |
|
|
Jul 10 08:09:18 PM PDT 24 |
Jul 10 08:23:38 PM PDT 24 |
4620246872 ps |
| T952 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.2477933662 |
|
|
Jul 10 08:30:33 PM PDT 24 |
Jul 10 08:39:19 PM PDT 24 |
4493000410 ps |
| T953 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.3928856392 |
|
|
Jul 10 08:03:05 PM PDT 24 |
Jul 10 08:52:32 PM PDT 24 |
10896578851 ps |
| T954 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.57572240 |
|
|
Jul 10 07:58:44 PM PDT 24 |
Jul 10 08:18:59 PM PDT 24 |
10841706396 ps |
| T385 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.1677438523 |
|
|
Jul 10 08:14:59 PM PDT 24 |
Jul 10 08:19:42 PM PDT 24 |
2878525860 ps |
| T725 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.2226838827 |
|
|
Jul 10 08:42:58 PM PDT 24 |
Jul 10 08:53:51 PM PDT 24 |
5432921126 ps |
| T955 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.301351774 |
|
|
Jul 10 08:14:48 PM PDT 24 |
Jul 10 08:28:15 PM PDT 24 |
10589326449 ps |
| T229 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.1708858560 |
|
|
Jul 10 08:28:18 PM PDT 24 |
Jul 10 08:35:35 PM PDT 24 |
3490101158 ps |
| T332 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.3532862312 |
|
|
Jul 10 08:24:22 PM PDT 24 |
Jul 10 08:31:32 PM PDT 24 |
3900244640 ps |
| T22 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.2859036191 |
|
|
Jul 10 08:13:41 PM PDT 24 |
Jul 10 08:17:15 PM PDT 24 |
2817415164 ps |
| T37 |
/workspace/coverage/default/0.chip_sw_gpio.3391785354 |
|
|
Jul 10 07:55:10 PM PDT 24 |
Jul 10 08:02:29 PM PDT 24 |
3759614890 ps |
| T956 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.1844683836 |
|
|
Jul 10 07:55:57 PM PDT 24 |
Jul 10 07:59:37 PM PDT 24 |
2838248320 ps |
| T957 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.618650890 |
|
|
Jul 10 08:05:38 PM PDT 24 |
Jul 10 08:15:27 PM PDT 24 |
7327576054 ps |
| T84 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.2172297515 |
|
|
Jul 10 08:13:24 PM PDT 24 |
Jul 10 08:18:55 PM PDT 24 |
3321698741 ps |
| T362 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.1961953857 |
|
|
Jul 10 08:02:57 PM PDT 24 |
Jul 10 08:08:12 PM PDT 24 |
3345528512 ps |
| T347 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.468056476 |
|
|
Jul 10 08:05:53 PM PDT 24 |
Jul 10 08:20:20 PM PDT 24 |
4656848255 ps |
| T444 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.4032579244 |
|
|
Jul 10 08:06:13 PM PDT 24 |
Jul 10 08:31:20 PM PDT 24 |
7371832596 ps |
| T958 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.4284354301 |
|
|
Jul 10 08:15:17 PM PDT 24 |
Jul 10 08:26:52 PM PDT 24 |
6549357226 ps |
| T730 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.3324498416 |
|
|
Jul 10 08:25:14 PM PDT 24 |
Jul 10 08:31:25 PM PDT 24 |
3563311800 ps |
| T162 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.3756250197 |
|
|
Jul 10 07:56:37 PM PDT 24 |
Jul 10 08:02:50 PM PDT 24 |
4073315708 ps |
| T211 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.2890785529 |
|
|
Jul 10 08:05:09 PM PDT 24 |
Jul 10 09:05:29 PM PDT 24 |
20835710870 ps |
| T59 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.571306444 |
|
|
Jul 10 07:56:05 PM PDT 24 |
Jul 10 08:03:59 PM PDT 24 |
3479054184 ps |
| T736 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.283718821 |
|
|
Jul 10 08:29:33 PM PDT 24 |
Jul 10 08:34:46 PM PDT 24 |
3607336632 ps |
| T959 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.3273051875 |
|
|
Jul 10 08:05:40 PM PDT 24 |
Jul 10 09:49:12 PM PDT 24 |
23963096076 ps |
| T89 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1528873245 |
|
|
Jul 10 08:26:15 PM PDT 24 |
Jul 10 08:35:17 PM PDT 24 |
4750977712 ps |
| T960 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.513811472 |
|
|
Jul 10 08:04:15 PM PDT 24 |
Jul 10 08:54:30 PM PDT 24 |
10997046140 ps |
| T796 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.3829132916 |
|
|
Jul 10 08:26:58 PM PDT 24 |
Jul 10 08:32:39 PM PDT 24 |
3700664380 ps |
| T961 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.77139592 |
|
|
Jul 10 08:18:24 PM PDT 24 |
Jul 10 08:23:53 PM PDT 24 |
3287974640 ps |
| T85 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.3525811617 |
|
|
Jul 10 07:56:37 PM PDT 24 |
Jul 10 08:01:14 PM PDT 24 |
2512800884 ps |
| T143 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.1597975076 |
|
|
Jul 10 07:57:19 PM PDT 24 |
Jul 10 08:07:13 PM PDT 24 |
8566112051 ps |
| T364 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.3013590242 |
|
|
Jul 10 08:02:34 PM PDT 24 |
Jul 10 08:14:21 PM PDT 24 |
3435779206 ps |
| T962 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.573824934 |
|
|
Jul 10 08:16:03 PM PDT 24 |
Jul 10 09:21:42 PM PDT 24 |
16046206824 ps |
| T963 |
/workspace/coverage/default/2.chip_sw_hmac_enc.216561410 |
|
|
Jul 10 08:16:28 PM PDT 24 |
Jul 10 08:22:12 PM PDT 24 |
3539752142 ps |
| T200 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.3949655289 |
|
|
Jul 10 07:55:55 PM PDT 24 |
Jul 11 12:05:26 AM PDT 24 |
78334447500 ps |
| T432 |
/workspace/coverage/default/0.chip_jtag_mem_access.2482220259 |
|
|
Jul 10 07:50:12 PM PDT 24 |
Jul 10 08:11:45 PM PDT 24 |
13959688036 ps |
| T964 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.2048364702 |
|
|
Jul 10 08:25:15 PM PDT 24 |
Jul 10 09:59:44 PM PDT 24 |
28385767140 ps |
| T159 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.1841287661 |
|
|
Jul 10 07:57:40 PM PDT 24 |
Jul 10 08:11:16 PM PDT 24 |
6082831246 ps |
| T386 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.3183330601 |
|
|
Jul 10 08:05:44 PM PDT 24 |
Jul 10 08:10:27 PM PDT 24 |
3062886760 ps |
| T676 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.2424157373 |
|
|
Jul 10 08:14:28 PM PDT 24 |
Jul 10 08:16:25 PM PDT 24 |
2376890612 ps |
| T965 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.2510638488 |
|
|
Jul 10 08:23:20 PM PDT 24 |
Jul 10 08:32:54 PM PDT 24 |
4785915500 ps |
| T966 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.2545985552 |
|
|
Jul 10 08:06:08 PM PDT 24 |
Jul 10 09:03:55 PM PDT 24 |
15469010322 ps |
| T967 |
/workspace/coverage/default/0.chip_tap_straps_dev.710179118 |
|
|
Jul 10 07:57:29 PM PDT 24 |
Jul 10 08:03:31 PM PDT 24 |
4174028218 ps |
| T174 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.1438356870 |
|
|
Jul 10 08:02:33 PM PDT 24 |
Jul 10 08:13:49 PM PDT 24 |
8568052064 ps |
| T279 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.4127710758 |
|
|
Jul 10 08:02:58 PM PDT 24 |
Jul 10 08:04:40 PM PDT 24 |
2418717146 ps |
| T280 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.1414288988 |
|
|
Jul 10 08:25:52 PM PDT 24 |
Jul 10 08:34:48 PM PDT 24 |
4119468348 ps |
| T111 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.2928015780 |
|
|
Jul 10 08:11:25 PM PDT 24 |
Jul 10 08:23:15 PM PDT 24 |
10908109080 ps |
| T281 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.2727628841 |
|
|
Jul 10 08:02:29 PM PDT 24 |
Jul 10 08:05:48 PM PDT 24 |
2299922920 ps |
| T282 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.3826070630 |
|
|
Jul 10 08:29:59 PM PDT 24 |
Jul 10 08:37:15 PM PDT 24 |
4309452256 ps |
| T283 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.1296004661 |
|
|
Jul 10 08:26:44 PM PDT 24 |
Jul 10 08:33:41 PM PDT 24 |
3165373904 ps |
| T284 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.3772975521 |
|
|
Jul 10 08:03:54 PM PDT 24 |
Jul 10 08:30:31 PM PDT 24 |
8408607000 ps |
| T285 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.3681475360 |
|
|
Jul 10 08:20:51 PM PDT 24 |
Jul 10 08:26:33 PM PDT 24 |
2949274101 ps |
| T286 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.3424370888 |
|
|
Jul 10 07:59:20 PM PDT 24 |
Jul 10 08:47:28 PM PDT 24 |
12645434350 ps |
| T296 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.2415893787 |
|
|
Jul 10 07:59:43 PM PDT 24 |
Jul 10 08:48:26 PM PDT 24 |
11893270402 ps |
| T968 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.862629517 |
|
|
Jul 10 08:15:29 PM PDT 24 |
Jul 10 08:31:30 PM PDT 24 |
5627777690 ps |
| T969 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.684404373 |
|
|
Jul 10 07:58:02 PM PDT 24 |
Jul 10 08:08:59 PM PDT 24 |
5560002728 ps |
| T776 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.800347896 |
|
|
Jul 10 08:25:33 PM PDT 24 |
Jul 10 08:35:33 PM PDT 24 |
4980877510 ps |
| T777 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.1027361955 |
|
|
Jul 10 08:29:34 PM PDT 24 |
Jul 10 08:38:40 PM PDT 24 |
4520806030 ps |
| T788 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.1725795122 |
|
|
Jul 10 08:41:41 PM PDT 24 |
Jul 10 08:47:13 PM PDT 24 |
4118035896 ps |
| T677 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.1554566640 |
|
|
Jul 10 07:55:18 PM PDT 24 |
Jul 10 07:57:06 PM PDT 24 |
2245307221 ps |
| T970 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.2515528922 |
|
|
Jul 10 07:56:21 PM PDT 24 |
Jul 10 08:06:02 PM PDT 24 |
3708097872 ps |
| T971 |
/workspace/coverage/default/1.chip_tap_straps_dev.2205882739 |
|
|
Jul 10 08:10:07 PM PDT 24 |
Jul 10 08:16:59 PM PDT 24 |
4909147608 ps |
| T678 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.926820153 |
|
|
Jul 10 08:01:21 PM PDT 24 |
Jul 10 08:03:22 PM PDT 24 |
2690147601 ps |
| T300 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.3278085737 |
|
|
Jul 10 08:07:59 PM PDT 24 |
Jul 10 09:17:00 PM PDT 24 |
16961655954 ps |
| T972 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.3420073343 |
|
|
Jul 10 07:57:41 PM PDT 24 |
Jul 10 08:01:07 PM PDT 24 |
2339050424 ps |
| T435 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.2608139467 |
|
|
Jul 10 08:29:04 PM PDT 24 |
Jul 10 08:34:23 PM PDT 24 |
4403537890 ps |
| T49 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.1075475830 |
|
|
Jul 10 08:13:31 PM PDT 24 |
Jul 10 08:23:07 PM PDT 24 |
3532794909 ps |
| T973 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.471814199 |
|
|
Jul 10 08:24:32 PM PDT 24 |
Jul 10 09:29:50 PM PDT 24 |
14306279210 ps |
| T974 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.1647976787 |
|
|
Jul 10 07:58:29 PM PDT 24 |
Jul 10 08:46:25 PM PDT 24 |
11116527580 ps |
| T679 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.448199862 |
|
|
Jul 10 08:03:53 PM PDT 24 |
Jul 10 08:05:30 PM PDT 24 |
2140209547 ps |
| T975 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.985095407 |
|
|
Jul 10 07:58:51 PM PDT 24 |
Jul 10 08:14:32 PM PDT 24 |
7183588700 ps |
| T411 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.1148088676 |
|
|
Jul 10 08:09:12 PM PDT 24 |
Jul 10 08:19:07 PM PDT 24 |
8251934110 ps |
| T251 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.1875701985 |
|
|
Jul 10 07:58:00 PM PDT 24 |
Jul 10 08:07:29 PM PDT 24 |
5789452355 ps |
| T13 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.3825026359 |
|
|
Jul 10 08:19:03 PM PDT 24 |
Jul 10 08:45:02 PM PDT 24 |
23643368468 ps |
| T14 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3818704669 |
|
|
Jul 10 08:18:17 PM PDT 24 |
Jul 10 08:27:33 PM PDT 24 |
7625257926 ps |
| T259 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.4171092849 |
|
|
Jul 10 08:26:45 PM PDT 24 |
Jul 10 08:35:09 PM PDT 24 |
4232228268 ps |
| T976 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.3129241914 |
|
|
Jul 10 07:56:09 PM PDT 24 |
Jul 10 09:29:41 PM PDT 24 |
44363214522 ps |
| T977 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.2337478879 |
|
|
Jul 10 08:18:30 PM PDT 24 |
Jul 10 08:33:26 PM PDT 24 |
7077227512 ps |
| T978 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.1999144893 |
|
|
Jul 10 08:05:41 PM PDT 24 |
Jul 10 08:13:45 PM PDT 24 |
5076231840 ps |
| T979 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.3334023388 |
|
|
Jul 10 08:08:32 PM PDT 24 |
Jul 10 08:27:54 PM PDT 24 |
4626790328 ps |
| T338 |
/workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.1607447043 |
|
|
Jul 10 08:11:35 PM PDT 24 |
Jul 10 08:19:53 PM PDT 24 |
4740612772 ps |
| T980 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.2817303225 |
|
|
Jul 10 08:03:52 PM PDT 24 |
Jul 10 09:09:31 PM PDT 24 |
14622897068 ps |
| T160 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.3286865951 |
|
|
Jul 10 08:29:30 PM PDT 24 |
Jul 10 08:39:49 PM PDT 24 |
5314105760 ps |
| T981 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.2930893756 |
|
|
Jul 10 08:27:21 PM PDT 24 |
Jul 10 08:36:17 PM PDT 24 |
4690892376 ps |
| T982 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.1704373131 |
|
|
Jul 10 08:25:56 PM PDT 24 |
Jul 10 08:40:28 PM PDT 24 |
11766918043 ps |
| T171 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.3919454689 |
|
|
Jul 10 07:56:36 PM PDT 24 |
Jul 10 07:59:19 PM PDT 24 |
2920133727 ps |
| T983 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.4190798253 |
|
|
Jul 10 08:02:52 PM PDT 24 |
Jul 10 08:07:55 PM PDT 24 |
3383670088 ps |
| T984 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.2407622968 |
|
|
Jul 10 08:15:40 PM PDT 24 |
Jul 10 09:06:57 PM PDT 24 |
20318412366 ps |
| T662 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.3440755992 |
|
|
Jul 10 08:07:57 PM PDT 24 |
Jul 10 08:17:53 PM PDT 24 |
3454741304 ps |
| T985 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.3913444198 |
|
|
Jul 10 08:17:20 PM PDT 24 |
Jul 10 08:28:13 PM PDT 24 |
3932454852 ps |
| T986 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.2700785750 |
|
|
Jul 10 08:03:30 PM PDT 24 |
Jul 10 08:09:29 PM PDT 24 |
3334530144 ps |
| T312 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.569437920 |
|
|
Jul 10 08:09:14 PM PDT 24 |
Jul 10 11:14:41 PM PDT 24 |
255439262006 ps |
| T987 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.1345803791 |
|
|
Jul 10 07:58:21 PM PDT 24 |
Jul 10 08:05:27 PM PDT 24 |
5835842040 ps |
| T157 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.161507228 |
|
|
Jul 10 07:55:58 PM PDT 24 |
Jul 10 07:58:29 PM PDT 24 |
2759810496 ps |
| T988 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.4080828480 |
|
|
Jul 10 08:18:47 PM PDT 24 |
Jul 10 08:55:57 PM PDT 24 |
9560438352 ps |
| T989 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.2461230382 |
|
|
Jul 10 07:58:52 PM PDT 24 |
Jul 10 08:32:10 PM PDT 24 |
9850618108 ps |
| T990 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.1775610196 |
|
|
Jul 10 08:10:10 PM PDT 24 |
Jul 10 08:16:11 PM PDT 24 |
3550214552 ps |
| T57 |
/workspace/coverage/default/2.chip_sw_alert_test.1552898402 |
|
|
Jul 10 08:18:17 PM PDT 24 |
Jul 10 08:24:21 PM PDT 24 |
3411799436 ps |
| T791 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.1675132148 |
|
|
Jul 10 08:28:44 PM PDT 24 |
Jul 10 08:40:04 PM PDT 24 |
5838371306 ps |
| T175 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.752529545 |
|
|
Jul 10 08:21:02 PM PDT 24 |
Jul 10 08:28:38 PM PDT 24 |
6403970860 ps |
| T15 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.303258726 |
|
|
Jul 10 07:57:57 PM PDT 24 |
Jul 10 08:29:39 PM PDT 24 |
20968342352 ps |
| T991 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.1238294049 |
|
|
Jul 10 08:26:12 PM PDT 24 |
Jul 10 08:48:26 PM PDT 24 |
8362710360 ps |
| T992 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.821477805 |
|
|
Jul 10 08:25:16 PM PDT 24 |
Jul 10 09:32:27 PM PDT 24 |
14683444328 ps |
| T161 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.78151644 |
|
|
Jul 10 08:23:54 PM PDT 24 |
Jul 10 08:31:54 PM PDT 24 |
5075520208 ps |
| T993 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.1260266021 |
|
|
Jul 10 08:19:00 PM PDT 24 |
Jul 10 08:23:08 PM PDT 24 |
2661873424 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.220590108 |
|
|
Jul 10 08:15:08 PM PDT 24 |
Jul 10 08:23:02 PM PDT 24 |
5446941118 ps |
| T758 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.2293196576 |
|
|
Jul 10 08:24:59 PM PDT 24 |
Jul 10 08:35:38 PM PDT 24 |
4088084690 ps |
| T995 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3826521070 |
|
|
Jul 10 08:18:36 PM PDT 24 |
Jul 10 08:27:00 PM PDT 24 |
4770322116 ps |
| T337 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.113446099 |
|
|
Jul 10 08:19:22 PM PDT 24 |
Jul 10 08:28:04 PM PDT 24 |
3853386808 ps |
| T996 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.2182369773 |
|
|
Jul 10 08:02:20 PM PDT 24 |
Jul 10 08:07:57 PM PDT 24 |
3234156472 ps |
| T783 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.3943757839 |
|
|
Jul 10 08:26:25 PM PDT 24 |
Jul 10 08:32:51 PM PDT 24 |
3808076608 ps |
| T131 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1022068998 |
|
|
Jul 10 08:19:11 PM PDT 24 |
Jul 10 08:27:01 PM PDT 24 |
5542467464 ps |
| T238 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.1507842955 |
|
|
Jul 10 08:00:36 PM PDT 24 |
Jul 10 08:33:43 PM PDT 24 |
35696408362 ps |
| T680 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.3348162047 |
|
|
Jul 10 07:58:32 PM PDT 24 |
Jul 10 08:01:08 PM PDT 24 |
3967244727 ps |
| T46 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2569312200 |
|
|
Jul 10 08:05:07 PM PDT 24 |
Jul 10 08:13:32 PM PDT 24 |
5028293864 ps |
| T997 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.407085045 |
|
|
Jul 10 07:59:08 PM PDT 24 |
Jul 10 08:03:48 PM PDT 24 |
3321493400 ps |
| T998 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.2773247342 |
|
|
Jul 10 07:57:19 PM PDT 24 |
Jul 10 08:04:15 PM PDT 24 |
4080823356 ps |
| T999 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.3486955892 |
|
|
Jul 10 08:16:55 PM PDT 24 |
Jul 10 08:22:35 PM PDT 24 |
3607010366 ps |
| T1000 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.4038488895 |
|
|
Jul 10 07:59:00 PM PDT 24 |
Jul 10 08:04:16 PM PDT 24 |
3050444233 ps |
| T720 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.2259326546 |
|
|
Jul 10 08:31:25 PM PDT 24 |
Jul 10 08:36:34 PM PDT 24 |
2913151782 ps |
| T1001 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.889783471 |
|
|
Jul 10 08:07:17 PM PDT 24 |
Jul 10 08:10:59 PM PDT 24 |
3044846046 ps |
| T308 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.1988951842 |
|
|
Jul 10 07:56:13 PM PDT 24 |
Jul 10 09:33:04 PM PDT 24 |
49793743788 ps |
| T305 |
/workspace/coverage/default/0.chip_sw_flash_init.3314260106 |
|
|
Jul 10 07:55:44 PM PDT 24 |
Jul 10 08:35:37 PM PDT 24 |
25889910346 ps |
| T1002 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.2841846650 |
|
|
Jul 10 08:01:59 PM PDT 24 |
Jul 10 09:03:07 PM PDT 24 |
15647629655 ps |
| T327 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.1804876203 |
|
|
Jul 10 07:59:17 PM PDT 24 |
Jul 10 08:25:05 PM PDT 24 |
6721114888 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.97214860 |
|
|
Jul 10 08:02:14 PM PDT 24 |
Jul 10 08:17:32 PM PDT 24 |
5706497128 ps |
| T1004 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.759094777 |
|
|
Jul 10 08:24:21 PM PDT 24 |
Jul 10 10:09:48 PM PDT 24 |
28283577612 ps |
| T297 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.386366923 |
|
|
Jul 10 08:07:46 PM PDT 24 |
Jul 10 08:41:23 PM PDT 24 |
10745703600 ps |
| T1005 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.283461325 |
|
|
Jul 10 08:22:55 PM PDT 24 |
Jul 10 08:29:40 PM PDT 24 |
3942600547 ps |
| T681 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.51083319 |
|
|
Jul 10 08:20:49 PM PDT 24 |
Jul 10 08:22:44 PM PDT 24 |
2292383109 ps |
| T1006 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.3595485602 |
|
|
Jul 10 08:21:46 PM PDT 24 |
Jul 10 08:25:55 PM PDT 24 |
2724067866 ps |
| T1007 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.1885767885 |
|
|
Jul 10 08:26:43 PM PDT 24 |
Jul 10 08:33:39 PM PDT 24 |
5991861640 ps |
| T1008 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.3447684391 |
|
|
Jul 10 08:24:29 PM PDT 24 |
Jul 10 08:49:06 PM PDT 24 |
8013261420 ps |
| T761 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.3645296790 |
|
|
Jul 10 08:29:51 PM PDT 24 |
Jul 10 08:39:54 PM PDT 24 |
4313297992 ps |
| T1009 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.3433730413 |
|
|
Jul 10 08:22:52 PM PDT 24 |
Jul 10 08:28:33 PM PDT 24 |
3299708778 ps |
| T176 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.1514513952 |
|
|
Jul 10 08:20:25 PM PDT 24 |
Jul 10 08:24:53 PM PDT 24 |
3232713802 ps |
| T269 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.2647403161 |
|
|
Jul 10 08:30:32 PM PDT 24 |
Jul 10 08:36:24 PM PDT 24 |
3617322140 ps |
| T270 |
/workspace/coverage/default/0.chip_sw_example_concurrency.2468633942 |
|
|
Jul 10 07:56:56 PM PDT 24 |
Jul 10 07:59:56 PM PDT 24 |
2500185552 ps |
| T271 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.67169099 |
|
|
Jul 10 08:25:35 PM PDT 24 |
Jul 10 09:20:15 PM PDT 24 |
15585934381 ps |
| T272 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.1649705357 |
|
|
Jul 10 08:30:23 PM PDT 24 |
Jul 10 08:35:46 PM PDT 24 |
3324650704 ps |
| T273 |
/workspace/coverage/default/2.chip_sw_kmac_idle.1775232217 |
|
|
Jul 10 08:19:34 PM PDT 24 |
Jul 10 08:23:43 PM PDT 24 |
3094530260 ps |
| T274 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.3324142391 |
|
|
Jul 10 08:27:53 PM PDT 24 |
Jul 10 08:34:19 PM PDT 24 |
3647196080 ps |
| T275 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.2158858192 |
|
|
Jul 10 07:57:02 PM PDT 24 |
Jul 10 08:12:47 PM PDT 24 |
9798268520 ps |
| T276 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.2922200556 |
|
|
Jul 10 08:23:38 PM PDT 24 |
Jul 10 08:45:19 PM PDT 24 |
8610979887 ps |
| T277 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.3566211876 |
|
|
Jul 10 08:16:36 PM PDT 24 |
Jul 10 09:13:49 PM PDT 24 |
15165020120 ps |
| T383 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1170652813 |
|
|
Jul 10 08:17:46 PM PDT 24 |
Jul 10 08:28:31 PM PDT 24 |
4098559672 ps |
| T1010 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.232952490 |
|
|
Jul 10 08:09:37 PM PDT 24 |
Jul 10 08:21:15 PM PDT 24 |
4092552260 ps |
| T1011 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.1534768767 |
|
|
Jul 10 08:24:40 PM PDT 24 |
Jul 10 08:31:52 PM PDT 24 |
7078219700 ps |
| T1012 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.2245048947 |
|
|
Jul 10 07:57:44 PM PDT 24 |
Jul 10 08:01:22 PM PDT 24 |
2628500440 ps |
| T1013 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.556937807 |
|
|
Jul 10 07:55:20 PM PDT 24 |
Jul 10 08:02:05 PM PDT 24 |
4511675992 ps |
| T1014 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.1762875281 |
|
|
Jul 10 07:56:04 PM PDT 24 |
Jul 10 08:09:09 PM PDT 24 |
5645983788 ps |
| T1015 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2225967560 |
|
|
Jul 10 07:56:51 PM PDT 24 |
Jul 10 08:03:51 PM PDT 24 |
6742536696 ps |
| T516 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.394117526 |
|
|
Jul 10 08:15:36 PM PDT 24 |
Jul 10 08:42:27 PM PDT 24 |
10491901740 ps |
| T728 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.2682677747 |
|
|
Jul 10 08:42:19 PM PDT 24 |
Jul 10 08:48:42 PM PDT 24 |
3658824308 ps |
| T1016 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.3540662163 |
|
|
Jul 10 08:04:05 PM PDT 24 |
Jul 10 09:04:49 PM PDT 24 |
13873933730 ps |
| T713 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.129178083 |
|
|
Jul 10 08:27:23 PM PDT 24 |
Jul 10 08:32:55 PM PDT 24 |
3589078480 ps |
| T748 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.252050040 |
|
|
Jul 10 08:28:52 PM PDT 24 |
Jul 10 08:35:34 PM PDT 24 |
4372815100 ps |
| T226 |
/workspace/coverage/default/1.chip_sw_alert_test.593421365 |
|
|
Jul 10 08:09:11 PM PDT 24 |
Jul 10 08:14:28 PM PDT 24 |
3111249320 ps |
| T1017 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.916155468 |
|
|
Jul 10 08:14:55 PM PDT 24 |
Jul 10 08:33:03 PM PDT 24 |
7701364984 ps |
| T1018 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.3660971607 |
|
|
Jul 10 07:57:04 PM PDT 24 |
Jul 10 08:01:58 PM PDT 24 |
2849649600 ps |
| T1019 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2916193170 |
|
|
Jul 10 07:55:50 PM PDT 24 |
Jul 10 08:05:15 PM PDT 24 |
4629820430 ps |
| T726 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.841624439 |
|
|
Jul 10 08:26:19 PM PDT 24 |
Jul 10 08:32:59 PM PDT 24 |
3637653880 ps |
| T1020 |
/workspace/coverage/default/1.chip_sw_aes_idle.964700593 |
|
|
Jul 10 08:07:58 PM PDT 24 |
Jul 10 08:12:00 PM PDT 24 |
2475323700 ps |
| T770 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.3565736277 |
|
|
Jul 10 08:29:08 PM PDT 24 |
Jul 10 08:36:08 PM PDT 24 |
4091628152 ps |
| T1021 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.288258890 |
|
|
Jul 10 07:58:01 PM PDT 24 |
Jul 10 08:16:53 PM PDT 24 |
6523363154 ps |
| T1022 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.3363869345 |
|
|
Jul 10 08:04:00 PM PDT 24 |
Jul 10 08:28:23 PM PDT 24 |
9677774884 ps |
| T316 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.3748765624 |
|
|
Jul 10 08:10:28 PM PDT 24 |
Jul 10 08:33:05 PM PDT 24 |
6150478598 ps |
| T367 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3868575141 |
|
|
Jul 10 08:00:44 PM PDT 24 |
Jul 10 08:09:17 PM PDT 24 |
4375863352 ps |
| T306 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.1573476373 |
|
|
Jul 10 08:15:14 PM PDT 24 |
Jul 10 09:51:47 PM PDT 24 |
47989239114 ps |
| T144 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.1319188719 |
|
|
Jul 10 07:56:39 PM PDT 24 |
Jul 10 08:00:26 PM PDT 24 |
2731023648 ps |
| T445 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.171248464 |
|
|
Jul 10 08:08:44 PM PDT 24 |
Jul 10 08:34:03 PM PDT 24 |
6975976423 ps |
| T321 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.3973995296 |
|
|
Jul 10 08:15:16 PM PDT 24 |
Jul 10 08:32:21 PM PDT 24 |
5350697210 ps |
| T1023 |
/workspace/coverage/default/1.rom_keymgr_functest.2512748145 |
|
|
Jul 10 08:12:30 PM PDT 24 |
Jul 10 08:23:11 PM PDT 24 |
3918512414 ps |
| T1024 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.1097476363 |
|
|
Jul 10 08:16:28 PM PDT 24 |
Jul 10 08:21:01 PM PDT 24 |
2971962440 ps |
| T1025 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.3446852930 |
|
|
Jul 10 08:17:46 PM PDT 24 |
Jul 10 08:25:20 PM PDT 24 |
3693155716 ps |
| T1026 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1783750197 |
|
|
Jul 10 08:20:20 PM PDT 24 |
Jul 10 08:26:48 PM PDT 24 |
3266794865 ps |
| T177 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.1096716888 |
|
|
Jul 10 08:12:06 PM PDT 24 |
Jul 10 08:17:36 PM PDT 24 |
2598978660 ps |
| T396 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.3239115009 |
|
|
Jul 10 08:41:46 PM PDT 24 |
Jul 10 08:46:48 PM PDT 24 |
3423830916 ps |
| T397 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.2613377042 |
|
|
Jul 10 08:03:59 PM PDT 24 |
Jul 10 09:28:31 PM PDT 24 |
46838554110 ps |
| T398 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.384255436 |
|
|
Jul 10 08:22:16 PM PDT 24 |
Jul 10 08:38:11 PM PDT 24 |
6226708744 ps |
| T399 |
/workspace/coverage/default/1.chip_sw_edn_kat.662236828 |
|
|
Jul 10 08:06:58 PM PDT 24 |
Jul 10 08:18:08 PM PDT 24 |
3594492230 ps |
| T400 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.2683526636 |
|
|
Jul 10 08:06:28 PM PDT 24 |
Jul 10 08:16:14 PM PDT 24 |
4412623280 ps |
| T401 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.527320203 |
|
|
Jul 10 08:25:19 PM PDT 24 |
Jul 10 08:37:20 PM PDT 24 |
4006021368 ps |
| T402 |
/workspace/coverage/default/1.chip_tap_straps_prod.2397399948 |
|
|
Jul 10 08:10:00 PM PDT 24 |
Jul 10 08:13:45 PM PDT 24 |
2840576698 ps |
| T403 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.3864844959 |
|
|
Jul 10 08:17:34 PM PDT 24 |
Jul 10 09:16:51 PM PDT 24 |
14517117176 ps |
| T404 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.2683551738 |
|
|
Jul 10 08:43:02 PM PDT 24 |
Jul 10 08:52:42 PM PDT 24 |
5525041676 ps |