| T1168 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.2290229599 |
|
|
Jul 10 08:00:28 PM PDT 24 |
Jul 10 08:08:01 PM PDT 24 |
2967371016 ps |
| T1169 |
/workspace/coverage/default/2.chip_sival_flash_info_access.4146409849 |
|
|
Jul 10 08:14:28 PM PDT 24 |
Jul 10 08:21:12 PM PDT 24 |
2560154672 ps |
| T361 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.928284593 |
|
|
Jul 10 08:06:15 PM PDT 24 |
Jul 10 08:15:54 PM PDT 24 |
19181688636 ps |
| T325 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.331621831 |
|
|
Jul 10 08:04:54 PM PDT 24 |
Jul 10 08:34:16 PM PDT 24 |
11722767978 ps |
| T1170 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.1098352404 |
|
|
Jul 10 07:56:05 PM PDT 24 |
Jul 10 08:10:15 PM PDT 24 |
4413979350 ps |
| T1171 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.4034836816 |
|
|
Jul 10 08:17:13 PM PDT 24 |
Jul 10 08:43:28 PM PDT 24 |
10126430818 ps |
| T717 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.2862254656 |
|
|
Jul 10 08:24:33 PM PDT 24 |
Jul 10 08:31:39 PM PDT 24 |
3914228230 ps |
| T1172 |
/workspace/coverage/default/0.rom_e2e_smoke.1038150760 |
|
|
Jul 10 08:03:28 PM PDT 24 |
Jul 10 09:06:32 PM PDT 24 |
14767371746 ps |
| T664 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.1840639341 |
|
|
Jul 10 08:23:02 PM PDT 24 |
Jul 10 10:25:25 PM PDT 24 |
29727849920 ps |
| T1173 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.718184149 |
|
|
Jul 10 07:56:51 PM PDT 24 |
Jul 10 08:04:58 PM PDT 24 |
3614444332 ps |
| T354 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.733711005 |
|
|
Jul 10 08:11:00 PM PDT 24 |
Jul 10 08:15:48 PM PDT 24 |
2746957551 ps |
| T1174 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.1562752289 |
|
|
Jul 10 08:06:02 PM PDT 24 |
Jul 10 09:46:08 PM PDT 24 |
45944461862 ps |
| T702 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.2830884018 |
|
|
Jul 10 08:05:07 PM PDT 24 |
Jul 10 08:19:00 PM PDT 24 |
5054872500 ps |
| T267 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.3035382782 |
|
|
Jul 10 07:57:43 PM PDT 24 |
Jul 10 08:03:00 PM PDT 24 |
3097887158 ps |
| T774 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.2316681211 |
|
|
Jul 10 08:29:18 PM PDT 24 |
Jul 10 08:41:06 PM PDT 24 |
5700758544 ps |
| T339 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.1183259996 |
|
|
Jul 10 07:56:58 PM PDT 24 |
Jul 10 08:05:05 PM PDT 24 |
3823129834 ps |
| T767 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.2106670948 |
|
|
Jul 10 08:17:29 PM PDT 24 |
Jul 10 08:26:25 PM PDT 24 |
4544292104 ps |
| T333 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.1667292907 |
|
|
Jul 10 07:55:57 PM PDT 24 |
Jul 10 08:04:14 PM PDT 24 |
4212102696 ps |
| T1175 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1223096226 |
|
|
Jul 10 07:56:33 PM PDT 24 |
Jul 10 08:05:02 PM PDT 24 |
19234194220 ps |
| T343 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.3742799617 |
|
|
Jul 10 07:57:12 PM PDT 24 |
Jul 10 08:06:47 PM PDT 24 |
4102697558 ps |
| T1176 |
/workspace/coverage/default/1.chip_sw_example_concurrency.2218519730 |
|
|
Jul 10 08:03:56 PM PDT 24 |
Jul 10 08:07:58 PM PDT 24 |
3396604648 ps |
| T1177 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.2699889936 |
|
|
Jul 10 08:26:21 PM PDT 24 |
Jul 10 08:32:33 PM PDT 24 |
3631518616 ps |
| T1178 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.1596470851 |
|
|
Jul 10 08:08:08 PM PDT 24 |
Jul 10 09:12:23 PM PDT 24 |
14245229320 ps |
| T1179 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.2668276594 |
|
|
Jul 10 07:56:59 PM PDT 24 |
Jul 10 08:56:53 PM PDT 24 |
18738201722 ps |
| T1180 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3589381471 |
|
|
Jul 10 08:02:56 PM PDT 24 |
Jul 10 08:10:58 PM PDT 24 |
3748102660 ps |
| T1181 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.3149988663 |
|
|
Jul 10 08:06:32 PM PDT 24 |
Jul 10 09:23:52 PM PDT 24 |
14215663540 ps |
| T1182 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.3907082868 |
|
|
Jul 10 08:24:26 PM PDT 24 |
Jul 10 09:18:39 PM PDT 24 |
17457857080 ps |
| T1183 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.3723504553 |
|
|
Jul 10 08:02:43 PM PDT 24 |
Jul 10 08:12:29 PM PDT 24 |
6868013770 ps |
| T1184 |
/workspace/coverage/default/1.chip_sw_aes_enc.2811597339 |
|
|
Jul 10 08:05:44 PM PDT 24 |
Jul 10 08:10:05 PM PDT 24 |
2837473536 ps |
| T1185 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.4011546255 |
|
|
Jul 10 08:29:14 PM PDT 24 |
Jul 10 08:35:52 PM PDT 24 |
3347931924 ps |
| T1186 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.2942786987 |
|
|
Jul 10 08:01:16 PM PDT 24 |
Jul 10 08:10:34 PM PDT 24 |
5652937268 ps |
| T1187 |
/workspace/coverage/default/0.chip_sw_kmac_idle.2844526948 |
|
|
Jul 10 07:57:54 PM PDT 24 |
Jul 10 08:01:30 PM PDT 24 |
2950824968 ps |
| T1188 |
/workspace/coverage/default/3.chip_tap_straps_rma.3871469419 |
|
|
Jul 10 08:21:31 PM PDT 24 |
Jul 10 08:32:04 PM PDT 24 |
5420267212 ps |
| T1189 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.293929896 |
|
|
Jul 10 07:58:16 PM PDT 24 |
Jul 10 08:02:23 PM PDT 24 |
3166290264 ps |
| T1190 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1415007938 |
|
|
Jul 10 08:15:39 PM PDT 24 |
Jul 10 08:27:05 PM PDT 24 |
18902620714 ps |
| T1191 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.2915630658 |
|
|
Jul 10 08:19:56 PM PDT 24 |
Jul 10 08:28:42 PM PDT 24 |
5902716200 ps |
| T1192 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.1092402242 |
|
|
Jul 10 08:21:57 PM PDT 24 |
Jul 10 08:26:49 PM PDT 24 |
3166695196 ps |
| T1193 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.2838266775 |
|
|
Jul 10 08:25:39 PM PDT 24 |
Jul 10 08:41:48 PM PDT 24 |
3973112296 ps |
| T1194 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.776839836 |
|
|
Jul 10 08:15:49 PM PDT 24 |
Jul 10 08:24:57 PM PDT 24 |
7118906072 ps |
| T1195 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.2648145025 |
|
|
Jul 10 08:02:33 PM PDT 24 |
Jul 10 08:21:10 PM PDT 24 |
5449669880 ps |
| T1196 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.850556326 |
|
|
Jul 10 08:12:35 PM PDT 24 |
Jul 10 08:38:26 PM PDT 24 |
8421743416 ps |
| T70 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.1549853462 |
|
|
Jul 10 07:56:35 PM PDT 24 |
Jul 10 08:02:41 PM PDT 24 |
3005999144 ps |
| T1197 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.3653956016 |
|
|
Jul 10 08:13:33 PM PDT 24 |
Jul 10 08:15:46 PM PDT 24 |
3409462464 ps |
| T1198 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.3099288794 |
|
|
Jul 10 08:16:43 PM PDT 24 |
Jul 10 08:21:31 PM PDT 24 |
3543122151 ps |
| T1199 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.496468503 |
|
|
Jul 10 08:15:00 PM PDT 24 |
Jul 10 08:35:02 PM PDT 24 |
5351004628 ps |
| T1200 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.3724268370 |
|
|
Jul 10 08:17:18 PM PDT 24 |
Jul 10 08:23:38 PM PDT 24 |
3898285855 ps |
| T1201 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2877885531 |
|
|
Jul 10 08:25:03 PM PDT 24 |
Jul 10 09:21:00 PM PDT 24 |
43064229801 ps |
| T1202 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.1295044733 |
|
|
Jul 10 08:13:59 PM PDT 24 |
Jul 10 08:23:46 PM PDT 24 |
6217390728 ps |
| T1203 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.1807509827 |
|
|
Jul 10 07:56:48 PM PDT 24 |
Jul 10 08:06:42 PM PDT 24 |
4487014096 ps |
| T1204 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.554671600 |
|
|
Jul 10 08:11:53 PM PDT 24 |
Jul 10 08:23:56 PM PDT 24 |
5475829912 ps |
| T724 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.2411935073 |
|
|
Jul 10 08:31:04 PM PDT 24 |
Jul 10 08:37:10 PM PDT 24 |
2917887200 ps |
| T1205 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.3758182200 |
|
|
Jul 10 08:31:01 PM PDT 24 |
Jul 10 08:41:27 PM PDT 24 |
5735098298 ps |
| T1206 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.3469183809 |
|
|
Jul 10 08:26:05 PM PDT 24 |
Jul 10 08:34:29 PM PDT 24 |
4191143620 ps |
| T1207 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.3104017245 |
|
|
Jul 10 08:15:33 PM PDT 24 |
Jul 10 09:08:03 PM PDT 24 |
14744221812 ps |
| T1208 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.1173146587 |
|
|
Jul 10 08:25:02 PM PDT 24 |
Jul 10 08:45:59 PM PDT 24 |
8416722272 ps |
| T1209 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.713141835 |
|
|
Jul 10 08:09:36 PM PDT 24 |
Jul 10 08:12:25 PM PDT 24 |
2690288984 ps |
| T1210 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3505077037 |
|
|
Jul 10 08:10:03 PM PDT 24 |
Jul 10 08:21:14 PM PDT 24 |
4451140930 ps |
| T1211 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.957015953 |
|
|
Jul 10 08:03:29 PM PDT 24 |
Jul 10 08:10:33 PM PDT 24 |
6380281490 ps |
| T1212 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.1374805462 |
|
|
Jul 10 07:58:01 PM PDT 24 |
Jul 10 09:01:49 PM PDT 24 |
16831823424 ps |
| T348 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.330548323 |
|
|
Jul 10 08:01:12 PM PDT 24 |
Jul 10 08:12:20 PM PDT 24 |
4755113592 ps |
| T781 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.3150130178 |
|
|
Jul 10 08:29:34 PM PDT 24 |
Jul 10 08:38:28 PM PDT 24 |
5976686360 ps |
| T447 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.1116447485 |
|
|
Jul 10 08:18:44 PM PDT 24 |
Jul 10 08:32:54 PM PDT 24 |
6531386976 ps |
| T197 |
/workspace/coverage/default/0.chip_jtag_csr_rw.2186003729 |
|
|
Jul 10 07:50:15 PM PDT 24 |
Jul 10 08:12:02 PM PDT 24 |
12578130392 ps |
| T1213 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.4119379341 |
|
|
Jul 10 08:21:15 PM PDT 24 |
Jul 10 08:26:06 PM PDT 24 |
2829541180 ps |
| T1214 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2489463870 |
|
|
Jul 10 08:00:47 PM PDT 24 |
Jul 10 08:06:29 PM PDT 24 |
3862196630 ps |
| T1215 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.966757856 |
|
|
Jul 10 08:10:07 PM PDT 24 |
Jul 10 08:19:06 PM PDT 24 |
5128986244 ps |
| T1216 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.2298434854 |
|
|
Jul 10 08:17:51 PM PDT 24 |
Jul 10 08:24:58 PM PDT 24 |
5296756820 ps |
| T1217 |
/workspace/coverage/default/2.chip_sw_example_flash.3200343086 |
|
|
Jul 10 08:12:20 PM PDT 24 |
Jul 10 08:15:31 PM PDT 24 |
2768051110 ps |
| T1218 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.147546730 |
|
|
Jul 10 08:05:31 PM PDT 24 |
Jul 10 09:17:15 PM PDT 24 |
15996611720 ps |
| T1219 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3539059315 |
|
|
Jul 10 08:14:34 PM PDT 24 |
Jul 10 08:16:28 PM PDT 24 |
2792296505 ps |
| T1220 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.558452081 |
|
|
Jul 10 08:42:45 PM PDT 24 |
Jul 10 08:49:08 PM PDT 24 |
4403380170 ps |
| T133 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.3584745136 |
|
|
Jul 10 07:58:12 PM PDT 24 |
Jul 10 08:12:50 PM PDT 24 |
5118927444 ps |
| T1221 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.2309588896 |
|
|
Jul 10 08:42:19 PM PDT 24 |
Jul 10 08:51:21 PM PDT 24 |
5599760730 ps |
| T1222 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.378116684 |
|
|
Jul 10 08:13:37 PM PDT 24 |
Jul 10 08:17:31 PM PDT 24 |
2295168988 ps |
| T709 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.2020346399 |
|
|
Jul 10 08:03:04 PM PDT 24 |
Jul 10 08:41:50 PM PDT 24 |
12248918471 ps |
| T1223 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.1987589550 |
|
|
Jul 10 08:14:16 PM PDT 24 |
Jul 10 08:23:23 PM PDT 24 |
4218804444 ps |
| T1224 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2721494098 |
|
|
Jul 10 08:12:24 PM PDT 24 |
Jul 10 08:36:20 PM PDT 24 |
11402433400 ps |
| T1225 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2607262265 |
|
|
Jul 10 07:58:21 PM PDT 24 |
Jul 10 08:02:52 PM PDT 24 |
3018291010 ps |
| T1226 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.2635866812 |
|
|
Jul 10 07:55:59 PM PDT 24 |
Jul 10 09:30:56 PM PDT 24 |
28669153720 ps |
| T1227 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.3529473176 |
|
|
Jul 10 08:23:38 PM PDT 24 |
Jul 10 08:36:39 PM PDT 24 |
9244145373 ps |
| T334 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.2168810661 |
|
|
Jul 10 08:03:15 PM PDT 24 |
Jul 10 08:18:20 PM PDT 24 |
5144359840 ps |
| T1228 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.2447181001 |
|
|
Jul 10 08:29:44 PM PDT 24 |
Jul 10 08:33:54 PM PDT 24 |
2745183252 ps |
| T210 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.2502682073 |
|
|
Jul 10 08:17:19 PM PDT 24 |
Jul 10 08:22:37 PM PDT 24 |
2867056833 ps |
| T1229 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.1407323980 |
|
|
Jul 10 07:57:32 PM PDT 24 |
Jul 10 08:28:15 PM PDT 24 |
7631593662 ps |
| T1230 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3103260310 |
|
|
Jul 10 08:27:14 PM PDT 24 |
Jul 10 08:35:22 PM PDT 24 |
3415442134 ps |
| T1231 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.3234991937 |
|
|
Jul 10 08:07:29 PM PDT 24 |
Jul 10 08:38:40 PM PDT 24 |
9281059380 ps |
| T1232 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2733535148 |
|
|
Jul 10 07:58:32 PM PDT 24 |
Jul 10 08:22:58 PM PDT 24 |
6928046060 ps |
| T1233 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3605848627 |
|
|
Jul 10 07:57:52 PM PDT 24 |
Jul 10 08:09:32 PM PDT 24 |
4330334622 ps |
| T1234 |
/workspace/coverage/default/0.chip_tap_straps_rma.2197881914 |
|
|
Jul 10 07:59:22 PM PDT 24 |
Jul 10 08:06:37 PM PDT 24 |
5438917961 ps |
| T1235 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.3795458705 |
|
|
Jul 10 08:16:39 PM PDT 24 |
Jul 10 08:22:44 PM PDT 24 |
2252255050 ps |
| T388 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.3447329140 |
|
|
Jul 10 07:56:58 PM PDT 24 |
Jul 10 08:10:49 PM PDT 24 |
4368661910 ps |
| T1236 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.540290824 |
|
|
Jul 10 08:08:05 PM PDT 24 |
Jul 10 08:11:41 PM PDT 24 |
3204583500 ps |
| T381 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3062976623 |
|
|
Jul 10 08:30:40 PM PDT 24 |
Jul 10 08:40:26 PM PDT 24 |
4397091924 ps |
| T1237 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.3334461550 |
|
|
Jul 10 08:21:26 PM PDT 24 |
Jul 10 08:24:13 PM PDT 24 |
2343330344 ps |
| T261 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.851170738 |
|
|
Jul 10 08:41:45 PM PDT 24 |
Jul 10 08:50:05 PM PDT 24 |
5044987400 ps |
| T1238 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.3099866818 |
|
|
Jul 10 08:22:31 PM PDT 24 |
Jul 10 08:36:37 PM PDT 24 |
4975289076 ps |
| T326 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.809420597 |
|
|
Jul 10 07:57:52 PM PDT 24 |
Jul 10 08:30:56 PM PDT 24 |
11206651842 ps |
| T1239 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.2202879464 |
|
|
Jul 10 08:02:32 PM PDT 24 |
Jul 10 08:06:46 PM PDT 24 |
3492330790 ps |
| T1240 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.3947061169 |
|
|
Jul 10 08:42:15 PM PDT 24 |
Jul 10 08:50:09 PM PDT 24 |
5995398200 ps |
| T1241 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.661780131 |
|
|
Jul 10 08:27:44 PM PDT 24 |
Jul 10 08:34:24 PM PDT 24 |
3861015286 ps |
| T1242 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.1307529547 |
|
|
Jul 10 07:57:19 PM PDT 24 |
Jul 10 08:08:28 PM PDT 24 |
4574610442 ps |
| T1243 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.3607475618 |
|
|
Jul 10 08:11:16 PM PDT 24 |
Jul 10 08:15:40 PM PDT 24 |
3107892945 ps |
| T1244 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.3901223122 |
|
|
Jul 10 08:20:54 PM PDT 24 |
Jul 10 08:38:33 PM PDT 24 |
8193537128 ps |
| T1245 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.3121317319 |
|
|
Jul 10 07:57:44 PM PDT 24 |
Jul 10 08:17:14 PM PDT 24 |
5252719920 ps |
| T1246 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.1457497556 |
|
|
Jul 10 08:04:52 PM PDT 24 |
Jul 10 09:11:29 PM PDT 24 |
14731582393 ps |
| T756 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2786911386 |
|
|
Jul 10 08:42:25 PM PDT 24 |
Jul 10 08:49:42 PM PDT 24 |
3619555948 ps |
| T1247 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.1932927919 |
|
|
Jul 10 08:30:41 PM PDT 24 |
Jul 10 08:37:14 PM PDT 24 |
4263279096 ps |
| T1248 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.2516417567 |
|
|
Jul 10 08:05:32 PM PDT 24 |
Jul 10 08:10:32 PM PDT 24 |
2513940345 ps |
| T1249 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.2549759374 |
|
|
Jul 10 08:25:25 PM PDT 24 |
Jul 10 09:22:43 PM PDT 24 |
15408987802 ps |
| T1250 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.1035145229 |
|
|
Jul 10 08:07:00 PM PDT 24 |
Jul 10 09:42:15 PM PDT 24 |
23210132020 ps |
| T198 |
/workspace/coverage/default/1.chip_jtag_mem_access.182835626 |
|
|
Jul 10 08:02:50 PM PDT 24 |
Jul 10 08:32:02 PM PDT 24 |
13588681176 ps |
| T1251 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.3773879176 |
|
|
Jul 10 08:05:53 PM PDT 24 |
Jul 10 08:11:06 PM PDT 24 |
2383830476 ps |
| T1252 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.1945939313 |
|
|
Jul 10 08:24:05 PM PDT 24 |
Jul 10 09:22:30 PM PDT 24 |
15635673800 ps |
| T1253 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.3913251994 |
|
|
Jul 10 08:07:36 PM PDT 24 |
Jul 10 09:22:41 PM PDT 24 |
15103409748 ps |
| T1254 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.1515231127 |
|
|
Jul 10 08:25:10 PM PDT 24 |
Jul 10 09:24:06 PM PDT 24 |
17823646696 ps |
| T719 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.3847908124 |
|
|
Jul 10 08:30:42 PM PDT 24 |
Jul 10 08:35:46 PM PDT 24 |
3333979180 ps |
| T1255 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.736950620 |
|
|
Jul 10 07:58:45 PM PDT 24 |
Jul 10 08:17:22 PM PDT 24 |
4575340840 ps |
| T1256 |
/workspace/coverage/default/0.rom_keymgr_functest.2458829495 |
|
|
Jul 10 08:01:15 PM PDT 24 |
Jul 10 08:10:09 PM PDT 24 |
4196788544 ps |
| T195 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.1870726378 |
|
|
Jul 10 08:14:50 PM PDT 24 |
Jul 10 08:26:31 PM PDT 24 |
7431234382 ps |
| T1257 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.3815954214 |
|
|
Jul 10 07:58:54 PM PDT 24 |
Jul 10 08:09:10 PM PDT 24 |
4789985524 ps |
| T181 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.680984593 |
|
|
Jul 10 08:01:39 PM PDT 24 |
Jul 10 09:19:21 PM PDT 24 |
43635455292 ps |
| T1258 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.3183177308 |
|
|
Jul 10 07:57:17 PM PDT 24 |
Jul 10 08:19:27 PM PDT 24 |
6299758357 ps |
| T1259 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.2965521171 |
|
|
Jul 10 08:17:23 PM PDT 24 |
Jul 10 08:44:16 PM PDT 24 |
7726200880 ps |
| T336 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.3300324316 |
|
|
Jul 10 08:12:47 PM PDT 24 |
Jul 10 08:23:30 PM PDT 24 |
3916533000 ps |
| T1260 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.750630966 |
|
|
Jul 10 08:14:47 PM PDT 24 |
Jul 10 08:37:47 PM PDT 24 |
11784743603 ps |
| T319 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.4042328745 |
|
|
Jul 10 08:17:52 PM PDT 24 |
Jul 10 08:31:56 PM PDT 24 |
4881948720 ps |
| T1261 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.1955767540 |
|
|
Jul 10 08:07:15 PM PDT 24 |
Jul 10 08:24:10 PM PDT 24 |
5376482200 ps |
| T1262 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.2224837460 |
|
|
Jul 10 08:07:33 PM PDT 24 |
Jul 10 08:25:16 PM PDT 24 |
6521944040 ps |
| T1263 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.3274497354 |
|
|
Jul 10 08:10:54 PM PDT 24 |
Jul 10 08:15:05 PM PDT 24 |
2687266500 ps |
| T426 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.1511567221 |
|
|
Jul 10 07:59:30 PM PDT 24 |
Jul 10 08:09:02 PM PDT 24 |
7464123166 ps |
| T1264 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.1162540652 |
|
|
Jul 10 08:27:55 PM PDT 24 |
Jul 10 08:37:31 PM PDT 24 |
6114060100 ps |
| T786 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.3408289522 |
|
|
Jul 10 08:41:44 PM PDT 24 |
Jul 10 08:51:08 PM PDT 24 |
4703585110 ps |
| T1265 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.3529714444 |
|
|
Jul 10 08:10:44 PM PDT 24 |
Jul 10 08:16:43 PM PDT 24 |
3213853368 ps |
| T763 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.112385731 |
|
|
Jul 10 08:30:06 PM PDT 24 |
Jul 10 08:42:49 PM PDT 24 |
6168313732 ps |
| T1266 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.1654277039 |
|
|
Jul 10 07:56:58 PM PDT 24 |
Jul 10 08:07:40 PM PDT 24 |
5233499760 ps |
| T1267 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.3956711040 |
|
|
Jul 10 08:24:05 PM PDT 24 |
Jul 10 08:50:18 PM PDT 24 |
8075729520 ps |
| T1268 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.845717606 |
|
|
Jul 10 08:20:52 PM PDT 24 |
Jul 10 08:30:02 PM PDT 24 |
4552467292 ps |
| T1269 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.747638484 |
|
|
Jul 10 07:59:52 PM PDT 24 |
Jul 10 08:12:31 PM PDT 24 |
4664431550 ps |
| T1270 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.4055376041 |
|
|
Jul 10 08:30:29 PM PDT 24 |
Jul 10 08:38:47 PM PDT 24 |
5019917060 ps |
| T1271 |
/workspace/coverage/default/4.chip_tap_straps_prod.1750978811 |
|
|
Jul 10 08:23:30 PM PDT 24 |
Jul 10 08:36:45 PM PDT 24 |
9286573634 ps |
| T243 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.2764370294 |
|
|
Jul 10 07:57:14 PM PDT 24 |
Jul 10 08:04:55 PM PDT 24 |
5338644380 ps |
| T1272 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.3380735998 |
|
|
Jul 10 08:19:26 PM PDT 24 |
Jul 10 08:47:51 PM PDT 24 |
20739507119 ps |
| T43 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.2450463311 |
|
|
Jul 10 07:56:42 PM PDT 24 |
Jul 10 08:00:50 PM PDT 24 |
2862080976 ps |
| T1273 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1508815546 |
|
|
Jul 10 08:05:33 PM PDT 24 |
Jul 10 08:29:12 PM PDT 24 |
12016938671 ps |
| T1274 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.3822734525 |
|
|
Jul 10 08:24:24 PM PDT 24 |
Jul 10 08:34:07 PM PDT 24 |
5444621591 ps |
| T378 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.648571784 |
|
|
Jul 10 08:19:21 PM PDT 24 |
Jul 10 08:28:07 PM PDT 24 |
5972733050 ps |
| T1275 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.2585317896 |
|
|
Jul 10 08:19:53 PM PDT 24 |
Jul 10 08:27:14 PM PDT 24 |
3376950737 ps |
| T349 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.826908880 |
|
|
Jul 10 08:14:48 PM PDT 24 |
Jul 10 08:29:04 PM PDT 24 |
6070180470 ps |
| T769 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.2934077847 |
|
|
Jul 10 08:29:37 PM PDT 24 |
Jul 10 08:36:27 PM PDT 24 |
3684905056 ps |
| T1276 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.3317710045 |
|
|
Jul 10 08:02:22 PM PDT 24 |
Jul 10 08:58:05 PM PDT 24 |
11262048289 ps |
| T323 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.2007484384 |
|
|
Jul 10 08:14:35 PM PDT 24 |
Jul 10 08:45:25 PM PDT 24 |
10401190280 ps |
| T1277 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.2570662912 |
|
|
Jul 10 08:03:59 PM PDT 24 |
Jul 10 08:21:17 PM PDT 24 |
7049119862 ps |
| T1278 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.1273757898 |
|
|
Jul 10 08:26:14 PM PDT 24 |
Jul 10 08:32:55 PM PDT 24 |
3491540830 ps |
| T1279 |
/workspace/coverage/default/2.chip_sw_example_concurrency.3840490796 |
|
|
Jul 10 08:18:00 PM PDT 24 |
Jul 10 08:22:24 PM PDT 24 |
2705584944 ps |
| T1280 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.2693299872 |
|
|
Jul 10 08:08:01 PM PDT 24 |
Jul 10 08:12:48 PM PDT 24 |
2450066624 ps |
| T1281 |
/workspace/coverage/default/2.chip_sw_example_rom.979482360 |
|
|
Jul 10 08:12:06 PM PDT 24 |
Jul 10 08:14:06 PM PDT 24 |
2261817568 ps |
| T1282 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.1917275218 |
|
|
Jul 10 08:02:27 PM PDT 24 |
Jul 10 08:06:18 PM PDT 24 |
2866891310 ps |
| T1283 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.2033977929 |
|
|
Jul 10 08:27:57 PM PDT 24 |
Jul 10 08:38:16 PM PDT 24 |
5678009480 ps |
| T1284 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.4182335570 |
|
|
Jul 10 08:12:02 PM PDT 24 |
Jul 10 08:16:52 PM PDT 24 |
2294258936 ps |
| T1285 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.3546599174 |
|
|
Jul 10 08:02:57 PM PDT 24 |
Jul 10 08:41:08 PM PDT 24 |
27804589575 ps |
| T44 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.2636681041 |
|
|
Jul 10 08:02:12 PM PDT 24 |
Jul 10 08:05:30 PM PDT 24 |
3488840512 ps |
| T1286 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.4078765496 |
|
|
Jul 10 08:13:59 PM PDT 24 |
Jul 10 08:18:57 PM PDT 24 |
2932690416 ps |
| T38 |
/workspace/coverage/default/2.chip_sw_gpio.554870008 |
|
|
Jul 10 08:14:12 PM PDT 24 |
Jul 10 08:21:49 PM PDT 24 |
3716272564 ps |
| T1287 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.1693637522 |
|
|
Jul 10 08:23:17 PM PDT 24 |
Jul 10 08:35:16 PM PDT 24 |
4590074170 ps |
| T1288 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.1235770238 |
|
|
Jul 10 08:24:40 PM PDT 24 |
Jul 10 08:33:12 PM PDT 24 |
6216670138 ps |
| T1289 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2553448412 |
|
|
Jul 10 07:58:13 PM PDT 24 |
Jul 10 08:10:44 PM PDT 24 |
4281390804 ps |
| T1290 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.2477410005 |
|
|
Jul 10 08:17:51 PM PDT 24 |
Jul 10 08:28:01 PM PDT 24 |
8376390630 ps |
| T1291 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.2188209512 |
|
|
Jul 10 08:06:42 PM PDT 24 |
Jul 10 08:13:40 PM PDT 24 |
5445168866 ps |
| T1292 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.2654081760 |
|
|
Jul 10 08:18:30 PM PDT 24 |
Jul 10 08:48:04 PM PDT 24 |
10422281080 ps |
| T749 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.1008883174 |
|
|
Jul 10 08:32:08 PM PDT 24 |
Jul 10 08:43:12 PM PDT 24 |
5177666488 ps |
| T1293 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.4089008474 |
|
|
Jul 10 08:13:56 PM PDT 24 |
Jul 10 08:17:59 PM PDT 24 |
2958584080 ps |
| T1294 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.949015965 |
|
|
Jul 10 07:55:54 PM PDT 24 |
Jul 10 08:15:47 PM PDT 24 |
8685069432 ps |
| T1295 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.2041827500 |
|
|
Jul 10 08:25:20 PM PDT 24 |
Jul 10 08:50:09 PM PDT 24 |
8414169680 ps |
| T1296 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.558388409 |
|
|
Jul 10 08:04:41 PM PDT 24 |
Jul 10 08:30:58 PM PDT 24 |
7364092356 ps |
| T1297 |
/workspace/coverage/default/2.rom_e2e_static_critical.684778403 |
|
|
Jul 10 08:25:33 PM PDT 24 |
Jul 10 09:21:16 PM PDT 24 |
17669070346 ps |
| T1298 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.4057978983 |
|
|
Jul 10 07:55:34 PM PDT 24 |
Jul 10 08:14:16 PM PDT 24 |
5808350070 ps |
| T1299 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.314706727 |
|
|
Jul 10 08:00:01 PM PDT 24 |
Jul 10 08:04:27 PM PDT 24 |
2602786080 ps |
| T1300 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3265068603 |
|
|
Jul 10 08:14:07 PM PDT 24 |
Jul 10 08:40:12 PM PDT 24 |
12809678583 ps |
| T1301 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.1783628209 |
|
|
Jul 10 08:06:10 PM PDT 24 |
Jul 10 08:13:59 PM PDT 24 |
5685534580 ps |
| T1302 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.81832990 |
|
|
Jul 10 08:18:54 PM PDT 24 |
Jul 10 08:27:55 PM PDT 24 |
4082095031 ps |
| T753 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.482457575 |
|
|
Jul 10 08:25:40 PM PDT 24 |
Jul 10 08:31:14 PM PDT 24 |
3285777564 ps |
| T1303 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.2747447673 |
|
|
Jul 10 08:10:58 PM PDT 24 |
Jul 10 08:32:36 PM PDT 24 |
10038489896 ps |
| T1304 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.3384787129 |
|
|
Jul 10 08:09:04 PM PDT 24 |
Jul 10 08:20:06 PM PDT 24 |
5552736360 ps |
| T1305 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.1370085175 |
|
|
Jul 10 08:26:04 PM PDT 24 |
Jul 10 08:32:29 PM PDT 24 |
4039179336 ps |
| T1306 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.1602644337 |
|
|
Jul 10 08:02:15 PM PDT 24 |
Jul 10 08:19:17 PM PDT 24 |
5937502687 ps |
| T1307 |
/workspace/coverage/default/2.chip_tap_straps_prod.981175067 |
|
|
Jul 10 08:19:01 PM PDT 24 |
Jul 10 08:21:59 PM PDT 24 |
2511932504 ps |
| T196 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.3543149297 |
|
|
Jul 10 07:56:24 PM PDT 24 |
Jul 10 08:05:51 PM PDT 24 |
6150788821 ps |
| T1308 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.3842412415 |
|
|
Jul 10 07:57:40 PM PDT 24 |
Jul 10 10:06:28 PM PDT 24 |
27512891060 ps |
| T1309 |
/workspace/coverage/default/2.rom_keymgr_functest.3821905481 |
|
|
Jul 10 08:22:08 PM PDT 24 |
Jul 10 08:32:18 PM PDT 24 |
5976358952 ps |
| T1310 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.4035159749 |
|
|
Jul 10 08:16:46 PM PDT 24 |
Jul 10 08:35:34 PM PDT 24 |
7341558300 ps |
| T382 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.730586479 |
|
|
Jul 10 07:57:45 PM PDT 24 |
Jul 10 08:04:22 PM PDT 24 |
3668179496 ps |
| T1311 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.539758029 |
|
|
Jul 10 08:08:06 PM PDT 24 |
Jul 10 08:17:38 PM PDT 24 |
4750933152 ps |
| T727 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.2959690337 |
|
|
Jul 10 08:41:53 PM PDT 24 |
Jul 10 08:49:42 PM PDT 24 |
4742321066 ps |
| T1312 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.1552264986 |
|
|
Jul 10 08:24:47 PM PDT 24 |
Jul 10 08:31:34 PM PDT 24 |
4573879630 ps |
| T1313 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.2038953244 |
|
|
Jul 10 08:05:06 PM PDT 24 |
Jul 10 08:15:20 PM PDT 24 |
4285400182 ps |
| T1314 |
/workspace/coverage/default/2.chip_tap_straps_dev.1554088721 |
|
|
Jul 10 08:17:58 PM PDT 24 |
Jul 10 08:20:31 PM PDT 24 |
2855480200 ps |
| T1315 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.3916542274 |
|
|
Jul 10 08:14:34 PM PDT 24 |
Jul 10 08:24:53 PM PDT 24 |
6134325232 ps |
| T301 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.2067280780 |
|
|
Jul 10 07:58:10 PM PDT 24 |
Jul 10 08:54:39 PM PDT 24 |
12318011920 ps |
| T1316 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.158833301 |
|
|
Jul 10 08:07:05 PM PDT 24 |
Jul 10 09:07:47 PM PDT 24 |
15030346264 ps |
| T1317 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.1223735697 |
|
|
Jul 10 08:04:55 PM PDT 24 |
Jul 10 09:47:49 PM PDT 24 |
23632834336 ps |
| T322 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.2097767424 |
|
|
Jul 10 07:56:09 PM PDT 24 |
Jul 10 08:11:56 PM PDT 24 |
4917422818 ps |
| T1318 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1262115100 |
|
|
Jul 10 07:56:57 PM PDT 24 |
Jul 10 08:04:42 PM PDT 24 |
4216201920 ps |
| T1319 |
/workspace/coverage/default/1.rom_e2e_smoke.3151164671 |
|
|
Jul 10 08:19:02 PM PDT 24 |
Jul 10 09:16:36 PM PDT 24 |
14843342900 ps |
| T1320 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.509613768 |
|
|
Jul 10 08:07:12 PM PDT 24 |
Jul 10 09:13:10 PM PDT 24 |
14739531780 ps |
| T1321 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.3482551232 |
|
|
Jul 10 08:01:28 PM PDT 24 |
Jul 10 11:25:48 PM PDT 24 |
65017918483 ps |
| T1322 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.1496779440 |
|
|
Jul 10 08:04:41 PM PDT 24 |
Jul 10 08:08:11 PM PDT 24 |
2709093340 ps |
| T752 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.1238695929 |
|
|
Jul 10 08:29:04 PM PDT 24 |
Jul 10 08:35:04 PM PDT 24 |
3355795416 ps |
| T703 |
/workspace/coverage/default/0.rom_raw_unlock.3636028042 |
|
|
Jul 10 07:59:15 PM PDT 24 |
Jul 10 08:02:43 PM PDT 24 |
5799416900 ps |
| T1323 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.464918740 |
|
|
Jul 10 08:04:24 PM PDT 24 |
Jul 10 08:22:49 PM PDT 24 |
7732121856 ps |
| T1324 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.1035335334 |
|
|
Jul 10 08:21:06 PM PDT 24 |
Jul 10 08:28:25 PM PDT 24 |
6681600000 ps |
| T1325 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.1692234581 |
|
|
Jul 10 07:55:22 PM PDT 24 |
Jul 10 08:11:08 PM PDT 24 |
6082245880 ps |
| T1326 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.1857476147 |
|
|
Jul 10 08:17:31 PM PDT 24 |
Jul 10 08:50:08 PM PDT 24 |
8373462408 ps |
| T715 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.2589516874 |
|
|
Jul 10 08:23:54 PM PDT 24 |
Jul 10 08:31:04 PM PDT 24 |
3927665276 ps |
| T1327 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.1796625237 |
|
|
Jul 10 08:14:25 PM PDT 24 |
Jul 10 08:54:11 PM PDT 24 |
24661084203 ps |
| T799 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.4039934800 |
|
|
Jul 10 08:30:28 PM PDT 24 |
Jul 10 08:40:43 PM PDT 24 |
5580716312 ps |
| T1328 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.2049793520 |
|
|
Jul 10 08:04:27 PM PDT 24 |
Jul 10 09:01:49 PM PDT 24 |
15961536280 ps |
| T1329 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.1449785857 |
|
|
Jul 10 08:01:47 PM PDT 24 |
Jul 10 08:22:47 PM PDT 24 |
7575941272 ps |
| T1330 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.4123970317 |
|
|
Jul 10 08:24:02 PM PDT 24 |
Jul 10 08:35:50 PM PDT 24 |
6420952060 ps |
| T1331 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.272023657 |
|
|
Jul 10 08:14:36 PM PDT 24 |
Jul 10 09:44:29 PM PDT 24 |
48579626420 ps |
| T1332 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.1201046946 |
|
|
Jul 10 08:14:37 PM PDT 24 |
Jul 11 12:10:36 AM PDT 24 |
78137852910 ps |
| T1333 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.2426173420 |
|
|
Jul 10 08:04:58 PM PDT 24 |
Jul 10 08:15:53 PM PDT 24 |
4852161944 ps |
| T790 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.2142581639 |
|
|
Jul 10 08:28:59 PM PDT 24 |
Jul 10 08:37:24 PM PDT 24 |
5095884536 ps |
| T1334 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.1663704430 |
|
|
Jul 10 08:24:07 PM PDT 24 |
Jul 10 08:34:43 PM PDT 24 |
5985151448 ps |
| T1335 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.1292694693 |
|
|
Jul 10 08:11:26 PM PDT 24 |
Jul 10 08:15:22 PM PDT 24 |
2776749840 ps |
| T1336 |
/workspace/coverage/default/0.chip_sw_aes_entropy.4252967665 |
|
|
Jul 10 07:57:13 PM PDT 24 |
Jul 10 08:01:27 PM PDT 24 |
2721680136 ps |
| T1337 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.3296593461 |
|
|
Jul 10 07:58:11 PM PDT 24 |
Jul 10 08:03:15 PM PDT 24 |
3181402800 ps |
| T798 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.2993067457 |
|
|
Jul 10 08:30:46 PM PDT 24 |
Jul 10 08:40:23 PM PDT 24 |
5635080700 ps |
| T1338 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.4085187320 |
|
|
Jul 10 08:02:41 PM PDT 24 |
Jul 10 08:06:59 PM PDT 24 |
3047117082 ps |
| T1339 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.3069322821 |
|
|
Jul 10 08:08:02 PM PDT 24 |
Jul 10 08:13:01 PM PDT 24 |
2839925792 ps |
| T1340 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.3290338094 |
|
|
Jul 10 08:01:01 PM PDT 24 |
Jul 10 08:38:21 PM PDT 24 |
11280567193 ps |
| T1341 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.1586876403 |
|
|
Jul 10 08:16:25 PM PDT 24 |
Jul 10 08:35:21 PM PDT 24 |
7532420226 ps |
| T1342 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.3812336404 |
|
|
Jul 10 08:04:45 PM PDT 24 |
Jul 10 08:32:48 PM PDT 24 |
11584009286 ps |
| T1343 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.379031465 |
|
|
Jul 10 08:09:30 PM PDT 24 |
Jul 10 08:20:25 PM PDT 24 |
4273199842 ps |
| T1344 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.3502643423 |
|
|
Jul 10 07:57:16 PM PDT 24 |
Jul 10 11:16:02 PM PDT 24 |
65300672045 ps |
| T1345 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1880596103 |
|
|
Jul 10 08:01:59 PM PDT 24 |
Jul 10 08:50:35 PM PDT 24 |
34498825600 ps |
| T1346 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.2925339151 |
|
|
Jul 10 08:27:30 PM PDT 24 |
Jul 10 08:34:08 PM PDT 24 |
3753953472 ps |
| T268 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.2561928749 |
|
|
Jul 10 07:57:59 PM PDT 24 |
Jul 10 08:01:52 PM PDT 24 |
3102652594 ps |
| T768 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.1180607729 |
|
|
Jul 10 08:28:56 PM PDT 24 |
Jul 10 08:35:11 PM PDT 24 |
3329841018 ps |
| T1347 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.251573676 |
|
|
Jul 10 08:00:53 PM PDT 24 |
Jul 10 08:32:48 PM PDT 24 |
7562347654 ps |
| T163 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.1538015551 |
|
|
Jul 10 08:18:46 PM PDT 24 |
Jul 10 08:29:18 PM PDT 24 |
4606179738 ps |
| T1348 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.3624904290 |
|
|
Jul 10 08:15:06 PM PDT 24 |
Jul 10 08:21:50 PM PDT 24 |
3731647936 ps |
| T1349 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.39552929 |
|
|
Jul 10 08:13:21 PM PDT 24 |
Jul 10 08:30:57 PM PDT 24 |
8145192356 ps |
| T430 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.1485282697 |
|
|
Jul 10 07:57:09 PM PDT 24 |
Jul 10 08:05:45 PM PDT 24 |
5230731744 ps |
| T91 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.1918186038 |
|
|
Jul 10 08:27:14 PM PDT 24 |
Jul 10 08:32:50 PM PDT 24 |
4289815778 ps |
| T366 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.347865928 |
|
|
Jul 10 08:04:58 PM PDT 24 |
Jul 10 08:08:09 PM PDT 24 |
3208022136 ps |
| T1350 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1023454362 |
|
|
Jul 10 07:57:42 PM PDT 24 |
Jul 10 11:35:53 PM PDT 24 |
254107542256 ps |
| T1351 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.32140648 |
|
|
Jul 10 08:19:59 PM PDT 24 |
Jul 10 08:36:05 PM PDT 24 |
7619095103 ps |
| T772 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.2936345008 |
|
|
Jul 10 08:29:02 PM PDT 24 |
Jul 10 08:41:11 PM PDT 24 |
5731367270 ps |
| T1352 |
/workspace/coverage/default/1.chip_sw_hmac_oneshot.715632630 |
|
|
Jul 10 08:08:55 PM PDT 24 |
Jul 10 08:13:36 PM PDT 24 |
3133359568 ps |
| T1353 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.3625980955 |
|
|
Jul 10 08:14:33 PM PDT 24 |
Jul 10 11:19:32 PM PDT 24 |
59170961643 ps |