SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.93 | 84.93 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.13 | 85.13 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.13 | 85.13 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.13 | 85.13 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.31 | 90.68 | 89.25 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9353 | 84.93 |
Total Bits 0->1 | 5506 | 4692 | 85.22 |
Total Bits 1->0 | 5506 | 4661 | 84.65 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9353 | 84.93 |
Port Bits 0->1 | 5506 | 4692 | 85.22 |
Port Bits 1->0 | 5506 | 4661 | 84.65 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_ni | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | INPUT |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_edn_ni | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | INPUT |
edn_o.edn_req | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | INPUT |
edn_i.edn_fips | No | No | Yes | T153,T154,T155 | INPUT | |
edn_i.edn_ack | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | INPUT |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T78,*T79,*T80 | Yes | T78,T79,T80 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T58,*T70,*T71 | Yes | T58,T70,T71 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T58,T71,T81 | Yes | T58,T71,T81 | INPUT |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T156,*T157,*T158 | Yes | T156,T157,T158 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T5,*T43,*T62 | Yes | T5,T43,T62 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T78,*T79,*T80 | Yes | T78,T79,T80 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T78,*T79,*T132 | Yes | T78,T79,T132 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T58,*T70,*T71 | Yes | T58,T70,T71 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T58,T71,T81 | Yes | T58,T71,T81 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T5,T6,T43 | Yes | T5,T6,T43 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T5,T6,T43 | Yes | T43,T20,T62 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T5,T6,T43 | Yes | T43,T20,T62 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T78,T80,T82 | Yes | T78,T80,T82 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T5,*T6,*T43 | Yes | T43,T20,T62 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT |
intr_otp_error_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T85,T86,T162 | Yes | T85,T86,T162 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T20,T64,T65 | Yes | T20,T64,T65 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T163,T164,T85 | Yes | T163,T85,T86 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T163,T85,T86 | Yes | T163,T164,T85 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T165,T85,T86 | Yes | T165,T85,T86 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T85,T86,T166 | Yes | T86,T166,T87 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T86,T166,T87 | Yes | T85,T86,T166 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T167,T168,T85 | Yes | T167,T168,T85 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T85,T86,T162 | Yes | T85,T86,T162 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T20,T64,T65 | Yes | T20,T64,T65 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T165,T85,T86 | Yes | T165,T85,T86 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T167,T168,T85 | Yes | T167,T168,T85 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T64,T126,T127 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT |
lc_otp_vendor_test_i.ctrl[5:0] | No | No | Yes | T169,T170,T171 | INPUT | |
lc_otp_vendor_test_i.ctrl[6] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[19:7] | No | No | Yes | T170,T169,T171 | INPUT | |
lc_otp_vendor_test_i.ctrl[20] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[26:21] | No | No | Yes | T169,T170,T171 | INPUT | |
lc_otp_vendor_test_i.ctrl[27] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:28] | No | No | Yes | T169,T171,T170 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[11:0] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.count[12] | No | No | No | INPUT | ||
lc_otp_program_i.count[19:13] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.count[20] | No | No | No | INPUT | ||
lc_otp_program_i.count[23:21] | Yes | Yes | T172,T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.count[24] | No | No | No | INPUT | ||
lc_otp_program_i.count[26:25] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T174 | INPUT |
lc_otp_program_i.count[27] | No | No | No | INPUT | ||
lc_otp_program_i.count[36:28] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T174 | INPUT |
lc_otp_program_i.count[37] | No | No | No | INPUT | ||
lc_otp_program_i.count[45:38] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.count[46] | No | No | No | INPUT | ||
lc_otp_program_i.count[52:47] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T173 | INPUT |
lc_otp_program_i.count[53] | No | No | No | INPUT | ||
lc_otp_program_i.count[59:54] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T174 | INPUT |
lc_otp_program_i.count[61:60] | No | No | No | INPUT | ||
lc_otp_program_i.count[64:62] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T173 | INPUT |
lc_otp_program_i.count[65] | No | No | No | INPUT | ||
lc_otp_program_i.count[67:66] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T174 | INPUT |
lc_otp_program_i.count[68] | No | No | No | INPUT | ||
lc_otp_program_i.count[72:69] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.count[73] | No | No | No | INPUT | ||
lc_otp_program_i.count[89:74] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.count[90] | No | No | No | INPUT | ||
lc_otp_program_i.count[93:91] | Yes | Yes | T172,T123,T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.count[94] | No | No | No | INPUT | ||
lc_otp_program_i.count[102:95] | Yes | Yes | *T4,*T57,*T176 | Yes | T123,T129,T173 | INPUT |
lc_otp_program_i.count[103] | No | No | No | INPUT | ||
lc_otp_program_i.count[105:104] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.count[106] | No | No | No | INPUT | ||
lc_otp_program_i.count[114:107] | Yes | Yes | *T4,*T57,*T176 | Yes | T123,T129,T174 | INPUT |
lc_otp_program_i.count[115] | No | No | No | INPUT | ||
lc_otp_program_i.count[133:116] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.count[134] | No | No | No | INPUT | ||
lc_otp_program_i.count[144:135] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[146:145] | No | No | No | INPUT | ||
lc_otp_program_i.count[149:147] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[150] | No | No | No | INPUT | ||
lc_otp_program_i.count[152:151] | Yes | Yes | T4,T5,T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[153] | No | No | No | INPUT | ||
lc_otp_program_i.count[157:154] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.count[158] | No | No | No | INPUT | ||
lc_otp_program_i.count[162:159] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[164:163] | No | No | No | INPUT | ||
lc_otp_program_i.count[175:165] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.count[176] | No | No | No | INPUT | ||
lc_otp_program_i.count[184:177] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.count[185] | No | No | No | INPUT | ||
lc_otp_program_i.count[198:186] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[199] | No | No | No | INPUT | ||
lc_otp_program_i.count[201:200] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[202] | No | No | No | INPUT | ||
lc_otp_program_i.count[203] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.count[204] | No | No | No | INPUT | ||
lc_otp_program_i.count[208:205] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[210:209] | No | No | No | INPUT | ||
lc_otp_program_i.count[224:211] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[225] | No | No | No | INPUT | ||
lc_otp_program_i.count[244:226] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[245] | No | No | No | INPUT | ||
lc_otp_program_i.count[249:246] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.count[250] | No | No | No | INPUT | ||
lc_otp_program_i.count[252:251] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.count[253] | No | No | No | INPUT | ||
lc_otp_program_i.count[255:254] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.count[257:256] | No | No | No | INPUT | ||
lc_otp_program_i.count[260:258] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[261] | No | No | No | INPUT | ||
lc_otp_program_i.count[262] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.count[263] | No | No | No | INPUT | ||
lc_otp_program_i.count[271:264] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.count[272] | No | No | No | INPUT | ||
lc_otp_program_i.count[276:273] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[277] | No | No | No | INPUT | ||
lc_otp_program_i.count[288:278] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[289] | No | No | No | INPUT | ||
lc_otp_program_i.count[298:290] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[299] | No | No | No | INPUT | ||
lc_otp_program_i.count[305:300] | Yes | Yes | T172,T123,T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.count[306] | No | No | No | INPUT | ||
lc_otp_program_i.count[313:307] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.count[314] | No | No | No | INPUT | ||
lc_otp_program_i.count[318:315] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.count[320:319] | No | No | No | INPUT | ||
lc_otp_program_i.count[322:321] | Yes | Yes | T172,T123,T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.count[323] | No | No | No | INPUT | ||
lc_otp_program_i.count[326:324] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[327] | No | No | No | INPUT | ||
lc_otp_program_i.count[350:328] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.count[351] | No | No | No | INPUT | ||
lc_otp_program_i.count[356:352] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[357] | No | No | No | INPUT | ||
lc_otp_program_i.count[365:358] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.count[366] | No | No | No | INPUT | ||
lc_otp_program_i.count[371:367] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.count[372] | No | No | No | INPUT | ||
lc_otp_program_i.count[374:373] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.count[375] | No | No | No | INPUT | ||
lc_otp_program_i.count[376] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.count[377] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:378] | Yes | Yes | T4,T5,T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.state[3:0] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.state[4] | No | No | No | INPUT | ||
lc_otp_program_i.state[25:5] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[26] | No | No | No | INPUT | ||
lc_otp_program_i.state[28:27] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T174 | INPUT |
lc_otp_program_i.state[29] | No | No | No | INPUT | ||
lc_otp_program_i.state[39:30] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.state[40] | No | No | No | INPUT | ||
lc_otp_program_i.state[56:41] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T174 | INPUT |
lc_otp_program_i.state[57] | No | No | No | INPUT | ||
lc_otp_program_i.state[58] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.state[59] | No | No | No | INPUT | ||
lc_otp_program_i.state[66:60] | Yes | Yes | *T172,*T123,T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.state[68:67] | No | No | No | INPUT | ||
lc_otp_program_i.state[75:69] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[76] | No | No | No | INPUT | ||
lc_otp_program_i.state[79:77] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T177 | INPUT |
lc_otp_program_i.state[81:80] | No | No | No | INPUT | ||
lc_otp_program_i.state[86:82] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T177 | INPUT |
lc_otp_program_i.state[87] | No | No | No | INPUT | ||
lc_otp_program_i.state[95:88] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[96] | No | No | No | INPUT | ||
lc_otp_program_i.state[106:97] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[107] | No | No | No | INPUT | ||
lc_otp_program_i.state[121:108] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T177 | INPUT |
lc_otp_program_i.state[122] | No | No | No | INPUT | ||
lc_otp_program_i.state[123] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.state[124] | No | No | No | INPUT | ||
lc_otp_program_i.state[127:125] | Yes | Yes | T172,T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[128] | No | No | No | INPUT | ||
lc_otp_program_i.state[139:129] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[140] | No | No | No | INPUT | ||
lc_otp_program_i.state[144:141] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.state[145] | No | No | No | INPUT | ||
lc_otp_program_i.state[149:146] | Yes | Yes | T172,T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[150] | No | No | No | INPUT | ||
lc_otp_program_i.state[155:151] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.state[156] | No | No | No | INPUT | ||
lc_otp_program_i.state[187:157] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[188] | No | No | No | INPUT | ||
lc_otp_program_i.state[189] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[191:190] | No | No | No | INPUT | ||
lc_otp_program_i.state[196:192] | Yes | Yes | *T20,*T176,*T69 | Yes | T20,T123,T129 | INPUT |
lc_otp_program_i.state[197] | No | No | No | INPUT | ||
lc_otp_program_i.state[202:198] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.state[203] | No | No | No | INPUT | ||
lc_otp_program_i.state[213:204] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[214] | No | No | No | INPUT | ||
lc_otp_program_i.state[235:215] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[236] | No | No | No | INPUT | ||
lc_otp_program_i.state[242:237] | Yes | Yes | *T20,*T176,*T69 | Yes | T20,T123,T129 | INPUT |
lc_otp_program_i.state[243] | No | No | No | INPUT | ||
lc_otp_program_i.state[277:244] | Yes | Yes | *T5,*T19,*T57 | Yes | T5,T19,T20 | INPUT |
lc_otp_program_i.state[278] | No | No | No | INPUT | ||
lc_otp_program_i.state[281:279] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[282] | No | No | No | INPUT | ||
lc_otp_program_i.state[284:283] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT |
lc_otp_program_i.state[285] | No | No | No | INPUT | ||
lc_otp_program_i.state[286] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[287] | No | No | No | INPUT | ||
lc_otp_program_i.state[289:288] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT |
lc_otp_program_i.state[290] | No | No | No | INPUT | ||
lc_otp_program_i.state[291] | Yes | Yes | *T4,*T5,*T19 | Yes | T5,T19,T20 | INPUT |
lc_otp_program_i.state[292] | No | No | No | INPUT | ||
lc_otp_program_i.state[293] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.state[295:294] | No | No | No | INPUT | ||
lc_otp_program_i.state[296] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT |
lc_otp_program_i.state[297] | No | No | No | INPUT | ||
lc_otp_program_i.state[304:298] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.state[307:305] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:308] | Yes | Yes | T172,T123,T174 | Yes | T172,T123,T174 | INPUT |
lc_otp_program_i.req | Yes | Yes | T5,T20,T63 | Yes | T5,T20,T63 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T5,T20,T63 | Yes | T5,T20,T63 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T178,T179,T180 | Yes | T178,T179,T180 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T5,T43,T19 | Yes | T5,T6,T43 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T43,T20,T62 | Yes | T5,T6,T43 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T64,T65,T66 | Yes | T20,T64,T65 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T5,T20,T63 | Yes | T5,T20,T63 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T4,T6,T43 | Yes | T43,T19,T20 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T5,T19,T54 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T4,T5,T43 | Yes | T5,T43,T62 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T5,T19,T20 | Yes | T5,T6,T44 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T5,T19,T54 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[11:0] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.count[12] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[19:13] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[20] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[23:21] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[24] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[26:25] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[27] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[36:28] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[37] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[45:38] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[46] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[52:47] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T173 | OUTPUT |
otp_lc_data_o.count[53] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[59:54] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[61:60] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[64:62] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T173 | OUTPUT |
otp_lc_data_o.count[65] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[67:66] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[72:69] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.count[73] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[89:74] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[90] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[93:91] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.count[94] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[102:95] | Yes | Yes | *T4,*T57,*T176 | Yes | T123,T129,T173 | OUTPUT |
otp_lc_data_o.count[103] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[105:104] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[106] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[114:107] | Yes | Yes | *T5,*T43,*T19 | Yes | T5,T6,T43 | OUTPUT |
otp_lc_data_o.count[115] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[133:116] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.count[134] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[144:135] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[146:145] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[149:147] | Yes | Yes | T20,*T63,*T177 | Yes | T20,T63,T177 | OUTPUT |
otp_lc_data_o.count[150] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[152:151] | Yes | Yes | T20,T63,T177 | Yes | T20,T63,T177 | OUTPUT |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[157:154] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[158] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[162:159] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[164:163] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[175:165] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[176] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[184:177] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[185] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[198:186] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[201:200] | Yes | Yes | *T20,*T63,*T182 | Yes | T20,T63,T182 | OUTPUT |
otp_lc_data_o.count[202] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[203] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[204] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[208:205] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[210:209] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[224:211] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[225] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[244:226] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[245] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[249:246] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[250] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[252:251] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[253] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[255:254] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[257:256] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[260:258] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[261] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[262] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[271:264] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.count[272] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[276:273] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[288:278] | Yes | Yes | *T20,*T63,*T182 | Yes | T20,T63,T182 | OUTPUT |
otp_lc_data_o.count[289] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[298:290] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[299] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[305:300] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.count[306] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[313:307] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[314] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[318:315] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.count[320:319] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[322:321] | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[326:324] | Yes | Yes | *T20,*T63,*T182 | Yes | T20,T63,T182 | OUTPUT |
otp_lc_data_o.count[327] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350:328] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[356:352] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[357] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[365:358] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[366] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[371:367] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[372] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[374:373] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.count[375] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[376] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.count[377] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:378] | Yes | Yes | T4,T5,T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.state[3:0] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[4] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[25:5] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[26] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[28:27] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[29] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[39:30] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.state[40] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[56:41] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[57] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[58] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[59] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[66:60] | Yes | Yes | T5,T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[68:67] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[75:69] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[79:77] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T177 | OUTPUT |
otp_lc_data_o.state[81:80] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[86:82] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[87] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[95:88] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[96] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[106:97] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[107] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[121:108] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T177 | OUTPUT |
otp_lc_data_o.state[122] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[123] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.state[124] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[127:125] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[128] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[139:129] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[140] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[144:141] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[145] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[149:146] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[150] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[155:151] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[187:157] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[188] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[189] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[191:190] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[196:192] | Yes | Yes | T5,T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[197] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[202:198] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.state[203] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[213:204] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[214] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[235:215] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[236] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[242:237] | Yes | Yes | *T20,*T176,*T69 | Yes | T20,T123,T129 | OUTPUT |
otp_lc_data_o.state[243] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[277:244] | Yes | Yes | *T5,*T19,*T57 | Yes | T5,T19,T20 | OUTPUT |
otp_lc_data_o.state[278] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[281:279] | Yes | Yes | *T172,*T123,T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[282] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[284:283] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.state[285] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[286] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[287] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[289:288] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_lc_data_o.state[290] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[291] | Yes | Yes | *T4,*T5,*T19 | Yes | T5,T19,T20 | OUTPUT |
otp_lc_data_o.state[292] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[293] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[295:294] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[296] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT |
otp_lc_data_o.state[297] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[304:298] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.state[307:305] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:308] | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T64,T65,T66 | Yes | T20,T64,T65 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T5,T19,T54 | Yes | T5,T43,T19 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T43,T44,T16 | Yes | T43,T19,T62 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T5,T19,T54 | Yes | T5,T43,T19 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T5,T64,T54 | Yes | T5,T6,T88 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T4,T6,T57 | Yes | T4,T6,T57 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T183,T122,T184 | Yes | T183,T122,T184 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T89,T185,T186 | Yes | T89,T185,T186 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T4,T6,T57 | Yes | T4,T6,T57 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T183,T122,T184 | Yes | T183,T122,T184 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T89,T185,T186 | Yes | T89,T185,T186 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T4,T6,T57 | Yes | T4,T6,T57 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T4,T6,T57 | Yes | T4,T6,T57 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T5,T6,T16 | Yes | T5,T20,T64 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[36:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[37] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[57:38] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[58] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[72:59] | Yes | Yes | *T5,*T62,*T129 | Yes | T5,T62,T129 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[122:74] | Yes | Yes | *T5,*T187,*T188 | Yes | T5,T187,T188 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[123] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[128:124] | Yes | Yes | *T5,*T62,*T129 | Yes | T5,T62,T129 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[129] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[174:130] | Yes | Yes | *T4,*T6,*T43 | Yes | T43,T19,T20 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[175] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:176] | Yes | Yes | T5,T62,T129 | Yes | T5,T62,T129 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T4,T43,T16 | Yes | T43,T19,T20 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T6,T43 | Yes | T43,T19,T20 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T43,T19 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T43,T19 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T5,T43,T44 | Yes | T5,T43,T19 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T21,T22,T23 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T43,T20,T62 | Yes | T5,T6,T43 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9352 | 85.13 |
Total Bits 0->1 | 5493 | 4691 | 85.40 |
Total Bits 1->0 | 5493 | 4661 | 84.85 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9352 | 85.13 |
Port Bits 0->1 | 5493 | 4691 | 85.40 |
Port Bits 1->0 | 5493 | 4661 | 84.85 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_ni | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | INPUT | |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_edn_ni | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | INPUT | |
edn_o.edn_req | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | INPUT | |
edn_i.edn_fips | No | No | Yes | T153,T154,T155 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T78,*T79,*T80 | Yes | T78,T79,T80 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T58,*T70,*T71 | Yes | T58,T70,T71 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T58,T71,T81 | Yes | T58,T71,T81 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T156,*T157,*T158 | Yes | T156,T157,T158 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T5,*T43,*T62 | Yes | T5,T43,T62 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T78,*T79,*T80 | Yes | T78,T79,T80 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T78,*T79,*T132 | Yes | T78,T79,T132 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T4,*T5,*T6 | Yes | T4,T5,T6 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T58,*T70,*T71 | Yes | T58,T70,T71 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T58,T71,T81 | Yes | T58,T71,T81 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T5,T6,T43 | Yes | T5,T6,T43 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T5,T6,T43 | Yes | T43,T20,T62 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T5,T6,T43 | Yes | T43,T20,T62 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T78,T80,T82 | Yes | T78,T80,T82 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T5,*T6,*T43 | Yes | T43,T20,T62 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T78,T79,T132 | Yes | T78,T79,T132 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T85,T86,T162 | Yes | T85,T86,T162 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T20,T64,T65 | Yes | T20,T64,T65 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T163,T164,T85 | Yes | T163,T85,T86 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T163,T85,T86 | Yes | T163,T164,T85 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T165,T85,T86 | Yes | T165,T85,T86 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T85,T86,T166 | Yes | T86,T166,T87 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T86,T166,T87 | Yes | T85,T86,T166 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T167,T168,T85 | Yes | T167,T168,T85 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T85,T86,T162 | Yes | T85,T86,T162 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T20,T64,T65 | Yes | T20,T64,T65 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T165,T85,T86 | Yes | T165,T85,T86 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T167,T168,T85 | Yes | T167,T168,T85 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T85,T86,T87 | Yes | T85,T86,T87 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T64,T126,T127 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[5:0] | No | No | Yes | T169,T170,T171 | INPUT | ||
lc_otp_vendor_test_i.ctrl[6] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[19:7] | No | No | Yes | T170,T169,T171 | INPUT | ||
lc_otp_vendor_test_i.ctrl[20] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[26:21] | No | No | Yes | T169,T170,T171 | INPUT | ||
lc_otp_vendor_test_i.ctrl[27] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:28] | No | No | Yes | T169,T171,T170 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[11:0] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.count[12] | No | No | No | INPUT | |||
lc_otp_program_i.count[19:13] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.count[20] | No | No | No | INPUT | |||
lc_otp_program_i.count[23:21] | Yes | Yes | T172,T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.count[24] | No | No | No | INPUT | |||
lc_otp_program_i.count[26:25] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T174 | INPUT | |
lc_otp_program_i.count[27] | No | No | No | INPUT | |||
lc_otp_program_i.count[36:28] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T174 | INPUT | |
lc_otp_program_i.count[37] | No | No | No | INPUT | |||
lc_otp_program_i.count[45:38] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.count[46] | No | No | No | INPUT | |||
lc_otp_program_i.count[52:47] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T173 | INPUT | |
lc_otp_program_i.count[53] | No | No | No | INPUT | |||
lc_otp_program_i.count[59:54] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T174 | INPUT | |
lc_otp_program_i.count[61:60] | No | No | No | INPUT | |||
lc_otp_program_i.count[64:62] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T173 | INPUT | |
lc_otp_program_i.count[65] | No | No | No | INPUT | |||
lc_otp_program_i.count[67:66] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T174 | INPUT | |
lc_otp_program_i.count[68] | No | No | No | INPUT | |||
lc_otp_program_i.count[72:69] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.count[73] | No | No | No | INPUT | |||
lc_otp_program_i.count[89:74] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.count[90] | No | No | No | INPUT | |||
lc_otp_program_i.count[93:91] | Yes | Yes | T172,T123,T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.count[94] | No | No | No | INPUT | |||
lc_otp_program_i.count[102:95] | Yes | Yes | *T4,*T57,*T176 | Yes | T123,T129,T173 | INPUT | |
lc_otp_program_i.count[103] | No | No | No | INPUT | |||
lc_otp_program_i.count[105:104] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.count[106] | No | No | No | INPUT | |||
lc_otp_program_i.count[114:107] | Yes | Yes | *T4,*T57,*T176 | Yes | T123,T129,T174 | INPUT | |
lc_otp_program_i.count[115] | No | No | No | INPUT | |||
lc_otp_program_i.count[133:116] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.count[134] | No | No | No | INPUT | |||
lc_otp_program_i.count[144:135] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[146:145] | No | No | No | INPUT | |||
lc_otp_program_i.count[149:147] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[150] | No | No | No | INPUT | |||
lc_otp_program_i.count[152:151] | Yes | Yes | T4,T5,T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[153] | No | No | No | INPUT | |||
lc_otp_program_i.count[157:154] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.count[158] | No | No | No | INPUT | |||
lc_otp_program_i.count[162:159] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[164:163] | No | No | No | INPUT | |||
lc_otp_program_i.count[175:165] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.count[176] | No | No | No | INPUT | |||
lc_otp_program_i.count[184:177] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.count[185] | No | No | No | INPUT | |||
lc_otp_program_i.count[198:186] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[199] | No | No | No | INPUT | |||
lc_otp_program_i.count[201:200] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[202] | No | No | No | INPUT | |||
lc_otp_program_i.count[203] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.count[204] | No | No | No | INPUT | |||
lc_otp_program_i.count[208:205] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[210:209] | No | No | No | INPUT | |||
lc_otp_program_i.count[224:211] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[225] | No | No | No | INPUT | |||
lc_otp_program_i.count[244:226] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[245] | No | No | No | INPUT | |||
lc_otp_program_i.count[249:246] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.count[250] | No | No | No | INPUT | |||
lc_otp_program_i.count[252:251] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.count[253] | No | No | No | INPUT | |||
lc_otp_program_i.count[255:254] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.count[257:256] | No | No | No | INPUT | |||
lc_otp_program_i.count[260:258] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[261] | No | No | No | INPUT | |||
lc_otp_program_i.count[262] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.count[263] | No | No | No | INPUT | |||
lc_otp_program_i.count[271:264] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.count[272] | No | No | No | INPUT | |||
lc_otp_program_i.count[276:273] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[277] | No | No | No | INPUT | |||
lc_otp_program_i.count[288:278] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[289] | No | No | No | INPUT | |||
lc_otp_program_i.count[298:290] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[299] | No | No | No | INPUT | |||
lc_otp_program_i.count[305:300] | Yes | Yes | T172,T123,T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.count[306] | No | No | No | INPUT | |||
lc_otp_program_i.count[313:307] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.count[314] | No | No | No | INPUT | |||
lc_otp_program_i.count[318:315] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.count[320:319] | No | No | No | INPUT | |||
lc_otp_program_i.count[322:321] | Yes | Yes | T172,T123,T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.count[323] | No | No | No | INPUT | |||
lc_otp_program_i.count[326:324] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[327] | No | No | No | INPUT | |||
lc_otp_program_i.count[350:328] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.count[351] | No | No | No | INPUT | |||
lc_otp_program_i.count[356:352] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[357] | No | No | No | INPUT | |||
lc_otp_program_i.count[365:358] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.count[366] | No | No | No | INPUT | |||
lc_otp_program_i.count[371:367] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.count[372] | No | No | No | INPUT | |||
lc_otp_program_i.count[374:373] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.count[375] | No | No | No | INPUT | |||
lc_otp_program_i.count[376] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.count[377] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:378] | Yes | Yes | T4,T5,T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.state[3:0] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.state[4] | No | No | No | INPUT | |||
lc_otp_program_i.state[25:5] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[26] | No | No | No | INPUT | |||
lc_otp_program_i.state[28:27] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T174 | INPUT | |
lc_otp_program_i.state[29] | No | No | No | INPUT | |||
lc_otp_program_i.state[39:30] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.state[40] | No | No | No | INPUT | |||
lc_otp_program_i.state[56:41] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T174 | INPUT | |
lc_otp_program_i.state[57] | No | No | No | INPUT | |||
lc_otp_program_i.state[58] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.state[59] | No | No | No | INPUT | |||
lc_otp_program_i.state[66:60] | Yes | Yes | *T172,*T123,T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.state[68:67] | No | No | No | INPUT | |||
lc_otp_program_i.state[75:69] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[76] | No | No | No | INPUT | |||
lc_otp_program_i.state[79:77] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T177 | INPUT | |
lc_otp_program_i.state[81:80] | No | No | No | INPUT | |||
lc_otp_program_i.state[86:82] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T177 | INPUT | |
lc_otp_program_i.state[87] | No | No | No | INPUT | |||
lc_otp_program_i.state[95:88] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[96] | No | No | No | INPUT | |||
lc_otp_program_i.state[106:97] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[107] | No | No | No | INPUT | |||
lc_otp_program_i.state[121:108] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T177 | INPUT | |
lc_otp_program_i.state[122] | No | No | No | INPUT | |||
lc_otp_program_i.state[123] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.state[124] | No | No | No | INPUT | |||
lc_otp_program_i.state[127:125] | Yes | Yes | T172,T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[128] | No | No | No | INPUT | |||
lc_otp_program_i.state[139:129] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[140] | No | No | No | INPUT | |||
lc_otp_program_i.state[144:141] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.state[145] | No | No | No | INPUT | |||
lc_otp_program_i.state[149:146] | Yes | Yes | T172,T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[150] | No | No | No | INPUT | |||
lc_otp_program_i.state[155:151] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.state[156] | No | No | No | INPUT | |||
lc_otp_program_i.state[187:157] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[188] | No | No | No | INPUT | |||
lc_otp_program_i.state[189] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[191:190] | No | No | No | INPUT | |||
lc_otp_program_i.state[196:192] | Yes | Yes | *T20,*T176,*T69 | Yes | T20,T123,T129 | INPUT | |
lc_otp_program_i.state[197] | No | No | No | INPUT | |||
lc_otp_program_i.state[202:198] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.state[203] | No | No | No | INPUT | |||
lc_otp_program_i.state[213:204] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[214] | No | No | No | INPUT | |||
lc_otp_program_i.state[235:215] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[236] | No | No | No | INPUT | |||
lc_otp_program_i.state[242:237] | Yes | Yes | *T20,*T176,*T69 | Yes | T20,T123,T129 | INPUT | |
lc_otp_program_i.state[243] | No | No | No | INPUT | |||
lc_otp_program_i.state[277:244] | Yes | Yes | *T5,*T19,*T57 | Yes | T5,T19,T20 | INPUT | |
lc_otp_program_i.state[278] | No | No | No | INPUT | |||
lc_otp_program_i.state[281:279] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[282] | No | No | No | INPUT | |||
lc_otp_program_i.state[284:283] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | INPUT | |
lc_otp_program_i.state[285] | No | No | No | INPUT | |||
lc_otp_program_i.state[286] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[287] | No | No | No | INPUT | |||
lc_otp_program_i.state[289:288] | Yes | Yes | *T174,*T162,*T175 | Yes | T174,T162,T175 | INPUT | |
lc_otp_program_i.state[290] | No | No | No | INPUT | |||
lc_otp_program_i.state[291] | Yes | Yes | *T4,*T5,*T19 | Yes | T5,T19,T20 | INPUT | |
lc_otp_program_i.state[292] | No | No | No | INPUT | |||
lc_otp_program_i.state[293] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.state[295:294] | No | No | No | INPUT | |||
lc_otp_program_i.state[296] | Yes | Yes | *T172,*T123,*T173 | Yes | T172,T123,T173 | INPUT | |
lc_otp_program_i.state[297] | No | No | No | INPUT | |||
lc_otp_program_i.state[304:298] | Yes | Yes | *T172,*T123,*T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.state[307:305] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:308] | Yes | Yes | T172,T123,T174 | Yes | T172,T123,T174 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T5,T20,T63 | Yes | T5,T20,T63 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T5,T20,T63 | Yes | T5,T20,T63 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T178,T179,T180 | Yes | T178,T179,T180 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T5,T43,T19 | Yes | T5,T6,T43 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T43,T20,T62 | Yes | T5,T6,T43 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T64,T65,T66 | Yes | T20,T64,T65 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T5,T20,T63 | Yes | T5,T20,T63 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T4,T6,T43 | Yes | T43,T19,T20 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T5,T19,T54 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T4,T5,T43 | Yes | T5,T43,T62 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T5,T19,T20 | Yes | T5,T6,T44 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T5,T19,T54 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[11:0] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.count[12] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[19:13] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[20] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[23:21] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[24] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[26:25] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[27] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[36:28] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[37] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[45:38] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[46] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[52:47] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T173 | OUTPUT | |
otp_lc_data_o.count[53] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[59:54] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[61:60] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[64:62] | Yes | Yes | *T176,*T69,T172 | Yes | T123,T129,T173 | OUTPUT | |
otp_lc_data_o.count[65] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[67:66] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[72:69] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.count[73] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[89:74] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[90] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[93:91] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.count[94] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[102:95] | Yes | Yes | *T4,*T57,*T176 | Yes | T123,T129,T173 | OUTPUT | |
otp_lc_data_o.count[103] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[105:104] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[106] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[114:107] | Yes | Yes | *T5,*T43,*T19 | Yes | T5,T6,T43 | OUTPUT | |
otp_lc_data_o.count[115] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[133:116] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.count[134] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[144:135] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[146:145] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[149:147] | Yes | Yes | T20,*T63,*T177 | Yes | T20,T63,T177 | OUTPUT | |
otp_lc_data_o.count[150] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[152:151] | Yes | Yes | T20,T63,T177 | Yes | T20,T63,T177 | OUTPUT | |
otp_lc_data_o.count[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[157:154] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[158] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[162:159] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[164:163] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[175:165] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[176] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[184:177] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[185] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[198:186] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[199] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[201:200] | Yes | Yes | *T20,*T63,*T182 | Yes | T20,T63,T182 | OUTPUT | |
otp_lc_data_o.count[202] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[203] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[204] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[208:205] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[210:209] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[224:211] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[225] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[244:226] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[245] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[249:246] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[250] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[252:251] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[253] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[255:254] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[257:256] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[260:258] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[261] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[262] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.count[263] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[271:264] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.count[272] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[276:273] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[288:278] | Yes | Yes | *T20,*T63,*T182 | Yes | T20,T63,T182 | OUTPUT | |
otp_lc_data_o.count[289] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[298:290] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[299] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[305:300] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.count[306] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[313:307] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[314] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[318:315] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.count[320:319] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[322:321] | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[326:324] | Yes | Yes | *T20,*T63,*T182 | Yes | T20,T63,T182 | OUTPUT | |
otp_lc_data_o.count[327] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350:328] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[356:352] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[357] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[365:358] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[366] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[371:367] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[372] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[374:373] | Yes | Yes | *T4,T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.count[375] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[376] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.count[377] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:378] | Yes | Yes | T4,T5,T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.state[3:0] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[4] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[25:5] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[26] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[28:27] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[29] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[39:30] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.state[40] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[56:41] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[57] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[58] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[59] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[66:60] | Yes | Yes | T5,T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[68:67] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[75:69] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[79:77] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T177 | OUTPUT | |
otp_lc_data_o.state[81:80] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[86:82] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[87] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[95:88] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[96] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[106:97] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[107] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[121:108] | Yes | Yes | *T176,*T69,*T172 | Yes | T123,T129,T177 | OUTPUT | |
otp_lc_data_o.state[122] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[123] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.state[124] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[127:125] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[128] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[139:129] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[140] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[144:141] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[145] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[149:146] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[150] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[155:151] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[187:157] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[188] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[189] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[191:190] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[196:192] | Yes | Yes | T5,T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[197] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[202:198] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.state[203] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[213:204] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[214] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[235:215] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[236] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[242:237] | Yes | Yes | *T20,*T176,*T69 | Yes | T20,T123,T129 | OUTPUT | |
otp_lc_data_o.state[243] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[277:244] | Yes | Yes | *T5,*T19,*T57 | Yes | T5,T19,T20 | OUTPUT | |
otp_lc_data_o.state[278] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[281:279] | Yes | Yes | *T172,*T123,T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[282] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[284:283] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.state[285] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[286] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[287] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[289:288] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_lc_data_o.state[290] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[291] | Yes | Yes | *T4,*T5,*T19 | Yes | T5,T19,T20 | OUTPUT | |
otp_lc_data_o.state[292] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[293] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[295:294] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[296] | Yes | Yes | *T172,*T123,*T173 | Yes | T123,T173,T181 | OUTPUT | |
otp_lc_data_o.state[297] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[304:298] | Yes | Yes | *T5,*T43,*T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.state[307:305] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:308] | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T64,T65,T66 | Yes | T20,T64,T65 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T5,T19,T54 | Yes | T5,T43,T19 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T43,T44,T16 | Yes | T43,T19,T62 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T5,T19,T54 | Yes | T5,T43,T19 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T5,T64,T54 | Yes | T5,T6,T88 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T4,T6,T57 | Yes | T4,T6,T57 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T183,T122,T184 | Yes | T183,T122,T184 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T89,T185,T186 | Yes | T89,T185,T186 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T4,T6,T57 | Yes | T4,T6,T57 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T183,T122,T184 | Yes | T183,T122,T184 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T89,T185,T186 | Yes | T89,T185,T186 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T4,T6,T57 | Yes | T4,T6,T57 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T43,T19,T62 | Yes | T4,T6,T43 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T4,T6,T43 | Yes | T4,T6,T43 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T4,T6,T57 | Yes | T4,T6,T57 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T5,T6,T16 | Yes | T5,T20,T64 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[36:0] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[37] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[57:38] | Yes | Yes | *T4,*T5,*T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[58] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[72:59] | Yes | Yes | *T5,*T62,*T129 | Yes | T5,T62,T129 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[122:74] | Yes | Yes | *T5,*T187,*T188 | Yes | T5,T187,T188 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[123] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[128:124] | Yes | Yes | *T5,*T62,*T129 | Yes | T5,T62,T129 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[129] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[174:130] | Yes | Yes | *T4,*T6,*T43 | Yes | T43,T19,T20 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[175] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:176] | Yes | Yes | T5,T62,T129 | Yes | T5,T62,T129 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T4,T43,T16 | Yes | T43,T19,T20 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T6,T43 | Yes | T43,T19,T20 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T5,T43,T19 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T5,T43,T44 | Yes | T5,T43,T19 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T5,T43,T19 | Yes | T4,T5,T6 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T43,T20,T62 | Yes | T5,T6,T43 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |