| T372 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.837911694 |
|
|
Jul 11 08:20:41 PM PDT 24 |
Jul 11 08:26:45 PM PDT 24 |
3951972586 ps |
| T836 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.2161854674 |
|
|
Jul 11 08:38:01 PM PDT 24 |
Jul 11 08:48:24 PM PDT 24 |
5219818878 ps |
| T263 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.4010239920 |
|
|
Jul 11 08:37:48 PM PDT 24 |
Jul 11 08:47:00 PM PDT 24 |
4924622520 ps |
| T822 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.3508703111 |
|
|
Jul 11 08:38:52 PM PDT 24 |
Jul 11 08:45:47 PM PDT 24 |
3961008620 ps |
| T161 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.275293191 |
|
|
Jul 11 08:20:06 PM PDT 24 |
Jul 11 08:30:40 PM PDT 24 |
4538487248 ps |
| T1200 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1531968144 |
|
|
Jul 11 08:20:16 PM PDT 24 |
Jul 11 08:32:43 PM PDT 24 |
4133411672 ps |
| T1201 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.3884376124 |
|
|
Jul 11 08:04:59 PM PDT 24 |
Jul 11 08:09:20 PM PDT 24 |
3765544081 ps |
| T1202 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.1415747890 |
|
|
Jul 11 08:07:52 PM PDT 24 |
Jul 11 08:12:13 PM PDT 24 |
3203728026 ps |
| T1203 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.1078956335 |
|
|
Jul 11 08:25:09 PM PDT 24 |
Jul 11 08:46:28 PM PDT 24 |
8186705142 ps |
| T1204 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1403662900 |
|
|
Jul 11 08:02:03 PM PDT 24 |
Jul 11 08:50:52 PM PDT 24 |
25610217456 ps |
| T1205 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.930834983 |
|
|
Jul 11 08:22:24 PM PDT 24 |
Jul 11 08:24:14 PM PDT 24 |
2476204588 ps |
| T1206 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.901491217 |
|
|
Jul 11 08:07:10 PM PDT 24 |
Jul 11 08:17:33 PM PDT 24 |
4563638512 ps |
| T847 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.2239768645 |
|
|
Jul 11 08:39:08 PM PDT 24 |
Jul 11 08:46:28 PM PDT 24 |
3251192744 ps |
| T118 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.741442735 |
|
|
Jul 11 08:07:34 PM PDT 24 |
Jul 11 08:59:46 PM PDT 24 |
17276568059 ps |
| T1207 |
/workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.661180081 |
|
|
Jul 11 08:25:11 PM PDT 24 |
Jul 11 08:33:13 PM PDT 24 |
7240957600 ps |
| T1208 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.1273901857 |
|
|
Jul 11 08:31:19 PM PDT 24 |
Jul 11 08:44:57 PM PDT 24 |
5230472776 ps |
| T748 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.3789907146 |
|
|
Jul 11 08:23:59 PM PDT 24 |
Jul 11 08:28:17 PM PDT 24 |
2546942240 ps |
| T823 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.1151907004 |
|
|
Jul 11 08:38:26 PM PDT 24 |
Jul 11 08:49:37 PM PDT 24 |
6327785240 ps |
| T1209 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.1114299871 |
|
|
Jul 11 08:26:02 PM PDT 24 |
Jul 11 09:01:12 PM PDT 24 |
8585711620 ps |
| T1210 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.3557514868 |
|
|
Jul 11 08:03:10 PM PDT 24 |
Jul 11 08:18:05 PM PDT 24 |
10235862762 ps |
| T1211 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.3764214381 |
|
|
Jul 11 08:08:57 PM PDT 24 |
Jul 11 08:12:17 PM PDT 24 |
2289324744 ps |
| T717 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.3394181815 |
|
|
Jul 11 08:09:48 PM PDT 24 |
Jul 11 08:13:29 PM PDT 24 |
2864510800 ps |
| T1212 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.1530700485 |
|
|
Jul 11 08:11:07 PM PDT 24 |
Jul 11 08:14:36 PM PDT 24 |
2357045844 ps |
| T1213 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.3995842553 |
|
|
Jul 11 08:23:43 PM PDT 24 |
Jul 11 08:28:44 PM PDT 24 |
3606914590 ps |
| T1214 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.4055624574 |
|
|
Jul 11 08:26:18 PM PDT 24 |
Jul 11 08:37:08 PM PDT 24 |
7815204606 ps |
| T1215 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.3994404015 |
|
|
Jul 11 08:24:09 PM PDT 24 |
Jul 11 08:33:04 PM PDT 24 |
3958616194 ps |
| T1216 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.1964560681 |
|
|
Jul 11 08:03:50 PM PDT 24 |
Jul 11 08:13:33 PM PDT 24 |
5573492650 ps |
| T1217 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.1516166304 |
|
|
Jul 11 08:08:45 PM PDT 24 |
Jul 11 08:32:05 PM PDT 24 |
8852495060 ps |
| T1218 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.866970972 |
|
|
Jul 11 08:09:15 PM PDT 24 |
Jul 11 08:55:09 PM PDT 24 |
11147146970 ps |
| T827 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.842925295 |
|
|
Jul 11 08:39:10 PM PDT 24 |
Jul 11 08:49:25 PM PDT 24 |
6312198356 ps |
| T1219 |
/workspace/coverage/default/2.chip_sw_kmac_idle.2564373218 |
|
|
Jul 11 08:31:07 PM PDT 24 |
Jul 11 08:35:41 PM PDT 24 |
2952746540 ps |
| T1220 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.331431995 |
|
|
Jul 11 08:13:04 PM PDT 24 |
Jul 11 09:40:47 PM PDT 24 |
22296359560 ps |
| T345 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.1217514478 |
|
|
Jul 11 08:02:02 PM PDT 24 |
Jul 11 08:10:56 PM PDT 24 |
3984838196 ps |
| T1221 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3337515118 |
|
|
Jul 11 08:01:45 PM PDT 24 |
Jul 11 08:03:49 PM PDT 24 |
2658503732 ps |
| T751 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.1319809541 |
|
|
Jul 11 08:12:05 PM PDT 24 |
Jul 11 08:25:48 PM PDT 24 |
4761052523 ps |
| T1222 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.3273795623 |
|
|
Jul 11 08:06:32 PM PDT 24 |
Jul 11 08:10:30 PM PDT 24 |
2821719000 ps |
| T229 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.3137683050 |
|
|
Jul 11 08:19:43 PM PDT 24 |
Jul 11 08:51:08 PM PDT 24 |
10848946840 ps |
| T1223 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.1664112783 |
|
|
Jul 11 08:29:41 PM PDT 24 |
Jul 11 08:47:15 PM PDT 24 |
11406823472 ps |
| T392 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.2210431093 |
|
|
Jul 11 08:10:45 PM PDT 24 |
Jul 11 08:21:44 PM PDT 24 |
5576002424 ps |
| T141 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.124782207 |
|
|
Jul 11 08:19:51 PM PDT 24 |
Jul 11 08:25:49 PM PDT 24 |
5519709920 ps |
| T1224 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.4144861762 |
|
|
Jul 11 08:21:26 PM PDT 24 |
Jul 11 08:29:54 PM PDT 24 |
6865203940 ps |
| T93 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.304056584 |
|
|
Jul 11 08:38:48 PM PDT 24 |
Jul 11 08:47:37 PM PDT 24 |
3924922160 ps |
| T757 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.2847417110 |
|
|
Jul 11 08:36:23 PM PDT 24 |
Jul 11 08:43:44 PM PDT 24 |
4095983500 ps |
| T1225 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.1321848917 |
|
|
Jul 11 08:12:31 PM PDT 24 |
Jul 11 09:20:50 PM PDT 24 |
15557175930 ps |
| T768 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.2381510997 |
|
|
Jul 11 08:36:45 PM PDT 24 |
Jul 11 08:42:56 PM PDT 24 |
2920856690 ps |
| T250 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.3536810550 |
|
|
Jul 11 08:03:46 PM PDT 24 |
Jul 11 08:10:43 PM PDT 24 |
4905576328 ps |
| T1226 |
/workspace/coverage/default/0.chip_sw_example_rom.2985140426 |
|
|
Jul 11 08:00:28 PM PDT 24 |
Jul 11 08:02:18 PM PDT 24 |
2500752696 ps |
| T1227 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.1836600895 |
|
|
Jul 11 08:36:53 PM PDT 24 |
Jul 11 08:42:48 PM PDT 24 |
3474987558 ps |
| T231 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.1271368056 |
|
|
Jul 11 08:28:38 PM PDT 24 |
Jul 11 09:27:38 PM PDT 24 |
12842599412 ps |
| T719 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.654322036 |
|
|
Jul 11 08:02:55 PM PDT 24 |
Jul 11 08:08:14 PM PDT 24 |
2919277026 ps |
| T1228 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.2222025663 |
|
|
Jul 11 08:21:40 PM PDT 24 |
Jul 11 08:29:23 PM PDT 24 |
4074489224 ps |
| T289 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.479891912 |
|
|
Jul 11 08:37:03 PM PDT 24 |
Jul 11 08:44:29 PM PDT 24 |
3838186712 ps |
| T1229 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.136094249 |
|
|
Jul 11 08:10:29 PM PDT 24 |
Jul 11 09:46:00 PM PDT 24 |
24901719120 ps |
| T718 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.682510616 |
|
|
Jul 11 08:02:07 PM PDT 24 |
Jul 11 08:07:03 PM PDT 24 |
3416337720 ps |
| T1230 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2792297517 |
|
|
Jul 11 08:24:45 PM PDT 24 |
Jul 11 09:06:36 PM PDT 24 |
27448299024 ps |
| T1231 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.423756518 |
|
|
Jul 11 08:31:44 PM PDT 24 |
Jul 11 08:38:35 PM PDT 24 |
6368423307 ps |
| T1232 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.2688691921 |
|
|
Jul 11 08:27:44 PM PDT 24 |
Jul 11 08:55:24 PM PDT 24 |
7114486592 ps |
| T387 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3145281822 |
|
|
Jul 11 08:21:49 PM PDT 24 |
Jul 11 08:27:32 PM PDT 24 |
4993310824 ps |
| T1233 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.2597308288 |
|
|
Jul 11 08:04:44 PM PDT 24 |
Jul 11 08:13:59 PM PDT 24 |
5617259240 ps |
| T1234 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.1044354766 |
|
|
Jul 11 08:21:45 PM PDT 24 |
Jul 11 08:31:13 PM PDT 24 |
4435788352 ps |
| T1235 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.3743481661 |
|
|
Jul 11 08:12:15 PM PDT 24 |
Jul 11 08:16:19 PM PDT 24 |
3299330154 ps |
| T1236 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.198778650 |
|
|
Jul 11 08:04:21 PM PDT 24 |
Jul 11 08:13:03 PM PDT 24 |
5650784340 ps |
| T1237 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.3195613598 |
|
|
Jul 11 08:04:26 PM PDT 24 |
Jul 11 08:36:04 PM PDT 24 |
10573107564 ps |
| T1238 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.960184550 |
|
|
Jul 11 08:29:21 PM PDT 24 |
Jul 11 09:27:12 PM PDT 24 |
15443541598 ps |
| T1239 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.4272090993 |
|
|
Jul 11 08:29:10 PM PDT 24 |
Jul 11 09:39:24 PM PDT 24 |
28528441616 ps |
| T1240 |
/workspace/coverage/default/0.chip_sw_coremark.2470722232 |
|
|
Jul 11 08:03:14 PM PDT 24 |
Jul 11 11:47:11 PM PDT 24 |
70949949168 ps |
| T298 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.1353845979 |
|
|
Jul 11 08:25:28 PM PDT 24 |
Jul 11 08:30:44 PM PDT 24 |
2902154667 ps |
| T323 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3930278968 |
|
|
Jul 11 08:20:36 PM PDT 24 |
Jul 11 08:33:12 PM PDT 24 |
4526571064 ps |
| T818 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1698544431 |
|
|
Jul 11 08:32:08 PM PDT 24 |
Jul 11 08:41:18 PM PDT 24 |
5190755038 ps |
| T1241 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.984643442 |
|
|
Jul 11 08:02:31 PM PDT 24 |
Jul 11 08:16:08 PM PDT 24 |
6597620776 ps |
| T1242 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.1366729807 |
|
|
Jul 11 08:23:57 PM PDT 24 |
Jul 11 08:33:08 PM PDT 24 |
3614456552 ps |
| T170 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.3386050549 |
|
|
Jul 11 08:07:02 PM PDT 24 |
Jul 11 08:08:35 PM PDT 24 |
2322004627 ps |
| T856 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2848634011 |
|
|
Jul 11 08:35:52 PM PDT 24 |
Jul 11 08:44:54 PM PDT 24 |
4154667024 ps |
| T1243 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.3367641691 |
|
|
Jul 11 08:28:50 PM PDT 24 |
Jul 11 08:36:43 PM PDT 24 |
3962161480 ps |
| T1244 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.4101084905 |
|
|
Jul 11 08:27:30 PM PDT 24 |
Jul 11 08:35:59 PM PDT 24 |
3521578165 ps |
| T1245 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.2996189449 |
|
|
Jul 11 08:33:23 PM PDT 24 |
Jul 11 08:43:13 PM PDT 24 |
4406664946 ps |
| T1246 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.2860415273 |
|
|
Jul 11 08:30:26 PM PDT 24 |
Jul 11 08:41:31 PM PDT 24 |
9714473172 ps |
| T782 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.1534713815 |
|
|
Jul 11 08:03:10 PM PDT 24 |
Jul 11 08:27:49 PM PDT 24 |
13301392846 ps |
| T1247 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.1497377997 |
|
|
Jul 11 08:11:22 PM PDT 24 |
Jul 11 08:35:20 PM PDT 24 |
6160256178 ps |
| T1248 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.1150817181 |
|
|
Jul 11 08:26:24 PM PDT 24 |
Jul 11 09:22:36 PM PDT 24 |
14817950260 ps |
| T1249 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.392207578 |
|
|
Jul 11 07:59:35 PM PDT 24 |
Jul 11 08:02:28 PM PDT 24 |
2696879984 ps |
| T1250 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.4099884283 |
|
|
Jul 11 08:08:38 PM PDT 24 |
Jul 11 08:10:18 PM PDT 24 |
2494937516 ps |
| T1251 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.2946950203 |
|
|
Jul 11 08:24:43 PM PDT 24 |
Jul 11 08:30:04 PM PDT 24 |
3209471160 ps |
| T1252 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.1508613005 |
|
|
Jul 11 08:13:21 PM PDT 24 |
Jul 11 10:03:05 PM PDT 24 |
24088955994 ps |
| T1253 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.3170754847 |
|
|
Jul 11 08:11:36 PM PDT 24 |
Jul 11 08:21:47 PM PDT 24 |
4684830310 ps |
| T1254 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.1890847605 |
|
|
Jul 11 08:37:50 PM PDT 24 |
Jul 11 08:45:19 PM PDT 24 |
3477296324 ps |
| T1255 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.1758645327 |
|
|
Jul 11 08:04:20 PM PDT 24 |
Jul 11 08:13:44 PM PDT 24 |
5006091682 ps |
| T1256 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.1069980457 |
|
|
Jul 11 08:04:11 PM PDT 24 |
Jul 11 08:15:03 PM PDT 24 |
4081496309 ps |
| T1257 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.1824435345 |
|
|
Jul 11 08:32:31 PM PDT 24 |
Jul 11 10:13:52 PM PDT 24 |
27217186184 ps |
| T797 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.3676831934 |
|
|
Jul 11 08:39:24 PM PDT 24 |
Jul 11 08:50:30 PM PDT 24 |
5955371640 ps |
| T1258 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.964129529 |
|
|
Jul 11 08:01:11 PM PDT 24 |
Jul 11 08:08:11 PM PDT 24 |
3327786470 ps |
| T1259 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.3259180327 |
|
|
Jul 11 08:12:54 PM PDT 24 |
Jul 11 09:21:01 PM PDT 24 |
18600465463 ps |
| T1260 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.4235830038 |
|
|
Jul 11 08:08:17 PM PDT 24 |
Jul 11 08:17:04 PM PDT 24 |
6380672835 ps |
| T1261 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.67348911 |
|
|
Jul 11 08:01:46 PM PDT 24 |
Jul 11 08:07:49 PM PDT 24 |
4809627472 ps |
| T1262 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1188407820 |
|
|
Jul 11 08:24:27 PM PDT 24 |
Jul 11 08:36:58 PM PDT 24 |
4544032800 ps |
| T9 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.1500092414 |
|
|
Jul 11 08:21:15 PM PDT 24 |
Jul 11 08:29:30 PM PDT 24 |
4793228438 ps |
| T733 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.1339849047 |
|
|
Jul 11 08:35:01 PM PDT 24 |
Jul 11 08:41:47 PM PDT 24 |
3787037056 ps |
| T734 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.1875677187 |
|
|
Jul 11 08:26:24 PM PDT 24 |
Jul 11 08:28:19 PM PDT 24 |
1819677767 ps |
| T735 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.3355810147 |
|
|
Jul 11 08:11:05 PM PDT 24 |
Jul 11 08:42:56 PM PDT 24 |
7863405782 ps |
| T338 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.2482560573 |
|
|
Jul 11 08:08:19 PM PDT 24 |
Jul 11 08:23:52 PM PDT 24 |
5017244568 ps |
| T736 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.2428434403 |
|
|
Jul 11 08:03:59 PM PDT 24 |
Jul 11 08:06:45 PM PDT 24 |
4007206838 ps |
| T737 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2366491143 |
|
|
Jul 11 08:23:44 PM PDT 24 |
Jul 11 08:40:36 PM PDT 24 |
6359869336 ps |
| T738 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.1743767517 |
|
|
Jul 11 08:31:29 PM PDT 24 |
Jul 11 08:40:10 PM PDT 24 |
4368298378 ps |
| T739 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.304970515 |
|
|
Jul 11 08:08:04 PM PDT 24 |
Jul 11 08:12:32 PM PDT 24 |
3331771784 ps |
| T740 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.404699872 |
|
|
Jul 11 08:25:19 PM PDT 24 |
Jul 11 08:31:59 PM PDT 24 |
3899973734 ps |
| T1263 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.2374339471 |
|
|
Jul 11 08:03:20 PM PDT 24 |
Jul 11 08:13:04 PM PDT 24 |
8761139728 ps |
| T339 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.1778736423 |
|
|
Jul 11 08:26:44 PM PDT 24 |
Jul 11 08:40:13 PM PDT 24 |
6078155560 ps |
| T1264 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.4221741216 |
|
|
Jul 11 08:10:39 PM PDT 24 |
Jul 11 08:17:31 PM PDT 24 |
7201644096 ps |
| T1265 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.2290060131 |
|
|
Jul 11 08:25:58 PM PDT 24 |
Jul 11 08:38:09 PM PDT 24 |
4705864488 ps |
| T1266 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.612654326 |
|
|
Jul 11 08:10:47 PM PDT 24 |
Jul 11 09:44:26 PM PDT 24 |
22844403335 ps |
| T1267 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.1618599008 |
|
|
Jul 11 08:07:24 PM PDT 24 |
Jul 11 08:14:50 PM PDT 24 |
4188920806 ps |
| T1268 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.3244254209 |
|
|
Jul 11 08:03:32 PM PDT 24 |
Jul 11 08:11:25 PM PDT 24 |
4770769110 ps |
| T1269 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.184765523 |
|
|
Jul 11 08:04:06 PM PDT 24 |
Jul 11 08:13:11 PM PDT 24 |
6106940407 ps |
| T1270 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.3180780557 |
|
|
Jul 11 08:05:47 PM PDT 24 |
Jul 11 08:46:53 PM PDT 24 |
22547955135 ps |
| T819 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.757908807 |
|
|
Jul 11 08:37:18 PM PDT 24 |
Jul 11 08:42:16 PM PDT 24 |
3553626008 ps |
| T1271 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.2215054055 |
|
|
Jul 11 08:06:52 PM PDT 24 |
Jul 11 08:10:11 PM PDT 24 |
2806160800 ps |
| T1272 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.1296692677 |
|
|
Jul 11 08:10:03 PM PDT 24 |
Jul 11 09:41:57 PM PDT 24 |
23843232392 ps |
| T1273 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.1261162716 |
|
|
Jul 11 08:05:57 PM PDT 24 |
Jul 11 08:38:54 PM PDT 24 |
8313595400 ps |
| T1274 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.4100767760 |
|
|
Jul 11 08:25:33 PM PDT 24 |
Jul 11 08:52:22 PM PDT 24 |
9950820865 ps |
| T824 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.853920215 |
|
|
Jul 11 08:42:39 PM PDT 24 |
Jul 11 08:52:05 PM PDT 24 |
5508693146 ps |
| T1275 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.2476243956 |
|
|
Jul 11 08:28:59 PM PDT 24 |
Jul 11 09:45:27 PM PDT 24 |
15518140976 ps |
| T1276 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.1571727871 |
|
|
Jul 11 08:28:28 PM PDT 24 |
Jul 11 08:53:11 PM PDT 24 |
10474773323 ps |
| T1277 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.1056978050 |
|
|
Jul 11 08:10:25 PM PDT 24 |
Jul 11 09:15:09 PM PDT 24 |
15364546254 ps |
| T1278 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3200577083 |
|
|
Jul 11 08:21:31 PM PDT 24 |
Jul 11 08:33:44 PM PDT 24 |
4970831824 ps |
| T13 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.426181345 |
|
|
Jul 11 08:08:40 PM PDT 24 |
Jul 11 08:14:15 PM PDT 24 |
4373380680 ps |
| T1279 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.3851710313 |
|
|
Jul 11 08:20:21 PM PDT 24 |
Jul 11 08:27:56 PM PDT 24 |
3856464764 ps |
| T817 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.3143337532 |
|
|
Jul 11 08:37:45 PM PDT 24 |
Jul 11 08:48:07 PM PDT 24 |
4910690860 ps |
| T1280 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.538897203 |
|
|
Jul 11 08:09:14 PM PDT 24 |
Jul 11 08:25:25 PM PDT 24 |
5807146590 ps |
| T1281 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1211474025 |
|
|
Jul 11 08:04:47 PM PDT 24 |
Jul 11 09:11:24 PM PDT 24 |
24927138852 ps |
| T335 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3861046215 |
|
|
Jul 11 08:07:26 PM PDT 24 |
Jul 11 08:31:06 PM PDT 24 |
6287272284 ps |
| T1282 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.2723442512 |
|
|
Jul 11 08:03:28 PM PDT 24 |
Jul 11 08:07:28 PM PDT 24 |
3075096984 ps |
| T1283 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.259682160 |
|
|
Jul 11 08:26:59 PM PDT 24 |
Jul 11 08:34:25 PM PDT 24 |
3190400788 ps |
| T1284 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.1215864104 |
|
|
Jul 11 08:25:22 PM PDT 24 |
Jul 11 08:40:02 PM PDT 24 |
10934179507 ps |
| T1285 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.272208866 |
|
|
Jul 11 08:32:14 PM PDT 24 |
Jul 11 09:58:28 PM PDT 24 |
21941468290 ps |
| T1286 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.2953113732 |
|
|
Jul 11 08:26:36 PM PDT 24 |
Jul 11 11:53:48 PM PDT 24 |
77761909112 ps |
| T321 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.4289367131 |
|
|
Jul 11 08:21:34 PM PDT 24 |
Jul 11 08:42:49 PM PDT 24 |
5567245756 ps |
| T1287 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.810155952 |
|
|
Jul 11 08:20:26 PM PDT 24 |
Jul 11 08:38:06 PM PDT 24 |
11864916644 ps |
| T1288 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.3994461924 |
|
|
Jul 11 08:09:22 PM PDT 24 |
Jul 11 08:15:56 PM PDT 24 |
4861488540 ps |
| T1289 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.2925539295 |
|
|
Jul 11 08:25:59 PM PDT 24 |
Jul 11 08:34:52 PM PDT 24 |
5920420732 ps |
| T370 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3815525416 |
|
|
Jul 11 08:02:54 PM PDT 24 |
Jul 11 08:11:03 PM PDT 24 |
19281719388 ps |
| T1290 |
/workspace/coverage/default/2.chip_tap_straps_dev.3207566883 |
|
|
Jul 11 08:28:48 PM PDT 24 |
Jul 11 08:47:57 PM PDT 24 |
12995260746 ps |
| T1291 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.3468814358 |
|
|
Jul 11 08:21:37 PM PDT 24 |
Jul 11 08:25:34 PM PDT 24 |
2923012376 ps |
| T1292 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.696882830 |
|
|
Jul 11 08:25:14 PM PDT 24 |
Jul 11 08:31:04 PM PDT 24 |
5063043394 ps |
| T1293 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.3796238265 |
|
|
Jul 11 08:23:37 PM PDT 24 |
Jul 11 08:27:56 PM PDT 24 |
2119994390 ps |
| T1294 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.3797408874 |
|
|
Jul 11 08:33:10 PM PDT 24 |
Jul 11 08:42:19 PM PDT 24 |
3866070572 ps |
| T1295 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.603336512 |
|
|
Jul 11 08:37:47 PM PDT 24 |
Jul 11 08:46:59 PM PDT 24 |
5636586782 ps |
| T690 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.1143742193 |
|
|
Jul 11 08:28:00 PM PDT 24 |
Jul 11 08:37:46 PM PDT 24 |
3452724824 ps |
| T848 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.3549575029 |
|
|
Jul 11 08:34:02 PM PDT 24 |
Jul 11 08:39:57 PM PDT 24 |
4064058920 ps |
| T1296 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2538660241 |
|
|
Jul 11 08:08:02 PM PDT 24 |
Jul 11 08:29:46 PM PDT 24 |
11750725388 ps |
| T1297 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.2612026302 |
|
|
Jul 11 08:23:27 PM PDT 24 |
Jul 11 08:28:15 PM PDT 24 |
3120022239 ps |
| T1298 |
/workspace/coverage/default/0.rom_e2e_smoke.1746172814 |
|
|
Jul 11 08:08:30 PM PDT 24 |
Jul 11 09:14:11 PM PDT 24 |
15571598856 ps |
| T1299 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.747968161 |
|
|
Jul 11 08:06:00 PM PDT 24 |
Jul 11 08:11:39 PM PDT 24 |
3361966367 ps |
| T1300 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.2797297558 |
|
|
Jul 11 08:22:08 PM PDT 24 |
Jul 11 08:29:17 PM PDT 24 |
6061861131 ps |
| T1301 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.3425655 |
|
|
Jul 11 08:21:22 PM PDT 24 |
Jul 11 08:28:17 PM PDT 24 |
3389402144 ps |
| T1302 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.2528700114 |
|
|
Jul 11 08:11:41 PM PDT 24 |
Jul 11 09:15:25 PM PDT 24 |
14805070946 ps |
| T1303 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.1291354720 |
|
|
Jul 11 08:25:40 PM PDT 24 |
Jul 11 08:40:32 PM PDT 24 |
5098578696 ps |
| T1304 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.3027351021 |
|
|
Jul 11 08:30:29 PM PDT 24 |
Jul 11 08:34:55 PM PDT 24 |
2609668640 ps |
| T1305 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.3898646147 |
|
|
Jul 11 08:10:19 PM PDT 24 |
Jul 11 09:13:57 PM PDT 24 |
15525539936 ps |
| T1306 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.3562705442 |
|
|
Jul 11 08:37:09 PM PDT 24 |
Jul 11 08:49:10 PM PDT 24 |
4709950362 ps |
| T1307 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.2578422437 |
|
|
Jul 11 08:20:55 PM PDT 24 |
Jul 11 08:50:43 PM PDT 24 |
21555122003 ps |
| T302 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.620116087 |
|
|
Jul 11 08:06:50 PM PDT 24 |
Jul 11 08:22:08 PM PDT 24 |
8297848497 ps |
| T1308 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.2586923048 |
|
|
Jul 11 08:24:36 PM PDT 24 |
Jul 11 08:44:03 PM PDT 24 |
9128796782 ps |
| T1309 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.1275507857 |
|
|
Jul 11 08:31:38 PM PDT 24 |
Jul 11 08:41:43 PM PDT 24 |
5439586220 ps |
| T1310 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.886206457 |
|
|
Jul 11 08:29:24 PM PDT 24 |
Jul 11 08:36:44 PM PDT 24 |
4318349646 ps |
| T1311 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.1661972173 |
|
|
Jul 11 08:05:12 PM PDT 24 |
Jul 11 08:08:35 PM PDT 24 |
2635562800 ps |
| T1312 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.1574045694 |
|
|
Jul 11 08:03:19 PM PDT 24 |
Jul 11 08:06:27 PM PDT 24 |
2237623430 ps |
| T1313 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.117725999 |
|
|
Jul 11 08:26:28 PM PDT 24 |
Jul 11 09:18:29 PM PDT 24 |
15319449820 ps |
| T1314 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.2250011503 |
|
|
Jul 11 08:29:15 PM PDT 24 |
Jul 11 08:37:34 PM PDT 24 |
9989373859 ps |
| T1315 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.90125817 |
|
|
Jul 11 08:01:00 PM PDT 24 |
Jul 11 09:38:16 PM PDT 24 |
47393913250 ps |
| T324 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.427557838 |
|
|
Jul 11 08:30:02 PM PDT 24 |
Jul 11 08:41:27 PM PDT 24 |
4824970898 ps |
| T1316 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.1849729164 |
|
|
Jul 11 08:01:51 PM PDT 24 |
Jul 11 08:06:59 PM PDT 24 |
2963651635 ps |
| T1317 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.1269401315 |
|
|
Jul 11 08:01:15 PM PDT 24 |
Jul 11 08:23:23 PM PDT 24 |
7130876304 ps |
| T1318 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.1607930401 |
|
|
Jul 11 08:23:18 PM PDT 24 |
Jul 11 08:50:51 PM PDT 24 |
9557008664 ps |
| T53 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.2020506939 |
|
|
Jul 11 08:25:02 PM PDT 24 |
Jul 11 08:33:28 PM PDT 24 |
4102072344 ps |
| T47 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.1280049499 |
|
|
Jul 11 08:21:25 PM PDT 24 |
Jul 11 08:26:02 PM PDT 24 |
3149160798 ps |
| T761 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.943036595 |
|
|
Jul 11 08:35:13 PM PDT 24 |
Jul 11 08:41:06 PM PDT 24 |
3936694000 ps |
| T1319 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.3937609614 |
|
|
Jul 11 08:22:35 PM PDT 24 |
Jul 11 11:44:47 PM PDT 24 |
65569970325 ps |
| T828 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.2897113436 |
|
|
Jul 11 08:34:24 PM PDT 24 |
Jul 11 08:45:18 PM PDT 24 |
5469897100 ps |
| T1320 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.3487233111 |
|
|
Jul 11 08:40:26 PM PDT 24 |
Jul 11 08:51:26 PM PDT 24 |
4357797270 ps |
| T1321 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.1925573443 |
|
|
Jul 11 08:31:31 PM PDT 24 |
Jul 11 08:42:13 PM PDT 24 |
4625710874 ps |
| T328 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.3528782370 |
|
|
Jul 11 08:23:01 PM PDT 24 |
Jul 11 08:40:28 PM PDT 24 |
5731855188 ps |
| T1322 |
/workspace/coverage/default/0.chip_sw_kmac_idle.4111673357 |
|
|
Jul 11 08:03:00 PM PDT 24 |
Jul 11 08:06:15 PM PDT 24 |
2680762700 ps |
| T1323 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.2859617897 |
|
|
Jul 11 08:27:05 PM PDT 24 |
Jul 11 08:39:19 PM PDT 24 |
4277164186 ps |
| T332 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.1056537972 |
|
|
Jul 11 08:25:03 PM PDT 24 |
Jul 11 08:51:44 PM PDT 24 |
12275916220 ps |
| T1324 |
/workspace/coverage/default/2.chip_sw_aes_entropy.1778573194 |
|
|
Jul 11 08:27:19 PM PDT 24 |
Jul 11 08:32:05 PM PDT 24 |
3261497360 ps |
| T837 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.3197791286 |
|
|
Jul 11 08:29:54 PM PDT 24 |
Jul 11 08:36:19 PM PDT 24 |
3872774420 ps |
| T1325 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.633129005 |
|
|
Jul 11 08:24:49 PM PDT 24 |
Jul 11 09:18:13 PM PDT 24 |
33606468158 ps |
| T1326 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.2923972204 |
|
|
Jul 11 08:12:35 PM PDT 24 |
Jul 11 09:25:09 PM PDT 24 |
14997234912 ps |
| T1327 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.668054000 |
|
|
Jul 11 08:22:04 PM PDT 24 |
Jul 11 08:26:09 PM PDT 24 |
2547875704 ps |
| T1328 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.338659814 |
|
|
Jul 11 08:04:39 PM PDT 24 |
Jul 11 08:21:03 PM PDT 24 |
12176406008 ps |
| T1329 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.506022361 |
|
|
Jul 11 08:22:27 PM PDT 24 |
Jul 11 08:29:15 PM PDT 24 |
3275486672 ps |
| T1330 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.1924813994 |
|
|
Jul 11 08:23:58 PM PDT 24 |
Jul 11 08:44:24 PM PDT 24 |
9595421460 ps |
| T49 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1613183857 |
|
|
Jul 11 08:00:29 PM PDT 24 |
Jul 11 08:07:50 PM PDT 24 |
6254424812 ps |
| T437 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1056039254 |
|
|
Jul 11 08:30:23 PM PDT 24 |
Jul 11 08:55:12 PM PDT 24 |
25981176260 ps |
| T798 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.1687170834 |
|
|
Jul 11 08:38:37 PM PDT 24 |
Jul 11 08:44:45 PM PDT 24 |
3606269188 ps |
| T1331 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.157912725 |
|
|
Jul 11 08:02:30 PM PDT 24 |
Jul 11 08:17:35 PM PDT 24 |
9987650984 ps |
| T1332 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.3187521143 |
|
|
Jul 11 08:23:03 PM PDT 24 |
Jul 11 08:46:43 PM PDT 24 |
5176964760 ps |
| T1333 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.3683587572 |
|
|
Jul 11 08:06:44 PM PDT 24 |
Jul 11 08:25:20 PM PDT 24 |
5671443736 ps |
| T14 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.2133613963 |
|
|
Jul 11 08:07:21 PM PDT 24 |
Jul 11 08:10:57 PM PDT 24 |
3067973380 ps |
| T430 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.3823635794 |
|
|
Jul 11 08:05:08 PM PDT 24 |
Jul 11 08:09:47 PM PDT 24 |
2601874984 ps |
| T431 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.449816483 |
|
|
Jul 11 08:25:01 PM PDT 24 |
Jul 11 08:30:11 PM PDT 24 |
3170865626 ps |
| T309 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.3953450112 |
|
|
Jul 11 08:39:29 PM PDT 24 |
Jul 11 08:45:42 PM PDT 24 |
3614312696 ps |
| T432 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.107167681 |
|
|
Jul 11 08:37:57 PM PDT 24 |
Jul 11 08:45:48 PM PDT 24 |
5007567580 ps |
| T60 |
/workspace/coverage/default/2.chip_sw_alert_test.1349623834 |
|
|
Jul 11 08:22:42 PM PDT 24 |
Jul 11 08:28:23 PM PDT 24 |
3689269216 ps |
| T433 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.1058804135 |
|
|
Jul 11 08:22:35 PM PDT 24 |
Jul 11 08:28:33 PM PDT 24 |
5143328974 ps |
| T434 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.2566960150 |
|
|
Jul 11 08:14:54 PM PDT 24 |
Jul 11 09:18:44 PM PDT 24 |
15686842932 ps |
| T435 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.24278427 |
|
|
Jul 11 08:36:48 PM PDT 24 |
Jul 11 08:48:11 PM PDT 24 |
5183775312 ps |
| T436 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.1414658645 |
|
|
Jul 11 08:37:28 PM PDT 24 |
Jul 11 08:43:38 PM PDT 24 |
3889694842 ps |
| T1334 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.2463149455 |
|
|
Jul 11 08:08:43 PM PDT 24 |
Jul 11 08:22:57 PM PDT 24 |
8630910560 ps |
| T1335 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.4240965465 |
|
|
Jul 11 08:00:09 PM PDT 24 |
Jul 11 11:42:03 PM PDT 24 |
78374064775 ps |
| T1336 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.1947980883 |
|
|
Jul 11 08:38:56 PM PDT 24 |
Jul 11 08:45:55 PM PDT 24 |
4023779542 ps |
| T854 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.1210009035 |
|
|
Jul 11 08:36:36 PM PDT 24 |
Jul 11 08:42:43 PM PDT 24 |
3683439770 ps |
| T1337 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.3803107592 |
|
|
Jul 11 08:27:25 PM PDT 24 |
Jul 11 08:55:55 PM PDT 24 |
8338382414 ps |
| T1338 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.2525811458 |
|
|
Jul 11 08:26:02 PM PDT 24 |
Jul 11 08:30:30 PM PDT 24 |
2319345860 ps |
| T1339 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3957823585 |
|
|
Jul 11 08:23:35 PM PDT 24 |
Jul 11 08:51:26 PM PDT 24 |
18111046221 ps |
| T759 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.1363400613 |
|
|
Jul 11 08:36:52 PM PDT 24 |
Jul 11 08:43:32 PM PDT 24 |
4543047508 ps |
| T793 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.3603407114 |
|
|
Jul 11 08:39:47 PM PDT 24 |
Jul 11 08:46:04 PM PDT 24 |
3814813130 ps |
| T1340 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.748290790 |
|
|
Jul 11 08:02:46 PM PDT 24 |
Jul 11 08:40:33 PM PDT 24 |
24543836540 ps |
| T1341 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.2550312386 |
|
|
Jul 11 08:34:00 PM PDT 24 |
Jul 11 08:46:19 PM PDT 24 |
5378378620 ps |
| T1342 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.514477771 |
|
|
Jul 11 08:24:13 PM PDT 24 |
Jul 11 09:24:28 PM PDT 24 |
22076248756 ps |
| T1343 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.154989593 |
|
|
Jul 11 08:21:42 PM PDT 24 |
Jul 11 08:38:11 PM PDT 24 |
8230235512 ps |
| T850 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.1464708496 |
|
|
Jul 11 08:41:14 PM PDT 24 |
Jul 11 08:46:21 PM PDT 24 |
3424166236 ps |
| T1344 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.3319885734 |
|
|
Jul 11 08:26:11 PM PDT 24 |
Jul 11 08:55:21 PM PDT 24 |
8045625562 ps |
| T50 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.4062331953 |
|
|
Jul 11 08:08:25 PM PDT 24 |
Jul 11 08:18:44 PM PDT 24 |
6357939908 ps |
| T61 |
/workspace/coverage/default/1.chip_sw_alert_test.277279680 |
|
|
Jul 11 08:09:30 PM PDT 24 |
Jul 11 08:14:03 PM PDT 24 |
3489677688 ps |
| T329 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.2270320545 |
|
|
Jul 11 08:04:02 PM PDT 24 |
Jul 11 08:25:25 PM PDT 24 |
6109776774 ps |
| T1345 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3866105184 |
|
|
Jul 11 08:20:59 PM PDT 24 |
Jul 11 08:32:42 PM PDT 24 |
4252277660 ps |
| T1346 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.4214094432 |
|
|
Jul 11 08:07:47 PM PDT 24 |
Jul 11 08:46:38 PM PDT 24 |
24589010682 ps |
| T1347 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.4049476704 |
|
|
Jul 11 08:03:18 PM PDT 24 |
Jul 11 08:07:55 PM PDT 24 |
2817572440 ps |
| T1348 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.2885414332 |
|
|
Jul 11 08:07:24 PM PDT 24 |
Jul 11 08:11:21 PM PDT 24 |
2513262136 ps |
| T325 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.649823010 |
|
|
Jul 11 08:03:49 PM PDT 24 |
Jul 11 08:16:37 PM PDT 24 |
4634823848 ps |
| T1349 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.2671347301 |
|
|
Jul 11 08:08:58 PM PDT 24 |
Jul 11 08:13:48 PM PDT 24 |
3239486056 ps |
| T849 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.3330929817 |
|
|
Jul 11 08:39:31 PM PDT 24 |
Jul 11 08:48:05 PM PDT 24 |
5475702464 ps |
| T1350 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.2373226519 |
|
|
Jul 11 08:06:06 PM PDT 24 |
Jul 11 08:23:29 PM PDT 24 |
6203967634 ps |
| T1351 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.2615184859 |
|
|
Jul 11 08:34:30 PM PDT 24 |
Jul 11 08:58:54 PM PDT 24 |
9154730369 ps |
| T1352 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.783087390 |
|
|
Jul 11 08:11:17 PM PDT 24 |
Jul 11 08:28:55 PM PDT 24 |
7378922408 ps |
| T1353 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.86540425 |
|
|
Jul 11 08:00:35 PM PDT 24 |
Jul 11 10:52:01 PM PDT 24 |
59349765208 ps |
| T1354 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.1685646689 |
|
|
Jul 11 08:28:41 PM PDT 24 |
Jul 11 08:47:43 PM PDT 24 |
7311758808 ps |
| T1355 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.2158542894 |
|
|
Jul 11 08:31:14 PM PDT 24 |
Jul 11 09:26:07 PM PDT 24 |
15654891903 ps |
| T851 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.796019630 |
|
|
Jul 11 08:36:31 PM PDT 24 |
Jul 11 08:44:47 PM PDT 24 |
4365204198 ps |
| T1356 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.1567553815 |
|
|
Jul 11 08:25:13 PM PDT 24 |
Jul 11 08:29:37 PM PDT 24 |
3497503496 ps |
| T1357 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2196630495 |
|
|
Jul 11 08:22:09 PM PDT 24 |
Jul 11 08:30:58 PM PDT 24 |
5674191452 ps |
| T794 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.609872559 |
|
|
Jul 11 08:33:37 PM PDT 24 |
Jul 11 08:39:30 PM PDT 24 |
3548832208 ps |
| T1358 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.1978096339 |
|
|
Jul 11 08:27:33 PM PDT 24 |
Jul 11 09:35:04 PM PDT 24 |
16012671324 ps |
| T1359 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.1528313457 |
|
|
Jul 11 08:24:17 PM PDT 24 |
Jul 11 08:28:14 PM PDT 24 |
2859761360 ps |
| T1360 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.133902601 |
|
|
Jul 11 08:10:18 PM PDT 24 |
Jul 11 09:18:53 PM PDT 24 |
15497227004 ps |
| T1361 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.2008508701 |
|
|
Jul 11 08:26:09 PM PDT 24 |
Jul 11 08:39:07 PM PDT 24 |
6750266910 ps |
| T1362 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.3464779540 |
|
|
Jul 11 08:11:47 PM PDT 24 |
Jul 11 09:13:24 PM PDT 24 |
14556675540 ps |
| T94 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.4278274098 |
|
|
Jul 11 08:37:28 PM PDT 24 |
Jul 11 08:44:42 PM PDT 24 |
3428378442 ps |
| T1363 |
/workspace/coverage/default/0.chip_sw_aes_enc.2647299502 |
|
|
Jul 11 08:04:59 PM PDT 24 |
Jul 11 08:08:21 PM PDT 24 |
2786654858 ps |