Unified Coverage Report :: Group :: tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

Group : tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cored_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_core_ibex__corei_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.rv_dm__sba_agent.cov::m_max_outstanding_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_num_of_outstanding	64	0	64	100.00	100	1	1	0

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	3702381	1			T75	72		T76	1213		T77	104
values[2]	768248	1			T75	47		T76	331		T77	57
values[3]	112644	1			T76	3		T77	6		T255	9
values[4]	58717	1			T255	9		T127	8		T543	1
values[5]	38965	1			T255	9		T127	8		T538	57
values[6]	28820	1			T255	9		T127	8		T538	45
values[7]	23511	1			T255	9		T127	9		T538	35
values[8]	19551	1			T255	9		T127	8		T538	36
values[9]	17882	1			T255	9		T127	9		T538	32
values[10]	16326	1			T255	9		T127	8		T538	22
values[11]	15014	1			T255	9		T127	8		T538	11
values[12]	14279	1			T255	9		T127	8		T538	13
values[13]	13449	1			T255	9		T127	8		T538	10
values[14]	12916	1			T255	9		T127	8		T538	8
values[15]	12127	1			T255	9		T127	8		T538	5
values[16]	11778	1			T255	9		T127	9		T538	7
values[17]	11488	1			T255	9		T127	8		T538	8
values[18]	10947	1			T255	9		T127	9		T538	9
values[19]	10564	1			T255	9		T127	8		T538	20
values[20]	10225	1			T255	9		T127	8		T538	9
values[21]	10078	1			T255	9		T127	8		T538	3
values[22]	9721	1			T255	9		T127	9		T538	9
values[23]	9099	1			T255	9		T127	8		T538	8
values[24]	8904	1			T255	9		T127	8		T538	5
values[25]	8617	1			T255	9		T127	8		T538	4
values[26]	8220	1			T255	9		T127	8		T538	6
values[27]	7780	1			T255	9		T127	8		T538	13
values[28]	7746	1			T255	9		T127	8		T538	14
values[29]	6888	1			T255	9		T127	8		T538	7
values[30]	6662	1			T255	9		T127	8		T538	3
values[31]	6107	1			T255	10		T127	8		T538	7
values[32]	5729	1			T255	9		T127	8		T538	5
values[33]	5443	1			T255	9		T127	8		T538	2
values[34]	4929	1			T255	9		T127	8		T538	4
values[35]	4578	1			T255	9		T127	8		T538	3
values[36]	4371	1			T255	9		T127	8		T538	6
values[37]	4080	1			T255	9		T127	8		T538	3
values[38]	4021	1			T255	9		T127	8		T538	2
values[39]	3814	1			T255	9		T127	8		T538	9
values[40]	3714	1			T255	9		T127	8		T538	10
values[41]	3545	1			T255	9		T127	8		T538	12
values[42]	3556	1			T255	9		T127	9		T538	8
values[43]	3538	1			T255	9		T127	8		T538	2
values[44]	3319	1			T255	9		T127	9		T538	4
values[45]	3278	1			T255	11		T127	9		T538	6
values[46]	3222	1			T255	9		T127	8		T538	11
values[47]	3091	1			T255	9		T127	8		T538	10
values[48]	3086	1			T255	9		T127	8		T538	4
values[49]	3107	1			T255	9		T127	8		T538	3
values[50]	2922	1			T255	9		T127	8		T538	5
values[51]	2964	1			T255	10		T127	8		T538	5
values[52]	2950	1			T255	9		T127	8		T538	4
values[53]	2816	1			T255	9		T127	8		T538	8
values[54]	2797	1			T255	9		T127	8		T538	4
values[55]	2777	1			T255	9		T127	8		T538	3
values[56]	2685	1			T255	10		T127	8		T538	3
values[57]	2654	1			T255	9		T127	9		T538	5
values[58]	2675	1			T255	9		T127	8		T538	4
values[59]	2623	1			T255	9		T127	8		T538	5
values[60]	2644	1			T255	9		T127	8		T538	4
values[61]	3022	1			T255	9		T127	8		T538	2
values[62]	4495	1			T255	9		T127	8		T538	10
values[63]	12617	1			T255	9		T127	9		T538	53
values[64]	237828	1			T255	1670		T127	1635		T538	145

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	4764342	1			T75	126		T76	1170		T77	103
values[2]	823019	1			T75	34		T76	275		T77	23
values[3]	86511	1			T76	6		T77	6		T78	1
values[4]	14946	1			T255	44		T127	40		T556	4
values[5]	5778	1			T255	15		T127	16		T543	1
values[6]	3534	1			T255	8		T127	7		T543	1
values[7]	2341	1			T255	3		T127	2		T498	2
values[8]	1952	1			T255	2		T127	2		T498	1
values[9]	1801	1			T255	2		T127	1		T549	14
values[10]	1688	1			T255	2		T127	1		T549	11
values[11]	1549	1			T255	2		T127	1		T549	14
values[12]	1444	1			T255	2		T127	1		T549	16
values[13]	1246	1			T255	2		T127	1		T549	12
values[14]	1209	1			T255	2		T127	1		T549	7
values[15]	1104	1			T255	2		T127	1		T549	10
values[16]	1056	1			T255	2		T127	1		T549	5
values[17]	1007	1			T255	2		T127	1		T549	6
values[18]	1007	1			T255	2		T127	1		T549	2
values[19]	1016	1			T255	2		T127	1		T549	6
values[20]	1026	1			T255	2		T127	1		T549	7
values[21]	955	1			T255	2		T127	1		T549	4
values[22]	943	1			T255	2		T127	1		T549	8
values[23]	848	1			T255	2		T127	1		T549	14
values[24]	788	1			T255	2		T127	1		T549	12
values[25]	767	1			T255	2		T127	1		T549	15
values[26]	747	1			T255	2		T127	1		T549	7
values[27]	707	1			T255	2		T127	1		T549	12
values[28]	654	1			T255	2		T127	1		T549	9
values[29]	649	1			T255	2		T127	1		T549	4
values[30]	594	1			T255	2		T127	1		T549	1
values[31]	606	1			T255	2		T127	1		T549	1
values[32]	626	1			T255	2		T127	1		T549	1
values[33]	556	1			T255	2		T127	1		T549	1
values[34]	581	1			T255	2		T127	1		T549	2
values[35]	573	1			T255	2		T127	1		T549	1
values[36]	526	1			T255	2		T127	1		T549	2
values[37]	515	1			T255	2		T127	1		T549	1
values[38]	486	1			T255	2		T127	1		T549	6
values[39]	569	1			T255	2		T127	1		T549	5
values[40]	521	1			T255	2		T127	2		T549	2
values[41]	494	1			T255	2		T127	1		T549	2
values[42]	449	1			T255	2		T127	1		T549	1
values[43]	445	1			T255	2		T127	1		T549	1
values[44]	424	1			T255	2		T127	1		T549	1
values[45]	451	1			T255	2		T127	1		T549	1
values[46]	473	1			T255	2		T127	1		T549	1
values[47]	470	1			T255	2		T127	1		T549	3
values[48]	453	1			T255	2		T127	1		T549	1
values[49]	435	1			T255	2		T127	1		T549	3
values[50]	454	1			T255	2		T127	1		T549	1
values[51]	430	1			T255	2		T127	1		T549	2
values[52]	451	1			T255	2		T127	1		T549	1
values[53]	444	1			T255	2		T127	1		T549	1
values[54]	442	1			T255	2		T127	1		T549	4
values[55]	377	1			T255	2		T127	1		T549	1
values[56]	353	1			T255	2		T127	1		T549	2
values[57]	376	1			T255	2		T127	1		T549	1
values[58]	383	1			T255	2		T127	1		T549	2
values[59]	409	1			T255	2		T127	1		T549	1
values[60]	390	1			T255	2		T127	1		T549	1
values[61]	457	1			T255	2		T127	1		T549	4
values[62]	721	1			T255	2		T127	1		T549	5
values[63]	2980	1			T255	2		T127	1		T549	18
values[64]	27595	1			T255	399		T127	144		T549	44

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	559776	1			T75	1		T76	11		T77	1
values[2]	2610506	1			T75	121		T76	1331		T77	9
values[3]	1196964	1			T75	49		T76	355		T77	179
values[4]	158681	1			T76	1		T77	7		T255	9
values[5]	81877	1			T255	9		T127	8		T556	1
values[6]	52506	1			T255	9		T127	8		T538	43
values[7]	38204	1			T255	9		T127	8		T538	25
values[8]	29938	1			T255	9		T127	8		T538	23
values[9]	26045	1			T255	9		T127	8		T538	41
values[10]	22342	1			T255	9		T127	8		T538	27
values[11]	20288	1			T255	9		T127	8		T538	27
values[12]	18552	1			T255	9		T127	8		T538	24
values[13]	17384	1			T255	9		T127	8		T538	27
values[14]	15876	1			T255	9		T127	8		T538	34
values[15]	14875	1			T255	9		T127	8		T538	30
values[16]	14606	1			T255	9		T127	8		T538	24
values[17]	14131	1			T255	9		T127	8		T538	13
values[18]	13649	1			T255	9		T127	8		T538	14
values[19]	13062	1			T255	9		T127	8		T538	15
values[20]	12306	1			T255	9		T127	8		T538	6
values[21]	11846	1			T255	9		T127	8		T538	6
values[22]	11456	1			T255	9		T127	8		T538	8
values[23]	11087	1			T255	9		T127	8		T538	4
values[24]	10993	1			T255	9		T127	8		T538	6
values[25]	10576	1			T255	9		T127	8		T538	2
values[26]	9875	1			T255	9		T127	8		T538	2
values[27]	9163	1			T255	9		T127	8		T538	2
values[28]	8528	1			T255	9		T127	8		T538	7
values[29]	8250	1			T255	9		T127	8		T538	11
values[30]	7861	1			T255	9		T127	8		T538	12
values[31]	7316	1			T255	10		T127	8		T538	2
values[32]	6686	1			T255	9		T127	8		T538	10
values[33]	6078	1			T255	9		T127	8		T538	8
values[34]	5579	1			T255	9		T127	8		T538	6
values[35]	5227	1			T255	9		T127	8		T538	4
values[36]	4751	1			T255	9		T127	8		T538	3
values[37]	4542	1			T255	9		T127	8		T538	5
values[38]	4419	1			T255	9		T127	8		T538	5
values[39]	4274	1			T255	9		T127	8		T538	6
values[40]	4182	1			T255	10		T127	8		T538	4
values[41]	3965	1			T255	9		T127	8		T538	2
values[42]	3892	1			T255	9		T127	8		T538	4
values[43]	3904	1			T255	9		T127	8		T538	7
values[44]	3821	1			T255	9		T127	8		T538	9
values[45]	3706	1			T255	9		T127	8		T538	9
values[46]	3610	1			T255	9		T127	8		T538	6
values[47]	3529	1			T255	9		T127	8		T538	3
values[48]	3507	1			T255	10		T127	8		T538	6
values[49]	3434	1			T255	9		T127	8		T538	5
values[50]	3372	1			T255	9		T127	8		T538	4
values[51]	3514	1			T255	9		T127	8		T538	6
values[52]	3364	1			T255	10		T127	8		T538	4
values[53]	3277	1			T255	9		T127	8		T538	6
values[54]	3331	1			T255	9		T127	8		T538	5
values[55]	3206	1			T255	9		T127	8		T538	3
values[56]	3209	1			T255	9		T127	8		T538	3
values[57]	3038	1			T255	9		T127	8		T538	4
values[58]	2977	1			T255	9		T127	8		T538	4
values[59]	2899	1			T255	9		T127	8		T538	3
values[60]	2957	1			T255	9		T127	8		T538	2
values[61]	3168	1			T255	9		T127	8		T538	2
values[62]	4254	1			T255	9		T127	8		T538	7
values[63]	10725	1			T255	11		T127	8		T538	41
values[64]	232826	1			T255	1820		T127	1408		T538	96