| T1024 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.951077137 |
|
|
Jul 17 08:35:15 PM PDT 24 |
Jul 17 08:39:41 PM PDT 24 |
3253156160 ps |
| T261 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.1328610206 |
|
|
Jul 17 08:48:05 PM PDT 24 |
Jul 17 08:53:35 PM PDT 24 |
3400415308 ps |
| T1025 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.3407631576 |
|
|
Jul 17 08:38:44 PM PDT 24 |
Jul 17 09:04:22 PM PDT 24 |
7837887564 ps |
| T727 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.932254022 |
|
|
Jul 17 08:28:18 PM PDT 24 |
Jul 17 08:37:08 PM PDT 24 |
4088794476 ps |
| T1026 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.4220908993 |
|
|
Jul 17 08:56:17 PM PDT 24 |
Jul 17 09:47:16 PM PDT 24 |
14943273877 ps |
| T1027 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.1990659266 |
|
|
Jul 17 08:38:03 PM PDT 24 |
Jul 17 10:05:23 PM PDT 24 |
22701148170 ps |
| T1028 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.3379184009 |
|
|
Jul 17 08:37:44 PM PDT 24 |
Jul 17 08:41:21 PM PDT 24 |
2480020222 ps |
| T178 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.2360863860 |
|
|
Jul 17 08:39:43 PM PDT 24 |
Jul 17 08:45:23 PM PDT 24 |
3583167730 ps |
| T244 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.2362820611 |
|
|
Jul 17 08:45:53 PM PDT 24 |
Jul 17 08:54:05 PM PDT 24 |
4735080200 ps |
| T1029 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.658060177 |
|
|
Jul 17 08:48:44 PM PDT 24 |
Jul 17 09:14:20 PM PDT 24 |
6835431616 ps |
| T773 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.945708758 |
|
|
Jul 17 08:57:37 PM PDT 24 |
Jul 17 09:05:18 PM PDT 24 |
3716646040 ps |
| T758 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.1202904262 |
|
|
Jul 17 08:56:19 PM PDT 24 |
Jul 17 09:07:39 PM PDT 24 |
4847913650 ps |
| T1030 |
/workspace/coverage/default/2.chip_sw_edn_kat.2846843719 |
|
|
Jul 17 08:47:14 PM PDT 24 |
Jul 17 08:58:42 PM PDT 24 |
3375241400 ps |
| T818 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.2606768805 |
|
|
Jul 17 08:56:04 PM PDT 24 |
Jul 17 09:06:54 PM PDT 24 |
4781540576 ps |
| T469 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.3698056869 |
|
|
Jul 17 08:33:36 PM PDT 24 |
Jul 17 09:05:42 PM PDT 24 |
11480695914 ps |
| T1031 |
/workspace/coverage/default/0.chip_sw_aes_idle.490928776 |
|
|
Jul 17 08:32:24 PM PDT 24 |
Jul 17 08:37:54 PM PDT 24 |
3002299032 ps |
| T1032 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.3166853416 |
|
|
Jul 17 08:47:36 PM PDT 24 |
Jul 17 08:52:46 PM PDT 24 |
2503599772 ps |
| T245 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.1634195664 |
|
|
Jul 17 09:02:10 PM PDT 24 |
Jul 17 09:11:37 PM PDT 24 |
5662632300 ps |
| T8 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.1130309903 |
|
|
Jul 17 08:38:20 PM PDT 24 |
Jul 17 08:43:25 PM PDT 24 |
4839970604 ps |
| T702 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.3729615804 |
|
|
Jul 17 08:32:02 PM PDT 24 |
Jul 17 08:38:27 PM PDT 24 |
5996688438 ps |
| T703 |
/workspace/coverage/default/2.chip_sw_example_concurrency.1526982443 |
|
|
Jul 17 08:43:01 PM PDT 24 |
Jul 17 08:47:20 PM PDT 24 |
3020607594 ps |
| T704 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.2390528854 |
|
|
Jul 17 08:38:26 PM PDT 24 |
Jul 17 09:36:13 PM PDT 24 |
14618089516 ps |
| T705 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.1729427409 |
|
|
Jul 17 09:05:47 PM PDT 24 |
Jul 17 09:12:33 PM PDT 24 |
3718364072 ps |
| T706 |
/workspace/coverage/default/0.chip_sw_edn_kat.970210050 |
|
|
Jul 17 08:30:50 PM PDT 24 |
Jul 17 08:43:19 PM PDT 24 |
3738965966 ps |
| T292 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.2412778882 |
|
|
Jul 17 08:49:39 PM PDT 24 |
Jul 17 09:00:35 PM PDT 24 |
5364121657 ps |
| T707 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.2399692940 |
|
|
Jul 17 08:50:15 PM PDT 24 |
Jul 17 08:52:33 PM PDT 24 |
2158811155 ps |
| T708 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.1810814208 |
|
|
Jul 17 09:01:22 PM PDT 24 |
Jul 17 09:06:34 PM PDT 24 |
3584376072 ps |
| T709 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.2876856876 |
|
|
Jul 17 08:59:42 PM PDT 24 |
Jul 17 09:05:40 PM PDT 24 |
3647895390 ps |
| T201 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.643904140 |
|
|
Jul 17 08:34:28 PM PDT 24 |
Jul 17 08:44:35 PM PDT 24 |
5207479489 ps |
| T361 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.1103215469 |
|
|
Jul 17 08:49:06 PM PDT 24 |
Jul 17 08:53:17 PM PDT 24 |
2748822275 ps |
| T1033 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.1798322804 |
|
|
Jul 17 08:31:34 PM PDT 24 |
Jul 17 08:35:51 PM PDT 24 |
2471720295 ps |
| T347 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.1593655955 |
|
|
Jul 17 08:29:18 PM PDT 24 |
Jul 17 08:40:40 PM PDT 24 |
4835260478 ps |
| T308 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.2745976186 |
|
|
Jul 17 08:32:20 PM PDT 24 |
Jul 17 08:37:25 PM PDT 24 |
3516044059 ps |
| T1034 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.2487309622 |
|
|
Jul 17 08:53:17 PM PDT 24 |
Jul 17 08:57:33 PM PDT 24 |
2951441288 ps |
| T358 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.309550515 |
|
|
Jul 17 08:36:47 PM PDT 24 |
Jul 17 08:41:58 PM PDT 24 |
3569885388 ps |
| T1035 |
/workspace/coverage/default/2.rom_e2e_smoke.218022831 |
|
|
Jul 17 08:56:05 PM PDT 24 |
Jul 17 09:52:19 PM PDT 24 |
15705662494 ps |
| T774 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.563138248 |
|
|
Jul 17 09:03:50 PM PDT 24 |
Jul 17 09:10:30 PM PDT 24 |
4426867020 ps |
| T815 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.900417935 |
|
|
Jul 17 09:03:22 PM PDT 24 |
Jul 17 09:12:24 PM PDT 24 |
3660331460 ps |
| T1036 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.15914913 |
|
|
Jul 17 08:33:53 PM PDT 24 |
Jul 17 08:53:32 PM PDT 24 |
11147823795 ps |
| T1037 |
/workspace/coverage/default/1.chip_tap_straps_prod.189645922 |
|
|
Jul 17 08:40:29 PM PDT 24 |
Jul 17 09:07:16 PM PDT 24 |
14529058787 ps |
| T1038 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.1101844488 |
|
|
Jul 17 08:59:21 PM PDT 24 |
Jul 17 09:05:13 PM PDT 24 |
3045141520 ps |
| T1039 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.1710822795 |
|
|
Jul 17 08:45:37 PM PDT 24 |
Jul 17 09:52:54 PM PDT 24 |
14841311000 ps |
| T740 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.3521834591 |
|
|
Jul 17 08:31:34 PM PDT 24 |
Jul 17 08:38:04 PM PDT 24 |
3400420362 ps |
| T91 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.1542129420 |
|
|
Jul 17 08:52:46 PM PDT 24 |
Jul 17 08:59:42 PM PDT 24 |
3804989322 ps |
| T1040 |
/workspace/coverage/default/3.chip_tap_straps_rma.2636821083 |
|
|
Jul 17 08:54:00 PM PDT 24 |
Jul 17 08:58:09 PM PDT 24 |
3068162996 ps |
| T816 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.2041156438 |
|
|
Jul 17 08:56:12 PM PDT 24 |
Jul 17 09:01:52 PM PDT 24 |
3296528888 ps |
| T812 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.3571622384 |
|
|
Jul 17 08:55:05 PM PDT 24 |
Jul 17 09:05:18 PM PDT 24 |
4104530040 ps |
| T339 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.1171200977 |
|
|
Jul 17 08:31:29 PM PDT 24 |
Jul 17 09:00:44 PM PDT 24 |
13157733310 ps |
| T687 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.1834604258 |
|
|
Jul 17 08:52:28 PM PDT 24 |
Jul 17 08:54:19 PM PDT 24 |
2142892805 ps |
| T227 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.2487098085 |
|
|
Jul 17 08:37:30 PM PDT 24 |
Jul 17 09:12:25 PM PDT 24 |
8629592900 ps |
| T40 |
/workspace/coverage/default/1.chip_sw_gpio.477376051 |
|
|
Jul 17 08:32:49 PM PDT 24 |
Jul 17 08:39:41 PM PDT 24 |
3689697032 ps |
| T1041 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.3257953184 |
|
|
Jul 17 08:55:50 PM PDT 24 |
Jul 17 09:00:56 PM PDT 24 |
3954253528 ps |
| T743 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.274162914 |
|
|
Jul 17 08:59:47 PM PDT 24 |
Jul 17 09:08:42 PM PDT 24 |
5326751096 ps |
| T777 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.3635625921 |
|
|
Jul 17 08:59:29 PM PDT 24 |
Jul 17 09:05:40 PM PDT 24 |
3749570216 ps |
| T781 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.1537207911 |
|
|
Jul 17 08:57:58 PM PDT 24 |
Jul 17 09:04:46 PM PDT 24 |
3869014244 ps |
| T1042 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.1517106203 |
|
|
Jul 17 08:55:52 PM PDT 24 |
Jul 17 09:05:19 PM PDT 24 |
5195329070 ps |
| T1043 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.282145700 |
|
|
Jul 17 08:47:48 PM PDT 24 |
Jul 17 08:56:54 PM PDT 24 |
5006506744 ps |
| T763 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.1386089086 |
|
|
Jul 17 08:57:30 PM PDT 24 |
Jul 17 09:04:57 PM PDT 24 |
3611435064 ps |
| T1044 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.848385135 |
|
|
Jul 17 08:57:49 PM PDT 24 |
Jul 17 09:10:12 PM PDT 24 |
8513213752 ps |
| T1045 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.3280202629 |
|
|
Jul 17 08:38:59 PM PDT 24 |
Jul 17 09:47:09 PM PDT 24 |
29701111767 ps |
| T1046 |
/workspace/coverage/default/1.chip_tap_straps_rma.408128117 |
|
|
Jul 17 08:37:54 PM PDT 24 |
Jul 17 08:42:52 PM PDT 24 |
3509696605 ps |
| T89 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.418358899 |
|
|
Jul 17 08:54:53 PM PDT 24 |
Jul 17 09:00:27 PM PDT 24 |
3095715643 ps |
| T235 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.3362309211 |
|
|
Jul 17 08:31:48 PM PDT 24 |
Jul 17 10:04:00 PM PDT 24 |
48332369470 ps |
| T753 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.1835481145 |
|
|
Jul 17 08:57:01 PM PDT 24 |
Jul 17 09:04:32 PM PDT 24 |
3502078410 ps |
| T736 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.2078798808 |
|
|
Jul 17 09:02:45 PM PDT 24 |
Jul 17 09:08:50 PM PDT 24 |
3183822024 ps |
| T239 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.1702841720 |
|
|
Jul 17 08:44:38 PM PDT 24 |
Jul 17 08:50:50 PM PDT 24 |
4620862019 ps |
| T1047 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1322956367 |
|
|
Jul 17 08:53:16 PM PDT 24 |
Jul 17 09:21:36 PM PDT 24 |
13476430261 ps |
| T737 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.3267331901 |
|
|
Jul 17 08:48:54 PM PDT 24 |
Jul 17 09:11:02 PM PDT 24 |
7591307806 ps |
| T1048 |
/workspace/coverage/default/2.chip_sw_aes_enc.2381103166 |
|
|
Jul 17 08:48:00 PM PDT 24 |
Jul 17 08:52:21 PM PDT 24 |
2505582890 ps |
| T1049 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.4188531654 |
|
|
Jul 17 08:30:15 PM PDT 24 |
Jul 17 08:52:26 PM PDT 24 |
6889384678 ps |
| T377 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.3165593137 |
|
|
Jul 17 08:58:03 PM PDT 24 |
Jul 17 09:05:21 PM PDT 24 |
3348594124 ps |
| T300 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.2153059673 |
|
|
Jul 17 09:01:23 PM PDT 24 |
Jul 17 09:07:51 PM PDT 24 |
4049406488 ps |
| T1050 |
/workspace/coverage/default/1.chip_sw_aes_enc.2512120278 |
|
|
Jul 17 08:38:45 PM PDT 24 |
Jul 17 08:43:21 PM PDT 24 |
2559232060 ps |
| T367 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.407080439 |
|
|
Jul 17 08:45:34 PM PDT 24 |
Jul 17 08:49:16 PM PDT 24 |
3214347880 ps |
| T1051 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.4087613962 |
|
|
Jul 17 08:30:09 PM PDT 24 |
Jul 17 08:52:31 PM PDT 24 |
9737703288 ps |
| T739 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.2028525966 |
|
|
Jul 17 08:54:52 PM PDT 24 |
Jul 17 09:01:02 PM PDT 24 |
3118437956 ps |
| T746 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.2880912076 |
|
|
Jul 17 08:56:20 PM PDT 24 |
Jul 17 09:07:12 PM PDT 24 |
5666811080 ps |
| T134 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.2393098891 |
|
|
Jul 17 08:32:13 PM PDT 24 |
Jul 17 08:43:13 PM PDT 24 |
7077149770 ps |
| T764 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.3400741809 |
|
|
Jul 17 09:03:44 PM PDT 24 |
Jul 17 09:12:18 PM PDT 24 |
4917845444 ps |
| T1052 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.3258994632 |
|
|
Jul 17 08:34:18 PM PDT 24 |
Jul 17 09:25:30 PM PDT 24 |
20159833291 ps |
| T1053 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.591544581 |
|
|
Jul 17 08:36:30 PM PDT 24 |
Jul 17 08:50:47 PM PDT 24 |
4400456312 ps |
| T1054 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.588163449 |
|
|
Jul 17 08:46:18 PM PDT 24 |
Jul 17 08:54:40 PM PDT 24 |
5597550203 ps |
| T783 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.3168703015 |
|
|
Jul 17 08:58:01 PM PDT 24 |
Jul 17 09:09:16 PM PDT 24 |
4633261160 ps |
| T1055 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.2348666382 |
|
|
Jul 17 08:48:01 PM PDT 24 |
Jul 17 09:09:30 PM PDT 24 |
7778415784 ps |
| T1056 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.1055872904 |
|
|
Jul 17 08:51:41 PM PDT 24 |
Jul 17 08:55:48 PM PDT 24 |
2964722346 ps |
| T810 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.3399280187 |
|
|
Jul 17 08:55:24 PM PDT 24 |
Jul 17 09:01:27 PM PDT 24 |
3533930150 ps |
| T1057 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.1669818314 |
|
|
Jul 17 08:32:19 PM PDT 24 |
Jul 17 08:36:42 PM PDT 24 |
2854404728 ps |
| T1058 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1216020640 |
|
|
Jul 17 08:36:32 PM PDT 24 |
Jul 17 09:27:02 PM PDT 24 |
26699025060 ps |
| T673 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.2391415810 |
|
|
Jul 17 08:31:41 PM PDT 24 |
Jul 18 02:02:18 AM PDT 24 |
137366621629 ps |
| T1059 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.4098770105 |
|
|
Jul 17 08:46:07 PM PDT 24 |
Jul 17 09:48:28 PM PDT 24 |
16853986390 ps |
| T1060 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.1442362579 |
|
|
Jul 17 09:02:01 PM PDT 24 |
Jul 17 09:12:48 PM PDT 24 |
5596360610 ps |
| T1061 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3099799614 |
|
|
Jul 17 08:36:47 PM PDT 24 |
Jul 17 08:50:35 PM PDT 24 |
19707211660 ps |
| T688 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.98652055 |
|
|
Jul 17 08:32:45 PM PDT 24 |
Jul 17 08:35:54 PM PDT 24 |
3551409412 ps |
| T202 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.3453364402 |
|
|
Jul 17 08:49:59 PM PDT 24 |
Jul 17 09:02:16 PM PDT 24 |
6843793854 ps |
| T1062 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.3658454570 |
|
|
Jul 17 08:45:59 PM PDT 24 |
Jul 17 08:58:40 PM PDT 24 |
4347928380 ps |
| T13 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.3977214103 |
|
|
Jul 17 08:33:28 PM PDT 24 |
Jul 17 08:38:09 PM PDT 24 |
4075398326 ps |
| T336 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.111887561 |
|
|
Jul 17 08:43:10 PM PDT 24 |
Jul 17 09:00:33 PM PDT 24 |
6105685232 ps |
| T741 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.2531845952 |
|
|
Jul 17 08:57:35 PM PDT 24 |
Jul 17 09:03:39 PM PDT 24 |
3616358224 ps |
| T1063 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.1071558777 |
|
|
Jul 17 08:33:32 PM PDT 24 |
Jul 17 08:57:15 PM PDT 24 |
8953164232 ps |
| T338 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.385698665 |
|
|
Jul 17 08:50:46 PM PDT 24 |
Jul 17 09:00:37 PM PDT 24 |
4075463960 ps |
| T728 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.619674590 |
|
|
Jul 17 08:57:14 PM PDT 24 |
Jul 17 09:09:11 PM PDT 24 |
5877814924 ps |
| T83 |
/workspace/coverage/default/0.chip_jtag_csr_rw.821961798 |
|
|
Jul 17 08:22:31 PM PDT 24 |
Jul 17 08:59:06 PM PDT 24 |
19460769290 ps |
| T1064 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.1777432908 |
|
|
Jul 17 08:28:39 PM PDT 24 |
Jul 17 08:33:21 PM PDT 24 |
7482260010 ps |
| T689 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.654437541 |
|
|
Jul 17 08:48:15 PM PDT 24 |
Jul 17 08:50:27 PM PDT 24 |
2880708782 ps |
| T1065 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.3724463837 |
|
|
Jul 17 08:56:36 PM PDT 24 |
Jul 17 09:08:19 PM PDT 24 |
6146961556 ps |
| T793 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.3947100175 |
|
|
Jul 17 08:55:35 PM PDT 24 |
Jul 17 09:06:49 PM PDT 24 |
5328517700 ps |
| T1066 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.886983782 |
|
|
Jul 17 08:51:19 PM PDT 24 |
Jul 17 09:03:24 PM PDT 24 |
4446113684 ps |
| T790 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.770847190 |
|
|
Jul 17 09:01:16 PM PDT 24 |
Jul 17 09:07:47 PM PDT 24 |
3817030224 ps |
| T738 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.3716724060 |
|
|
Jul 17 08:38:49 PM PDT 24 |
Jul 17 09:03:54 PM PDT 24 |
11936504136 ps |
| T1067 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.4253259850 |
|
|
Jul 17 08:39:01 PM PDT 24 |
Jul 17 09:43:10 PM PDT 24 |
15327956530 ps |
| T759 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.1166205806 |
|
|
Jul 17 08:58:09 PM PDT 24 |
Jul 17 09:08:52 PM PDT 24 |
5916351310 ps |
| T366 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.2145779659 |
|
|
Jul 17 08:27:36 PM PDT 24 |
Jul 17 08:39:05 PM PDT 24 |
5210105370 ps |
| T212 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.2492603678 |
|
|
Jul 17 08:29:30 PM PDT 24 |
Jul 17 09:03:33 PM PDT 24 |
23408394584 ps |
| T1068 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.227001461 |
|
|
Jul 17 08:31:22 PM PDT 24 |
Jul 17 09:44:51 PM PDT 24 |
17057537648 ps |
| T1069 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.3430471128 |
|
|
Jul 17 08:34:30 PM PDT 24 |
Jul 17 08:46:31 PM PDT 24 |
4816784222 ps |
| T471 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.949320758 |
|
|
Jul 17 08:58:19 PM PDT 24 |
Jul 17 09:06:00 PM PDT 24 |
4210888430 ps |
| T807 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.1607957677 |
|
|
Jul 17 08:58:10 PM PDT 24 |
Jul 17 09:03:43 PM PDT 24 |
3083001000 ps |
| T50 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.325767310 |
|
|
Jul 17 08:58:34 PM PDT 24 |
Jul 17 09:07:43 PM PDT 24 |
6529519042 ps |
| T1070 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.3169163146 |
|
|
Jul 17 08:45:21 PM PDT 24 |
Jul 17 08:48:40 PM PDT 24 |
2548380926 ps |
| T1071 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.2808782586 |
|
|
Jul 17 08:38:06 PM PDT 24 |
Jul 17 09:43:00 PM PDT 24 |
16070430820 ps |
| T1072 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.3076571696 |
|
|
Jul 17 08:37:07 PM PDT 24 |
Jul 17 08:49:28 PM PDT 24 |
7456883807 ps |
| T356 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.3588686555 |
|
|
Jul 17 08:32:56 PM PDT 24 |
Jul 17 08:45:25 PM PDT 24 |
5403546044 ps |
| T1073 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.3447933640 |
|
|
Jul 17 08:38:36 PM PDT 24 |
Jul 17 09:47:11 PM PDT 24 |
15575325560 ps |
| T1074 |
/workspace/coverage/default/0.chip_sw_aes_enc.2993978001 |
|
|
Jul 17 08:29:09 PM PDT 24 |
Jul 17 08:33:49 PM PDT 24 |
3300228040 ps |
| T309 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.3069774496 |
|
|
Jul 17 08:28:56 PM PDT 24 |
Jul 17 08:32:51 PM PDT 24 |
3755057160 ps |
| T725 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.2839308573 |
|
|
Jul 17 08:59:56 PM PDT 24 |
Jul 17 09:11:43 PM PDT 24 |
5212368458 ps |
| T1075 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.2819202419 |
|
|
Jul 17 08:31:59 PM PDT 24 |
Jul 17 08:56:25 PM PDT 24 |
9271167810 ps |
| T386 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.298969066 |
|
|
Jul 17 08:52:29 PM PDT 24 |
Jul 17 09:00:28 PM PDT 24 |
5421128396 ps |
| T24 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.2752973988 |
|
|
Jul 17 08:35:15 PM PDT 24 |
Jul 17 08:40:52 PM PDT 24 |
2617651360 ps |
| T162 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.2347176743 |
|
|
Jul 17 08:32:53 PM PDT 24 |
Jul 17 08:40:43 PM PDT 24 |
5376112740 ps |
| T569 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.2147339003 |
|
|
Jul 17 08:41:16 PM PDT 24 |
Jul 17 08:52:49 PM PDT 24 |
5288175240 ps |
| T1076 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2575565257 |
|
|
Jul 17 08:39:36 PM PDT 24 |
Jul 17 08:47:51 PM PDT 24 |
5617246456 ps |
| T1077 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.2874666591 |
|
|
Jul 17 08:31:53 PM PDT 24 |
Jul 17 09:01:30 PM PDT 24 |
7695143664 ps |
| T1078 |
/workspace/coverage/default/0.rom_e2e_smoke.949655683 |
|
|
Jul 17 08:38:00 PM PDT 24 |
Jul 17 09:42:27 PM PDT 24 |
15356952750 ps |
| T769 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.1590534177 |
|
|
Jul 17 08:58:04 PM PDT 24 |
Jul 17 09:04:15 PM PDT 24 |
3256994184 ps |
| T811 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.3836769935 |
|
|
Jul 17 08:57:02 PM PDT 24 |
Jul 17 09:03:13 PM PDT 24 |
3983246014 ps |
| T1079 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.506595453 |
|
|
Jul 17 08:38:51 PM PDT 24 |
Jul 17 08:46:06 PM PDT 24 |
4746886324 ps |
| T1080 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.2387014366 |
|
|
Jul 17 08:38:54 PM PDT 24 |
Jul 17 10:29:17 PM PDT 24 |
30628566152 ps |
| T1081 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.3240830573 |
|
|
Jul 17 08:35:44 PM PDT 24 |
Jul 17 08:46:22 PM PDT 24 |
4007824340 ps |
| T1082 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.300625242 |
|
|
Jul 17 08:27:39 PM PDT 24 |
Jul 17 11:24:41 PM PDT 24 |
58074665368 ps |
| T684 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.2207015314 |
|
|
Jul 17 08:49:27 PM PDT 24 |
Jul 17 09:02:54 PM PDT 24 |
5670847362 ps |
| T686 |
/workspace/coverage/default/4.chip_tap_straps_dev.1097430371 |
|
|
Jul 17 08:52:58 PM PDT 24 |
Jul 17 09:07:51 PM PDT 24 |
9282029312 ps |
| T1083 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.794376403 |
|
|
Jul 17 08:29:31 PM PDT 24 |
Jul 17 09:05:36 PM PDT 24 |
25959750370 ps |
| T1084 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.1360220532 |
|
|
Jul 17 08:36:18 PM PDT 24 |
Jul 17 09:42:00 PM PDT 24 |
15528445920 ps |
| T416 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.4287993887 |
|
|
Jul 17 09:05:36 PM PDT 24 |
Jul 17 09:13:12 PM PDT 24 |
4122661184 ps |
| T1085 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.2161757030 |
|
|
Jul 17 08:39:56 PM PDT 24 |
Jul 17 08:49:23 PM PDT 24 |
4162804458 ps |
| T791 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.1822520944 |
|
|
Jul 17 08:58:11 PM PDT 24 |
Jul 17 09:08:30 PM PDT 24 |
4451922696 ps |
| T1086 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.1937520221 |
|
|
Jul 17 08:28:29 PM PDT 24 |
Jul 18 12:21:11 AM PDT 24 |
78290826736 ps |
| T1087 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.2574077583 |
|
|
Jul 17 08:29:54 PM PDT 24 |
Jul 17 08:34:40 PM PDT 24 |
3169603476 ps |
| T1088 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.1970666910 |
|
|
Jul 17 08:50:27 PM PDT 24 |
Jul 17 08:55:44 PM PDT 24 |
3170170357 ps |
| T800 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.3281179774 |
|
|
Jul 17 09:01:51 PM PDT 24 |
Jul 17 09:12:41 PM PDT 24 |
5696864448 ps |
| T1089 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.1428044569 |
|
|
Jul 17 08:48:43 PM PDT 24 |
Jul 17 09:02:40 PM PDT 24 |
6388541740 ps |
| T394 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.1528213941 |
|
|
Jul 17 08:39:13 PM PDT 24 |
Jul 17 10:25:56 PM PDT 24 |
24890581440 ps |
| T373 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.3226078292 |
|
|
Jul 17 08:44:22 PM PDT 24 |
Jul 17 08:52:55 PM PDT 24 |
2832236530 ps |
| T1090 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.1601336851 |
|
|
Jul 17 08:34:51 PM PDT 24 |
Jul 17 10:04:09 PM PDT 24 |
23730509250 ps |
| T1091 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.130522595 |
|
|
Jul 17 08:38:27 PM PDT 24 |
Jul 17 08:56:50 PM PDT 24 |
7673098402 ps |
| T767 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.508257000 |
|
|
Jul 17 08:59:36 PM PDT 24 |
Jul 17 09:11:03 PM PDT 24 |
4772092996 ps |
| T1092 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.3053965675 |
|
|
Jul 17 08:28:59 PM PDT 24 |
Jul 17 08:57:09 PM PDT 24 |
13242398730 ps |
| T65 |
/workspace/coverage/default/0.chip_sw_alert_test.4052076009 |
|
|
Jul 17 08:32:20 PM PDT 24 |
Jul 17 08:36:40 PM PDT 24 |
3737583632 ps |
| T418 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1122599086 |
|
|
Jul 17 08:49:52 PM PDT 24 |
Jul 17 09:16:36 PM PDT 24 |
23181882680 ps |
| T1093 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.3018254991 |
|
|
Jul 17 08:36:33 PM PDT 24 |
Jul 17 09:32:05 PM PDT 24 |
14858677496 ps |
| T778 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.3710068352 |
|
|
Jul 17 09:06:05 PM PDT 24 |
Jul 17 09:12:34 PM PDT 24 |
4228625160 ps |
| T1094 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.1057591524 |
|
|
Jul 17 08:43:35 PM PDT 24 |
Jul 17 09:06:19 PM PDT 24 |
9062732690 ps |
| T1095 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.1871849629 |
|
|
Jul 17 08:56:13 PM PDT 24 |
Jul 17 09:04:48 PM PDT 24 |
5361152348 ps |
| T1096 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.3271003351 |
|
|
Jul 17 08:53:33 PM PDT 24 |
Jul 17 09:19:04 PM PDT 24 |
7949139250 ps |
| T1097 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.4155968677 |
|
|
Jul 17 08:33:01 PM PDT 24 |
Jul 17 08:37:20 PM PDT 24 |
2193294826 ps |
| T1098 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.4112191620 |
|
|
Jul 17 08:57:46 PM PDT 24 |
Jul 17 09:17:09 PM PDT 24 |
10601243342 ps |
| T1099 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.4216847279 |
|
|
Jul 17 08:55:47 PM PDT 24 |
Jul 17 09:02:56 PM PDT 24 |
3786278712 ps |
| T1100 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.2957038792 |
|
|
Jul 17 08:39:39 PM PDT 24 |
Jul 17 08:53:01 PM PDT 24 |
7413941640 ps |
| T1101 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.3134684555 |
|
|
Jul 17 08:38:09 PM PDT 24 |
Jul 17 10:15:03 PM PDT 24 |
23477100792 ps |
| T1102 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.3126076068 |
|
|
Jul 17 08:35:45 PM PDT 24 |
Jul 17 08:39:47 PM PDT 24 |
3308601522 ps |
| T1103 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2253804310 |
|
|
Jul 17 08:50:16 PM PDT 24 |
Jul 17 09:22:33 PM PDT 24 |
12530690974 ps |
| T772 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.2449500142 |
|
|
Jul 17 09:00:38 PM PDT 24 |
Jul 17 09:12:44 PM PDT 24 |
5736929984 ps |
| T1104 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.780930834 |
|
|
Jul 17 08:41:55 PM PDT 24 |
Jul 17 09:32:59 PM PDT 24 |
11563954368 ps |
| T779 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.273119847 |
|
|
Jul 17 09:02:51 PM PDT 24 |
Jul 17 09:08:20 PM PDT 24 |
3578414200 ps |
| T203 |
/workspace/coverage/default/2.chip_jtag_mem_access.577298205 |
|
|
Jul 17 08:42:23 PM PDT 24 |
Jul 17 09:12:14 PM PDT 24 |
13767775024 ps |
| T1105 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.722651033 |
|
|
Jul 17 08:34:32 PM PDT 24 |
Jul 17 08:39:29 PM PDT 24 |
2712599960 ps |
| T159 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.2094893686 |
|
|
Jul 17 08:28:36 PM PDT 24 |
Jul 17 08:33:22 PM PDT 24 |
3141329540 ps |
| T1106 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2435635808 |
|
|
Jul 17 08:43:54 PM PDT 24 |
Jul 17 08:54:40 PM PDT 24 |
4713825360 ps |
| T41 |
/workspace/coverage/default/0.chip_sw_gpio.2316255364 |
|
|
Jul 17 08:28:59 PM PDT 24 |
Jul 17 08:40:26 PM PDT 24 |
4429298840 ps |
| T1107 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.1267098526 |
|
|
Jul 17 08:35:33 PM PDT 24 |
Jul 17 08:51:51 PM PDT 24 |
7428249800 ps |
| T413 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.2049208665 |
|
|
Jul 17 08:29:56 PM PDT 24 |
Jul 17 08:36:59 PM PDT 24 |
3180387828 ps |
| T1108 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.2294410926 |
|
|
Jul 17 08:52:25 PM PDT 24 |
Jul 17 08:56:16 PM PDT 24 |
3138540408 ps |
| T801 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.1437512265 |
|
|
Jul 17 08:57:09 PM PDT 24 |
Jul 17 09:08:00 PM PDT 24 |
5818562938 ps |
| T730 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.2714920434 |
|
|
Jul 17 09:05:35 PM PDT 24 |
Jul 17 09:11:10 PM PDT 24 |
4063217000 ps |
| T234 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.2216441627 |
|
|
Jul 17 08:40:34 PM PDT 24 |
Jul 17 09:11:59 PM PDT 24 |
23969851573 ps |
| T1109 |
/workspace/coverage/default/2.chip_sw_aes_idle.3135813547 |
|
|
Jul 17 08:48:05 PM PDT 24 |
Jul 17 08:52:00 PM PDT 24 |
3263752296 ps |
| T808 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.846224422 |
|
|
Jul 17 09:01:05 PM PDT 24 |
Jul 17 09:10:29 PM PDT 24 |
5176451540 ps |
| T1110 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.859190147 |
|
|
Jul 17 08:31:18 PM PDT 24 |
Jul 17 08:35:01 PM PDT 24 |
2860266136 ps |
| T1111 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.3668110003 |
|
|
Jul 17 08:49:33 PM PDT 24 |
Jul 17 09:01:29 PM PDT 24 |
5342532120 ps |
| T1112 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3958866022 |
|
|
Jul 17 08:28:46 PM PDT 24 |
Jul 17 09:09:28 PM PDT 24 |
24878623625 ps |
| T770 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.4227086483 |
|
|
Jul 17 08:57:47 PM PDT 24 |
Jul 17 09:05:04 PM PDT 24 |
3946396980 ps |
| T1113 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.205098682 |
|
|
Jul 17 08:30:01 PM PDT 24 |
Jul 17 08:34:55 PM PDT 24 |
2475664840 ps |
| T669 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.1627289655 |
|
|
Jul 17 08:47:06 PM PDT 24 |
Jul 17 08:58:16 PM PDT 24 |
3428605240 ps |
| T1114 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.1800048393 |
|
|
Jul 17 08:32:16 PM PDT 24 |
Jul 17 09:09:40 PM PDT 24 |
9531235972 ps |
| T1115 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.2716732164 |
|
|
Jul 17 08:46:01 PM PDT 24 |
Jul 17 09:11:56 PM PDT 24 |
22188746064 ps |
| T14 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.2039420970 |
|
|
Jul 17 08:49:28 PM PDT 24 |
Jul 17 09:16:18 PM PDT 24 |
21702206076 ps |
| T1116 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.3040801918 |
|
|
Jul 17 08:34:34 PM PDT 24 |
Jul 17 08:40:17 PM PDT 24 |
3576753056 ps |
| T1117 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.2573402490 |
|
|
Jul 17 08:50:03 PM PDT 24 |
Jul 17 08:53:25 PM PDT 24 |
2403359500 ps |
| T1118 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.4247208045 |
|
|
Jul 17 08:39:26 PM PDT 24 |
Jul 17 08:51:40 PM PDT 24 |
4591650488 ps |
| T348 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.4062619109 |
|
|
Jul 17 08:32:31 PM PDT 24 |
Jul 17 08:40:59 PM PDT 24 |
3791587268 ps |
| T1119 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.1574143241 |
|
|
Jul 17 08:37:37 PM PDT 24 |
Jul 17 08:47:11 PM PDT 24 |
4775286060 ps |
| T775 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.2425504548 |
|
|
Jul 17 08:59:48 PM PDT 24 |
Jul 17 09:08:58 PM PDT 24 |
5735251020 ps |
| T92 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.1707659684 |
|
|
Jul 17 08:48:38 PM PDT 24 |
Jul 17 08:57:02 PM PDT 24 |
3904483840 ps |
| T1120 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.620524745 |
|
|
Jul 17 08:39:16 PM PDT 24 |
Jul 17 09:03:49 PM PDT 24 |
7489025112 ps |
| T787 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.426186205 |
|
|
Jul 17 09:02:47 PM PDT 24 |
Jul 17 09:14:44 PM PDT 24 |
5849283664 ps |
| T1121 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.605711359 |
|
|
Jul 17 08:30:04 PM PDT 24 |
Jul 17 08:36:31 PM PDT 24 |
3451687662 ps |
| T1122 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.414556633 |
|
|
Jul 17 08:34:14 PM PDT 24 |
Jul 17 08:40:34 PM PDT 24 |
3139877824 ps |
| T1123 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.3396371672 |
|
|
Jul 17 08:32:08 PM PDT 24 |
Jul 17 09:04:41 PM PDT 24 |
11375358997 ps |
| T1124 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.1230771573 |
|
|
Jul 17 08:35:01 PM PDT 24 |
Jul 17 09:40:48 PM PDT 24 |
15263563584 ps |
| T163 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.4039518732 |
|
|
Jul 17 08:39:34 PM PDT 24 |
Jul 17 08:48:45 PM PDT 24 |
3672911020 ps |
| T768 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.674156401 |
|
|
Jul 17 09:00:57 PM PDT 24 |
Jul 17 09:06:34 PM PDT 24 |
3465393778 ps |
| T1125 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.3317836093 |
|
|
Jul 17 08:54:03 PM PDT 24 |
Jul 17 09:04:52 PM PDT 24 |
4950696104 ps |
| T1126 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.3915329947 |
|
|
Jul 17 08:32:10 PM PDT 24 |
Jul 17 08:40:45 PM PDT 24 |
4091671666 ps |
| T1127 |
/workspace/coverage/default/2.chip_sw_example_rom.4174611487 |
|
|
Jul 17 08:43:00 PM PDT 24 |
Jul 17 08:44:49 PM PDT 24 |
2325240896 ps |
| T1128 |
/workspace/coverage/default/1.chip_sw_hmac_enc.2095145702 |
|
|
Jul 17 08:41:26 PM PDT 24 |
Jul 17 08:45:33 PM PDT 24 |
2572982096 ps |
| T1129 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.1105953218 |
|
|
Jul 17 08:31:43 PM PDT 24 |
Jul 17 08:35:15 PM PDT 24 |
2729434262 ps |
| T1130 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.3771101188 |
|
|
Jul 17 08:51:54 PM PDT 24 |
Jul 17 08:57:26 PM PDT 24 |
3797518104 ps |
| T231 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.3376845917 |
|
|
Jul 17 08:30:54 PM PDT 24 |
Jul 17 09:32:55 PM PDT 24 |
17754237104 ps |
| T1131 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.950628387 |
|
|
Jul 17 08:42:30 PM PDT 24 |
Jul 17 08:49:06 PM PDT 24 |
2939205608 ps |
| T1132 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.628552136 |
|
|
Jul 17 08:29:01 PM PDT 24 |
Jul 17 08:33:17 PM PDT 24 |
3333768736 ps |
| T1133 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.2369176449 |
|
|
Jul 17 08:38:40 PM PDT 24 |
Jul 17 08:46:57 PM PDT 24 |
5461587302 ps |
| T1134 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.1311235432 |
|
|
Jul 17 08:32:12 PM PDT 24 |
Jul 17 09:01:59 PM PDT 24 |
13021694816 ps |
| T1135 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.4034792068 |
|
|
Jul 17 08:33:58 PM PDT 24 |
Jul 17 08:43:22 PM PDT 24 |
7059557600 ps |
| T1136 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.3936075038 |
|
|
Jul 17 08:37:56 PM PDT 24 |
Jul 17 09:23:31 PM PDT 24 |
11539277640 ps |
| T1137 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.1315274273 |
|
|
Jul 17 08:41:53 PM PDT 24 |
Jul 17 09:07:08 PM PDT 24 |
8600371986 ps |
| T343 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3008204153 |
|
|
Jul 17 08:30:48 PM PDT 24 |
Jul 17 08:50:44 PM PDT 24 |
5616713710 ps |
| T1138 |
/workspace/coverage/default/3.chip_tap_straps_dev.1884494166 |
|
|
Jul 17 08:52:45 PM PDT 24 |
Jul 17 09:05:10 PM PDT 24 |
7751066472 ps |
| T334 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.2587751003 |
|
|
Jul 17 08:32:23 PM PDT 24 |
Jul 17 08:51:03 PM PDT 24 |
5592075502 ps |
| T1139 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.3681106212 |
|
|
Jul 17 08:49:00 PM PDT 24 |
Jul 17 09:00:26 PM PDT 24 |
4395909277 ps |
| T716 |
/workspace/coverage/default/1.rom_raw_unlock.355189451 |
|
|
Jul 17 08:48:11 PM PDT 24 |
Jul 17 08:52:59 PM PDT 24 |
5662120872 ps |
| T1140 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.2084587007 |
|
|
Jul 17 08:37:41 PM PDT 24 |
Jul 17 08:58:33 PM PDT 24 |
7345871456 ps |
| T1141 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.2674599451 |
|
|
Jul 17 08:57:28 PM PDT 24 |
Jul 17 09:03:03 PM PDT 24 |
3355118464 ps |
| T1142 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.3606702101 |
|
|
Jul 17 08:31:04 PM PDT 24 |
Jul 17 09:52:28 PM PDT 24 |
22712502340 ps |
| T1143 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.3679413754 |
|
|
Jul 17 08:48:14 PM PDT 24 |
Jul 17 09:26:37 PM PDT 24 |
10001069120 ps |
| T414 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.4244709744 |
|
|
Jul 17 08:31:14 PM PDT 24 |
Jul 17 09:11:28 PM PDT 24 |
8090296080 ps |
| T1144 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.152209761 |
|
|
Jul 17 08:28:39 PM PDT 24 |
Jul 17 08:52:10 PM PDT 24 |
9748524632 ps |
| T1145 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3582458317 |
|
|
Jul 17 08:34:30 PM PDT 24 |
Jul 17 08:45:28 PM PDT 24 |
5000920624 ps |
| T1146 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.4061160159 |
|
|
Jul 17 08:40:16 PM PDT 24 |
Jul 17 08:44:09 PM PDT 24 |
2731362555 ps |
| T1147 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.3283742717 |
|
|
Jul 17 08:36:28 PM PDT 24 |
Jul 17 08:43:20 PM PDT 24 |
3844196960 ps |
| T160 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.122690584 |
|
|
Jul 17 08:37:08 PM PDT 24 |
Jul 17 08:39:15 PM PDT 24 |
2799490769 ps |
| T788 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.2313190785 |
|
|
Jul 17 08:37:21 PM PDT 24 |
Jul 17 08:46:25 PM PDT 24 |
4792925800 ps |
| T1148 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.2229397296 |
|
|
Jul 17 08:34:19 PM PDT 24 |
Jul 17 08:39:53 PM PDT 24 |
3606608642 ps |
| T1149 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3660484426 |
|
|
Jul 17 08:31:14 PM PDT 24 |
Jul 17 09:07:19 PM PDT 24 |
12900284718 ps |
| T1150 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.316098839 |
|
|
Jul 17 08:51:59 PM PDT 24 |
Jul 17 09:31:40 PM PDT 24 |
13057656840 ps |
| T1151 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.1234369764 |
|
|
Jul 17 08:49:04 PM PDT 24 |
Jul 17 08:55:18 PM PDT 24 |
3090771632 ps |
| T1152 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.860517291 |
|
|
Jul 17 08:31:03 PM PDT 24 |
Jul 17 08:44:08 PM PDT 24 |
6331491985 ps |
| T1153 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.2488889859 |
|
|
Jul 17 08:54:11 PM PDT 24 |
Jul 17 09:22:42 PM PDT 24 |
8997763032 ps |
| T342 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.3220443346 |
|
|
Jul 17 08:39:17 PM PDT 24 |
Jul 17 09:05:51 PM PDT 24 |
6863672960 ps |
| T47 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.81881953 |
|
|
Jul 17 08:29:21 PM PDT 24 |
Jul 17 08:33:24 PM PDT 24 |
2887512136 ps |