SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.25 | 85.25 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.45 | 85.45 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.45 | 85.45 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.45 | 85.45 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.34 | 90.68 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9388 | 85.25 |
Total Bits 0->1 | 5506 | 4708 | 85.51 |
Total Bits 1->0 | 5506 | 4680 | 85.00 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9388 | 85.25 |
Port Bits 0->1 | 5506 | 4708 | 85.51 |
Port Bits 1->0 | 5506 | 4680 | 85.00 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T4 | INPUT |
edn_i.edn_fips | No | No | Yes | T175,T176,T177 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | T3,*T68,*T75 | Yes | T3,T68,T75 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T3,T68,T76 | Yes | T3,T68,T76 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T178 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T75,*T174,*T179 | Yes | T75,T174,T179 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T72,T74,T178 | Yes | T72,T74,T178 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T7,*T180,*T159 | Yes | T7,T180,T159 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T47,*T72,*T73 | Yes | T47,T72,T73 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | T3,*T68,*T75 | Yes | T3,T68,T75 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T3,T68,T76 | Yes | T3,T68,T76 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T47,T72,T73 | Yes | T47,T72,T73 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T72,T74,T178 | Yes | T72,T74,T178 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T180,T181,T182 | Yes | T180,T181,T182 | OUTPUT |
intr_otp_error_o | Yes | Yes | T180,T181,T182 | Yes | T180,T181,T182 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T183,T48,T78 | Yes | T183,T48,T78 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T5,T62,T63 | Yes | T5,T62,T63 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T184,T185,T186 | Yes | T184,T185,T186 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T78,T187,T79 | Yes | T78,T187,T80 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T78,T187,T80 | Yes | T78,T187,T79 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T188,T85,T189 | Yes | T188,T85,T189 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T48,T190,T78 | Yes | T48,T190,T78 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T190,T78,T191 | Yes | T190,T78,T79 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T190,T78,T79 | Yes | T190,T78,T191 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T183,T48,T78 | Yes | T183,T48,T78 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T5,T62,T63 | Yes | T5,T62,T63 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T184,T185,T186 | Yes | T184,T185,T186 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T188,T85,T189 | Yes | T188,T85,T189 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T48,T190,T78 | Yes | T48,T190,T78 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T118,T98,T19 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[5:0] | No | No | Yes | T192,T193,T194 | INPUT | |
lc_otp_vendor_test_i.ctrl[6] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[9:7] | No | No | Yes | T192,T194 | INPUT | |
lc_otp_vendor_test_i.ctrl[11:10] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[15:12] | No | No | Yes | T193,T194,T192 | INPUT | |
lc_otp_vendor_test_i.ctrl[16] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[24:17] | No | No | Yes | T192,T194,T193 | INPUT | |
lc_otp_vendor_test_i.ctrl[25] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[26] | No | No | Yes | T194 | INPUT | |
lc_otp_vendor_test_i.ctrl[27] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:28] | No | No | Yes | T194,T192,T193 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[6:0] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.count[7] | No | No | No | INPUT | ||
lc_otp_program_i.count[8] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[9] | No | No | No | INPUT | ||
lc_otp_program_i.count[12:10] | Yes | Yes | T7,T61,T75 | Yes | T7,T61,T75 | INPUT |
lc_otp_program_i.count[13] | No | No | No | INPUT | ||
lc_otp_program_i.count[17:14] | Yes | Yes | *T7,*T61,T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[18] | No | No | No | INPUT | ||
lc_otp_program_i.count[24:19] | Yes | Yes | *T7,*T67,*T61 | Yes | T7,T119,T195 | INPUT |
lc_otp_program_i.count[25] | No | No | No | INPUT | ||
lc_otp_program_i.count[31:26] | Yes | Yes | *T7,*T67,*T61 | Yes | T7,T119,T195 | INPUT |
lc_otp_program_i.count[34:32] | No | No | No | INPUT | ||
lc_otp_program_i.count[63:35] | Yes | Yes | *T7,*T67,*T61 | Yes | T7,T119,T195 | INPUT |
lc_otp_program_i.count[64] | No | No | No | INPUT | ||
lc_otp_program_i.count[84:65] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[85] | No | No | No | INPUT | ||
lc_otp_program_i.count[92:86] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.count[93] | No | No | No | INPUT | ||
lc_otp_program_i.count[98:94] | Yes | Yes | *T44,*T7,*T67 | Yes | T7,T159,T8 | INPUT |
lc_otp_program_i.count[99] | No | No | No | INPUT | ||
lc_otp_program_i.count[111:100] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[112] | No | No | No | INPUT | ||
lc_otp_program_i.count[116:113] | Yes | Yes | *T44,T7,*T67 | Yes | T7,T159,T8 | INPUT |
lc_otp_program_i.count[117] | No | No | No | INPUT | ||
lc_otp_program_i.count[120:118] | Yes | Yes | T44,T7,T67 | Yes | T7,T159,T8 | INPUT |
lc_otp_program_i.count[121] | No | No | No | INPUT | ||
lc_otp_program_i.count[125:122] | Yes | Yes | *T7,*T61,T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[126] | No | No | No | INPUT | ||
lc_otp_program_i.count[127] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[128] | No | No | No | INPUT | ||
lc_otp_program_i.count[141:129] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.count[142] | No | No | No | INPUT | ||
lc_otp_program_i.count[153:143] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.count[154] | No | No | No | INPUT | ||
lc_otp_program_i.count[166:155] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T61,T75 | INPUT |
lc_otp_program_i.count[167] | No | No | No | INPUT | ||
lc_otp_program_i.count[172:168] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[173] | No | No | No | INPUT | ||
lc_otp_program_i.count[182:174] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T61,T75 | INPUT |
lc_otp_program_i.count[183] | No | No | No | INPUT | ||
lc_otp_program_i.count[194:184] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[196:195] | No | No | No | INPUT | ||
lc_otp_program_i.count[202:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[203] | No | No | No | INPUT | ||
lc_otp_program_i.count[206:204] | Yes | Yes | T7,T61,*T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[207] | No | No | No | INPUT | ||
lc_otp_program_i.count[215:208] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[216] | No | No | No | INPUT | ||
lc_otp_program_i.count[220:217] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[221] | No | No | No | INPUT | ||
lc_otp_program_i.count[231:222] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[232] | No | No | No | INPUT | ||
lc_otp_program_i.count[234:233] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[235] | No | No | No | INPUT | ||
lc_otp_program_i.count[238:236] | Yes | Yes | T7,T61,*T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[239] | No | No | No | INPUT | ||
lc_otp_program_i.count[241:240] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[242] | No | No | No | INPUT | ||
lc_otp_program_i.count[265:243] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.count[266] | No | No | No | INPUT | ||
lc_otp_program_i.count[270:267] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[271] | No | No | No | INPUT | ||
lc_otp_program_i.count[274:272] | Yes | Yes | T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[275] | No | No | No | INPUT | ||
lc_otp_program_i.count[286:276] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T61,T75 | INPUT |
lc_otp_program_i.count[287] | No | No | No | INPUT | ||
lc_otp_program_i.count[290:288] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.count[291] | No | No | No | INPUT | ||
lc_otp_program_i.count[293:292] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[294] | No | No | No | INPUT | ||
lc_otp_program_i.count[313:295] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T61,T75 | INPUT |
lc_otp_program_i.count[314] | No | No | No | INPUT | ||
lc_otp_program_i.count[350:315] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[351] | No | No | No | INPUT | ||
lc_otp_program_i.count[353:352] | Yes | Yes | T7,T61,T75 | Yes | T7,T61,T75 | INPUT |
lc_otp_program_i.count[354] | No | No | No | INPUT | ||
lc_otp_program_i.count[364:355] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[365] | No | No | No | INPUT | ||
lc_otp_program_i.count[370:366] | Yes | Yes | T195,T183,T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.count[371] | No | No | No | INPUT | ||
lc_otp_program_i.count[373:372] | Yes | Yes | T7,*T61,*T75 | Yes | T7,T61,T75 | INPUT |
lc_otp_program_i.count[374] | No | No | No | INPUT | ||
lc_otp_program_i.count[378:375] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT |
lc_otp_program_i.count[379] | No | No | No | INPUT | ||
lc_otp_program_i.count[381:380] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.count[382] | No | No | No | INPUT | ||
lc_otp_program_i.count[383] | Yes | Yes | T7,T61,T75 | Yes | T7,T61,T75 | INPUT |
lc_otp_program_i.state[32:0] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[33] | No | No | No | INPUT | ||
lc_otp_program_i.state[39:34] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.state[41:40] | No | No | No | INPUT | ||
lc_otp_program_i.state[76:42] | Yes | Yes | *T7,*T67,*T61 | Yes | T7,T149,T119 | INPUT |
lc_otp_program_i.state[77] | No | No | No | INPUT | ||
lc_otp_program_i.state[78] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.state[79] | No | No | No | INPUT | ||
lc_otp_program_i.state[90:80] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[91] | No | No | No | INPUT | ||
lc_otp_program_i.state[93:92] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[94] | No | No | No | INPUT | ||
lc_otp_program_i.state[100:95] | Yes | Yes | T7,T61,T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[101] | No | No | No | INPUT | ||
lc_otp_program_i.state[103:102] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[104] | No | No | No | INPUT | ||
lc_otp_program_i.state[114:105] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[115] | No | No | No | INPUT | ||
lc_otp_program_i.state[117:116] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[118] | No | No | No | INPUT | ||
lc_otp_program_i.state[125:119] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[126] | No | No | No | INPUT | ||
lc_otp_program_i.state[140:127] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[141] | No | No | No | INPUT | ||
lc_otp_program_i.state[147:142] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[148] | No | No | No | INPUT | ||
lc_otp_program_i.state[158:149] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[159] | No | No | No | INPUT | ||
lc_otp_program_i.state[161:160] | Yes | Yes | T6,T7,T67 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[163:162] | No | No | No | INPUT | ||
lc_otp_program_i.state[171:164] | Yes | Yes | T7,T61,T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[172] | No | No | No | INPUT | ||
lc_otp_program_i.state[173] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.state[174] | No | No | No | INPUT | ||
lc_otp_program_i.state[175] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.state[176] | No | No | No | INPUT | ||
lc_otp_program_i.state[189:177] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[190] | No | No | No | INPUT | ||
lc_otp_program_i.state[193:191] | Yes | Yes | T6,T7,T67 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[194] | No | No | No | INPUT | ||
lc_otp_program_i.state[199:195] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[200] | No | No | No | INPUT | ||
lc_otp_program_i.state[203:201] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[204] | No | No | No | INPUT | ||
lc_otp_program_i.state[210:205] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[212:211] | No | No | No | INPUT | ||
lc_otp_program_i.state[213] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[214] | No | No | No | INPUT | ||
lc_otp_program_i.state[217:215] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[218] | No | No | No | INPUT | ||
lc_otp_program_i.state[225:219] | Yes | Yes | T7,T61,T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[226] | No | No | No | INPUT | ||
lc_otp_program_i.state[230:227] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[231] | No | No | No | INPUT | ||
lc_otp_program_i.state[237:232] | Yes | Yes | T7,T61,T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[238] | No | No | No | INPUT | ||
lc_otp_program_i.state[250:239] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.state[251] | No | No | No | INPUT | ||
lc_otp_program_i.state[257:252] | Yes | Yes | *T6,*T44,T7 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[258] | No | No | No | INPUT | ||
lc_otp_program_i.state[265:259] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[266] | No | No | No | INPUT | ||
lc_otp_program_i.state[284:267] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[286:285] | No | No | No | INPUT | ||
lc_otp_program_i.state[293:287] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.state[294] | No | No | No | INPUT | ||
lc_otp_program_i.state[302:295] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT |
lc_otp_program_i.state[303] | No | No | No | INPUT | ||
lc_otp_program_i.state[304] | Yes | Yes | *T6,*T44,*T7 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[305] | No | No | No | INPUT | ||
lc_otp_program_i.state[308:306] | Yes | Yes | *T6,*T44,*T7 | Yes | T6,T7,T60 | INPUT |
lc_otp_program_i.state[309] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:310] | Yes | Yes | T195,T183,T196 | Yes | T195,T183,T196 | INPUT |
lc_otp_program_i.req | Yes | Yes | T6,T7,T61 | Yes | T6,T7,T61 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T6,T7,T61 | Yes | T6,T7,T61 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T197,T198,T199 | Yes | T197,T198,T199 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T3,T5,T7 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T5,T62,T63 | Yes | T5,T62,T63 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T6,T7,T60 | Yes | T6,T7,T61 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T3,T6,T82 | Yes | T3,T6,T62 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T200,T201,T202 | Yes | T7,T159,T97 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T6,T7,T62 | Yes | T1,T6,T81 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T2,T4 | Yes | T5,T6,T7 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T200,T201,T202 | Yes | T7,T159,T97 | OUTPUT |
otp_lc_data_o.count[6:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[7] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[8] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[9] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[12:10] | Yes | Yes | T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT |
otp_lc_data_o.count[13] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[17:14] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[18] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[24:19] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[25] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[31:26] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[34:32] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[63:35] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[64] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[84:65] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[85] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[92:86] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[93] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[98:94] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[111:100] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[112] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[116:113] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[117] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[120:118] | Yes | Yes | *T44,*T7,*T67 | Yes | T7,T159,T8 | OUTPUT |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[125:122] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[126] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[127] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[128] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[141:129] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[153:143] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[154] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[166:155] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT |
otp_lc_data_o.count[167] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[172:168] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[173] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[182:174] | Yes | Yes | T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT |
otp_lc_data_o.count[183] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[194:184] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[196:195] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[202:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[203] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[206:204] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[207] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[215:208] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT |
otp_lc_data_o.count[216] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[220:217] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT |
otp_lc_data_o.count[221] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[231:222] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT |
otp_lc_data_o.count[232] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[234:233] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[238:236] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[239] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[241:240] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT |
otp_lc_data_o.count[242] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[265:243] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[266] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[270:267] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT |
otp_lc_data_o.count[271] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[274:272] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[275] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[286:276] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[290:288] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[291] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[293:292] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[294] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[313:295] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT |
otp_lc_data_o.count[314] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350:315] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[353:352] | Yes | Yes | T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[364:355] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT |
otp_lc_data_o.count[365] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[370:366] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.count[371] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[373:372] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT |
otp_lc_data_o.count[374] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[378:375] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[381:380] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT |
otp_lc_data_o.count[382] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383] | Yes | Yes | T7,T61,T75 | Yes | T7,T75,T202 | OUTPUT |
otp_lc_data_o.state[32:0] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT |
otp_lc_data_o.state[33] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[39:34] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.state[41:40] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[76:42] | Yes | Yes | T7,*T67,*T61 | Yes | T7,T149,T119 | OUTPUT |
otp_lc_data_o.state[77] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[78] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.state[79] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[90:80] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT |
otp_lc_data_o.state[91] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[93:92] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[94] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[100:95] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT |
otp_lc_data_o.state[101] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[103:102] | Yes | Yes | T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT |
otp_lc_data_o.state[104] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[114:105] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT |
otp_lc_data_o.state[115] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[117:116] | Yes | Yes | T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT |
otp_lc_data_o.state[118] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[125:119] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[126] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[140:127] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[147:142] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[148] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[158:149] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT |
otp_lc_data_o.state[159] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[161:160] | Yes | Yes | T6,T7,T67 | Yes | T6,T7,T60 | OUTPUT |
otp_lc_data_o.state[163:162] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[171:164] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[173] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.state[174] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[175] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.state[176] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[189:177] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT |
otp_lc_data_o.state[190] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[193:191] | Yes | Yes | T6,T7,T67 | Yes | T6,T7,T60 | OUTPUT |
otp_lc_data_o.state[194] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[199:195] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[200] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[203:201] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT |
otp_lc_data_o.state[204] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[210:205] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[212:211] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[213] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[214] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[217:215] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[218] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[225:219] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT |
otp_lc_data_o.state[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[230:227] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[231] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[237:232] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT |
otp_lc_data_o.state[238] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[250:239] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.state[251] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[257:252] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[258] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[265:259] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[284:267] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT |
otp_lc_data_o.state[286:285] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[293:287] | Yes | Yes | *T148,*T149,*T203 | Yes | T44,T148,T149 | OUTPUT |
otp_lc_data_o.state[294] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[302:295] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[303] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[304] | Yes | Yes | *T3,*T5,*T7 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[305] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[308:306] | Yes | Yes | *T6,*T44,T7 | Yes | T6,T7,T60 | OUTPUT |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:310] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T5,T62,T63 | Yes | T5,T62,T63 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T200,T201,T202 | Yes | T7,T159,T97 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T4,T81,T82 | Yes | T62,T157,T204 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T200,T201,T202 | Yes | T7,T159,T97 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T7,T62,T158 | Yes | T1,T81,T82 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T44,T45,T46 | Yes | T44,T45,T46 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T205,T206,T207 | Yes | T205,T206,T207 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T160,T208,T209 | Yes | T160,T208,T209 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T44,T45,T46 | Yes | T44,T45,T46 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T205,T206,T207 | Yes | T205,T206,T207 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T160,T210,T211 | Yes | T160,T210,T211 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T44,T45,T46 | Yes | T44,T45,T46 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T44,T45,T46 | Yes | T44,T45,T46 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T2,T81 | Yes | T7,T60,T159 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[34:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[35] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[58:36] | Yes | Yes | *T200,*T212,*T1 | Yes | T200,T212,T3 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[59] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[71:60] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[72] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[95:73] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[96] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[171:97] | Yes | Yes | *T200,*T1,*T2 | Yes | T200,T3,T5 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[172] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[174:173] | Yes | Yes | *T200,*T212,*T213 | Yes | T200,T212,T213 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[175] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[212:176] | Yes | Yes | *T119,*T208,*T209 | Yes | T119,T208,T209 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[213] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[234:214] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[235] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[252:236] | Yes | Yes | *T119,*T208,*T212 | Yes | T119,T208,T212 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[253] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:254] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T3,T5,T6 | Yes | T3,T4,T5 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T44,T7,T61 | Yes | T7,T41,T42 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T8,T9,T10 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9387 | 85.45 |
Total Bits 0->1 | 5493 | 4707 | 85.69 |
Total Bits 1->0 | 5493 | 4680 | 85.20 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9387 | 85.45 |
Port Bits 0->1 | 5493 | 4707 | 85.69 |
Port Bits 1->0 | 5493 | 4680 | 85.20 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T4,T5 | Yes | T1,T2,T4 | INPUT | |
edn_i.edn_fips | No | No | Yes | T175,T176,T177 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | T3,*T68,*T75 | Yes | T3,T68,T75 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T3,T68,T76 | Yes | T3,T68,T76 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T178 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T75,*T174,*T179 | Yes | T75,T174,T179 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T72,T74,T178 | Yes | T72,T74,T178 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T7,*T180,*T159 | Yes | T7,T180,T159 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T47,*T72,*T73 | Yes | T47,T72,T73 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | T3,*T68,*T75 | Yes | T3,T68,T75 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T3,T68,T76 | Yes | T3,T68,T76 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T47,T72,T73 | Yes | T47,T72,T73 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T72,T74,T178 | Yes | T72,T74,T178 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T47,T72,T73 | Yes | T47,T72,T73 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T180,T181,T182 | Yes | T180,T181,T182 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T180,T181,T182 | Yes | T180,T181,T182 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T183,T48,T78 | Yes | T183,T48,T78 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T5,T62,T63 | Yes | T5,T62,T63 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T184,T185,T186 | Yes | T184,T185,T186 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T78,T187,T79 | Yes | T78,T187,T80 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T78,T187,T80 | Yes | T78,T187,T79 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T188,T85,T189 | Yes | T188,T85,T189 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T78,T79,T80 | Yes | T78,T79,T80 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T48,T190,T78 | Yes | T48,T190,T78 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T190,T78,T191 | Yes | T190,T78,T79 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T190,T78,T79 | Yes | T190,T78,T191 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T183,T48,T78 | Yes | T183,T48,T78 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T5,T62,T63 | Yes | T5,T62,T63 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T184,T185,T186 | Yes | T184,T185,T186 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T188,T85,T189 | Yes | T188,T85,T189 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T48,T190,T78 | Yes | T48,T190,T78 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T118,T98,T19 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[5:0] | No | No | Yes | T192,T193,T194 | INPUT | ||
lc_otp_vendor_test_i.ctrl[6] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[9:7] | No | No | Yes | T192,T194 | INPUT | ||
lc_otp_vendor_test_i.ctrl[11:10] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[15:12] | No | No | Yes | T193,T194,T192 | INPUT | ||
lc_otp_vendor_test_i.ctrl[16] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[24:17] | No | No | Yes | T192,T194,T193 | INPUT | ||
lc_otp_vendor_test_i.ctrl[25] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[26] | No | No | Yes | T194 | INPUT | ||
lc_otp_vendor_test_i.ctrl[27] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:28] | No | No | Yes | T194,T192,T193 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[6:0] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.count[7] | No | No | No | INPUT | |||
lc_otp_program_i.count[8] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[9] | No | No | No | INPUT | |||
lc_otp_program_i.count[12:10] | Yes | Yes | T7,T61,T75 | Yes | T7,T61,T75 | INPUT | |
lc_otp_program_i.count[13] | No | No | No | INPUT | |||
lc_otp_program_i.count[17:14] | Yes | Yes | *T7,*T61,T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[18] | No | No | No | INPUT | |||
lc_otp_program_i.count[24:19] | Yes | Yes | *T7,*T67,*T61 | Yes | T7,T119,T195 | INPUT | |
lc_otp_program_i.count[25] | No | No | No | INPUT | |||
lc_otp_program_i.count[31:26] | Yes | Yes | *T7,*T67,*T61 | Yes | T7,T119,T195 | INPUT | |
lc_otp_program_i.count[34:32] | No | No | No | INPUT | |||
lc_otp_program_i.count[63:35] | Yes | Yes | *T7,*T67,*T61 | Yes | T7,T119,T195 | INPUT | |
lc_otp_program_i.count[64] | No | No | No | INPUT | |||
lc_otp_program_i.count[84:65] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[85] | No | No | No | INPUT | |||
lc_otp_program_i.count[92:86] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.count[93] | No | No | No | INPUT | |||
lc_otp_program_i.count[98:94] | Yes | Yes | *T44,*T7,*T67 | Yes | T7,T159,T8 | INPUT | |
lc_otp_program_i.count[99] | No | No | No | INPUT | |||
lc_otp_program_i.count[111:100] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[112] | No | No | No | INPUT | |||
lc_otp_program_i.count[116:113] | Yes | Yes | *T44,T7,*T67 | Yes | T7,T159,T8 | INPUT | |
lc_otp_program_i.count[117] | No | No | No | INPUT | |||
lc_otp_program_i.count[120:118] | Yes | Yes | T44,T7,T67 | Yes | T7,T159,T8 | INPUT | |
lc_otp_program_i.count[121] | No | No | No | INPUT | |||
lc_otp_program_i.count[125:122] | Yes | Yes | *T7,*T61,T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[126] | No | No | No | INPUT | |||
lc_otp_program_i.count[127] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[128] | No | No | No | INPUT | |||
lc_otp_program_i.count[141:129] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.count[142] | No | No | No | INPUT | |||
lc_otp_program_i.count[153:143] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.count[154] | No | No | No | INPUT | |||
lc_otp_program_i.count[166:155] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T61,T75 | INPUT | |
lc_otp_program_i.count[167] | No | No | No | INPUT | |||
lc_otp_program_i.count[172:168] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[173] | No | No | No | INPUT | |||
lc_otp_program_i.count[182:174] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T61,T75 | INPUT | |
lc_otp_program_i.count[183] | No | No | No | INPUT | |||
lc_otp_program_i.count[194:184] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[196:195] | No | No | No | INPUT | |||
lc_otp_program_i.count[202:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[203] | No | No | No | INPUT | |||
lc_otp_program_i.count[206:204] | Yes | Yes | T7,T61,*T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[207] | No | No | No | INPUT | |||
lc_otp_program_i.count[215:208] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[216] | No | No | No | INPUT | |||
lc_otp_program_i.count[220:217] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[221] | No | No | No | INPUT | |||
lc_otp_program_i.count[231:222] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[232] | No | No | No | INPUT | |||
lc_otp_program_i.count[234:233] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[235] | No | No | No | INPUT | |||
lc_otp_program_i.count[238:236] | Yes | Yes | T7,T61,*T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[239] | No | No | No | INPUT | |||
lc_otp_program_i.count[241:240] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[242] | No | No | No | INPUT | |||
lc_otp_program_i.count[265:243] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.count[266] | No | No | No | INPUT | |||
lc_otp_program_i.count[270:267] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[271] | No | No | No | INPUT | |||
lc_otp_program_i.count[274:272] | Yes | Yes | T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[275] | No | No | No | INPUT | |||
lc_otp_program_i.count[286:276] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T61,T75 | INPUT | |
lc_otp_program_i.count[287] | No | No | No | INPUT | |||
lc_otp_program_i.count[290:288] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.count[291] | No | No | No | INPUT | |||
lc_otp_program_i.count[293:292] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[294] | No | No | No | INPUT | |||
lc_otp_program_i.count[313:295] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T61,T75 | INPUT | |
lc_otp_program_i.count[314] | No | No | No | INPUT | |||
lc_otp_program_i.count[350:315] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[351] | No | No | No | INPUT | |||
lc_otp_program_i.count[353:352] | Yes | Yes | T7,T61,T75 | Yes | T7,T61,T75 | INPUT | |
lc_otp_program_i.count[354] | No | No | No | INPUT | |||
lc_otp_program_i.count[364:355] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[365] | No | No | No | INPUT | |||
lc_otp_program_i.count[370:366] | Yes | Yes | T195,T183,T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.count[371] | No | No | No | INPUT | |||
lc_otp_program_i.count[373:372] | Yes | Yes | T7,*T61,*T75 | Yes | T7,T61,T75 | INPUT | |
lc_otp_program_i.count[374] | No | No | No | INPUT | |||
lc_otp_program_i.count[378:375] | Yes | Yes | *T7,*T61,*T195 | Yes | T7,T61,T195 | INPUT | |
lc_otp_program_i.count[379] | No | No | No | INPUT | |||
lc_otp_program_i.count[381:380] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.count[382] | No | No | No | INPUT | |||
lc_otp_program_i.count[383] | Yes | Yes | T7,T61,T75 | Yes | T7,T61,T75 | INPUT | |
lc_otp_program_i.state[32:0] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[33] | No | No | No | INPUT | |||
lc_otp_program_i.state[39:34] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.state[41:40] | No | No | No | INPUT | |||
lc_otp_program_i.state[76:42] | Yes | Yes | *T7,*T67,*T61 | Yes | T7,T149,T119 | INPUT | |
lc_otp_program_i.state[77] | No | No | No | INPUT | |||
lc_otp_program_i.state[78] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.state[79] | No | No | No | INPUT | |||
lc_otp_program_i.state[90:80] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[91] | No | No | No | INPUT | |||
lc_otp_program_i.state[93:92] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[94] | No | No | No | INPUT | |||
lc_otp_program_i.state[100:95] | Yes | Yes | T7,T61,T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[101] | No | No | No | INPUT | |||
lc_otp_program_i.state[103:102] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[104] | No | No | No | INPUT | |||
lc_otp_program_i.state[114:105] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[115] | No | No | No | INPUT | |||
lc_otp_program_i.state[117:116] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[118] | No | No | No | INPUT | |||
lc_otp_program_i.state[125:119] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[126] | No | No | No | INPUT | |||
lc_otp_program_i.state[140:127] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[141] | No | No | No | INPUT | |||
lc_otp_program_i.state[147:142] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[148] | No | No | No | INPUT | |||
lc_otp_program_i.state[158:149] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[159] | No | No | No | INPUT | |||
lc_otp_program_i.state[161:160] | Yes | Yes | T6,T7,T67 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[163:162] | No | No | No | INPUT | |||
lc_otp_program_i.state[171:164] | Yes | Yes | T7,T61,T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[172] | No | No | No | INPUT | |||
lc_otp_program_i.state[173] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.state[174] | No | No | No | INPUT | |||
lc_otp_program_i.state[175] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.state[176] | No | No | No | INPUT | |||
lc_otp_program_i.state[189:177] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[190] | No | No | No | INPUT | |||
lc_otp_program_i.state[193:191] | Yes | Yes | T6,T7,T67 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[194] | No | No | No | INPUT | |||
lc_otp_program_i.state[199:195] | Yes | Yes | *T6,*T7,*T67 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[200] | No | No | No | INPUT | |||
lc_otp_program_i.state[203:201] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[204] | No | No | No | INPUT | |||
lc_otp_program_i.state[210:205] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[212:211] | No | No | No | INPUT | |||
lc_otp_program_i.state[213] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[214] | No | No | No | INPUT | |||
lc_otp_program_i.state[217:215] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[218] | No | No | No | INPUT | |||
lc_otp_program_i.state[225:219] | Yes | Yes | T7,T61,T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[226] | No | No | No | INPUT | |||
lc_otp_program_i.state[230:227] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[231] | No | No | No | INPUT | |||
lc_otp_program_i.state[237:232] | Yes | Yes | T7,T61,T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[238] | No | No | No | INPUT | |||
lc_otp_program_i.state[250:239] | Yes | Yes | *T195,*T183,*T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.state[251] | No | No | No | INPUT | |||
lc_otp_program_i.state[257:252] | Yes | Yes | *T6,*T44,T7 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[258] | No | No | No | INPUT | |||
lc_otp_program_i.state[265:259] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[266] | No | No | No | INPUT | |||
lc_otp_program_i.state[284:267] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[286:285] | No | No | No | INPUT | |||
lc_otp_program_i.state[293:287] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.state[294] | No | No | No | INPUT | |||
lc_otp_program_i.state[302:295] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T61,T149 | INPUT | |
lc_otp_program_i.state[303] | No | No | No | INPUT | |||
lc_otp_program_i.state[304] | Yes | Yes | *T6,*T44,*T7 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[305] | No | No | No | INPUT | |||
lc_otp_program_i.state[308:306] | Yes | Yes | *T6,*T44,*T7 | Yes | T6,T7,T60 | INPUT | |
lc_otp_program_i.state[309] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:310] | Yes | Yes | T195,T183,T196 | Yes | T195,T183,T196 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T6,T7,T61 | Yes | T6,T7,T61 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T6,T7,T61 | Yes | T6,T7,T61 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T197,T198,T199 | Yes | T197,T198,T199 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T3,T5,T7 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T5,T62,T63 | Yes | T5,T62,T63 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T6,T7,T60 | Yes | T6,T7,T61 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T3,T6,T82 | Yes | T3,T6,T62 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T200,T201,T202 | Yes | T7,T159,T97 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T6,T7,T62 | Yes | T1,T6,T81 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T2,T4 | Yes | T5,T6,T7 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T200,T201,T202 | Yes | T7,T159,T97 | OUTPUT | |
otp_lc_data_o.count[6:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[7] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[8] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[9] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[12:10] | Yes | Yes | T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT | |
otp_lc_data_o.count[13] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[17:14] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[18] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[24:19] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[25] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[31:26] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[34:32] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[63:35] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[64] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[84:65] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[85] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[92:86] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[93] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[98:94] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[99] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[111:100] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[112] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[116:113] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[117] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[120:118] | Yes | Yes | *T44,*T7,*T67 | Yes | T7,T159,T8 | OUTPUT | |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[125:122] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[126] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[127] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[128] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[141:129] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[142] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[153:143] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[154] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[166:155] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT | |
otp_lc_data_o.count[167] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[172:168] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[173] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[182:174] | Yes | Yes | T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT | |
otp_lc_data_o.count[183] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[194:184] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[196:195] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[202:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[203] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[206:204] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[207] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[215:208] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT | |
otp_lc_data_o.count[216] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[220:217] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT | |
otp_lc_data_o.count[221] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[231:222] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT | |
otp_lc_data_o.count[232] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[234:233] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[238:236] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[239] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[241:240] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT | |
otp_lc_data_o.count[242] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[265:243] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[266] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[270:267] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT | |
otp_lc_data_o.count[271] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[274:272] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[275] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[286:276] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT | |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[290:288] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[291] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[293:292] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[294] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[313:295] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT | |
otp_lc_data_o.count[314] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350:315] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[353:352] | Yes | Yes | T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT | |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[364:355] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT | |
otp_lc_data_o.count[365] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[370:366] | Yes | Yes | *T1,*T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.count[371] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[373:372] | Yes | Yes | *T7,*T61,*T75 | Yes | T7,T75,T202 | OUTPUT | |
otp_lc_data_o.count[374] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[378:375] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[381:380] | Yes | Yes | *T148,*T149,*T203 | Yes | T148,T149,T197 | OUTPUT | |
otp_lc_data_o.count[382] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383] | Yes | Yes | T7,T61,T75 | Yes | T7,T75,T202 | OUTPUT | |
otp_lc_data_o.state[32:0] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT | |
otp_lc_data_o.state[33] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[39:34] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.state[41:40] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[76:42] | Yes | Yes | T7,*T67,*T61 | Yes | T7,T149,T119 | OUTPUT | |
otp_lc_data_o.state[77] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[78] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.state[79] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[90:80] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT | |
otp_lc_data_o.state[91] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[93:92] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[94] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[100:95] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT | |
otp_lc_data_o.state[101] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[103:102] | Yes | Yes | T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT | |
otp_lc_data_o.state[104] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[114:105] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT | |
otp_lc_data_o.state[115] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[117:116] | Yes | Yes | T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT | |
otp_lc_data_o.state[118] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[125:119] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[126] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[140:127] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[147:142] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[148] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[158:149] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT | |
otp_lc_data_o.state[159] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[161:160] | Yes | Yes | T6,T7,T67 | Yes | T6,T7,T60 | OUTPUT | |
otp_lc_data_o.state[163:162] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[171:164] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[173] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.state[174] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[175] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.state[176] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[189:177] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT | |
otp_lc_data_o.state[190] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[193:191] | Yes | Yes | T6,T7,T67 | Yes | T6,T7,T60 | OUTPUT | |
otp_lc_data_o.state[194] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[199:195] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[200] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[203:201] | Yes | Yes | *T6,T7,*T67 | Yes | T6,T7,T60 | OUTPUT | |
otp_lc_data_o.state[204] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[210:205] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[212:211] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[213] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[214] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[217:215] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[218] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[225:219] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT | |
otp_lc_data_o.state[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[230:227] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[231] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[237:232] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT | |
otp_lc_data_o.state[238] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[250:239] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.state[251] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[257:252] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[258] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[265:259] | Yes | Yes | T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT | |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[284:267] | Yes | Yes | *T7,*T61,*T149 | Yes | T7,T149,T75 | OUTPUT | |
otp_lc_data_o.state[286:285] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[293:287] | Yes | Yes | *T148,*T149,*T203 | Yes | T44,T148,T149 | OUTPUT | |
otp_lc_data_o.state[294] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[302:295] | Yes | Yes | *T3,*T5,*T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[303] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[304] | Yes | Yes | *T3,*T5,*T7 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[305] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[308:306] | Yes | Yes | *T6,*T44,T7 | Yes | T6,T7,T60 | OUTPUT | |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:310] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T5,T62,T63 | Yes | T5,T62,T63 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T200,T201,T202 | Yes | T7,T159,T97 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T4,T81,T82 | Yes | T62,T157,T204 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T200,T201,T202 | Yes | T7,T159,T97 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T7,T62,T158 | Yes | T1,T81,T82 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T4 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T44,T45,T46 | Yes | T44,T45,T46 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T205,T206,T207 | Yes | T205,T206,T207 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T160,T208,T209 | Yes | T160,T208,T209 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T44,T45,T46 | Yes | T44,T45,T46 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T205,T206,T207 | Yes | T205,T206,T207 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T160,T210,T211 | Yes | T160,T210,T211 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T44,T45,T46 | Yes | T44,T45,T46 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T5,T6,T62 | Yes | T1,T2,T4 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T6,T81,T82 | Yes | T2,T6,T81 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T5,T6 | Yes | T5,T6,T82 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T44,T45,T46 | Yes | T44,T45,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T2,T81 | Yes | T7,T60,T159 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[34:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[35] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[58:36] | Yes | Yes | *T200,*T212,*T1 | Yes | T200,T212,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[59] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[71:60] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[72] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[95:73] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[96] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[171:97] | Yes | Yes | *T200,*T1,*T2 | Yes | T200,T3,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[172] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[174:173] | Yes | Yes | *T200,*T212,*T213 | Yes | T200,T212,T213 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[175] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[212:176] | Yes | Yes | *T119,*T208,*T209 | Yes | T119,T208,T209 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[213] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[234:214] | Yes | Yes | *T1,*T2,*T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[235] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[252:236] | Yes | Yes | *T119,*T208,*T212 | Yes | T119,T208,T212 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[253] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:254] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T3,T5,T6 | Yes | T3,T4,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T3,T5,T6 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T44,T7,T61 | Yes | T7,T41,T42 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T3,T5,T6 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |