| T940 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1524682302 |
|
|
Jul 23 08:03:46 PM PDT 24 |
Jul 23 08:11:21 PM PDT 24 |
3549557346 ps |
| T355 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.3974601794 |
|
|
Jul 23 08:04:14 PM PDT 24 |
Jul 23 08:14:56 PM PDT 24 |
3842541864 ps |
| T941 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.4193665820 |
|
|
Jul 23 07:48:13 PM PDT 24 |
Jul 23 07:52:49 PM PDT 24 |
3115204596 ps |
| T363 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.1953407416 |
|
|
Jul 23 07:35:43 PM PDT 24 |
Jul 23 07:39:29 PM PDT 24 |
3256168997 ps |
| T354 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.2774727642 |
|
|
Jul 23 08:04:38 PM PDT 24 |
Jul 23 08:30:22 PM PDT 24 |
8466368972 ps |
| T942 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3565005728 |
|
|
Jul 23 07:59:22 PM PDT 24 |
Jul 23 08:13:13 PM PDT 24 |
4937544648 ps |
| T782 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.1153687060 |
|
|
Jul 23 08:06:35 PM PDT 24 |
Jul 23 08:14:40 PM PDT 24 |
5871896500 ps |
| T943 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.882870328 |
|
|
Jul 23 07:33:25 PM PDT 24 |
Jul 23 07:39:14 PM PDT 24 |
3122797679 ps |
| T944 |
/workspace/coverage/default/2.chip_tap_straps_prod.593075140 |
|
|
Jul 23 07:58:46 PM PDT 24 |
Jul 23 08:21:48 PM PDT 24 |
12119513004 ps |
| T281 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.931729376 |
|
|
Jul 23 07:58:03 PM PDT 24 |
Jul 23 08:07:30 PM PDT 24 |
8979004264 ps |
| T384 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.861306529 |
|
|
Jul 23 08:07:34 PM PDT 24 |
Jul 23 08:14:26 PM PDT 24 |
4240238126 ps |
| T202 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.2950058407 |
|
|
Jul 23 07:34:04 PM PDT 24 |
Jul 23 09:21:14 PM PDT 24 |
46091222500 ps |
| T697 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.406499165 |
|
|
Jul 23 07:56:30 PM PDT 24 |
Jul 23 08:01:54 PM PDT 24 |
2519616304 ps |
| T732 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.306803747 |
|
|
Jul 23 08:07:19 PM PDT 24 |
Jul 23 08:15:00 PM PDT 24 |
4172535940 ps |
| T56 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.610234143 |
|
|
Jul 23 07:50:45 PM PDT 24 |
Jul 23 08:15:36 PM PDT 24 |
22210995944 ps |
| T232 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.3598033744 |
|
|
Jul 23 07:34:47 PM PDT 24 |
Jul 23 07:56:39 PM PDT 24 |
9242689078 ps |
| T433 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.726326678 |
|
|
Jul 23 08:11:31 PM PDT 24 |
Jul 23 08:22:44 PM PDT 24 |
5196938584 ps |
| T250 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.2298339227 |
|
|
Jul 23 07:54:33 PM PDT 24 |
Jul 23 08:02:15 PM PDT 24 |
6365194290 ps |
| T272 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3439418806 |
|
|
Jul 23 07:50:13 PM PDT 24 |
Jul 23 08:00:29 PM PDT 24 |
4780461054 ps |
| T273 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.1098275995 |
|
|
Jul 23 08:09:42 PM PDT 24 |
Jul 23 08:18:41 PM PDT 24 |
4630298740 ps |
| T274 |
/workspace/coverage/default/0.rom_keymgr_functest.309746123 |
|
|
Jul 23 07:40:00 PM PDT 24 |
Jul 23 07:51:42 PM PDT 24 |
4563220572 ps |
| T275 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.1365347015 |
|
|
Jul 23 07:57:44 PM PDT 24 |
Jul 23 08:02:59 PM PDT 24 |
3570521892 ps |
| T276 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.4219099174 |
|
|
Jul 23 07:32:59 PM PDT 24 |
Jul 23 08:01:20 PM PDT 24 |
8226242198 ps |
| T25 |
/workspace/coverage/default/1.chip_sw_gpio.2386379536 |
|
|
Jul 23 07:43:11 PM PDT 24 |
Jul 23 07:51:05 PM PDT 24 |
3641066639 ps |
| T277 |
/workspace/coverage/default/1.chip_sw_aes_enc.3127881697 |
|
|
Jul 23 07:45:56 PM PDT 24 |
Jul 23 07:51:41 PM PDT 24 |
3295127112 ps |
| T38 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.4034750279 |
|
|
Jul 23 07:43:12 PM PDT 24 |
Jul 23 07:49:19 PM PDT 24 |
3950305039 ps |
| T278 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.2246168241 |
|
|
Jul 23 07:49:21 PM PDT 24 |
Jul 23 08:03:15 PM PDT 24 |
6731363831 ps |
| T254 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.2698204956 |
|
|
Jul 23 07:54:28 PM PDT 24 |
Jul 23 08:25:45 PM PDT 24 |
13015317160 ps |
| T793 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.2293399098 |
|
|
Jul 23 08:13:20 PM PDT 24 |
Jul 23 08:27:34 PM PDT 24 |
5635929536 ps |
| T765 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.304161151 |
|
|
Jul 23 08:07:39 PM PDT 24 |
Jul 23 08:23:39 PM PDT 24 |
5988149160 ps |
| T141 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.325081752 |
|
|
Jul 23 07:59:01 PM PDT 24 |
Jul 23 08:03:45 PM PDT 24 |
3161839802 ps |
| T945 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.2465859269 |
|
|
Jul 23 08:04:07 PM PDT 24 |
Jul 23 09:16:56 PM PDT 24 |
18885660394 ps |
| T946 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.1342728401 |
|
|
Jul 23 07:34:42 PM PDT 24 |
Jul 23 07:49:30 PM PDT 24 |
8256034786 ps |
| T947 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.1941375444 |
|
|
Jul 23 07:50:08 PM PDT 24 |
Jul 23 07:57:57 PM PDT 24 |
3477425360 ps |
| T776 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.2156738148 |
|
|
Jul 23 08:13:56 PM PDT 24 |
Jul 23 08:20:30 PM PDT 24 |
3199657072 ps |
| T464 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.3812972888 |
|
|
Jul 23 07:34:56 PM PDT 24 |
Jul 23 07:44:43 PM PDT 24 |
2861253016 ps |
| T242 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.1655336781 |
|
|
Jul 23 07:44:23 PM PDT 24 |
Jul 23 09:26:41 PM PDT 24 |
49981486357 ps |
| T948 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.1463693630 |
|
|
Jul 23 07:44:28 PM PDT 24 |
Jul 23 07:58:37 PM PDT 24 |
6111829549 ps |
| T949 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.1532563075 |
|
|
Jul 23 07:42:48 PM PDT 24 |
Jul 23 07:46:35 PM PDT 24 |
3037656900 ps |
| T950 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.1200141816 |
|
|
Jul 23 07:33:33 PM PDT 24 |
Jul 23 07:57:04 PM PDT 24 |
8285748720 ps |
| T951 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.733790694 |
|
|
Jul 23 07:44:03 PM PDT 24 |
Jul 23 08:55:33 PM PDT 24 |
14747095836 ps |
| T725 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.2531502024 |
|
|
Jul 23 08:06:15 PM PDT 24 |
Jul 23 08:18:43 PM PDT 24 |
4937303516 ps |
| T952 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.2920826188 |
|
|
Jul 23 07:55:37 PM PDT 24 |
Jul 23 08:41:12 PM PDT 24 |
26412621455 ps |
| T677 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.3336688094 |
|
|
Jul 23 07:56:02 PM PDT 24 |
Jul 23 09:13:27 PM PDT 24 |
27235433572 ps |
| T791 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.2581346792 |
|
|
Jul 23 08:11:11 PM PDT 24 |
Jul 23 08:21:27 PM PDT 24 |
4764261956 ps |
| T324 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.2767760241 |
|
|
Jul 23 08:02:22 PM PDT 24 |
Jul 23 08:13:34 PM PDT 24 |
4457581276 ps |
| T953 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.1400680392 |
|
|
Jul 23 07:55:24 PM PDT 24 |
Jul 23 08:58:46 PM PDT 24 |
14834095704 ps |
| T43 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.639365990 |
|
|
Jul 23 07:44:14 PM PDT 24 |
Jul 23 09:00:15 PM PDT 24 |
14557983121 ps |
| T364 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.2355599092 |
|
|
Jul 23 08:09:52 PM PDT 24 |
Jul 23 08:16:39 PM PDT 24 |
4144704600 ps |
| T22 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.927352312 |
|
|
Jul 23 07:35:57 PM PDT 24 |
Jul 23 07:41:15 PM PDT 24 |
3593523352 ps |
| T387 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.614134239 |
|
|
Jul 23 08:09:38 PM PDT 24 |
Jul 23 08:16:53 PM PDT 24 |
3539600272 ps |
| T26 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.1282532800 |
|
|
Jul 23 07:41:59 PM PDT 24 |
Jul 23 07:48:28 PM PDT 24 |
3593178392 ps |
| T819 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.384687782 |
|
|
Jul 23 07:41:58 PM PDT 24 |
Jul 23 07:52:13 PM PDT 24 |
4947083698 ps |
| T954 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.3306831537 |
|
|
Jul 23 07:41:44 PM PDT 24 |
Jul 23 07:45:50 PM PDT 24 |
2809992360 ps |
| T955 |
/workspace/coverage/default/1.chip_sw_example_rom.3506777391 |
|
|
Jul 23 07:40:25 PM PDT 24 |
Jul 23 07:42:18 PM PDT 24 |
2925815080 ps |
| T956 |
/workspace/coverage/default/0.chip_sw_hmac_enc.2771656900 |
|
|
Jul 23 07:36:09 PM PDT 24 |
Jul 23 07:39:49 PM PDT 24 |
2627696632 ps |
| T212 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.1606827665 |
|
|
Jul 23 07:44:07 PM PDT 24 |
Jul 23 09:17:57 PM PDT 24 |
44124207440 ps |
| T957 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.4115359762 |
|
|
Jul 23 07:35:36 PM PDT 24 |
Jul 23 07:56:16 PM PDT 24 |
10692423850 ps |
| T249 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.1850707368 |
|
|
Jul 23 08:05:05 PM PDT 24 |
Jul 23 08:18:36 PM PDT 24 |
6003693900 ps |
| T166 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.3751996593 |
|
|
Jul 23 07:51:57 PM PDT 24 |
Jul 23 11:04:37 PM PDT 24 |
64676585408 ps |
| T190 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.3111639152 |
|
|
Jul 23 07:45:55 PM PDT 24 |
Jul 23 08:26:05 PM PDT 24 |
13628110732 ps |
| T820 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.4025398004 |
|
|
Jul 23 08:11:04 PM PDT 24 |
Jul 23 08:22:33 PM PDT 24 |
5200555150 ps |
| T260 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.127414390 |
|
|
Jul 23 07:51:40 PM PDT 24 |
Jul 23 08:00:02 PM PDT 24 |
4323312160 ps |
| T958 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.3693569681 |
|
|
Jul 23 08:03:57 PM PDT 24 |
Jul 23 08:49:09 PM PDT 24 |
11652643651 ps |
| T959 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.2738009685 |
|
|
Jul 23 07:56:07 PM PDT 24 |
Jul 23 08:02:40 PM PDT 24 |
4344499000 ps |
| T240 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.2645431140 |
|
|
Jul 23 07:43:53 PM PDT 24 |
Jul 23 09:25:12 PM PDT 24 |
50449432125 ps |
| T960 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.3350908994 |
|
|
Jul 23 07:50:28 PM PDT 24 |
Jul 23 08:08:45 PM PDT 24 |
6220734136 ps |
| T219 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.3523686760 |
|
|
Jul 23 08:01:51 PM PDT 24 |
Jul 23 08:05:55 PM PDT 24 |
2595211543 ps |
| T241 |
/workspace/coverage/default/2.chip_sw_flash_init.3360407310 |
|
|
Jul 23 07:53:52 PM PDT 24 |
Jul 23 08:28:55 PM PDT 24 |
23563628600 ps |
| T78 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.549291041 |
|
|
Jul 23 07:56:37 PM PDT 24 |
Jul 23 08:05:03 PM PDT 24 |
3842049033 ps |
| T263 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2174555157 |
|
|
Jul 23 07:59:08 PM PDT 24 |
Jul 23 08:06:09 PM PDT 24 |
3279391988 ps |
| T961 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1208489443 |
|
|
Jul 23 07:55:28 PM PDT 24 |
Jul 23 08:03:40 PM PDT 24 |
6700059990 ps |
| T280 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.4184099565 |
|
|
Jul 23 07:42:55 PM PDT 24 |
Jul 23 08:48:58 PM PDT 24 |
15068152636 ps |
| T413 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.2348701449 |
|
|
Jul 23 07:57:09 PM PDT 24 |
Jul 23 08:01:08 PM PDT 24 |
2548949108 ps |
| T962 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.1810047346 |
|
|
Jul 23 07:45:40 PM PDT 24 |
Jul 23 07:50:05 PM PDT 24 |
3083563454 ps |
| T963 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.86949132 |
|
|
Jul 23 07:33:26 PM PDT 24 |
Jul 23 07:40:29 PM PDT 24 |
6962836302 ps |
| T964 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.3880661913 |
|
|
Jul 23 07:36:43 PM PDT 24 |
Jul 23 07:40:30 PM PDT 24 |
3021515832 ps |
| T965 |
/workspace/coverage/default/1.chip_sw_power_idle_load.100902633 |
|
|
Jul 23 07:50:50 PM PDT 24 |
Jul 23 08:03:27 PM PDT 24 |
4124255872 ps |
| T817 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.2957212293 |
|
|
Jul 23 08:12:32 PM PDT 24 |
Jul 23 08:25:25 PM PDT 24 |
6313483668 ps |
| T365 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.626214105 |
|
|
Jul 23 07:33:25 PM PDT 24 |
Jul 23 08:09:55 PM PDT 24 |
8491130588 ps |
| T76 |
/workspace/coverage/default/2.chip_jtag_mem_access.2891815833 |
|
|
Jul 23 07:51:30 PM PDT 24 |
Jul 23 08:20:03 PM PDT 24 |
13582619377 ps |
| T966 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.2087251398 |
|
|
Jul 23 07:35:27 PM PDT 24 |
Jul 23 07:40:11 PM PDT 24 |
3049010376 ps |
| T196 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.919690780 |
|
|
Jul 23 08:05:19 PM PDT 24 |
Jul 23 08:13:41 PM PDT 24 |
4831678324 ps |
| T57 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.3241353236 |
|
|
Jul 23 07:58:39 PM PDT 24 |
Jul 23 08:31:51 PM PDT 24 |
23866757436 ps |
| T967 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2272421548 |
|
|
Jul 23 08:00:11 PM PDT 24 |
Jul 23 08:04:34 PM PDT 24 |
2970113186 ps |
| T968 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.1355828531 |
|
|
Jul 23 07:45:56 PM PDT 24 |
Jul 23 08:37:12 PM PDT 24 |
10947127808 ps |
| T70 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.3927618052 |
|
|
Jul 23 07:49:48 PM PDT 24 |
Jul 23 07:55:27 PM PDT 24 |
3555410256 ps |
| T385 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.4047818951 |
|
|
Jul 23 08:10:10 PM PDT 24 |
Jul 23 08:18:09 PM PDT 24 |
3707289970 ps |
| T969 |
/workspace/coverage/default/0.chip_sw_kmac_idle.2391117374 |
|
|
Jul 23 07:34:35 PM PDT 24 |
Jul 23 07:39:55 PM PDT 24 |
2785168824 ps |
| T970 |
/workspace/coverage/default/1.chip_sw_example_flash.1676781791 |
|
|
Jul 23 07:41:34 PM PDT 24 |
Jul 23 07:45:45 PM PDT 24 |
3138666802 ps |
| T209 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.4088035510 |
|
|
Jul 23 07:34:36 PM PDT 24 |
Jul 23 07:45:27 PM PDT 24 |
7907303396 ps |
| T971 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.2367701678 |
|
|
Jul 23 07:47:28 PM PDT 24 |
Jul 23 08:02:36 PM PDT 24 |
7490103442 ps |
| T251 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.2233086015 |
|
|
Jul 23 08:10:53 PM PDT 24 |
Jul 23 08:20:33 PM PDT 24 |
5771460730 ps |
| T972 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.1326685660 |
|
|
Jul 23 07:40:29 PM PDT 24 |
Jul 23 07:52:12 PM PDT 24 |
3888715848 ps |
| T366 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.3794073117 |
|
|
Jul 23 07:49:08 PM PDT 24 |
Jul 23 08:18:44 PM PDT 24 |
8043597272 ps |
| T973 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.1652366765 |
|
|
Jul 23 08:01:32 PM PDT 24 |
Jul 23 08:12:18 PM PDT 24 |
4371417630 ps |
| T123 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.2980501558 |
|
|
Jul 23 07:59:11 PM PDT 24 |
Jul 23 08:09:31 PM PDT 24 |
6330217328 ps |
| T974 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.2134760224 |
|
|
Jul 23 07:49:04 PM PDT 24 |
Jul 23 07:52:22 PM PDT 24 |
2454660280 ps |
| T975 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.1756564984 |
|
|
Jul 23 07:33:46 PM PDT 24 |
Jul 23 07:38:39 PM PDT 24 |
2928152528 ps |
| T976 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.1476221569 |
|
|
Jul 23 07:54:41 PM PDT 24 |
Jul 23 07:59:25 PM PDT 24 |
2621802080 ps |
| T372 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.895137201 |
|
|
Jul 23 08:11:18 PM PDT 24 |
Jul 23 08:19:04 PM PDT 24 |
3824270280 ps |
| T391 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.3692492238 |
|
|
Jul 23 07:56:21 PM PDT 24 |
Jul 23 08:02:27 PM PDT 24 |
3512970404 ps |
| T392 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.1030478985 |
|
|
Jul 23 07:56:00 PM PDT 24 |
Jul 23 09:00:41 PM PDT 24 |
15696423496 ps |
| T358 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.3931693910 |
|
|
Jul 23 08:12:21 PM PDT 24 |
Jul 23 08:22:12 PM PDT 24 |
5252632558 ps |
| T39 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.3328086466 |
|
|
Jul 23 07:36:35 PM PDT 24 |
Jul 23 07:44:44 PM PDT 24 |
3550424025 ps |
| T322 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.2586650342 |
|
|
Jul 23 07:35:56 PM PDT 24 |
Jul 23 08:06:41 PM PDT 24 |
7389592204 ps |
| T393 |
/workspace/coverage/default/0.chip_sw_coremark.101521177 |
|
|
Jul 23 07:34:14 PM PDT 24 |
Jul 23 11:41:07 PM PDT 24 |
71428068040 ps |
| T394 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.969527060 |
|
|
Jul 23 08:06:53 PM PDT 24 |
Jul 23 08:17:29 PM PDT 24 |
4495521280 ps |
| T395 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.2328778748 |
|
|
Jul 23 08:06:54 PM PDT 24 |
Jul 23 08:22:40 PM PDT 24 |
6611255780 ps |
| T177 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.526053481 |
|
|
Jul 23 07:53:32 PM PDT 24 |
Jul 23 08:30:41 PM PDT 24 |
7946500584 ps |
| T977 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.2250096138 |
|
|
Jul 23 07:57:29 PM PDT 24 |
Jul 23 08:04:18 PM PDT 24 |
3817010362 ps |
| T978 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.1503516942 |
|
|
Jul 23 08:04:25 PM PDT 24 |
Jul 23 08:30:07 PM PDT 24 |
8213045070 ps |
| T979 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.3384603774 |
|
|
Jul 23 07:59:50 PM PDT 24 |
Jul 23 08:03:30 PM PDT 24 |
3396780780 ps |
| T709 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.1475857021 |
|
|
Jul 23 07:56:15 PM PDT 24 |
Jul 23 08:36:12 PM PDT 24 |
7995409880 ps |
| T980 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1403363292 |
|
|
Jul 23 07:59:02 PM PDT 24 |
Jul 23 08:09:04 PM PDT 24 |
4107646920 ps |
| T981 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1512043986 |
|
|
Jul 23 07:49:24 PM PDT 24 |
Jul 23 08:00:44 PM PDT 24 |
4106519472 ps |
| T124 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.4275529119 |
|
|
Jul 23 07:47:53 PM PDT 24 |
Jul 23 08:03:21 PM PDT 24 |
7399146584 ps |
| T264 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1004266899 |
|
|
Jul 23 07:50:12 PM PDT 24 |
Jul 23 07:56:45 PM PDT 24 |
3549118900 ps |
| T334 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.3976980133 |
|
|
Jul 23 07:43:54 PM PDT 24 |
Jul 23 07:53:03 PM PDT 24 |
4544893726 ps |
| T780 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.3777884523 |
|
|
Jul 23 08:08:59 PM PDT 24 |
Jul 23 08:15:33 PM PDT 24 |
3242204052 ps |
| T738 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.154358390 |
|
|
Jul 23 08:11:33 PM PDT 24 |
Jul 23 08:20:11 PM PDT 24 |
4364097268 ps |
| T414 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.3660061791 |
|
|
Jul 23 07:53:16 PM PDT 24 |
Jul 23 08:03:58 PM PDT 24 |
8768791501 ps |
| T982 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.2846632342 |
|
|
Jul 23 07:43:31 PM PDT 24 |
Jul 23 09:24:06 PM PDT 24 |
22854243551 ps |
| T983 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.4111320073 |
|
|
Jul 23 07:33:27 PM PDT 24 |
Jul 23 08:22:51 PM PDT 24 |
32933026641 ps |
| T984 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1521971848 |
|
|
Jul 23 07:46:27 PM PDT 24 |
Jul 23 08:18:34 PM PDT 24 |
9856349130 ps |
| T985 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3357811597 |
|
|
Jul 23 07:56:48 PM PDT 24 |
Jul 23 08:26:31 PM PDT 24 |
14292950216 ps |
| T673 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.260930533 |
|
|
Jul 23 07:47:18 PM PDT 24 |
Jul 23 07:57:56 PM PDT 24 |
3323662394 ps |
| T986 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.603137598 |
|
|
Jul 23 07:33:37 PM PDT 24 |
Jul 23 08:06:24 PM PDT 24 |
6924688510 ps |
| T987 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.2118831225 |
|
|
Jul 23 08:07:34 PM PDT 24 |
Jul 23 09:07:32 PM PDT 24 |
24280853982 ps |
| T988 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.1687708322 |
|
|
Jul 23 08:03:45 PM PDT 24 |
Jul 23 08:08:15 PM PDT 24 |
2687886440 ps |
| T349 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.3300337111 |
|
|
Jul 23 07:46:14 PM PDT 24 |
Jul 23 07:50:30 PM PDT 24 |
2752352080 ps |
| T217 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.505810745 |
|
|
Jul 23 08:13:57 PM PDT 24 |
Jul 23 08:19:33 PM PDT 24 |
4031445440 ps |
| T35 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.4147869507 |
|
|
Jul 23 07:34:17 PM PDT 24 |
Jul 23 07:43:59 PM PDT 24 |
5928110284 ps |
| T682 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.36059108 |
|
|
Jul 23 07:34:12 PM PDT 24 |
Jul 23 07:36:22 PM PDT 24 |
2891252654 ps |
| T989 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.1709713147 |
|
|
Jul 23 08:01:51 PM PDT 24 |
Jul 23 08:42:10 PM PDT 24 |
11398566434 ps |
| T55 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.3537898100 |
|
|
Jul 23 07:42:43 PM PDT 24 |
Jul 23 07:46:32 PM PDT 24 |
2631526792 ps |
| T422 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.1804719106 |
|
|
Jul 23 08:11:26 PM PDT 24 |
Jul 23 08:22:40 PM PDT 24 |
5510193712 ps |
| T423 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.2776294682 |
|
|
Jul 23 07:40:41 PM PDT 24 |
Jul 23 08:49:40 PM PDT 24 |
15164409824 ps |
| T23 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.938917507 |
|
|
Jul 23 07:35:31 PM PDT 24 |
Jul 23 08:04:10 PM PDT 24 |
23482079134 ps |
| T424 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.1691902593 |
|
|
Jul 23 07:34:01 PM PDT 24 |
Jul 23 07:50:00 PM PDT 24 |
5602660197 ps |
| T425 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.556276282 |
|
|
Jul 23 08:13:13 PM PDT 24 |
Jul 23 08:23:47 PM PDT 24 |
4832343888 ps |
| T426 |
/workspace/coverage/default/4.chip_tap_straps_dev.55994574 |
|
|
Jul 23 08:03:08 PM PDT 24 |
Jul 23 08:28:58 PM PDT 24 |
15336326170 ps |
| T427 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.1926689560 |
|
|
Jul 23 07:37:39 PM PDT 24 |
Jul 23 07:41:19 PM PDT 24 |
3541208505 ps |
| T27 |
/workspace/coverage/default/0.chip_sw_gpio.3257475474 |
|
|
Jul 23 07:32:48 PM PDT 24 |
Jul 23 07:40:44 PM PDT 24 |
4428754650 ps |
| T428 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.833001568 |
|
|
Jul 23 07:34:35 PM PDT 24 |
Jul 23 07:38:25 PM PDT 24 |
2577365749 ps |
| T990 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.1239634072 |
|
|
Jul 23 07:33:12 PM PDT 24 |
Jul 23 07:35:48 PM PDT 24 |
2779252192 ps |
| T327 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.2550490708 |
|
|
Jul 23 07:42:27 PM PDT 24 |
Jul 23 07:55:16 PM PDT 24 |
5220334932 ps |
| T991 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.2406382569 |
|
|
Jul 23 07:43:28 PM PDT 24 |
Jul 23 08:48:29 PM PDT 24 |
14690103111 ps |
| T339 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1022090453 |
|
|
Jul 23 07:37:50 PM PDT 24 |
Jul 23 07:47:44 PM PDT 24 |
4871510081 ps |
| T191 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.3711307078 |
|
|
Jul 23 08:11:18 PM PDT 24 |
Jul 23 08:19:00 PM PDT 24 |
3815558952 ps |
| T11 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.2694908800 |
|
|
Jul 23 07:43:37 PM PDT 24 |
Jul 23 07:53:49 PM PDT 24 |
4816512980 ps |
| T992 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.2150936684 |
|
|
Jul 23 07:59:36 PM PDT 24 |
Jul 23 09:01:15 PM PDT 24 |
15999434389 ps |
| T993 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.633267035 |
|
|
Jul 23 07:53:21 PM PDT 24 |
Jul 23 07:59:24 PM PDT 24 |
2839729110 ps |
| T12 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.1051139971 |
|
|
Jul 23 07:44:04 PM PDT 24 |
Jul 23 07:51:56 PM PDT 24 |
3779599273 ps |
| T207 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.3938736375 |
|
|
Jul 23 07:35:02 PM PDT 24 |
Jul 23 07:45:23 PM PDT 24 |
3696962504 ps |
| T806 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.3208438845 |
|
|
Jul 23 08:11:28 PM PDT 24 |
Jul 23 08:18:18 PM PDT 24 |
3901083990 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.969297334 |
|
|
Jul 23 08:01:30 PM PDT 24 |
Jul 23 08:07:20 PM PDT 24 |
3111149810 ps |
| T995 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.245087777 |
|
|
Jul 23 07:43:41 PM PDT 24 |
Jul 23 08:59:03 PM PDT 24 |
15437976912 ps |
| T255 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.1897813001 |
|
|
Jul 23 08:06:43 PM PDT 24 |
Jul 23 08:20:07 PM PDT 24 |
5885920152 ps |
| T996 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.1400150384 |
|
|
Jul 23 07:53:34 PM PDT 24 |
Jul 23 08:39:15 PM PDT 24 |
14027926300 ps |
| T65 |
/workspace/coverage/default/3.chip_tap_straps_rma.117961863 |
|
|
Jul 23 08:02:42 PM PDT 24 |
Jul 23 08:11:36 PM PDT 24 |
6077712486 ps |
| T173 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.3801960989 |
|
|
Jul 23 07:45:52 PM PDT 24 |
Jul 23 08:39:49 PM PDT 24 |
20720009656 ps |
| T739 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.840274461 |
|
|
Jul 23 08:09:57 PM PDT 24 |
Jul 23 08:20:02 PM PDT 24 |
5449489936 ps |
| T786 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.514018033 |
|
|
Jul 23 08:06:59 PM PDT 24 |
Jul 23 08:15:18 PM PDT 24 |
3739303744 ps |
| T997 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.921030767 |
|
|
Jul 23 07:56:22 PM PDT 24 |
Jul 23 08:13:03 PM PDT 24 |
6182620200 ps |
| T58 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.1498294996 |
|
|
Jul 23 07:33:15 PM PDT 24 |
Jul 23 07:40:09 PM PDT 24 |
3494164984 ps |
| T359 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3106571734 |
|
|
Jul 23 07:33:02 PM PDT 24 |
Jul 23 08:37:27 PM PDT 24 |
33727505963 ps |
| T998 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.1018189405 |
|
|
Jul 23 07:56:57 PM PDT 24 |
Jul 23 08:05:59 PM PDT 24 |
4726521244 ps |
| T244 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.2156851453 |
|
|
Jul 23 07:37:23 PM PDT 24 |
Jul 23 07:44:37 PM PDT 24 |
5246568924 ps |
| T999 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.43765336 |
|
|
Jul 23 07:45:40 PM PDT 24 |
Jul 23 08:56:10 PM PDT 24 |
19034063262 ps |
| T803 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.3694991670 |
|
|
Jul 23 08:08:23 PM PDT 24 |
Jul 23 08:19:47 PM PDT 24 |
5170329336 ps |
| T83 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.2873984995 |
|
|
Jul 23 08:09:59 PM PDT 24 |
Jul 23 08:15:57 PM PDT 24 |
3216169030 ps |
| T1000 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.3493320677 |
|
|
Jul 23 07:44:02 PM PDT 24 |
Jul 23 09:20:17 PM PDT 24 |
18017608900 ps |
| T1001 |
/workspace/coverage/default/2.rom_e2e_smoke.1370323807 |
|
|
Jul 23 08:05:27 PM PDT 24 |
Jul 23 09:17:27 PM PDT 24 |
14473991468 ps |
| T457 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.2691201857 |
|
|
Jul 23 08:11:04 PM PDT 24 |
Jul 23 08:19:22 PM PDT 24 |
4020237128 ps |
| T740 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.1984273603 |
|
|
Jul 23 08:07:50 PM PDT 24 |
Jul 23 08:17:57 PM PDT 24 |
4946396900 ps |
| T174 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.3287995009 |
|
|
Jul 23 07:42:55 PM PDT 24 |
Jul 23 10:42:44 PM PDT 24 |
59719988600 ps |
| T1002 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.2733237171 |
|
|
Jul 23 07:42:05 PM PDT 24 |
Jul 23 08:07:37 PM PDT 24 |
6111530650 ps |
| T1003 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.875286716 |
|
|
Jul 23 07:42:02 PM PDT 24 |
Jul 23 08:37:51 PM PDT 24 |
11203588258 ps |
| T1004 |
/workspace/coverage/default/0.chip_tap_straps_prod.1495275515 |
|
|
Jul 23 07:35:05 PM PDT 24 |
Jul 23 07:37:17 PM PDT 24 |
1881062877 ps |
| T1005 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.1750581328 |
|
|
Jul 23 07:35:29 PM PDT 24 |
Jul 23 07:42:17 PM PDT 24 |
3469338456 ps |
| T247 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.387317558 |
|
|
Jul 23 08:06:53 PM PDT 24 |
Jul 23 08:18:28 PM PDT 24 |
4962909928 ps |
| T340 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.1756106453 |
|
|
Jul 23 07:43:56 PM PDT 24 |
Jul 23 07:57:01 PM PDT 24 |
3932122198 ps |
| T762 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.1105486919 |
|
|
Jul 23 08:13:41 PM PDT 24 |
Jul 23 08:19:52 PM PDT 24 |
3927262464 ps |
| T1006 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.1826194689 |
|
|
Jul 23 07:34:47 PM PDT 24 |
Jul 23 07:53:33 PM PDT 24 |
11595412753 ps |
| T787 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.1456656087 |
|
|
Jul 23 08:11:54 PM PDT 24 |
Jul 23 08:20:17 PM PDT 24 |
4390123044 ps |
| T325 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.120580802 |
|
|
Jul 23 08:04:16 PM PDT 24 |
Jul 23 08:45:35 PM PDT 24 |
13796415672 ps |
| T179 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.1050418883 |
|
|
Jul 23 07:34:30 PM PDT 24 |
Jul 23 10:38:29 PM PDT 24 |
58378481980 ps |
| T1007 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.3629915883 |
|
|
Jul 23 08:05:21 PM PDT 24 |
Jul 23 08:56:07 PM PDT 24 |
11147454368 ps |
| T347 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.3687443693 |
|
|
Jul 23 08:08:39 PM PDT 24 |
Jul 23 08:19:08 PM PDT 24 |
4488947444 ps |
| T47 |
/workspace/coverage/default/2.chip_jtag_csr_rw.3213759786 |
|
|
Jul 23 07:51:37 PM PDT 24 |
Jul 23 08:34:32 PM PDT 24 |
19701246930 ps |
| T1008 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.3794325514 |
|
|
Jul 23 07:49:43 PM PDT 24 |
Jul 23 07:56:40 PM PDT 24 |
5322340000 ps |
| T796 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.2972135130 |
|
|
Jul 23 08:14:50 PM PDT 24 |
Jul 23 08:31:32 PM PDT 24 |
5098144528 ps |
| T1009 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.1850018359 |
|
|
Jul 23 08:02:57 PM PDT 24 |
Jul 23 08:13:48 PM PDT 24 |
4343088828 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.1065494085 |
|
|
Jul 23 07:57:42 PM PDT 24 |
Jul 23 08:38:48 PM PDT 24 |
11502283529 ps |
| T1011 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.651717270 |
|
|
Jul 23 07:35:58 PM PDT 24 |
Jul 23 07:45:42 PM PDT 24 |
4012524326 ps |
| T243 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.3659108937 |
|
|
Jul 23 07:49:19 PM PDT 24 |
Jul 23 08:24:54 PM PDT 24 |
21371154576 ps |
| T1012 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.3197872323 |
|
|
Jul 23 07:54:18 PM PDT 24 |
Jul 23 08:14:28 PM PDT 24 |
5965115781 ps |
| T1013 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.3746860586 |
|
|
Jul 23 08:02:59 PM PDT 24 |
Jul 23 08:06:45 PM PDT 24 |
2747607240 ps |
| T218 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.3174178792 |
|
|
Jul 23 07:46:41 PM PDT 24 |
Jul 23 08:08:57 PM PDT 24 |
6398202416 ps |
| T742 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.2922673029 |
|
|
Jul 23 08:07:51 PM PDT 24 |
Jul 23 08:18:36 PM PDT 24 |
5568043144 ps |
| T13 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.971761102 |
|
|
Jul 23 07:35:14 PM PDT 24 |
Jul 23 07:46:05 PM PDT 24 |
5775729225 ps |
| T1014 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.1867537220 |
|
|
Jul 23 07:35:36 PM PDT 24 |
Jul 23 07:55:51 PM PDT 24 |
6433886024 ps |
| T289 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.4098392626 |
|
|
Jul 23 08:01:30 PM PDT 24 |
Jul 23 08:11:50 PM PDT 24 |
4819658600 ps |
| T187 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.268439235 |
|
|
Jul 23 07:47:31 PM PDT 24 |
Jul 23 11:26:08 PM PDT 24 |
254505036500 ps |
| T1015 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.4213155849 |
|
|
Jul 23 07:35:43 PM PDT 24 |
Jul 23 07:41:01 PM PDT 24 |
3390496860 ps |
| T1016 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.3988872752 |
|
|
Jul 23 07:53:19 PM PDT 24 |
Jul 23 07:57:04 PM PDT 24 |
3314578530 ps |
| T234 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1172459492 |
|
|
Jul 23 07:50:21 PM PDT 24 |
Jul 23 08:42:42 PM PDT 24 |
10860231216 ps |
| T321 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.1994709537 |
|
|
Jul 23 07:33:10 PM PDT 24 |
Jul 23 08:09:25 PM PDT 24 |
13582144736 ps |
| T679 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.3642017473 |
|
|
Jul 23 07:34:48 PM PDT 24 |
Jul 23 07:44:16 PM PDT 24 |
4522056274 ps |
| T749 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.1577949073 |
|
|
Jul 23 08:09:59 PM PDT 24 |
Jul 23 08:24:51 PM PDT 24 |
6037946560 ps |
| T748 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.1162634721 |
|
|
Jul 23 08:04:56 PM PDT 24 |
Jul 23 08:12:59 PM PDT 24 |
3866162578 ps |
| T1017 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.3144616540 |
|
|
Jul 23 07:40:38 PM PDT 24 |
Jul 23 07:45:02 PM PDT 24 |
2766997328 ps |
| T356 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.3306327499 |
|
|
Jul 23 08:03:08 PM PDT 24 |
Jul 23 08:34:28 PM PDT 24 |
8385019491 ps |
| T252 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.15534657 |
|
|
Jul 23 08:11:46 PM PDT 24 |
Jul 23 08:23:39 PM PDT 24 |
5185515060 ps |
| T1018 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3037856880 |
|
|
Jul 23 07:58:59 PM PDT 24 |
Jul 23 08:10:38 PM PDT 24 |
4301231600 ps |
| T388 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.404299606 |
|
|
Jul 23 08:12:42 PM PDT 24 |
Jul 23 08:20:37 PM PDT 24 |
3410844616 ps |
| T1019 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.827186404 |
|
|
Jul 23 07:34:19 PM PDT 24 |
Jul 23 07:43:28 PM PDT 24 |
4723650944 ps |
| T1020 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.2988413680 |
|
|
Jul 23 08:06:17 PM PDT 24 |
Jul 23 08:17:28 PM PDT 24 |
5243875812 ps |
| T71 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.1764448037 |
|
|
Jul 23 07:34:41 PM PDT 24 |
Jul 23 07:41:19 PM PDT 24 |
7657229834 ps |
| T1021 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.813468221 |
|
|
Jul 23 07:53:42 PM PDT 24 |
Jul 23 08:05:34 PM PDT 24 |
4536259892 ps |
| T723 |
/workspace/coverage/default/0.rom_raw_unlock.724895322 |
|
|
Jul 23 07:41:56 PM PDT 24 |
Jul 23 07:45:46 PM PDT 24 |
5048898453 ps |
| T168 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.611692182 |
|
|
Jul 23 07:46:38 PM PDT 24 |
Jul 23 08:18:22 PM PDT 24 |
23369759116 ps |
| T1022 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.1660853313 |
|
|
Jul 23 07:54:05 PM PDT 24 |
Jul 23 10:58:38 PM PDT 24 |
59286596261 ps |
| T237 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.2938011357 |
|
|
Jul 23 07:32:17 PM PDT 24 |
Jul 23 09:04:19 PM PDT 24 |
46890037581 ps |
| T319 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.2425912639 |
|
|
Jul 23 07:53:28 PM PDT 24 |
Jul 23 08:10:59 PM PDT 24 |
5291660664 ps |
| T800 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.952725894 |
|
|
Jul 23 08:06:36 PM PDT 24 |
Jul 23 08:17:30 PM PDT 24 |
4493449350 ps |
| T169 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.1116491306 |
|
|
Jul 23 07:33:26 PM PDT 24 |
Jul 23 07:39:49 PM PDT 24 |
2999644675 ps |
| T1023 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.3747216378 |
|
|
Jul 23 07:34:58 PM PDT 24 |
Jul 23 07:44:38 PM PDT 24 |
3838855756 ps |
| T1024 |
/workspace/coverage/default/2.chip_sw_kmac_idle.2163500480 |
|
|
Jul 23 07:57:12 PM PDT 24 |
Jul 23 08:01:45 PM PDT 24 |
2822075814 ps |
| T1025 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.1441312374 |
|
|
Jul 23 07:43:37 PM PDT 24 |
Jul 23 08:58:32 PM PDT 24 |
15490094060 ps |
| T675 |
/workspace/coverage/default/0.chip_sw_power_idle_load.2667668282 |
|
|
Jul 23 07:38:39 PM PDT 24 |
Jul 23 07:51:37 PM PDT 24 |
5279956006 ps |
| T396 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.2482063767 |
|
|
Jul 23 07:43:42 PM PDT 24 |
Jul 23 09:30:22 PM PDT 24 |
24576632636 ps |
| T760 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.2077567380 |
|
|
Jul 23 08:12:36 PM PDT 24 |
Jul 23 08:20:01 PM PDT 24 |
4002609550 ps |
| T1026 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.700335611 |
|
|
Jul 23 07:50:12 PM PDT 24 |
Jul 23 08:05:00 PM PDT 24 |
6776671900 ps |
| T192 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.419748775 |
|
|
Jul 23 07:53:49 PM PDT 24 |
Jul 23 07:55:27 PM PDT 24 |
2070072920 ps |
| T1027 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.1276117687 |
|
|
Jul 23 07:37:40 PM PDT 24 |
Jul 23 08:12:44 PM PDT 24 |
11789809916 ps |
| T1028 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3758804405 |
|
|
Jul 23 07:45:33 PM PDT 24 |
Jul 23 08:40:12 PM PDT 24 |
29928719940 ps |
| T753 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.266534722 |
|
|
Jul 23 08:05:17 PM PDT 24 |
Jul 23 08:14:52 PM PDT 24 |
4336440238 ps |
| T543 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.947688586 |
|
|
Jul 23 07:57:27 PM PDT 24 |
Jul 23 08:15:36 PM PDT 24 |
5287637704 ps |
| T125 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.1722937305 |
|
|
Jul 23 07:58:56 PM PDT 24 |
Jul 23 08:12:51 PM PDT 24 |
7105115424 ps |
| T811 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.853886719 |
|
|
Jul 23 08:13:40 PM PDT 24 |
Jul 23 08:22:12 PM PDT 24 |
3459949858 ps |
| T126 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3398663411 |
|
|
Jul 23 07:58:34 PM PDT 24 |
Jul 23 08:06:39 PM PDT 24 |
5558794308 ps |
| T1029 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.3432199979 |
|
|
Jul 23 07:57:33 PM PDT 24 |
Jul 23 08:05:43 PM PDT 24 |
4857387348 ps |
| T1030 |
/workspace/coverage/default/0.chip_sw_aes_idle.2014411076 |
|
|
Jul 23 07:35:11 PM PDT 24 |
Jul 23 07:38:58 PM PDT 24 |
2940291784 ps |
| T1031 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.4723726 |
|
|
Jul 23 07:45:22 PM PDT 24 |
Jul 23 07:50:21 PM PDT 24 |
3469308360 ps |
| T290 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.3221580029 |
|
|
Jul 23 07:57:31 PM PDT 24 |
Jul 23 08:08:37 PM PDT 24 |
4951636348 ps |
| T351 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.2755651483 |
|
|
Jul 23 07:34:20 PM PDT 24 |
Jul 23 07:47:56 PM PDT 24 |
4280122440 ps |
| T282 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.1933763032 |
|
|
Jul 23 07:42:18 PM PDT 24 |
Jul 23 07:55:50 PM PDT 24 |
4636202480 ps |
| T283 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.1754993033 |
|
|
Jul 23 08:07:31 PM PDT 24 |
Jul 23 08:15:06 PM PDT 24 |
3957124516 ps |