| T255 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.3967442163 |
|
|
Aug 01 08:45:38 PM PDT 24 |
Aug 01 08:52:41 PM PDT 24 |
4992380386 ps |
| T223 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.4087792596 |
|
|
Aug 01 08:31:16 PM PDT 24 |
Aug 01 08:40:33 PM PDT 24 |
3845044840 ps |
| T309 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.3598717906 |
|
|
Aug 01 08:19:51 PM PDT 24 |
Aug 01 08:37:37 PM PDT 24 |
5544961344 ps |
| T310 |
/workspace/coverage/default/0.chip_sw_edn_kat.2213507035 |
|
|
Aug 01 08:15:16 PM PDT 24 |
Aug 01 08:27:24 PM PDT 24 |
3702147760 ps |
| T311 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.1805008849 |
|
|
Aug 01 08:45:17 PM PDT 24 |
Aug 01 08:55:47 PM PDT 24 |
4042019340 ps |
| T312 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.2616537663 |
|
|
Aug 01 08:18:11 PM PDT 24 |
Aug 01 08:31:20 PM PDT 24 |
5685089688 ps |
| T313 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.1054263887 |
|
|
Aug 01 08:47:07 PM PDT 24 |
Aug 01 08:52:45 PM PDT 24 |
3678658010 ps |
| T314 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.3863379759 |
|
|
Aug 01 08:13:08 PM PDT 24 |
Aug 01 08:38:47 PM PDT 24 |
8374311272 ps |
| T24 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.4080863871 |
|
|
Aug 01 08:32:50 PM PDT 24 |
Aug 01 08:58:13 PM PDT 24 |
24359242218 ps |
| T89 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.407289663 |
|
|
Aug 01 08:50:54 PM PDT 24 |
Aug 01 09:01:13 PM PDT 24 |
5216772492 ps |
| T397 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.1129037112 |
|
|
Aug 01 08:20:37 PM PDT 24 |
Aug 01 10:33:31 PM PDT 24 |
23558959792 ps |
| T916 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.2300162048 |
|
|
Aug 01 08:44:51 PM PDT 24 |
Aug 01 10:15:44 PM PDT 24 |
25404063448 ps |
| T789 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.2886634021 |
|
|
Aug 01 08:52:39 PM PDT 24 |
Aug 01 08:58:06 PM PDT 24 |
3686845752 ps |
| T335 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.2201659118 |
|
|
Aug 01 08:18:32 PM PDT 24 |
Aug 01 08:38:04 PM PDT 24 |
5836472034 ps |
| T164 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.1419697791 |
|
|
Aug 01 08:27:14 PM PDT 24 |
Aug 01 08:35:53 PM PDT 24 |
5126320114 ps |
| T716 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.296426734 |
|
|
Aug 01 08:49:09 PM PDT 24 |
Aug 01 08:54:59 PM PDT 24 |
3762294788 ps |
| T762 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.1414008810 |
|
|
Aug 01 08:51:55 PM PDT 24 |
Aug 01 08:57:07 PM PDT 24 |
3752721410 ps |
| T341 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.1123649557 |
|
|
Aug 01 08:21:05 PM PDT 24 |
Aug 01 08:50:03 PM PDT 24 |
13263210024 ps |
| T150 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.1223073770 |
|
|
Aug 01 08:26:16 PM PDT 24 |
Aug 01 08:37:09 PM PDT 24 |
4152129116 ps |
| T917 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.367333815 |
|
|
Aug 01 08:27:10 PM PDT 24 |
Aug 01 08:37:38 PM PDT 24 |
3395870020 ps |
| T918 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.1940805816 |
|
|
Aug 01 08:23:14 PM PDT 24 |
Aug 01 08:27:07 PM PDT 24 |
3252906712 ps |
| T708 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.624335967 |
|
|
Aug 01 08:52:40 PM PDT 24 |
Aug 01 09:00:14 PM PDT 24 |
5004971180 ps |
| T919 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.3187557640 |
|
|
Aug 01 08:35:01 PM PDT 24 |
Aug 01 08:59:22 PM PDT 24 |
8016638024 ps |
| T652 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.4212380276 |
|
|
Aug 01 08:32:22 PM PDT 24 |
Aug 01 08:42:07 PM PDT 24 |
3396054904 ps |
| T183 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.2019121826 |
|
|
Aug 01 08:30:27 PM PDT 24 |
Aug 01 08:35:32 PM PDT 24 |
3153081356 ps |
| T318 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.3548081209 |
|
|
Aug 01 08:33:04 PM PDT 24 |
Aug 01 08:38:04 PM PDT 24 |
2592791218 ps |
| T260 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.1782139933 |
|
|
Aug 01 08:35:34 PM PDT 24 |
Aug 01 08:39:39 PM PDT 24 |
3519782182 ps |
| T184 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.3240774364 |
|
|
Aug 01 08:39:01 PM PDT 24 |
Aug 01 08:43:14 PM PDT 24 |
3605690702 ps |
| T28 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.2863157811 |
|
|
Aug 01 08:18:52 PM PDT 24 |
Aug 01 08:22:11 PM PDT 24 |
2954903272 ps |
| T319 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1424224734 |
|
|
Aug 01 08:16:10 PM PDT 24 |
Aug 01 08:28:21 PM PDT 24 |
4432425832 ps |
| T320 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.104943307 |
|
|
Aug 01 08:17:47 PM PDT 24 |
Aug 01 09:04:54 PM PDT 24 |
31133984058 ps |
| T321 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.3755538200 |
|
|
Aug 01 08:29:20 PM PDT 24 |
Aug 01 08:37:37 PM PDT 24 |
4279871228 ps |
| T322 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.3738715147 |
|
|
Aug 01 08:35:11 PM PDT 24 |
Aug 01 08:44:28 PM PDT 24 |
4203652560 ps |
| T323 |
/workspace/coverage/default/0.rom_e2e_smoke.1761046214 |
|
|
Aug 01 08:18:20 PM PDT 24 |
Aug 01 09:25:46 PM PDT 24 |
14597214764 ps |
| T920 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.822389728 |
|
|
Aug 01 08:21:54 PM PDT 24 |
Aug 01 09:11:04 PM PDT 24 |
29908780822 ps |
| T136 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.2992847358 |
|
|
Aug 01 08:28:38 PM PDT 24 |
Aug 01 08:33:17 PM PDT 24 |
2971153627 ps |
| T921 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.1180497741 |
|
|
Aug 01 08:15:02 PM PDT 24 |
Aug 01 08:33:15 PM PDT 24 |
6170006780 ps |
| T922 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.3130962143 |
|
|
Aug 01 08:16:19 PM PDT 24 |
Aug 01 08:20:02 PM PDT 24 |
2675392600 ps |
| T923 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.2770615407 |
|
|
Aug 01 08:16:36 PM PDT 24 |
Aug 01 08:20:06 PM PDT 24 |
2801918552 ps |
| T924 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.3886548494 |
|
|
Aug 01 08:32:19 PM PDT 24 |
Aug 01 08:50:37 PM PDT 24 |
6551332747 ps |
| T925 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.3700415806 |
|
|
Aug 01 08:35:24 PM PDT 24 |
Aug 01 08:52:44 PM PDT 24 |
6367644356 ps |
| T926 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.4052744273 |
|
|
Aug 01 08:31:09 PM PDT 24 |
Aug 01 08:35:12 PM PDT 24 |
2279382448 ps |
| T377 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.3038924642 |
|
|
Aug 01 08:15:10 PM PDT 24 |
Aug 01 08:20:52 PM PDT 24 |
4100803352 ps |
| T927 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3779312261 |
|
|
Aug 01 08:22:06 PM PDT 24 |
Aug 01 08:43:02 PM PDT 24 |
13970339472 ps |
| T743 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.752790635 |
|
|
Aug 01 08:46:08 PM PDT 24 |
Aug 01 08:52:29 PM PDT 24 |
4371904316 ps |
| T10 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.3607072396 |
|
|
Aug 01 08:31:51 PM PDT 24 |
Aug 01 08:36:01 PM PDT 24 |
2834605511 ps |
| T278 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.2518818521 |
|
|
Aug 01 08:24:39 PM PDT 24 |
Aug 01 09:23:50 PM PDT 24 |
13642205200 ps |
| T928 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1786441846 |
|
|
Aug 01 08:31:49 PM PDT 24 |
Aug 01 08:44:35 PM PDT 24 |
4811455482 ps |
| T297 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.926384660 |
|
|
Aug 01 08:42:09 PM PDT 24 |
Aug 01 08:54:36 PM PDT 24 |
5192178380 ps |
| T101 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3284942689 |
|
|
Aug 01 08:28:40 PM PDT 24 |
Aug 01 09:04:19 PM PDT 24 |
25731568970 ps |
| T346 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.863196024 |
|
|
Aug 01 08:43:55 PM PDT 24 |
Aug 01 08:55:59 PM PDT 24 |
5002674150 ps |
| T363 |
/workspace/coverage/default/2.chip_sival_flash_info_access.4156712902 |
|
|
Aug 01 08:33:07 PM PDT 24 |
Aug 01 08:39:31 PM PDT 24 |
3035349272 ps |
| T929 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.3543500345 |
|
|
Aug 01 08:22:54 PM PDT 24 |
Aug 01 08:27:57 PM PDT 24 |
3285712889 ps |
| T729 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.1524372606 |
|
|
Aug 01 08:47:00 PM PDT 24 |
Aug 01 08:53:54 PM PDT 24 |
4239808920 ps |
| T930 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.3832661210 |
|
|
Aug 01 08:25:25 PM PDT 24 |
Aug 01 08:29:13 PM PDT 24 |
2700298970 ps |
| T179 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.1884177266 |
|
|
Aug 01 08:36:30 PM PDT 24 |
Aug 01 08:47:48 PM PDT 24 |
4396146946 ps |
| T931 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.4157776853 |
|
|
Aug 01 08:19:25 PM PDT 24 |
Aug 01 08:25:26 PM PDT 24 |
5547981614 ps |
| T932 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2796738175 |
|
|
Aug 01 08:13:38 PM PDT 24 |
Aug 01 08:24:33 PM PDT 24 |
4033637680 ps |
| T90 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.2161663394 |
|
|
Aug 01 08:47:18 PM PDT 24 |
Aug 01 08:57:11 PM PDT 24 |
6410564872 ps |
| T71 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.1563593087 |
|
|
Aug 01 08:33:12 PM PDT 24 |
Aug 01 11:34:34 PM PDT 24 |
58651913350 ps |
| T352 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.3703005529 |
|
|
Aug 01 08:12:22 PM PDT 24 |
Aug 01 08:21:47 PM PDT 24 |
4226777366 ps |
| T41 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.2478303487 |
|
|
Aug 01 08:33:34 PM PDT 24 |
Aug 01 08:41:13 PM PDT 24 |
3735799375 ps |
| T357 |
/workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.988923265 |
|
|
Aug 01 08:28:25 PM PDT 24 |
Aug 01 08:35:05 PM PDT 24 |
3554861544 ps |
| T933 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.627379006 |
|
|
Aug 01 08:35:50 PM PDT 24 |
Aug 01 09:17:03 PM PDT 24 |
27900231552 ps |
| T934 |
/workspace/coverage/default/2.chip_sw_edn_kat.3517743744 |
|
|
Aug 01 08:34:27 PM PDT 24 |
Aug 01 08:46:10 PM PDT 24 |
3015967864 ps |
| T231 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.4208484000 |
|
|
Aug 01 08:37:14 PM PDT 24 |
Aug 01 09:12:16 PM PDT 24 |
9110176060 ps |
| T935 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.38421935 |
|
|
Aug 01 08:22:44 PM PDT 24 |
Aug 01 08:31:14 PM PDT 24 |
19644493512 ps |
| T936 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.3610488385 |
|
|
Aug 01 08:33:14 PM PDT 24 |
Aug 01 08:43:49 PM PDT 24 |
6476017404 ps |
| T796 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.2949912760 |
|
|
Aug 01 08:49:07 PM PDT 24 |
Aug 01 08:55:43 PM PDT 24 |
3385912898 ps |
| T145 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.4101802849 |
|
|
Aug 01 08:29:19 PM PDT 24 |
Aug 01 08:59:56 PM PDT 24 |
10868364456 ps |
| T398 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.1658777164 |
|
|
Aug 01 08:19:51 PM PDT 24 |
Aug 01 09:47:39 PM PDT 24 |
23210189900 ps |
| T102 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.3668748466 |
|
|
Aug 01 08:23:52 PM PDT 24 |
Aug 01 08:29:48 PM PDT 24 |
4990557980 ps |
| T298 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.522141613 |
|
|
Aug 01 08:43:21 PM PDT 24 |
Aug 01 08:55:38 PM PDT 24 |
5821503642 ps |
| T91 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.2671211639 |
|
|
Aug 01 08:47:12 PM PDT 24 |
Aug 01 08:56:50 PM PDT 24 |
5208825952 ps |
| T434 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.686393588 |
|
|
Aug 01 08:47:22 PM PDT 24 |
Aug 01 08:58:00 PM PDT 24 |
5523613490 ps |
| T61 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.3077468734 |
|
|
Aug 01 08:11:56 PM PDT 24 |
Aug 01 08:17:55 PM PDT 24 |
5330842240 ps |
| T261 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.2964286792 |
|
|
Aug 01 08:39:58 PM PDT 24 |
Aug 01 08:46:47 PM PDT 24 |
4538701568 ps |
| T425 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.2691849497 |
|
|
Aug 01 08:47:28 PM PDT 24 |
Aug 01 08:53:10 PM PDT 24 |
3724011500 ps |
| T426 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2629239906 |
|
|
Aug 01 08:21:48 PM PDT 24 |
Aug 01 08:29:48 PM PDT 24 |
5409144864 ps |
| T427 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.1033004704 |
|
|
Aug 01 08:50:55 PM PDT 24 |
Aug 01 08:57:06 PM PDT 24 |
3762547872 ps |
| T428 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.4032455494 |
|
|
Aug 01 08:44:51 PM PDT 24 |
Aug 01 08:54:27 PM PDT 24 |
5487709370 ps |
| T429 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2339779941 |
|
|
Aug 01 08:52:16 PM PDT 24 |
Aug 01 08:59:16 PM PDT 24 |
3740073572 ps |
| T103 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.3546728245 |
|
|
Aug 01 08:15:09 PM PDT 24 |
Aug 01 08:42:05 PM PDT 24 |
23256775928 ps |
| T74 |
/workspace/coverage/default/0.chip_tap_straps_prod.403067033 |
|
|
Aug 01 08:14:56 PM PDT 24 |
Aug 01 08:56:02 PM PDT 24 |
18718910035 ps |
| T430 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.727524021 |
|
|
Aug 01 08:51:38 PM PDT 24 |
Aug 01 09:02:30 PM PDT 24 |
5178570994 ps |
| T402 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.1023219154 |
|
|
Aug 01 08:19:43 PM PDT 24 |
Aug 01 08:24:44 PM PDT 24 |
3229517662 ps |
| T399 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.356703496 |
|
|
Aug 01 08:22:52 PM PDT 24 |
Aug 01 10:13:42 PM PDT 24 |
24440170044 ps |
| T44 |
/workspace/coverage/default/0.chip_sw_power_virus.1498785392 |
|
|
Aug 01 08:19:17 PM PDT 24 |
Aug 01 08:47:27 PM PDT 24 |
6220746412 ps |
| T937 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.3108121681 |
|
|
Aug 01 08:43:06 PM PDT 24 |
Aug 01 08:46:35 PM PDT 24 |
3008495612 ps |
| T938 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.3150440767 |
|
|
Aug 01 08:17:56 PM PDT 24 |
Aug 01 08:27:00 PM PDT 24 |
5802767936 ps |
| T939 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.4234053901 |
|
|
Aug 01 08:31:14 PM PDT 24 |
Aug 01 08:39:36 PM PDT 24 |
4125033691 ps |
| T940 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.591956004 |
|
|
Aug 01 08:51:37 PM PDT 24 |
Aug 01 08:59:43 PM PDT 24 |
3612260452 ps |
| T279 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.3444201543 |
|
|
Aug 01 08:23:54 PM PDT 24 |
Aug 01 09:22:25 PM PDT 24 |
14228632814 ps |
| T717 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.2882429280 |
|
|
Aug 01 08:48:08 PM PDT 24 |
Aug 01 08:56:52 PM PDT 24 |
4603275994 ps |
| T299 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.408931943 |
|
|
Aug 01 08:26:42 PM PDT 24 |
Aug 01 08:37:04 PM PDT 24 |
4564081990 ps |
| T730 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.3791369594 |
|
|
Aug 01 08:48:12 PM PDT 24 |
Aug 01 08:56:46 PM PDT 24 |
6200653500 ps |
| T941 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.804333774 |
|
|
Aug 01 08:16:06 PM PDT 24 |
Aug 01 08:20:30 PM PDT 24 |
2710360316 ps |
| T151 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.661274399 |
|
|
Aug 01 08:37:24 PM PDT 24 |
Aug 01 08:46:42 PM PDT 24 |
4611016650 ps |
| T348 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.2527140138 |
|
|
Aug 01 08:32:12 PM PDT 24 |
Aug 01 08:46:50 PM PDT 24 |
5676511240 ps |
| T942 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.3722235566 |
|
|
Aug 01 08:43:33 PM PDT 24 |
Aug 01 09:04:49 PM PDT 24 |
9150856385 ps |
| T943 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.5352393 |
|
|
Aug 01 08:23:48 PM PDT 24 |
Aug 01 08:27:09 PM PDT 24 |
2524053448 ps |
| T944 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.381957346 |
|
|
Aug 01 08:13:06 PM PDT 24 |
Aug 01 08:31:36 PM PDT 24 |
6314823800 ps |
| T64 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.1611327675 |
|
|
Aug 01 08:42:49 PM PDT 24 |
Aug 01 08:49:09 PM PDT 24 |
4072932092 ps |
| T237 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.35810343 |
|
|
Aug 01 08:28:34 PM PDT 24 |
Aug 01 09:03:15 PM PDT 24 |
21927948014 ps |
| T238 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.4039251575 |
|
|
Aug 01 08:39:16 PM PDT 24 |
Aug 01 09:08:52 PM PDT 24 |
23871196691 ps |
| T527 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.4268389232 |
|
|
Aug 01 08:15:11 PM PDT 24 |
Aug 01 08:30:16 PM PDT 24 |
5510670036 ps |
| T38 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3753653057 |
|
|
Aug 01 08:15:11 PM PDT 24 |
Aug 01 08:24:22 PM PDT 24 |
5846053468 ps |
| T104 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.667957579 |
|
|
Aug 01 08:40:17 PM PDT 24 |
Aug 01 08:48:55 PM PDT 24 |
7493797970 ps |
| T300 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1294144788 |
|
|
Aug 01 08:39:22 PM PDT 24 |
Aug 01 08:48:20 PM PDT 24 |
4113364379 ps |
| T443 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.2243189490 |
|
|
Aug 01 08:25:02 PM PDT 24 |
Aug 01 08:43:02 PM PDT 24 |
6080428237 ps |
| T330 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.71610623 |
|
|
Aug 01 08:45:17 PM PDT 24 |
Aug 01 08:51:13 PM PDT 24 |
3310862954 ps |
| T162 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.1563539339 |
|
|
Aug 01 08:12:46 PM PDT 24 |
Aug 01 10:20:05 PM PDT 24 |
48480821540 ps |
| T718 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.4088214151 |
|
|
Aug 01 08:43:07 PM PDT 24 |
Aug 01 08:49:41 PM PDT 24 |
4829381608 ps |
| T534 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.2109077518 |
|
|
Aug 01 08:21:03 PM PDT 24 |
Aug 01 08:33:50 PM PDT 24 |
5338292300 ps |
| T353 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.2342386330 |
|
|
Aug 01 08:12:30 PM PDT 24 |
Aug 01 08:20:39 PM PDT 24 |
3858887028 ps |
| T670 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.286055531 |
|
|
Aug 01 08:45:40 PM PDT 24 |
Aug 01 08:55:09 PM PDT 24 |
4071408412 ps |
| T791 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.3553541977 |
|
|
Aug 01 08:52:12 PM PDT 24 |
Aug 01 08:57:51 PM PDT 24 |
4157764176 ps |
| T351 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.2508108169 |
|
|
Aug 01 08:45:20 PM PDT 24 |
Aug 01 09:15:20 PM PDT 24 |
8926116944 ps |
| T945 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.417960638 |
|
|
Aug 01 08:21:32 PM PDT 24 |
Aug 01 08:32:45 PM PDT 24 |
4807832216 ps |
| T359 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.216471776 |
|
|
Aug 01 08:29:56 PM PDT 24 |
Aug 01 08:41:56 PM PDT 24 |
4935585047 ps |
| T444 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.1300379727 |
|
|
Aug 01 08:24:34 PM PDT 24 |
Aug 01 08:42:12 PM PDT 24 |
5863442250 ps |
| T946 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.2340988600 |
|
|
Aug 01 08:32:51 PM PDT 24 |
Aug 01 10:10:09 PM PDT 24 |
25236628980 ps |
| T947 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.3468900548 |
|
|
Aug 01 08:14:52 PM PDT 24 |
Aug 01 08:21:23 PM PDT 24 |
6593041224 ps |
| T76 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.3111402670 |
|
|
Aug 01 08:12:02 PM PDT 24 |
Aug 01 08:19:58 PM PDT 24 |
3645664980 ps |
| T240 |
/workspace/coverage/default/2.chip_sw_flash_init.2791753728 |
|
|
Aug 01 08:31:39 PM PDT 24 |
Aug 01 09:04:51 PM PDT 24 |
21732852158 ps |
| T948 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.198455404 |
|
|
Aug 01 08:33:49 PM PDT 24 |
Aug 01 08:42:54 PM PDT 24 |
7483215446 ps |
| T949 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.575678468 |
|
|
Aug 01 08:37:58 PM PDT 24 |
Aug 01 08:46:47 PM PDT 24 |
3862569088 ps |
| T808 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.1303843512 |
|
|
Aug 01 08:52:34 PM PDT 24 |
Aug 01 09:02:28 PM PDT 24 |
4826573604 ps |
| T950 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.3210898459 |
|
|
Aug 01 08:40:32 PM PDT 24 |
Aug 01 08:45:29 PM PDT 24 |
3047726560 ps |
| T951 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.83909831 |
|
|
Aug 01 08:24:49 PM PDT 24 |
Aug 01 09:24:20 PM PDT 24 |
16968099928 ps |
| T952 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1049368462 |
|
|
Aug 01 08:37:34 PM PDT 24 |
Aug 01 08:50:03 PM PDT 24 |
4509824720 ps |
| T953 |
/workspace/coverage/default/1.chip_sw_example_concurrency.3902564292 |
|
|
Aug 01 08:19:39 PM PDT 24 |
Aug 01 08:24:20 PM PDT 24 |
2703657850 ps |
| T256 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.557793827 |
|
|
Aug 01 08:47:14 PM PDT 24 |
Aug 01 08:55:09 PM PDT 24 |
4037238248 ps |
| T954 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.397174498 |
|
|
Aug 01 08:34:22 PM PDT 24 |
Aug 01 08:50:36 PM PDT 24 |
6442996596 ps |
| T955 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.984908094 |
|
|
Aug 01 08:41:04 PM PDT 24 |
Aug 01 08:46:33 PM PDT 24 |
3357514442 ps |
| T956 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1353131777 |
|
|
Aug 01 08:26:23 PM PDT 24 |
Aug 01 08:44:42 PM PDT 24 |
7231465174 ps |
| T771 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.3962115607 |
|
|
Aug 01 08:42:01 PM PDT 24 |
Aug 01 08:51:51 PM PDT 24 |
4339541208 ps |
| T957 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.3013506286 |
|
|
Aug 01 08:34:42 PM PDT 24 |
Aug 01 08:55:29 PM PDT 24 |
5984581320 ps |
| T168 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.2047460125 |
|
|
Aug 01 08:12:55 PM PDT 24 |
Aug 01 08:24:38 PM PDT 24 |
10032512735 ps |
| T958 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.1073838989 |
|
|
Aug 01 08:24:08 PM PDT 24 |
Aug 01 08:28:57 PM PDT 24 |
2745713243 ps |
| T805 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.4290841393 |
|
|
Aug 01 08:43:46 PM PDT 24 |
Aug 01 08:53:40 PM PDT 24 |
4604093544 ps |
| T264 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.1925125883 |
|
|
Aug 01 08:16:09 PM PDT 24 |
Aug 01 08:53:46 PM PDT 24 |
10436508002 ps |
| T959 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.2389375084 |
|
|
Aug 01 08:16:49 PM PDT 24 |
Aug 01 08:48:10 PM PDT 24 |
8291837584 ps |
| T960 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.2205479626 |
|
|
Aug 01 08:38:32 PM PDT 24 |
Aug 01 08:54:28 PM PDT 24 |
7158707240 ps |
| T355 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.1013609660 |
|
|
Aug 01 08:31:38 PM PDT 24 |
Aug 01 08:41:57 PM PDT 24 |
4485777576 ps |
| T961 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.4115313496 |
|
|
Aug 01 08:35:45 PM PDT 24 |
Aug 01 09:26:09 PM PDT 24 |
10972130410 ps |
| T962 |
/workspace/coverage/default/6.chip_sw_lc_ctrl_transition.2454334441 |
|
|
Aug 01 08:43:32 PM PDT 24 |
Aug 01 08:56:37 PM PDT 24 |
11758519127 ps |
| T280 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.2064042938 |
|
|
Aug 01 08:20:13 PM PDT 24 |
Aug 01 09:23:39 PM PDT 24 |
14345454876 ps |
| T344 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.4260424451 |
|
|
Aug 01 08:24:44 PM PDT 24 |
Aug 01 08:42:28 PM PDT 24 |
5588534388 ps |
| T232 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.3377179998 |
|
|
Aug 01 08:25:30 PM PDT 24 |
Aug 01 09:28:36 PM PDT 24 |
14598219060 ps |
| T963 |
/workspace/coverage/default/1.chip_sw_aes_enc.3500470311 |
|
|
Aug 01 08:23:57 PM PDT 24 |
Aug 01 08:28:59 PM PDT 24 |
3427145482 ps |
| T964 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.3628919941 |
|
|
Aug 01 08:21:27 PM PDT 24 |
Aug 01 08:58:35 PM PDT 24 |
22535298000 ps |
| T965 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.2097200561 |
|
|
Aug 01 08:44:52 PM PDT 24 |
Aug 01 09:49:01 PM PDT 24 |
17710007560 ps |
| T966 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.2958429324 |
|
|
Aug 01 08:42:10 PM PDT 24 |
Aug 01 09:10:54 PM PDT 24 |
9108950146 ps |
| T967 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.2279928203 |
|
|
Aug 01 08:32:36 PM PDT 24 |
Aug 01 08:52:13 PM PDT 24 |
5837782956 ps |
| T968 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.1497424451 |
|
|
Aug 01 08:44:55 PM PDT 24 |
Aug 01 09:37:01 PM PDT 24 |
15056080158 ps |
| T185 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.686333227 |
|
|
Aug 01 08:29:07 PM PDT 24 |
Aug 01 08:33:15 PM PDT 24 |
2752028118 ps |
| T171 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.2383161625 |
|
|
Aug 01 08:21:05 PM PDT 24 |
Aug 01 08:25:52 PM PDT 24 |
3846393294 ps |
| T382 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.1947858206 |
|
|
Aug 01 08:44:43 PM PDT 24 |
Aug 01 08:50:00 PM PDT 24 |
2876801536 ps |
| T969 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.223979459 |
|
|
Aug 01 08:30:33 PM PDT 24 |
Aug 01 08:51:31 PM PDT 24 |
5953060680 ps |
| T206 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.3780037288 |
|
|
Aug 01 08:32:57 PM PDT 24 |
Aug 01 11:37:21 PM PDT 24 |
65160685438 ps |
| T198 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.3603655851 |
|
|
Aug 01 08:32:47 PM PDT 24 |
Aug 01 08:44:07 PM PDT 24 |
4835207286 ps |
| T531 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.3617680351 |
|
|
Aug 01 08:21:50 PM PDT 24 |
Aug 01 08:50:26 PM PDT 24 |
11724778391 ps |
| T243 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.3301880131 |
|
|
Aug 01 08:32:14 PM PDT 24 |
Aug 01 08:41:18 PM PDT 24 |
4842042336 ps |
| T801 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.474742511 |
|
|
Aug 01 08:49:41 PM PDT 24 |
Aug 01 09:04:38 PM PDT 24 |
6179012038 ps |
| T970 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.1663613996 |
|
|
Aug 01 08:24:19 PM PDT 24 |
Aug 01 09:29:10 PM PDT 24 |
15925126148 ps |
| T971 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.1657517689 |
|
|
Aug 01 08:36:35 PM PDT 24 |
Aug 01 08:43:52 PM PDT 24 |
3343647190 ps |
| T972 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.499843805 |
|
|
Aug 01 08:18:55 PM PDT 24 |
Aug 01 08:30:59 PM PDT 24 |
4840644802 ps |
| T87 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.1931791658 |
|
|
Aug 01 08:15:26 PM PDT 24 |
Aug 01 08:20:19 PM PDT 24 |
2730601284 ps |
| T233 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.2773048183 |
|
|
Aug 01 08:16:44 PM PDT 24 |
Aug 01 09:13:14 PM PDT 24 |
14183497530 ps |
| T283 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.1621371834 |
|
|
Aug 01 08:14:20 PM PDT 24 |
Aug 01 08:22:43 PM PDT 24 |
8604767941 ps |
| T973 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.2511338485 |
|
|
Aug 01 08:16:32 PM PDT 24 |
Aug 01 08:20:11 PM PDT 24 |
2288675384 ps |
| T974 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.913015456 |
|
|
Aug 01 08:45:11 PM PDT 24 |
Aug 01 08:54:43 PM PDT 24 |
4247556696 ps |
| T975 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.911623103 |
|
|
Aug 01 08:28:43 PM PDT 24 |
Aug 01 08:37:38 PM PDT 24 |
5591600708 ps |
| T281 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.3744818165 |
|
|
Aug 01 08:30:12 PM PDT 24 |
Aug 01 08:31:50 PM PDT 24 |
2397364393 ps |
| T976 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.655279768 |
|
|
Aug 01 08:33:38 PM PDT 24 |
Aug 01 08:39:44 PM PDT 24 |
3712211392 ps |
| T257 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.1561131847 |
|
|
Aug 01 08:42:01 PM PDT 24 |
Aug 01 08:49:34 PM PDT 24 |
3823993800 ps |
| T977 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.1520929977 |
|
|
Aug 01 08:34:50 PM PDT 24 |
Aug 01 09:48:34 PM PDT 24 |
15060615391 ps |
| T165 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.3909273598 |
|
|
Aug 01 08:38:36 PM PDT 24 |
Aug 01 08:46:08 PM PDT 24 |
4064745040 ps |
| T978 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2958596187 |
|
|
Aug 01 08:16:16 PM PDT 24 |
Aug 01 08:21:23 PM PDT 24 |
3185933211 ps |
| T979 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.1393278546 |
|
|
Aug 01 08:34:54 PM PDT 24 |
Aug 01 08:41:33 PM PDT 24 |
3140965076 ps |
| T980 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.1456223839 |
|
|
Aug 01 08:24:55 PM PDT 24 |
Aug 01 09:28:42 PM PDT 24 |
15179945416 ps |
| T981 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.966847739 |
|
|
Aug 01 08:42:24 PM PDT 24 |
Aug 01 08:52:43 PM PDT 24 |
4420735128 ps |
| T714 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.2173992845 |
|
|
Aug 01 08:48:51 PM PDT 24 |
Aug 01 08:53:43 PM PDT 24 |
3731332478 ps |
| T207 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.1067864632 |
|
|
Aug 01 08:31:56 PM PDT 24 |
Aug 02 12:09:12 AM PDT 24 |
77953984624 ps |
| T241 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.1084639044 |
|
|
Aug 01 08:33:06 PM PDT 24 |
Aug 01 10:08:22 PM PDT 24 |
46245059805 ps |
| T982 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2652533600 |
|
|
Aug 01 08:15:12 PM PDT 24 |
Aug 01 09:09:16 PM PDT 24 |
29801576013 ps |
| T760 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.1770504272 |
|
|
Aug 01 08:44:00 PM PDT 24 |
Aug 01 08:51:03 PM PDT 24 |
4138376778 ps |
| T983 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.316653496 |
|
|
Aug 01 08:20:44 PM PDT 24 |
Aug 01 08:32:52 PM PDT 24 |
6398782904 ps |
| T146 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.1950615133 |
|
|
Aug 01 08:18:33 PM PDT 24 |
Aug 01 11:11:31 PM PDT 24 |
57752893864 ps |
| T761 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.1999127431 |
|
|
Aug 01 08:35:19 PM PDT 24 |
Aug 01 08:41:13 PM PDT 24 |
3618691736 ps |
| T803 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2854417888 |
|
|
Aug 01 08:51:17 PM PDT 24 |
Aug 01 08:57:01 PM PDT 24 |
3713498124 ps |
| T984 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.823232326 |
|
|
Aug 01 08:36:33 PM PDT 24 |
Aug 01 08:53:25 PM PDT 24 |
6952400245 ps |
| T985 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.52561649 |
|
|
Aug 01 08:32:46 PM PDT 24 |
Aug 01 08:49:26 PM PDT 24 |
9424441240 ps |
| T772 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.28233003 |
|
|
Aug 01 08:47:25 PM PDT 24 |
Aug 01 08:53:52 PM PDT 24 |
3800583664 ps |
| T986 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.1345387041 |
|
|
Aug 01 08:43:36 PM PDT 24 |
Aug 01 09:47:59 PM PDT 24 |
15063156748 ps |
| T251 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.648140067 |
|
|
Aug 01 08:32:40 PM PDT 24 |
Aug 01 08:44:19 PM PDT 24 |
6884592824 ps |
| T987 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.518042917 |
|
|
Aug 01 08:18:32 PM PDT 24 |
Aug 01 08:22:20 PM PDT 24 |
3037211362 ps |
| T988 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.3378247219 |
|
|
Aug 01 08:36:27 PM PDT 24 |
Aug 01 08:40:11 PM PDT 24 |
2916383068 ps |
| T989 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.1783960894 |
|
|
Aug 01 08:30:41 PM PDT 24 |
Aug 01 08:34:04 PM PDT 24 |
2565643668 ps |
| T990 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.13735102 |
|
|
Aug 01 08:32:49 PM PDT 24 |
Aug 01 09:20:56 PM PDT 24 |
13261088151 ps |
| T707 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.1183266985 |
|
|
Aug 01 08:45:32 PM PDT 24 |
Aug 01 08:51:36 PM PDT 24 |
3498930880 ps |
| T991 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.2585621063 |
|
|
Aug 01 08:22:22 PM PDT 24 |
Aug 01 08:28:46 PM PDT 24 |
2565045008 ps |
| T239 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.2660422923 |
|
|
Aug 01 08:12:19 PM PDT 24 |
Aug 01 09:38:10 PM PDT 24 |
50029007242 ps |
| T992 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.3484477943 |
|
|
Aug 01 08:26:15 PM PDT 24 |
Aug 01 09:15:48 PM PDT 24 |
10868406100 ps |
| T780 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.2828591626 |
|
|
Aug 01 08:44:17 PM PDT 24 |
Aug 01 08:52:14 PM PDT 24 |
3660606270 ps |
| T282 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.567489660 |
|
|
Aug 01 08:32:11 PM PDT 24 |
Aug 01 08:34:18 PM PDT 24 |
2631905152 ps |
| T265 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1190392657 |
|
|
Aug 01 08:16:34 PM PDT 24 |
Aug 01 11:21:41 PM PDT 24 |
255479737740 ps |
| T406 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.1153817910 |
|
|
Aug 01 08:23:07 PM PDT 24 |
Aug 01 08:27:18 PM PDT 24 |
2983529106 ps |
| T993 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.1127349261 |
|
|
Aug 01 08:23:31 PM PDT 24 |
Aug 01 09:47:18 PM PDT 24 |
14797215522 ps |
| T746 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.1777604571 |
|
|
Aug 01 08:50:58 PM PDT 24 |
Aug 01 08:58:27 PM PDT 24 |
4430344942 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.4202150627 |
|
|
Aug 01 08:38:52 PM PDT 24 |
Aug 01 08:59:06 PM PDT 24 |
6564239576 ps |
| T995 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.1883032309 |
|
|
Aug 01 08:32:15 PM PDT 24 |
Aug 01 08:53:41 PM PDT 24 |
5427287720 ps |
| T996 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.3631608592 |
|
|
Aug 01 08:43:36 PM PDT 24 |
Aug 01 08:49:41 PM PDT 24 |
4258557082 ps |
| T997 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.4053173417 |
|
|
Aug 01 08:40:42 PM PDT 24 |
Aug 01 08:44:54 PM PDT 24 |
2721351972 ps |
| T998 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.2497340658 |
|
|
Aug 01 08:40:45 PM PDT 24 |
Aug 01 08:45:58 PM PDT 24 |
2926314508 ps |
| T999 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.720149333 |
|
|
Aug 01 08:26:52 PM PDT 24 |
Aug 01 08:38:22 PM PDT 24 |
6738136816 ps |
| T56 |
/workspace/coverage/default/1.chip_sw_spi_device_pinmux_sleep_retention.3797325090 |
|
|
Aug 01 08:21:38 PM PDT 24 |
Aug 01 08:27:46 PM PDT 24 |
3646908647 ps |
| T660 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3884858221 |
|
|
Aug 01 08:34:02 PM PDT 24 |
Aug 01 08:35:43 PM PDT 24 |
2905302747 ps |
| T1000 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.3150420188 |
|
|
Aug 01 08:17:39 PM PDT 24 |
Aug 01 08:20:56 PM PDT 24 |
3322613064 ps |
| T1001 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.19667304 |
|
|
Aug 01 08:39:10 PM PDT 24 |
Aug 01 08:45:24 PM PDT 24 |
3408509280 ps |
| T807 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.2306103155 |
|
|
Aug 01 08:49:29 PM PDT 24 |
Aug 01 08:59:40 PM PDT 24 |
6206670500 ps |
| T1002 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.3438340127 |
|
|
Aug 01 08:15:21 PM PDT 24 |
Aug 01 08:23:28 PM PDT 24 |
7000269152 ps |
| T773 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.2919171431 |
|
|
Aug 01 08:47:11 PM PDT 24 |
Aug 01 08:53:58 PM PDT 24 |
3875108008 ps |
| T706 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.137768322 |
|
|
Aug 01 08:47:17 PM PDT 24 |
Aug 01 08:54:21 PM PDT 24 |
3489921160 ps |
| T776 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.1164310959 |
|
|
Aug 01 08:50:14 PM PDT 24 |
Aug 01 08:59:40 PM PDT 24 |
6038386328 ps |
| T673 |
/workspace/coverage/default/1.chip_sw_power_idle_load.4218073995 |
|
|
Aug 01 08:30:02 PM PDT 24 |
Aug 01 08:39:45 PM PDT 24 |
3971246616 ps |
| T1003 |
/workspace/coverage/default/1.chip_sw_edn_kat.4121948168 |
|
|
Aug 01 08:31:37 PM PDT 24 |
Aug 01 08:42:01 PM PDT 24 |
3199494078 ps |
| T26 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.1276586525 |
|
|
Aug 01 08:12:07 PM PDT 24 |
Aug 01 09:30:17 PM PDT 24 |
18272598844 ps |
| T810 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.860523947 |
|
|
Aug 01 08:47:27 PM PDT 24 |
Aug 01 08:56:17 PM PDT 24 |
4536478192 ps |
| T719 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.2736726369 |
|
|
Aug 01 08:45:49 PM PDT 24 |
Aug 01 08:59:46 PM PDT 24 |
6211909508 ps |
| T1004 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.1470191840 |
|
|
Aug 01 08:25:09 PM PDT 24 |
Aug 01 09:27:23 PM PDT 24 |
15171616664 ps |
| T131 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.3008586166 |
|
|
Aug 01 08:29:22 PM PDT 24 |
Aug 01 09:14:06 PM PDT 24 |
19065885847 ps |
| T783 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.4126326294 |
|
|
Aug 01 08:51:09 PM PDT 24 |
Aug 01 08:57:03 PM PDT 24 |
3696079810 ps |
| T1005 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.857683321 |
|
|
Aug 01 08:40:07 PM PDT 24 |
Aug 01 09:02:25 PM PDT 24 |
9622213224 ps |
| T1006 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.695993221 |
|
|
Aug 01 08:40:43 PM PDT 24 |
Aug 01 08:46:37 PM PDT 24 |
2951024500 ps |
| T1007 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.68239450 |
|
|
Aug 01 08:39:39 PM PDT 24 |
Aug 01 08:51:41 PM PDT 24 |
8404002632 ps |
| T326 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2834299916 |
|
|
Aug 01 08:13:52 PM PDT 24 |
Aug 01 08:19:36 PM PDT 24 |
4223152968 ps |
| T25 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.66690869 |
|
|
Aug 01 08:26:36 PM PDT 24 |
Aug 01 09:30:59 PM PDT 24 |
20202522073 ps |
| T242 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.2133047827 |
|
|
Aug 01 08:34:16 PM PDT 24 |
Aug 01 10:02:08 PM PDT 24 |
47103920420 ps |
| T1008 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.1011825635 |
|
|
Aug 01 08:20:48 PM PDT 24 |
Aug 01 08:51:31 PM PDT 24 |
8025066705 ps |
| T1009 |
/workspace/coverage/default/2.chip_sw_rv_timer_smoketest.3166301403 |
|
|
Aug 01 08:40:32 PM PDT 24 |
Aug 01 08:44:12 PM PDT 24 |
3254282200 ps |
| T785 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.2297062454 |
|
|
Aug 01 08:31:35 PM PDT 24 |
Aug 01 08:37:12 PM PDT 24 |
3581032030 ps |
| T744 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3567434602 |
|
|
Aug 01 08:48:40 PM PDT 24 |
Aug 01 08:55:05 PM PDT 24 |
3486105572 ps |
| T1010 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.1855861053 |
|
|
Aug 01 08:18:21 PM PDT 24 |
Aug 01 08:22:20 PM PDT 24 |
3170034140 ps |
| T661 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2686200991 |
|
|
Aug 01 08:21:26 PM PDT 24 |
Aug 01 08:23:12 PM PDT 24 |
2200841354 ps |
| T1011 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.116453211 |
|
|
Aug 01 08:23:08 PM PDT 24 |
Aug 01 09:47:07 PM PDT 24 |
18121372246 ps |
| T1012 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.975045687 |
|
|
Aug 01 08:45:44 PM PDT 24 |
Aug 01 08:52:46 PM PDT 24 |
4128858316 ps |
| T710 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.2702244677 |
|
|
Aug 01 08:47:11 PM PDT 24 |
Aug 01 08:54:11 PM PDT 24 |
4171553748 ps |
| T315 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.1105030723 |
|
|
Aug 01 08:16:23 PM PDT 24 |
Aug 01 08:19:40 PM PDT 24 |
2738470699 ps |