| T686 |
/workspace/coverage/default/2.chip_sw_power_idle_load.3617663765 |
|
|
Aug 03 07:47:19 PM PDT 24 |
Aug 03 07:56:59 PM PDT 24 |
4576867154 ps |
| T177 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.1886081676 |
|
|
Aug 03 07:08:00 PM PDT 24 |
Aug 03 07:12:49 PM PDT 24 |
4114962548 ps |
| T687 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.2831590528 |
|
|
Aug 03 07:26:48 PM PDT 24 |
Aug 03 09:15:49 PM PDT 24 |
23217071088 ps |
| T688 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.3263995544 |
|
|
Aug 03 07:23:55 PM PDT 24 |
Aug 03 08:32:01 PM PDT 24 |
14262894993 ps |
| T689 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.1521387927 |
|
|
Aug 03 07:40:53 PM PDT 24 |
Aug 03 07:46:03 PM PDT 24 |
3324250192 ps |
| T690 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.341869938 |
|
|
Aug 03 07:28:33 PM PDT 24 |
Aug 03 07:32:35 PM PDT 24 |
3513763304 ps |
| T691 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.461190876 |
|
|
Aug 03 07:44:51 PM PDT 24 |
Aug 03 07:51:58 PM PDT 24 |
3128377804 ps |
| T692 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.1445438368 |
|
|
Aug 03 07:48:55 PM PDT 24 |
Aug 03 08:42:26 PM PDT 24 |
14109924476 ps |
| T76 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.3551173905 |
|
|
Aug 03 07:46:12 PM PDT 24 |
Aug 03 08:05:47 PM PDT 24 |
6955629880 ps |
| T693 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.552598710 |
|
|
Aug 03 07:29:54 PM PDT 24 |
Aug 03 07:35:13 PM PDT 24 |
3005158720 ps |
| T110 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.357036320 |
|
|
Aug 03 07:07:55 PM PDT 24 |
Aug 03 07:11:57 PM PDT 24 |
2958745880 ps |
| T427 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.2712937690 |
|
|
Aug 03 07:09:12 PM PDT 24 |
Aug 03 07:22:53 PM PDT 24 |
13093721267 ps |
| T208 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.2265022269 |
|
|
Aug 03 07:19:46 PM PDT 24 |
Aug 03 07:55:48 PM PDT 24 |
10837085263 ps |
| T428 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.3617556304 |
|
|
Aug 03 07:22:33 PM PDT 24 |
Aug 03 08:29:32 PM PDT 24 |
15396834640 ps |
| T429 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.3611017229 |
|
|
Aug 03 07:12:42 PM PDT 24 |
Aug 03 07:16:04 PM PDT 24 |
2170023854 ps |
| T239 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.2083979225 |
|
|
Aug 03 07:09:07 PM PDT 24 |
Aug 03 07:20:08 PM PDT 24 |
6882944179 ps |
| T430 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.1353385063 |
|
|
Aug 03 07:24:01 PM PDT 24 |
Aug 03 07:26:36 PM PDT 24 |
3606848669 ps |
| T230 |
/workspace/coverage/default/1.chip_sw_power_virus.1637451119 |
|
|
Aug 03 07:35:20 PM PDT 24 |
Aug 03 08:00:12 PM PDT 24 |
5946124720 ps |
| T431 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.3512478016 |
|
|
Aug 03 07:15:48 PM PDT 24 |
Aug 03 07:22:30 PM PDT 24 |
6510667764 ps |
| T240 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.872497697 |
|
|
Aug 03 07:36:38 PM PDT 24 |
Aug 03 07:49:27 PM PDT 24 |
6867584989 ps |
| T500 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.153608286 |
|
|
Aug 03 07:52:26 PM PDT 24 |
Aug 03 08:04:31 PM PDT 24 |
5118829246 ps |
| T181 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.1116285791 |
|
|
Aug 03 07:15:53 PM PDT 24 |
Aug 03 07:19:36 PM PDT 24 |
3215049640 ps |
| T272 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.1541116602 |
|
|
Aug 03 07:23:00 PM PDT 24 |
Aug 03 09:09:31 PM PDT 24 |
24154096118 ps |
| T403 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.874965996 |
|
|
Aug 03 07:53:49 PM PDT 24 |
Aug 03 08:03:01 PM PDT 24 |
4871184450 ps |
| T404 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.1012294455 |
|
|
Aug 03 07:56:30 PM PDT 24 |
Aug 03 08:05:19 PM PDT 24 |
5860295960 ps |
| T405 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.2831900409 |
|
|
Aug 03 07:21:28 PM PDT 24 |
Aug 03 08:20:00 PM PDT 24 |
15230289310 ps |
| T406 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.1391851759 |
|
|
Aug 03 07:23:25 PM PDT 24 |
Aug 03 08:44:38 PM PDT 24 |
16157342120 ps |
| T39 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.914127706 |
|
|
Aug 03 07:07:10 PM PDT 24 |
Aug 03 07:12:26 PM PDT 24 |
3646151152 ps |
| T407 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.2888902935 |
|
|
Aug 03 07:51:25 PM PDT 24 |
Aug 03 08:00:43 PM PDT 24 |
5360051900 ps |
| T408 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.4124694656 |
|
|
Aug 03 07:06:51 PM PDT 24 |
Aug 03 07:12:40 PM PDT 24 |
3854274718 ps |
| T52 |
/workspace/coverage/default/2.chip_jtag_csr_rw.2997657340 |
|
|
Aug 03 07:35:29 PM PDT 24 |
Aug 03 08:07:29 PM PDT 24 |
18181487915 ps |
| T694 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.1619422371 |
|
|
Aug 03 07:54:59 PM PDT 24 |
Aug 03 08:01:42 PM PDT 24 |
3583029464 ps |
| T695 |
/workspace/coverage/default/0.chip_tap_straps_prod.1012818236 |
|
|
Aug 03 07:15:34 PM PDT 24 |
Aug 03 07:44:07 PM PDT 24 |
13812755325 ps |
| T696 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.4131384767 |
|
|
Aug 03 07:08:49 PM PDT 24 |
Aug 03 07:24:41 PM PDT 24 |
7542666837 ps |
| T340 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.2313935345 |
|
|
Aug 03 07:23:08 PM PDT 24 |
Aug 03 08:59:34 PM PDT 24 |
46999689690 ps |
| T496 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.1746613854 |
|
|
Aug 03 07:52:54 PM PDT 24 |
Aug 03 07:59:28 PM PDT 24 |
3337742532 ps |
| T295 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.1997168203 |
|
|
Aug 03 07:15:34 PM PDT 24 |
Aug 03 07:26:03 PM PDT 24 |
5645006530 ps |
| T123 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.842744973 |
|
|
Aug 03 07:52:10 PM PDT 24 |
Aug 03 08:00:53 PM PDT 24 |
5111831448 ps |
| T697 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.447458258 |
|
|
Aug 03 07:56:49 PM PDT 24 |
Aug 03 08:08:08 PM PDT 24 |
5855694448 ps |
| T698 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.3161078166 |
|
|
Aug 03 07:49:12 PM PDT 24 |
Aug 03 07:56:58 PM PDT 24 |
6381181892 ps |
| T699 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.3734841341 |
|
|
Aug 03 07:38:35 PM PDT 24 |
Aug 03 07:43:22 PM PDT 24 |
3100213968 ps |
| T479 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.2239185670 |
|
|
Aug 03 07:51:43 PM PDT 24 |
Aug 03 07:58:08 PM PDT 24 |
4310052556 ps |
| T394 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1588407557 |
|
|
Aug 03 07:42:47 PM PDT 24 |
Aug 03 07:51:32 PM PDT 24 |
5560995696 ps |
| T700 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.2090400558 |
|
|
Aug 03 07:30:30 PM PDT 24 |
Aug 03 07:52:10 PM PDT 24 |
7145374398 ps |
| T701 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.1045700626 |
|
|
Aug 03 07:09:40 PM PDT 24 |
Aug 03 07:12:58 PM PDT 24 |
2153451272 ps |
| T217 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.2610469965 |
|
|
Aug 03 07:33:14 PM PDT 24 |
Aug 03 07:49:17 PM PDT 24 |
5543093652 ps |
| T702 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.3208840027 |
|
|
Aug 03 07:26:12 PM PDT 24 |
Aug 03 08:24:52 PM PDT 24 |
19166827266 ps |
| T703 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.3530923499 |
|
|
Aug 03 07:29:17 PM PDT 24 |
Aug 03 07:34:09 PM PDT 24 |
3348747350 ps |
| T534 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.2693141030 |
|
|
Aug 03 07:51:37 PM PDT 24 |
Aug 03 07:57:06 PM PDT 24 |
3927441864 ps |
| T704 |
/workspace/coverage/default/2.rom_e2e_static_critical.2823007303 |
|
|
Aug 03 07:49:28 PM PDT 24 |
Aug 03 09:05:49 PM PDT 24 |
17187734160 ps |
| T705 |
/workspace/coverage/default/0.chip_tap_straps_dev.2949840361 |
|
|
Aug 03 07:14:52 PM PDT 24 |
Aug 03 07:33:01 PM PDT 24 |
9328165790 ps |
| T248 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.3101824233 |
|
|
Aug 03 07:54:32 PM PDT 24 |
Aug 03 08:03:05 PM PDT 24 |
5541769600 ps |
| T503 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.2782484907 |
|
|
Aug 03 07:53:26 PM PDT 24 |
Aug 03 08:03:59 PM PDT 24 |
4514068362 ps |
| T78 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.3541183711 |
|
|
Aug 03 07:30:51 PM PDT 24 |
Aug 03 07:40:29 PM PDT 24 |
4909675306 ps |
| T706 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1930539377 |
|
|
Aug 03 07:25:56 PM PDT 24 |
Aug 03 07:41:14 PM PDT 24 |
8021851992 ps |
| T707 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.2235981934 |
|
|
Aug 03 07:25:04 PM PDT 24 |
Aug 03 07:32:40 PM PDT 24 |
7032883288 ps |
| T358 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.570391903 |
|
|
Aug 03 07:21:28 PM PDT 24 |
Aug 03 07:24:57 PM PDT 24 |
2476878270 ps |
| T708 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.642420809 |
|
|
Aug 03 07:35:40 PM PDT 24 |
Aug 03 07:40:46 PM PDT 24 |
2403829660 ps |
| T709 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.2818855540 |
|
|
Aug 03 07:37:18 PM PDT 24 |
Aug 03 07:57:39 PM PDT 24 |
7303458774 ps |
| T153 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.3492052861 |
|
|
Aug 03 07:42:58 PM PDT 24 |
Aug 03 07:54:39 PM PDT 24 |
5311197744 ps |
| T710 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.2291760619 |
|
|
Aug 03 07:19:18 PM PDT 24 |
Aug 03 08:01:04 PM PDT 24 |
32054047329 ps |
| T53 |
/workspace/coverage/default/0.chip_jtag_mem_access.3030305166 |
|
|
Aug 03 07:08:38 PM PDT 24 |
Aug 03 07:32:22 PM PDT 24 |
13749349072 ps |
| T711 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.3136844355 |
|
|
Aug 03 07:25:27 PM PDT 24 |
Aug 03 08:24:49 PM PDT 24 |
20778354253 ps |
| T712 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2440356301 |
|
|
Aug 03 07:11:12 PM PDT 24 |
Aug 03 07:34:55 PM PDT 24 |
7811796356 ps |
| T455 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.3859929628 |
|
|
Aug 03 07:53:06 PM PDT 24 |
Aug 03 08:00:25 PM PDT 24 |
4028199500 ps |
| T713 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.2070666981 |
|
|
Aug 03 07:50:18 PM PDT 24 |
Aug 03 07:58:22 PM PDT 24 |
3774900012 ps |
| T714 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.2440610475 |
|
|
Aug 03 07:46:17 PM PDT 24 |
Aug 03 09:13:22 PM PDT 24 |
24409630998 ps |
| T715 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.3068756345 |
|
|
Aug 03 07:22:52 PM PDT 24 |
Aug 03 07:41:15 PM PDT 24 |
6257992990 ps |
| T716 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.1329609639 |
|
|
Aug 03 07:19:44 PM PDT 24 |
Aug 03 07:23:32 PM PDT 24 |
2927615824 ps |
| T535 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.4207981752 |
|
|
Aug 03 07:55:28 PM PDT 24 |
Aug 03 08:01:21 PM PDT 24 |
4125962024 ps |
| T193 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.14445265 |
|
|
Aug 03 07:42:54 PM PDT 24 |
Aug 03 07:50:30 PM PDT 24 |
5057525368 ps |
| T717 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.4060508150 |
|
|
Aug 03 07:06:50 PM PDT 24 |
Aug 03 07:09:43 PM PDT 24 |
3353760772 ps |
| T434 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.98731328 |
|
|
Aug 03 07:42:32 PM PDT 24 |
Aug 03 07:50:10 PM PDT 24 |
4232736175 ps |
| T718 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.2168213671 |
|
|
Aug 03 07:19:06 PM PDT 24 |
Aug 03 07:51:41 PM PDT 24 |
11460915400 ps |
| T719 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.1251310825 |
|
|
Aug 03 07:35:42 PM PDT 24 |
Aug 03 08:31:24 PM PDT 24 |
14767693782 ps |
| T720 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.3180208652 |
|
|
Aug 03 07:51:17 PM PDT 24 |
Aug 03 08:01:06 PM PDT 24 |
7746176089 ps |
| T531 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.3984770179 |
|
|
Aug 03 07:48:32 PM PDT 24 |
Aug 03 07:55:21 PM PDT 24 |
3510271168 ps |
| T721 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.4218986688 |
|
|
Aug 03 07:32:49 PM PDT 24 |
Aug 03 07:38:15 PM PDT 24 |
3252163504 ps |
| T512 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.1125585045 |
|
|
Aug 03 07:53:25 PM PDT 24 |
Aug 03 08:02:41 PM PDT 24 |
5575572526 ps |
| T477 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.776550324 |
|
|
Aug 03 07:52:04 PM PDT 24 |
Aug 03 07:57:20 PM PDT 24 |
3696780740 ps |
| T722 |
/workspace/coverage/default/1.chip_sw_power_idle_load.3630075713 |
|
|
Aug 03 07:31:18 PM PDT 24 |
Aug 03 07:44:26 PM PDT 24 |
4327502406 ps |
| T723 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.1523016743 |
|
|
Aug 03 07:29:56 PM PDT 24 |
Aug 03 07:34:14 PM PDT 24 |
3641883823 ps |
| T724 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.1124969195 |
|
|
Aug 03 07:29:47 PM PDT 24 |
Aug 03 07:35:12 PM PDT 24 |
3361567004 ps |
| T725 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.2204708542 |
|
|
Aug 03 07:41:56 PM PDT 24 |
Aug 03 07:46:27 PM PDT 24 |
2823265600 ps |
| T333 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.188792896 |
|
|
Aug 03 07:12:07 PM PDT 24 |
Aug 03 08:20:45 PM PDT 24 |
14575005892 ps |
| T341 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.2135897893 |
|
|
Aug 03 07:22:00 PM PDT 24 |
Aug 03 07:29:14 PM PDT 24 |
5860471384 ps |
| T726 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1363675145 |
|
|
Aug 03 07:14:35 PM PDT 24 |
Aug 03 07:23:31 PM PDT 24 |
4675656142 ps |
| T727 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.2147582956 |
|
|
Aug 03 07:11:25 PM PDT 24 |
Aug 03 07:31:47 PM PDT 24 |
5944740920 ps |
| T728 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3048321934 |
|
|
Aug 03 07:32:02 PM PDT 24 |
Aug 03 07:45:57 PM PDT 24 |
5128562005 ps |
| T729 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.1854294353 |
|
|
Aug 03 07:07:27 PM PDT 24 |
Aug 03 07:10:57 PM PDT 24 |
2451059766 ps |
| T730 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.1400237783 |
|
|
Aug 03 07:22:31 PM PDT 24 |
Aug 03 08:35:03 PM PDT 24 |
15626563625 ps |
| T182 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.2034176604 |
|
|
Aug 03 07:35:05 PM PDT 24 |
Aug 03 07:41:07 PM PDT 24 |
3191685042 ps |
| T731 |
/workspace/coverage/default/0.rom_keymgr_functest.1888454223 |
|
|
Aug 03 07:20:09 PM PDT 24 |
Aug 03 07:29:21 PM PDT 24 |
5581291090 ps |
| T732 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.1699001661 |
|
|
Aug 03 07:43:28 PM PDT 24 |
Aug 03 08:06:39 PM PDT 24 |
10549638024 ps |
| T733 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.3655909297 |
|
|
Aug 03 07:36:44 PM PDT 24 |
Aug 03 08:01:25 PM PDT 24 |
7535999224 ps |
| T273 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.3703310037 |
|
|
Aug 03 07:27:40 PM PDT 24 |
Aug 03 09:02:58 PM PDT 24 |
23118680912 ps |
| T734 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.2789649959 |
|
|
Aug 03 07:34:04 PM PDT 24 |
Aug 03 07:39:33 PM PDT 24 |
2742271048 ps |
| T735 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.3288670066 |
|
|
Aug 03 07:11:51 PM PDT 24 |
Aug 03 07:25:40 PM PDT 24 |
5391540301 ps |
| T736 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.2035887287 |
|
|
Aug 03 07:41:22 PM PDT 24 |
Aug 03 08:05:25 PM PDT 24 |
7708660872 ps |
| T104 |
/workspace/coverage/default/2.chip_sw_alert_test.860858956 |
|
|
Aug 03 07:39:40 PM PDT 24 |
Aug 03 07:44:48 PM PDT 24 |
2499866726 ps |
| T504 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.4217867489 |
|
|
Aug 03 07:46:28 PM PDT 24 |
Aug 03 07:52:54 PM PDT 24 |
3660860692 ps |
| T737 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2243945392 |
|
|
Aug 03 07:37:49 PM PDT 24 |
Aug 03 07:45:20 PM PDT 24 |
7913796724 ps |
| T738 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.85474326 |
|
|
Aug 03 07:34:59 PM PDT 24 |
Aug 03 07:39:21 PM PDT 24 |
2914535688 ps |
| T249 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.2026896908 |
|
|
Aug 03 07:53:59 PM PDT 24 |
Aug 03 07:59:36 PM PDT 24 |
4052230550 ps |
| T318 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.4039087278 |
|
|
Aug 03 07:33:05 PM PDT 24 |
Aug 03 07:36:40 PM PDT 24 |
2468646772 ps |
| T739 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1278775280 |
|
|
Aug 03 07:16:59 PM PDT 24 |
Aug 03 08:21:43 PM PDT 24 |
24870725786 ps |
| T740 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.3649886532 |
|
|
Aug 03 07:23:20 PM PDT 24 |
Aug 03 07:44:32 PM PDT 24 |
9258037434 ps |
| T741 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.1701876329 |
|
|
Aug 03 07:12:28 PM PDT 24 |
Aug 03 07:35:44 PM PDT 24 |
6991686270 ps |
| T742 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.1459902480 |
|
|
Aug 03 07:36:05 PM PDT 24 |
Aug 03 08:38:56 PM PDT 24 |
14930829280 ps |
| T743 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.3239366819 |
|
|
Aug 03 07:24:52 PM PDT 24 |
Aug 03 08:26:51 PM PDT 24 |
14461233754 ps |
| T744 |
/workspace/coverage/default/1.chip_sival_flash_info_access.1785686763 |
|
|
Aug 03 07:21:10 PM PDT 24 |
Aug 03 07:26:59 PM PDT 24 |
3180558932 ps |
| T745 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2379707268 |
|
|
Aug 03 07:28:34 PM PDT 24 |
Aug 03 10:52:37 PM PDT 24 |
255742350040 ps |
| T746 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3305542776 |
|
|
Aug 03 07:17:22 PM PDT 24 |
Aug 03 07:22:20 PM PDT 24 |
3154889214 ps |
| T747 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.3756647062 |
|
|
Aug 03 07:20:44 PM PDT 24 |
Aug 03 07:25:25 PM PDT 24 |
3408568784 ps |
| T518 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.3147513459 |
|
|
Aug 03 07:54:28 PM PDT 24 |
Aug 03 08:02:50 PM PDT 24 |
4671426048 ps |
| T748 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.1345979155 |
|
|
Aug 03 07:07:31 PM PDT 24 |
Aug 03 07:21:50 PM PDT 24 |
5300955778 ps |
| T749 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.2482135577 |
|
|
Aug 03 07:35:40 PM PDT 24 |
Aug 03 07:55:47 PM PDT 24 |
5571410084 ps |
| T750 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.709724899 |
|
|
Aug 03 07:44:59 PM PDT 24 |
Aug 03 08:08:06 PM PDT 24 |
8853367280 ps |
| T751 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.2175390764 |
|
|
Aug 03 07:36:33 PM PDT 24 |
Aug 03 07:50:37 PM PDT 24 |
4666353352 ps |
| T752 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.3764090680 |
|
|
Aug 03 07:23:56 PM PDT 24 |
Aug 03 07:45:08 PM PDT 24 |
7886997106 ps |
| T753 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.3800471585 |
|
|
Aug 03 07:41:23 PM PDT 24 |
Aug 03 07:54:31 PM PDT 24 |
5512681832 ps |
| T754 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1127827655 |
|
|
Aug 03 07:07:52 PM PDT 24 |
Aug 03 07:43:49 PM PDT 24 |
19804493338 ps |
| T755 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.3531108677 |
|
|
Aug 03 07:46:12 PM PDT 24 |
Aug 03 07:57:25 PM PDT 24 |
4418539688 ps |
| T756 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.1577111118 |
|
|
Aug 03 07:14:37 PM PDT 24 |
Aug 03 07:21:43 PM PDT 24 |
3829729371 ps |
| T757 |
/workspace/coverage/default/2.rom_e2e_self_hash.1863793036 |
|
|
Aug 03 07:50:01 PM PDT 24 |
Aug 03 09:39:39 PM PDT 24 |
26754318188 ps |
| T758 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.2590453925 |
|
|
Aug 03 07:17:40 PM PDT 24 |
Aug 03 07:22:20 PM PDT 24 |
2729578976 ps |
| T154 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.1462301722 |
|
|
Aug 03 07:14:32 PM PDT 24 |
Aug 03 07:28:10 PM PDT 24 |
5589087478 ps |
| T759 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.1960135986 |
|
|
Aug 03 07:35:46 PM PDT 24 |
Aug 03 07:52:51 PM PDT 24 |
6285642812 ps |
| T760 |
/workspace/coverage/default/0.chip_sw_example_rom.481603681 |
|
|
Aug 03 07:06:27 PM PDT 24 |
Aug 03 07:08:12 PM PDT 24 |
2001638560 ps |
| T374 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.2895967336 |
|
|
Aug 03 07:07:06 PM PDT 24 |
Aug 03 07:15:39 PM PDT 24 |
3429831712 ps |
| T761 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.1841312687 |
|
|
Aug 03 07:47:37 PM PDT 24 |
Aug 03 07:57:31 PM PDT 24 |
4914355848 ps |
| T762 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.3423897006 |
|
|
Aug 03 07:12:45 PM PDT 24 |
Aug 03 07:17:57 PM PDT 24 |
2985646306 ps |
| T763 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.1788683862 |
|
|
Aug 03 07:39:09 PM PDT 24 |
Aug 03 08:35:57 PM PDT 24 |
17505547216 ps |
| T764 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.1666607592 |
|
|
Aug 03 07:37:35 PM PDT 24 |
Aug 03 08:36:14 PM PDT 24 |
14576390616 ps |
| T106 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.1550570155 |
|
|
Aug 03 07:06:59 PM PDT 24 |
Aug 03 07:10:07 PM PDT 24 |
2563245148 ps |
| T765 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.1783362840 |
|
|
Aug 03 07:23:03 PM PDT 24 |
Aug 03 07:35:38 PM PDT 24 |
5895796652 ps |
| T451 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.2358107318 |
|
|
Aug 03 07:53:59 PM PDT 24 |
Aug 03 08:04:19 PM PDT 24 |
5455385770 ps |
| T136 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.477304211 |
|
|
Aug 03 07:15:49 PM PDT 24 |
Aug 03 07:22:13 PM PDT 24 |
7145619448 ps |
| T766 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.4046707801 |
|
|
Aug 03 07:20:35 PM PDT 24 |
Aug 03 07:32:16 PM PDT 24 |
5356586248 ps |
| T108 |
/workspace/coverage/default/1.chip_jtag_csr_rw.1987867089 |
|
|
Aug 03 07:23:14 PM PDT 24 |
Aug 03 07:49:47 PM PDT 24 |
14356281360 ps |
| T420 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.1464294682 |
|
|
Aug 03 07:42:39 PM PDT 24 |
Aug 03 07:48:20 PM PDT 24 |
3017110503 ps |
| T421 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.521111049 |
|
|
Aug 03 07:08:05 PM PDT 24 |
Aug 03 07:16:45 PM PDT 24 |
4461831464 ps |
| T422 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.498492989 |
|
|
Aug 03 07:55:20 PM PDT 24 |
Aug 03 08:08:41 PM PDT 24 |
5010848170 ps |
| T423 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.944969320 |
|
|
Aug 03 07:41:58 PM PDT 24 |
Aug 03 07:50:23 PM PDT 24 |
3704353820 ps |
| T424 |
/workspace/coverage/default/2.rom_e2e_smoke.2332899594 |
|
|
Aug 03 07:48:30 PM PDT 24 |
Aug 03 08:47:18 PM PDT 24 |
14824336392 ps |
| T259 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.4067162387 |
|
|
Aug 03 07:38:15 PM PDT 24 |
Aug 03 07:41:57 PM PDT 24 |
2690632952 ps |
| T425 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.3140801723 |
|
|
Aug 03 07:23:33 PM PDT 24 |
Aug 03 08:14:54 PM PDT 24 |
11598426185 ps |
| T186 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.743371583 |
|
|
Aug 03 07:28:53 PM PDT 24 |
Aug 03 07:36:10 PM PDT 24 |
5046607960 ps |
| T426 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.1398606422 |
|
|
Aug 03 07:55:14 PM PDT 24 |
Aug 03 08:01:07 PM PDT 24 |
3232283780 ps |
| T183 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3549631680 |
|
|
Aug 03 07:36:25 PM PDT 24 |
Aug 03 08:51:58 PM PDT 24 |
45001221640 ps |
| T363 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.779574473 |
|
|
Aug 03 07:39:13 PM PDT 24 |
Aug 03 08:05:09 PM PDT 24 |
22190314912 ps |
| T767 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.2067863896 |
|
|
Aug 03 07:30:42 PM PDT 24 |
Aug 03 07:49:27 PM PDT 24 |
7751228264 ps |
| T768 |
/workspace/coverage/default/1.chip_sw_aes_idle.699634565 |
|
|
Aug 03 07:25:43 PM PDT 24 |
Aug 03 07:30:40 PM PDT 24 |
2625564824 ps |
| T366 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.3831778672 |
|
|
Aug 03 07:27:29 PM PDT 24 |
Aug 03 07:50:16 PM PDT 24 |
7288948752 ps |
| T769 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.2210176088 |
|
|
Aug 03 07:20:09 PM PDT 24 |
Aug 03 07:23:21 PM PDT 24 |
3123847580 ps |
| T509 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.1027646506 |
|
|
Aug 03 07:51:03 PM PDT 24 |
Aug 03 07:59:57 PM PDT 24 |
5851304040 ps |
| T770 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.3873548740 |
|
|
Aug 03 07:40:18 PM PDT 24 |
Aug 03 07:46:49 PM PDT 24 |
3330114128 ps |
| T771 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.398230155 |
|
|
Aug 03 07:56:46 PM PDT 24 |
Aug 03 08:04:18 PM PDT 24 |
5212089548 ps |
| T772 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.2667816227 |
|
|
Aug 03 07:48:32 PM PDT 24 |
Aug 03 08:57:51 PM PDT 24 |
19070828608 ps |
| T773 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.2808309292 |
|
|
Aug 03 07:29:51 PM PDT 24 |
Aug 03 07:38:16 PM PDT 24 |
6801445250 ps |
| T330 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.2324249862 |
|
|
Aug 03 07:43:39 PM PDT 24 |
Aug 03 08:19:44 PM PDT 24 |
11373284388 ps |
| T396 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.3003688098 |
|
|
Aug 03 07:42:15 PM PDT 24 |
Aug 03 07:56:31 PM PDT 24 |
8914807656 ps |
| T513 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.1821174094 |
|
|
Aug 03 07:49:45 PM PDT 24 |
Aug 03 07:58:36 PM PDT 24 |
5542206848 ps |
| T774 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.174797418 |
|
|
Aug 03 07:39:32 PM PDT 24 |
Aug 03 07:47:23 PM PDT 24 |
19104443934 ps |
| T775 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.3424468481 |
|
|
Aug 03 07:11:43 PM PDT 24 |
Aug 03 07:15:44 PM PDT 24 |
3115558820 ps |
| T148 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.145146809 |
|
|
Aug 03 07:30:30 PM PDT 24 |
Aug 03 07:57:44 PM PDT 24 |
22303526664 ps |
| T484 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.3951156568 |
|
|
Aug 03 07:51:03 PM PDT 24 |
Aug 03 07:56:25 PM PDT 24 |
4172936188 ps |
| T776 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.1166052177 |
|
|
Aug 03 07:12:35 PM PDT 24 |
Aug 03 07:37:34 PM PDT 24 |
6991540912 ps |
| T777 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.3473967340 |
|
|
Aug 03 07:49:01 PM PDT 24 |
Aug 03 07:55:40 PM PDT 24 |
4942924876 ps |
| T778 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2138477506 |
|
|
Aug 03 07:32:03 PM PDT 24 |
Aug 03 07:38:02 PM PDT 24 |
3447027742 ps |
| T779 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.2624636570 |
|
|
Aug 03 07:24:14 PM PDT 24 |
Aug 03 07:27:53 PM PDT 24 |
3557017200 ps |
| T416 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.2441756369 |
|
|
Aug 03 07:27:46 PM PDT 24 |
Aug 03 07:37:55 PM PDT 24 |
3254864216 ps |
| T780 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.1939269006 |
|
|
Aug 03 07:22:17 PM PDT 24 |
Aug 03 08:55:31 PM PDT 24 |
23443269771 ps |
| T781 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1608786668 |
|
|
Aug 03 07:31:15 PM PDT 24 |
Aug 03 08:41:35 PM PDT 24 |
24399450365 ps |
| T782 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.1237110470 |
|
|
Aug 03 07:25:06 PM PDT 24 |
Aug 03 07:30:43 PM PDT 24 |
3166053224 ps |
| T473 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.931134781 |
|
|
Aug 03 07:48:39 PM PDT 24 |
Aug 03 07:56:41 PM PDT 24 |
4683634688 ps |
| T783 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.2592502390 |
|
|
Aug 03 07:23:15 PM PDT 24 |
Aug 03 08:56:35 PM PDT 24 |
23213020153 ps |
| T784 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.3276444854 |
|
|
Aug 03 07:38:15 PM PDT 24 |
Aug 03 07:45:50 PM PDT 24 |
4066292045 ps |
| T785 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.3183498481 |
|
|
Aug 03 07:44:29 PM PDT 24 |
Aug 03 08:15:06 PM PDT 24 |
20183612139 ps |
| T786 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.1249702208 |
|
|
Aug 03 07:49:55 PM PDT 24 |
Aug 03 08:30:06 PM PDT 24 |
11589297791 ps |
| T787 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.1234711353 |
|
|
Aug 03 07:41:45 PM PDT 24 |
Aug 03 07:54:43 PM PDT 24 |
7730938380 ps |
| T788 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.2509428972 |
|
|
Aug 03 07:06:59 PM PDT 24 |
Aug 03 07:08:52 PM PDT 24 |
3266169990 ps |
| T210 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.1443864561 |
|
|
Aug 03 07:41:52 PM PDT 24 |
Aug 03 07:56:24 PM PDT 24 |
9007378394 ps |
| T467 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.457935923 |
|
|
Aug 03 07:56:35 PM PDT 24 |
Aug 03 08:03:38 PM PDT 24 |
4279578820 ps |
| T525 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.4109789489 |
|
|
Aug 03 07:53:54 PM PDT 24 |
Aug 03 08:03:05 PM PDT 24 |
5022138698 ps |
| T109 |
/workspace/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.2738135150 |
|
|
Aug 03 07:35:23 PM PDT 24 |
Aug 03 07:40:59 PM PDT 24 |
3979303332 ps |
| T789 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.1776611356 |
|
|
Aug 03 07:06:44 PM PDT 24 |
Aug 03 07:21:51 PM PDT 24 |
5938898590 ps |
| T790 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.1554076828 |
|
|
Aug 03 07:44:30 PM PDT 24 |
Aug 03 07:48:50 PM PDT 24 |
3259552864 ps |
| T97 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.2588592839 |
|
|
Aug 03 07:23:20 PM PDT 24 |
Aug 03 07:32:20 PM PDT 24 |
3689296963 ps |
| T101 |
/workspace/coverage/default/0.chip_jtag_csr_rw.2997143316 |
|
|
Aug 03 07:08:25 PM PDT 24 |
Aug 03 07:22:55 PM PDT 24 |
10017814206 ps |
| T99 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.1689296798 |
|
|
Aug 03 07:43:21 PM PDT 24 |
Aug 03 07:50:35 PM PDT 24 |
3928308696 ps |
| T261 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.827560395 |
|
|
Aug 03 07:43:45 PM PDT 24 |
Aug 03 07:50:16 PM PDT 24 |
3163119628 ps |
| T791 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.767582811 |
|
|
Aug 03 07:37:23 PM PDT 24 |
Aug 03 07:56:28 PM PDT 24 |
11550338510 ps |
| T502 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3824206118 |
|
|
Aug 03 07:54:53 PM PDT 24 |
Aug 03 08:01:19 PM PDT 24 |
3890357126 ps |
| T792 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.4214915818 |
|
|
Aug 03 07:43:43 PM PDT 24 |
Aug 03 07:53:17 PM PDT 24 |
5196448904 ps |
| T793 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.2639099539 |
|
|
Aug 03 07:28:36 PM PDT 24 |
Aug 03 07:39:06 PM PDT 24 |
9402319383 ps |
| T794 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.1280140246 |
|
|
Aug 03 07:42:24 PM PDT 24 |
Aug 03 07:53:43 PM PDT 24 |
6775580040 ps |
| T795 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.856453183 |
|
|
Aug 03 07:10:18 PM PDT 24 |
Aug 03 07:20:43 PM PDT 24 |
9300299216 ps |
| T796 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.2532979230 |
|
|
Aug 03 07:27:36 PM PDT 24 |
Aug 03 08:59:20 PM PDT 24 |
18776245840 ps |
| T336 |
/workspace/coverage/default/1.chip_sw_flash_init.3713364404 |
|
|
Aug 03 07:22:50 PM PDT 24 |
Aug 03 07:54:35 PM PDT 24 |
23813273055 ps |
| T797 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.2527853710 |
|
|
Aug 03 07:49:05 PM PDT 24 |
Aug 03 08:04:04 PM PDT 24 |
13018572029 ps |
| T798 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.3194305756 |
|
|
Aug 03 07:28:45 PM PDT 24 |
Aug 03 07:39:30 PM PDT 24 |
5344311998 ps |
| T799 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.2641185354 |
|
|
Aug 03 07:45:42 PM PDT 24 |
Aug 03 07:47:32 PM PDT 24 |
2582123762 ps |
| T800 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.379777566 |
|
|
Aug 03 07:20:57 PM PDT 24 |
Aug 03 07:24:27 PM PDT 24 |
2679623800 ps |
| T801 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.2366267870 |
|
|
Aug 03 07:22:59 PM PDT 24 |
Aug 03 07:28:38 PM PDT 24 |
3876613656 ps |
| T334 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.3230830873 |
|
|
Aug 03 07:42:43 PM PDT 24 |
Aug 03 08:45:08 PM PDT 24 |
17373958524 ps |
| T802 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.1810889067 |
|
|
Aug 03 07:27:25 PM PDT 24 |
Aug 03 07:52:22 PM PDT 24 |
6698765672 ps |
| T803 |
/workspace/coverage/default/1.rom_e2e_smoke.23909148 |
|
|
Aug 03 07:37:25 PM PDT 24 |
Aug 03 08:35:34 PM PDT 24 |
14853104430 ps |
| T804 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.2871440530 |
|
|
Aug 03 07:10:19 PM PDT 24 |
Aug 03 07:14:51 PM PDT 24 |
3595718042 ps |
| T501 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.1819802799 |
|
|
Aug 03 07:56:19 PM PDT 24 |
Aug 03 08:04:48 PM PDT 24 |
5317986236 ps |
| T805 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.784659008 |
|
|
Aug 03 07:13:38 PM PDT 24 |
Aug 03 07:17:50 PM PDT 24 |
2734123624 ps |
| T806 |
/workspace/coverage/default/0.chip_sw_coremark.3978094935 |
|
|
Aug 03 07:13:23 PM PDT 24 |
Aug 03 11:02:53 PM PDT 24 |
71406619332 ps |
| T527 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.3483405460 |
|
|
Aug 03 07:49:37 PM PDT 24 |
Aug 03 07:55:00 PM PDT 24 |
3499618200 ps |
| T807 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.4021996010 |
|
|
Aug 03 07:10:22 PM PDT 24 |
Aug 03 07:16:56 PM PDT 24 |
4598367720 ps |
| T808 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.2706947095 |
|
|
Aug 03 07:36:21 PM PDT 24 |
Aug 03 08:32:01 PM PDT 24 |
15078708920 ps |
| T809 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.2494212900 |
|
|
Aug 03 07:45:29 PM PDT 24 |
Aug 03 07:54:07 PM PDT 24 |
5872594520 ps |
| T810 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1276508675 |
|
|
Aug 03 07:40:36 PM PDT 24 |
Aug 03 11:03:45 PM PDT 24 |
254925129406 ps |
| T811 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.3693982847 |
|
|
Aug 03 07:49:00 PM PDT 24 |
Aug 03 07:56:57 PM PDT 24 |
7913676082 ps |
| T75 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.4282827634 |
|
|
Aug 03 07:42:37 PM PDT 24 |
Aug 03 07:52:12 PM PDT 24 |
5093509896 ps |
| T812 |
/workspace/coverage/default/1.chip_sw_aes_enc.2643038743 |
|
|
Aug 03 07:25:14 PM PDT 24 |
Aug 03 07:28:55 PM PDT 24 |
2959036728 ps |
| T813 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.3473006389 |
|
|
Aug 03 07:45:32 PM PDT 24 |
Aug 03 07:49:52 PM PDT 24 |
3189963912 ps |
| T492 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.2007029530 |
|
|
Aug 03 07:50:28 PM PDT 24 |
Aug 03 07:56:18 PM PDT 24 |
3539931216 ps |
| T814 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.1232052436 |
|
|
Aug 03 07:28:01 PM PDT 24 |
Aug 03 07:53:26 PM PDT 24 |
6008211620 ps |
| T815 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3155743461 |
|
|
Aug 03 07:47:17 PM PDT 24 |
Aug 03 07:52:35 PM PDT 24 |
3015755872 ps |
| T417 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.2564128232 |
|
|
Aug 03 07:42:45 PM PDT 24 |
Aug 03 08:08:01 PM PDT 24 |
23215061208 ps |
| T454 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.4155233491 |
|
|
Aug 03 07:56:02 PM PDT 24 |
Aug 03 08:05:41 PM PDT 24 |
5471539640 ps |
| T124 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.409091594 |
|
|
Aug 03 07:54:59 PM PDT 24 |
Aug 03 08:03:36 PM PDT 24 |
4494711932 ps |
| T816 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.1934995311 |
|
|
Aug 03 07:33:57 PM PDT 24 |
Aug 03 07:43:20 PM PDT 24 |
3879655884 ps |
| T817 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.528303234 |
|
|
Aug 03 07:06:15 PM PDT 24 |
Aug 03 07:17:35 PM PDT 24 |
5667198680 ps |
| T818 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.4153696714 |
|
|
Aug 03 07:06:26 PM PDT 24 |
Aug 03 07:15:23 PM PDT 24 |
4441012880 ps |
| T819 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.2332173253 |
|
|
Aug 03 07:24:00 PM PDT 24 |
Aug 03 07:30:50 PM PDT 24 |
5417583030 ps |
| T820 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.3049772588 |
|
|
Aug 03 07:22:10 PM PDT 24 |
Aug 03 08:24:13 PM PDT 24 |
15607623833 ps |
| T821 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.1418053423 |
|
|
Aug 03 07:30:33 PM PDT 24 |
Aug 03 07:39:23 PM PDT 24 |
4867738530 ps |
| T822 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.379309289 |
|
|
Aug 03 07:12:02 PM PDT 24 |
Aug 03 07:35:46 PM PDT 24 |
9408259336 ps |
| T390 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.4137835691 |
|
|
Aug 03 07:26:38 PM PDT 24 |
Aug 03 07:39:58 PM PDT 24 |
4226761700 ps |
| T823 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.1869943373 |
|
|
Aug 03 07:13:06 PM PDT 24 |
Aug 03 07:22:19 PM PDT 24 |
5581131310 ps |
| T211 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.3397881128 |
|
|
Aug 03 07:12:24 PM PDT 24 |
Aug 03 07:23:49 PM PDT 24 |
8039882452 ps |
| T488 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.1943208727 |
|
|
Aug 03 07:54:00 PM PDT 24 |
Aug 03 08:00:52 PM PDT 24 |
3570800168 ps |
| T824 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.3146809077 |
|
|
Aug 03 07:22:58 PM PDT 24 |
Aug 03 08:30:15 PM PDT 24 |
15561972560 ps |
| T825 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.1142329461 |
|
|
Aug 03 07:38:09 PM PDT 24 |
Aug 03 07:51:27 PM PDT 24 |
7994550598 ps |
| T826 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.4226486047 |
|
|
Aug 03 07:06:40 PM PDT 24 |
Aug 03 07:08:51 PM PDT 24 |
3601375629 ps |
| T508 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.3359344151 |
|
|
Aug 03 07:57:17 PM PDT 24 |
Aug 03 08:05:32 PM PDT 24 |
4912323208 ps |
| T827 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1849263059 |
|
|
Aug 03 07:29:31 PM PDT 24 |
Aug 03 07:40:44 PM PDT 24 |
4920005280 ps |
| T828 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.377870 |
|
|
Aug 03 07:09:04 PM PDT 24 |
Aug 03 07:32:32 PM PDT 24 |
8438925840 ps |
| T829 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.1534041749 |
|
|
Aug 03 07:08:45 PM PDT 24 |
Aug 03 07:18:48 PM PDT 24 |
5099038808 ps |
| T190 |
/workspace/coverage/default/2.chip_jtag_mem_access.3827275982 |
|
|
Aug 03 07:35:27 PM PDT 24 |
Aug 03 08:02:06 PM PDT 24 |
13445054968 ps |
| T830 |
/workspace/coverage/default/2.chip_sw_aes_idle.2055506595 |
|
|
Aug 03 07:40:38 PM PDT 24 |
Aug 03 07:46:05 PM PDT 24 |
3510142200 ps |
| T519 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.3902348342 |
|
|
Aug 03 07:50:34 PM PDT 24 |
Aug 03 07:57:30 PM PDT 24 |
4496237218 ps |
| T351 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.525594785 |
|
|
Aug 03 07:38:27 PM PDT 24 |
Aug 03 08:02:09 PM PDT 24 |
13764137264 ps |
| T831 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.4220089175 |
|
|
Aug 03 07:28:35 PM PDT 24 |
Aug 03 08:01:11 PM PDT 24 |
9473370134 ps |