| SCORE |
LINE |
COND |
TOGGLE |
FSM |
BRANCH |
ASSERT |
GROUP |
|
| TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | NAME |
| 46.88 |
46.88 |
45.66 |
45.66 |
44.88 |
44.88 |
33.19 |
33.19 |
|
|
58.76 |
58.76 |
59.09 |
59.09 |
39.69 |
39.69 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.1047583346 |
| 56.31 |
9.43 |
53.39 |
7.73 |
54.08 |
9.20 |
35.41 |
2.22 |
|
|
67.06 |
8.30 |
84.97 |
25.87 |
42.98 |
3.29 |
/workspace/coverage/default/1.chip_jtag_csr_rw.1987867089 |
| 62.12 |
5.81 |
65.91 |
12.52 |
62.00 |
7.92 |
38.71 |
3.31 |
|
|
78.16 |
11.10 |
84.97 |
0.00 |
42.98 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3104170383 |
| 67.92 |
5.80 |
76.26 |
10.35 |
67.59 |
5.59 |
43.12 |
4.41 |
|
|
81.24 |
3.08 |
89.51 |
4.55 |
49.78 |
6.80 |
/workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.3894754924 |
| 71.02 |
3.10 |
76.30 |
0.04 |
67.65 |
0.06 |
45.62 |
2.49 |
|
|
81.25 |
0.01 |
89.51 |
0.00 |
65.79 |
16.01 |
/workspace/coverage/default/0.chip_sw_alert_test.2202484433 |
| 73.64 |
2.62 |
76.30 |
0.00 |
67.65 |
0.00 |
61.15 |
15.54 |
|
|
81.25 |
0.00 |
89.69 |
0.17 |
65.79 |
0.00 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.2553315043 |
| 75.56 |
1.92 |
79.76 |
3.45 |
71.49 |
3.84 |
61.65 |
0.50 |
|
|
84.97 |
3.72 |
89.69 |
0.00 |
65.79 |
0.00 |
/workspace/coverage/default/0.chip_jtag_csr_rw.2997143316 |
| 77.19 |
1.63 |
80.04 |
0.29 |
71.65 |
0.16 |
70.45 |
8.80 |
|
|
85.15 |
0.18 |
90.03 |
0.35 |
65.79 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.3477221930 |
| 78.61 |
1.42 |
82.89 |
2.84 |
74.46 |
2.82 |
70.81 |
0.36 |
|
|
87.67 |
2.52 |
90.03 |
0.00 |
65.79 |
0.00 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.1760940568 |
| 79.92 |
1.31 |
85.26 |
2.37 |
76.52 |
2.06 |
71.86 |
1.05 |
|
|
90.03 |
2.36 |
90.03 |
0.00 |
65.79 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.3413347643 |
| 81.06 |
1.14 |
86.80 |
1.53 |
77.82 |
1.30 |
74.43 |
2.57 |
|
|
91.11 |
1.08 |
90.38 |
0.35 |
65.79 |
0.00 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.2739507912 |
| 81.97 |
0.92 |
88.31 |
1.51 |
78.52 |
0.70 |
76.20 |
1.76 |
|
|
91.59 |
0.49 |
91.43 |
1.05 |
65.79 |
0.00 |
/workspace/coverage/default/0.chip_sw_power_virus.3812478476 |
| 82.76 |
0.79 |
88.71 |
0.40 |
78.74 |
0.22 |
76.21 |
0.01 |
|
|
91.85 |
0.25 |
95.28 |
3.85 |
65.79 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.1116285791 |
| 83.31 |
0.55 |
88.71 |
0.00 |
78.74 |
0.00 |
79.52 |
3.30 |
|
|
91.85 |
0.00 |
95.28 |
0.00 |
65.79 |
0.00 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1908959230 |
| 83.84 |
0.52 |
89.48 |
0.77 |
79.29 |
0.56 |
79.77 |
0.25 |
|
|
92.54 |
0.70 |
96.15 |
0.87 |
65.79 |
0.00 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.648598797 |
| 84.31 |
0.47 |
89.58 |
0.11 |
79.52 |
0.23 |
81.00 |
1.23 |
|
|
92.76 |
0.22 |
96.33 |
0.17 |
66.67 |
0.88 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.3144824298 |
| 84.66 |
0.35 |
90.15 |
0.57 |
80.00 |
0.48 |
81.57 |
0.58 |
|
|
93.25 |
0.49 |
96.33 |
0.00 |
66.67 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.2402156713 |
| 84.98 |
0.32 |
90.16 |
0.01 |
80.00 |
0.01 |
83.48 |
1.91 |
|
|
93.25 |
0.00 |
96.33 |
0.00 |
66.67 |
0.00 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.3986158201 |
| 85.28 |
0.30 |
90.19 |
0.03 |
80.03 |
0.02 |
83.51 |
0.03 |
|
|
93.27 |
0.02 |
96.50 |
0.17 |
68.20 |
1.54 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.1383424729 |
| 85.58 |
0.29 |
90.74 |
0.55 |
80.41 |
0.38 |
84.09 |
0.58 |
|
|
93.53 |
0.25 |
96.50 |
0.00 |
68.20 |
0.00 |
/workspace/coverage/default/1.chip_sw_gpio.3436127802 |
| 85.76 |
0.19 |
90.74 |
0.00 |
80.41 |
0.00 |
85.21 |
1.12 |
|
|
93.53 |
0.00 |
96.50 |
0.00 |
68.20 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.2463137622 |
| 85.93 |
0.16 |
90.82 |
0.08 |
80.48 |
0.08 |
85.27 |
0.07 |
|
|
93.61 |
0.09 |
96.50 |
0.00 |
68.86 |
0.66 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1028233063 |
| 86.08 |
0.16 |
90.82 |
0.00 |
80.48 |
0.00 |
86.22 |
0.94 |
|
|
93.61 |
0.00 |
96.50 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/2.chip_jtag_csr_rw.2997657340 |
| 86.23 |
0.15 |
91.03 |
0.21 |
80.81 |
0.32 |
86.57 |
0.36 |
|
|
93.61 |
0.00 |
96.50 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3246026898 |
| 86.37 |
0.14 |
91.06 |
0.03 |
80.82 |
0.01 |
86.92 |
0.35 |
|
|
93.64 |
0.02 |
96.68 |
0.17 |
69.08 |
0.22 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.2441560343 |
| 86.49 |
0.12 |
91.09 |
0.02 |
81.15 |
0.33 |
86.92 |
0.01 |
|
|
94.01 |
0.37 |
96.68 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.3154831191 |
| 86.59 |
0.10 |
91.09 |
0.00 |
81.15 |
0.00 |
87.55 |
0.63 |
|
|
94.01 |
0.00 |
96.68 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.812002496 |
| 86.69 |
0.10 |
91.22 |
0.13 |
81.16 |
0.01 |
87.99 |
0.44 |
|
|
94.03 |
0.02 |
96.68 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/0.chip_tap_straps_rma.1517971094 |
| 86.78 |
0.09 |
91.36 |
0.15 |
81.18 |
0.02 |
88.12 |
0.12 |
|
|
94.04 |
0.02 |
96.68 |
0.00 |
69.30 |
0.22 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.1798351797 |
| 86.87 |
0.09 |
91.37 |
0.01 |
81.23 |
0.05 |
88.39 |
0.27 |
|
|
94.07 |
0.02 |
96.85 |
0.17 |
69.30 |
0.00 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.898514214 |
| 86.95 |
0.08 |
91.42 |
0.04 |
81.27 |
0.04 |
88.39 |
0.01 |
|
|
94.09 |
0.02 |
97.03 |
0.17 |
69.52 |
0.22 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.2361768908 |
| 87.03 |
0.08 |
91.42 |
0.00 |
81.27 |
0.00 |
88.85 |
0.46 |
|
|
94.09 |
0.00 |
97.03 |
0.00 |
69.52 |
0.00 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.1326764517 |
| 87.10 |
0.07 |
91.42 |
0.01 |
81.28 |
0.01 |
88.85 |
0.01 |
|
|
94.09 |
0.01 |
97.20 |
0.17 |
69.74 |
0.22 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.2644868640 |
| 87.17 |
0.07 |
91.43 |
0.01 |
81.29 |
0.01 |
88.86 |
0.01 |
|
|
94.10 |
0.01 |
97.38 |
0.17 |
69.96 |
0.22 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.2758801834 |
| 87.22 |
0.06 |
91.55 |
0.12 |
81.37 |
0.08 |
88.91 |
0.05 |
|
|
94.18 |
0.08 |
97.38 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.2816696851 |
| 87.28 |
0.05 |
91.73 |
0.18 |
81.39 |
0.02 |
89.03 |
0.12 |
|
|
94.18 |
0.00 |
97.38 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.3832121769 |
| 87.33 |
0.05 |
91.74 |
0.01 |
81.53 |
0.14 |
89.03 |
0.00 |
|
|
94.34 |
0.16 |
97.38 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.2100922815 |
| 87.38 |
0.05 |
91.74 |
0.00 |
81.53 |
0.00 |
89.12 |
0.09 |
|
|
94.34 |
0.00 |
97.38 |
0.00 |
70.18 |
0.22 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.1767181886 |
| 87.42 |
0.04 |
91.74 |
0.00 |
81.53 |
0.01 |
89.16 |
0.04 |
|
|
94.34 |
0.00 |
97.38 |
0.00 |
70.39 |
0.22 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.140743225 |
| 87.47 |
0.04 |
91.74 |
0.00 |
81.53 |
0.00 |
89.41 |
0.26 |
|
|
94.34 |
0.00 |
97.38 |
0.00 |
70.39 |
0.00 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.734704518 |
| 87.51 |
0.04 |
91.74 |
0.00 |
81.54 |
0.01 |
89.43 |
0.01 |
|
|
94.34 |
0.00 |
97.38 |
0.00 |
70.61 |
0.22 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.581935907 |
| 87.55 |
0.04 |
91.74 |
0.00 |
81.54 |
0.00 |
89.44 |
0.02 |
|
|
94.34 |
0.00 |
97.38 |
0.00 |
70.83 |
0.22 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.1999558480 |
| 87.58 |
0.04 |
91.77 |
0.03 |
81.66 |
0.12 |
89.44 |
0.00 |
|
|
94.42 |
0.07 |
97.38 |
0.00 |
70.83 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.1550570155 |
| 87.62 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.01 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
71.05 |
0.22 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.3425888528 |
| 87.66 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.01 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
71.27 |
0.22 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.2380909772 |
| 87.70 |
0.04 |
91.77 |
0.00 |
81.66 |
0.01 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
71.49 |
0.22 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.2782484907 |
| 87.73 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.01 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
71.71 |
0.22 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.1585785304 |
| 87.77 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
71.93 |
0.22 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.1271059586 |
| 87.81 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
72.15 |
0.22 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.3941614900 |
| 87.84 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
72.37 |
0.22 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.2283230146 |
| 87.88 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
72.59 |
0.22 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.2204357143 |
| 87.92 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
72.81 |
0.22 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.1821174094 |
| 87.95 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
73.03 |
0.22 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.124710370 |
| 87.99 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
73.25 |
0.22 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.300835565 |
| 88.02 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
73.46 |
0.22 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.40865866 |
| 88.06 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
73.68 |
0.22 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.3984770179 |
| 88.10 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
73.90 |
0.22 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.4014588743 |
| 88.13 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
74.12 |
0.22 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.1165378840 |
| 88.17 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
74.34 |
0.22 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.930830980 |
| 88.21 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
74.56 |
0.22 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.3118785951 |
| 88.24 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
74.78 |
0.22 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.1330551574 |
| 88.28 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
75.00 |
0.22 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3433141487 |
| 88.32 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
75.22 |
0.22 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.2958960233 |
| 88.35 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
75.44 |
0.22 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.371652277 |
| 88.39 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
75.66 |
0.22 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.1086898810 |
| 88.43 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
75.88 |
0.22 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3824206118 |
| 88.46 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
76.10 |
0.22 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.3650240717 |
| 88.50 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
76.32 |
0.22 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.249179944 |
| 88.54 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
76.54 |
0.22 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.2184900002 |
| 88.57 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
76.75 |
0.22 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.3147513459 |
| 88.61 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
76.97 |
0.22 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.4041756881 |
| 88.65 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
77.19 |
0.22 |
/workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.3483405460 |
| 88.68 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
77.41 |
0.22 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.3347911251 |
| 88.72 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
77.63 |
0.22 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.2007029530 |
| 88.76 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
77.85 |
0.22 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.4217867489 |
| 88.79 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
78.07 |
0.22 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.3909448508 |
| 88.83 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
78.29 |
0.22 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.3951156568 |
| 88.87 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
78.51 |
0.22 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.2804768858 |
| 88.90 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
78.73 |
0.22 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.330585671 |
| 88.94 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
78.95 |
0.22 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.2015577574 |
| 88.98 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
79.17 |
0.22 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.3712587048 |
| 89.01 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
79.39 |
0.22 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.3902348342 |
| 89.05 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
79.61 |
0.22 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.2081483459 |
| 89.08 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
79.82 |
0.22 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.3887216186 |
| 89.12 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
80.04 |
0.22 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.796482874 |
| 89.16 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
80.26 |
0.22 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2970494620 |
| 89.19 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
80.48 |
0.22 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.815927746 |
| 89.23 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
80.70 |
0.22 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.1027646506 |
| 89.27 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
80.92 |
0.22 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.1687995711 |
| 89.30 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
81.14 |
0.22 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.1313466298 |
| 89.34 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
81.36 |
0.22 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.1885824553 |
| 89.38 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
81.58 |
0.22 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.2026896908 |
| 89.41 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
81.80 |
0.22 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.1313120657 |
| 89.45 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
82.02 |
0.22 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.1948728064 |
| 89.49 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
82.24 |
0.22 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.153608286 |
| 89.52 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
82.46 |
0.22 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.1322527184 |
| 89.56 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
82.68 |
0.22 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.2528449726 |
| 89.60 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
82.89 |
0.22 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.2936507603 |
| 89.63 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
83.11 |
0.22 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.2662555346 |
| 89.67 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
83.33 |
0.22 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.588763611 |
| 89.71 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
83.55 |
0.22 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.615376543 |
| 89.74 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
83.77 |
0.22 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.246812536 |
| 89.78 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
83.99 |
0.22 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.65181866 |
| 89.82 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
84.21 |
0.22 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.2547406659 |
| 89.85 |
0.04 |
91.77 |
0.00 |
81.66 |
0.00 |
89.45 |
0.00 |
|
|
94.42 |
0.00 |
97.38 |
0.00 |
84.43 |
0.22 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.2586886211 |
| 89.88 |
0.03 |
91.82 |
0.06 |
81.71 |
0.05 |
89.46 |
0.01 |
|
|
94.47 |
0.06 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.3194133237 |
| 89.91 |
0.03 |
91.90 |
0.07 |
81.74 |
0.03 |
89.48 |
0.01 |
|
|
94.52 |
0.05 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.2640788750 |
| 89.93 |
0.03 |
91.90 |
0.00 |
81.74 |
0.00 |
89.64 |
0.16 |
|
|
94.52 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.2377522850 |
| 89.96 |
0.02 |
91.92 |
0.02 |
81.81 |
0.07 |
89.64 |
0.01 |
|
|
94.57 |
0.05 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.2786105424 |
| 89.98 |
0.02 |
91.98 |
0.06 |
81.87 |
0.06 |
89.64 |
0.00 |
|
|
94.60 |
0.02 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.357036320 |
| 90.01 |
0.02 |
91.98 |
0.00 |
81.87 |
0.00 |
89.78 |
0.14 |
|
|
94.60 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.2647813556 |
| 90.03 |
0.02 |
92.09 |
0.11 |
81.88 |
0.01 |
89.79 |
0.01 |
|
|
94.60 |
0.01 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.818852060 |
| 90.05 |
0.02 |
92.10 |
0.01 |
81.91 |
0.04 |
89.84 |
0.06 |
|
|
94.62 |
0.02 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.3947896288 |
| 90.07 |
0.02 |
92.10 |
0.00 |
82.03 |
0.12 |
89.84 |
0.00 |
|
|
94.62 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.2610469965 |
| 90.09 |
0.02 |
92.10 |
0.00 |
82.03 |
0.00 |
89.96 |
0.11 |
|
|
94.62 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.1669392439 |
| 90.10 |
0.02 |
92.13 |
0.03 |
82.03 |
0.01 |
90.02 |
0.06 |
|
|
94.62 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.3168553403 |
| 90.12 |
0.02 |
92.13 |
0.00 |
82.03 |
0.00 |
90.12 |
0.10 |
|
|
94.62 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.1692439560 |
| 90.13 |
0.02 |
92.13 |
0.00 |
82.13 |
0.10 |
90.12 |
0.00 |
|
|
94.62 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.3492052861 |
| 90.15 |
0.02 |
92.14 |
0.01 |
82.18 |
0.05 |
90.12 |
0.00 |
|
|
94.65 |
0.03 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_pinmux_sleep_retention.625003590 |
| 90.17 |
0.02 |
92.14 |
0.01 |
82.20 |
0.02 |
90.18 |
0.06 |
|
|
94.65 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.2976027831 |
| 90.18 |
0.01 |
92.21 |
0.07 |
82.21 |
0.01 |
90.19 |
0.01 |
|
|
94.65 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1311255955 |
| 90.19 |
0.01 |
92.24 |
0.02 |
82.23 |
0.02 |
90.19 |
0.01 |
|
|
94.68 |
0.02 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.2957023474 |
| 90.20 |
0.01 |
92.26 |
0.02 |
82.24 |
0.01 |
90.20 |
0.01 |
|
|
94.69 |
0.02 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.3541183711 |
| 90.21 |
0.01 |
92.29 |
0.02 |
82.24 |
0.01 |
90.21 |
0.01 |
|
|
94.71 |
0.02 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.2862343513 |
| 90.22 |
0.01 |
92.29 |
0.00 |
82.24 |
0.00 |
90.26 |
0.05 |
|
|
94.71 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.3297075511 |
| 90.23 |
0.01 |
92.29 |
0.00 |
82.24 |
0.00 |
90.30 |
0.05 |
|
|
94.71 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_aes_idle.3832066633 |
| 90.23 |
0.01 |
92.29 |
0.00 |
82.28 |
0.04 |
90.30 |
0.00 |
|
|
94.72 |
0.01 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.2242598342 |
| 90.24 |
0.01 |
92.29 |
0.00 |
82.32 |
0.04 |
90.30 |
0.00 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.1462301722 |
| 90.25 |
0.01 |
92.29 |
0.00 |
82.32 |
0.00 |
90.35 |
0.04 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_ast_clk_rst_inputs.1329817963 |
| 90.25 |
0.01 |
92.29 |
0.00 |
82.32 |
0.00 |
90.39 |
0.04 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3549631680 |
| 90.26 |
0.01 |
92.29 |
0.00 |
82.36 |
0.04 |
90.39 |
0.00 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.151457816 |
| 90.27 |
0.01 |
92.29 |
0.00 |
82.36 |
0.00 |
90.43 |
0.04 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_init.3713364404 |
| 90.27 |
0.01 |
92.29 |
0.00 |
82.36 |
0.00 |
90.46 |
0.04 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.1890232357 |
| 90.28 |
0.01 |
92.29 |
0.00 |
82.40 |
0.04 |
90.46 |
0.00 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.1689296798 |
| 90.28 |
0.01 |
92.29 |
0.00 |
82.42 |
0.02 |
90.47 |
0.01 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.51604463 |
| 90.29 |
0.01 |
92.29 |
0.00 |
82.43 |
0.01 |
90.49 |
0.02 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.952541811 |
| 90.29 |
0.01 |
92.29 |
0.00 |
82.43 |
0.00 |
90.52 |
0.03 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.72330206 |
| 90.30 |
0.01 |
92.29 |
0.01 |
82.44 |
0.01 |
90.53 |
0.01 |
|
|
94.72 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.3299201858 |
| 90.30 |
0.01 |
92.29 |
0.00 |
82.44 |
0.00 |
90.54 |
0.02 |
|
|
94.73 |
0.01 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.4049700048 |
| 90.30 |
0.01 |
92.29 |
0.01 |
82.45 |
0.01 |
90.55 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.3051145760 |
| 90.31 |
0.01 |
92.29 |
0.00 |
82.45 |
0.00 |
90.56 |
0.02 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.2121297538 |
| 90.31 |
0.01 |
92.29 |
0.00 |
82.47 |
0.02 |
90.56 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.477201878 |
| 90.31 |
0.01 |
92.29 |
0.00 |
82.47 |
0.00 |
90.58 |
0.02 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.1851009409 |
| 90.32 |
0.01 |
92.29 |
0.00 |
82.48 |
0.01 |
90.58 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3138244992 |
| 90.32 |
0.01 |
92.29 |
0.00 |
82.50 |
0.01 |
90.58 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1566618145 |
| 90.32 |
0.01 |
92.29 |
0.00 |
82.50 |
0.00 |
90.60 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_jtag_mem_access.3030305166 |
| 90.32 |
0.01 |
92.29 |
0.00 |
82.50 |
0.00 |
90.61 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.3397881128 |
| 90.32 |
0.01 |
92.29 |
0.00 |
82.50 |
0.01 |
90.62 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.4222403135 |
| 90.33 |
0.01 |
92.29 |
0.00 |
82.51 |
0.01 |
90.62 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.187146693 |
| 90.33 |
0.01 |
92.29 |
0.00 |
82.51 |
0.00 |
90.63 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.3426831403 |
| 90.33 |
0.01 |
92.29 |
0.00 |
82.52 |
0.01 |
90.63 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1064823797 |
| 90.33 |
0.01 |
92.29 |
0.00 |
82.53 |
0.01 |
90.63 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.4001379955 |
| 90.33 |
0.01 |
92.29 |
0.00 |
82.54 |
0.01 |
90.63 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.4098833828 |
| 90.34 |
0.01 |
92.29 |
0.00 |
82.54 |
0.00 |
90.64 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.1998962736 |
| 90.34 |
0.01 |
92.29 |
0.00 |
82.54 |
0.00 |
90.65 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.2183799105 |
| 90.34 |
0.01 |
92.29 |
0.00 |
82.54 |
0.00 |
90.66 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.3233889214 |
| 90.34 |
0.01 |
92.29 |
0.00 |
82.54 |
0.00 |
90.67 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.174797418 |
| 90.34 |
0.01 |
92.29 |
0.00 |
82.54 |
0.00 |
90.68 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.1260437162 |
| 90.34 |
0.01 |
92.29 |
0.00 |
82.55 |
0.01 |
90.68 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_gpio.3315156266 |
| 90.34 |
0.01 |
92.29 |
0.00 |
82.55 |
0.01 |
90.68 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.1080471346 |
| 90.34 |
0.01 |
92.29 |
0.00 |
82.56 |
0.01 |
90.68 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.1060442469 |
| 90.35 |
0.01 |
92.29 |
0.00 |
82.57 |
0.01 |
90.68 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.1451690418 |
| 90.35 |
0.01 |
92.29 |
0.00 |
82.58 |
0.01 |
90.68 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2609387968 |
| 90.35 |
0.01 |
92.29 |
0.00 |
82.58 |
0.00 |
90.69 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.2718115547 |
| 90.35 |
0.01 |
92.29 |
0.00 |
82.58 |
0.00 |
90.70 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.2532979230 |
| 90.35 |
0.01 |
92.30 |
0.01 |
82.58 |
0.00 |
90.70 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.3577675939 |
| 90.35 |
0.01 |
92.30 |
0.00 |
82.58 |
0.00 |
90.70 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_init.4227776782 |
| 90.35 |
0.01 |
92.30 |
0.00 |
82.58 |
0.00 |
90.71 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.1251611823 |
| 90.35 |
0.01 |
92.30 |
0.00 |
82.58 |
0.00 |
90.71 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.3449578327 |
| 90.35 |
0.01 |
92.30 |
0.00 |
82.58 |
0.00 |
90.72 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.3587493422 |
| 90.35 |
0.01 |
92.30 |
0.00 |
82.58 |
0.00 |
90.72 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2018434261 |
| 90.35 |
0.01 |
92.30 |
0.00 |
82.58 |
0.01 |
90.72 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.2780335035 |
| 90.36 |
0.01 |
92.30 |
0.00 |
82.58 |
0.01 |
90.72 |
0.00 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.2788776613 |
| 90.36 |
0.01 |
92.30 |
0.00 |
82.58 |
0.00 |
90.72 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.3145167082 |
| 90.36 |
0.01 |
92.30 |
0.00 |
82.58 |
0.00 |
90.73 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.2440356301 |
| 90.36 |
0.01 |
92.30 |
0.00 |
82.58 |
0.00 |
90.73 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.1131079037 |
| 90.36 |
0.01 |
92.30 |
0.00 |
82.58 |
0.00 |
90.73 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.rom_raw_unlock.981639924 |
| 90.36 |
0.01 |
92.30 |
0.00 |
82.58 |
0.00 |
90.73 |
0.01 |
|
|
94.73 |
0.00 |
97.38 |
0.00 |
84.43 |
0.00 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.1210448006 |
| Name |
| /workspace/coverage/default/0.chip_plic_all_irqs_10.3256999890 |
| /workspace/coverage/default/0.chip_sival_flash_info_access.1630995266 |
| /workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3819032310 |
| /workspace/coverage/default/0.chip_sw_aes_enc.3386923050 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.1890595262 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.2590453925 |
| /workspace/coverage/default/0.chip_sw_aes_entropy.2070612539 |
| /workspace/coverage/default/0.chip_sw_aes_masking_off.2955727964 |
| /workspace/coverage/default/0.chip_sw_aes_smoketest.1329609639 |
| /workspace/coverage/default/0.chip_sw_alert_handler_entropy.2705538651 |
| /workspace/coverage/default/0.chip_sw_alert_handler_escalation.4021996010 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.2147582956 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.3543647440 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.608969282 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.605036015 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.1464066063 |
| /workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2817803717 |
| /workspace/coverage/default/0.chip_sw_aon_timer_smoketest.1355614519 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.856453183 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.1776317701 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.1423568207 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2660928046 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.259281735 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1021844889 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1363675145 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3288411543 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter.1568271282 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.440559232 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.4119795636 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.2570409341 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.3219496915 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.3062975855 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.1426504704 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_peri.1418586470 |
| /workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.1577111118 |
| /workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.3797851822 |
| /workspace/coverage/default/0.chip_sw_clkmgr_smoketest.2441671690 |
| /workspace/coverage/default/0.chip_sw_coremark.3978094935 |
| /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.2547700581 |
| /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.944311841 |
| /workspace/coverage/default/0.chip_sw_csrng_kat_test.897565389 |
| /workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.1869943373 |
| /workspace/coverage/default/0.chip_sw_csrng_smoketest.3504480267 |
| /workspace/coverage/default/0.chip_sw_data_integrity_escalation.528303234 |
| /workspace/coverage/default/0.chip_sw_edn_auto_mode.3766628638 |
| /workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.3288670066 |
| /workspace/coverage/default/0.chip_sw_edn_kat.3912595018 |
| /workspace/coverage/default/0.chip_sw_edn_sw_mode.1701876329 |
| /workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.2362797108 |
| /workspace/coverage/default/0.chip_sw_entropy_src_kat_test.3611017229 |
| /workspace/coverage/default/0.chip_sw_entropy_src_smoketest.151874418 |
| /workspace/coverage/default/0.chip_sw_example_concurrency.3446207715 |
| /workspace/coverage/default/0.chip_sw_example_flash.2956030462 |
| /workspace/coverage/default/0.chip_sw_example_manufacturer.3918298254 |
| /workspace/coverage/default/0.chip_sw_example_rom.481603681 |
| /workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.1524108485 |
| /workspace/coverage/default/0.chip_sw_flash_crash_alert.739399656 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access.1345979155 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.3829957435 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1013698691 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.1776611356 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.1906377591 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.129897425 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_ops.2895967336 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.2337415264 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.105055437 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.1832819869 |
| /workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.1960130121 |
| /workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.1450703331 |
| /workspace/coverage/default/0.chip_sw_gpio_smoketest.3756647062 |
| /workspace/coverage/default/0.chip_sw_hmac_enc.2527576871 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_idle.3424468481 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.5762279 |
| /workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.575177084 |
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| /workspace/coverage/default/73.chip_sw_all_escalation_resets.2358107318 |
| /workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.2759345327 |
| /workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.1624791926 |
| /workspace/coverage/default/75.chip_sw_all_escalation_resets.581853886 |
| /workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.42436377 |
| /workspace/coverage/default/76.chip_sw_all_escalation_resets.409091594 |
| /workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.368308122 |
| /workspace/coverage/default/77.chip_sw_all_escalation_resets.4067892060 |
| /workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.338582782 |
| /workspace/coverage/default/78.chip_sw_all_escalation_resets.1903628168 |
| /workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2797461475 |
| /workspace/coverage/default/79.chip_sw_all_escalation_resets.2861371727 |
| /workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.1200527513 |
| /workspace/coverage/default/8.chip_sw_all_escalation_resets.4284789042 |
| /workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.1091679063 |
| /workspace/coverage/default/8.chip_sw_lc_ctrl_transition.4269679384 |
| /workspace/coverage/default/8.chip_sw_uart_rand_baudrate.475900538 |
| /workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.1398606422 |
| /workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.1281486913 |
| /workspace/coverage/default/81.chip_sw_all_escalation_resets.4155233491 |
| /workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.4054136860 |
| /workspace/coverage/default/83.chip_sw_all_escalation_resets.239251348 |
| /workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.1862785261 |
| /workspace/coverage/default/84.chip_sw_all_escalation_resets.1819802799 |
| /workspace/coverage/default/85.chip_sw_all_escalation_resets.3313665570 |
| /workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.2999178733 |
| /workspace/coverage/default/86.chip_sw_all_escalation_resets.784378806 |
| /workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.2849370740 |
| /workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.4207981752 |
| /workspace/coverage/default/88.chip_sw_all_escalation_resets.398230155 |
| /workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2318055843 |
| /workspace/coverage/default/89.chip_sw_all_escalation_resets.879958928 |
| /workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.1017967980 |
| /workspace/coverage/default/9.chip_sw_all_escalation_resets.1774437842 |
| /workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.1255716378 |
| /workspace/coverage/default/9.chip_sw_lc_ctrl_transition.163486694 |
| /workspace/coverage/default/9.chip_sw_uart_rand_baudrate.32260791 |
| /workspace/coverage/default/90.chip_sw_all_escalation_resets.1142051421 |
| /workspace/coverage/default/91.chip_sw_all_escalation_resets.3359344151 |
| /workspace/coverage/default/92.chip_sw_all_escalation_resets.2559633223 |
| /workspace/coverage/default/93.chip_sw_all_escalation_resets.4089723534 |
| /workspace/coverage/default/94.chip_sw_all_escalation_resets.867905213 |
| /workspace/coverage/default/95.chip_sw_all_escalation_resets.498492989 |
| /workspace/coverage/default/96.chip_sw_all_escalation_resets.3604793345 |
| /workspace/coverage/default/97.chip_sw_all_escalation_resets.447458258 |
| /workspace/coverage/default/99.chip_sw_all_escalation_resets.457935923 |
| /workspace/coverage/pad_ctrl_test_mode/1.chip_padctrl_attributes.1445354757 |
| /workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.2279475454 |
| /workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.3554286286 |
| /workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.3208019572 |
| /workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.44806436 |
| /workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.1659497197 |
| /workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.4170561939 |
| /workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.1235739198 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.3144824298 |
|
|
Aug 03 07:49:00 PM PDT 24 |
Aug 03 07:59:29 PM PDT 24 |
5875583304 ps |
| T2 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.3674334132 |
|
|
Aug 03 07:08:54 PM PDT 24 |
Aug 03 07:43:19 PM PDT 24 |
7919901090 ps |
| T3 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.1740929723 |
|
|
Aug 03 07:07:52 PM PDT 24 |
Aug 03 07:11:16 PM PDT 24 |
3017427848 ps |
| T4 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.1798351797 |
|
|
Aug 03 07:51:04 PM PDT 24 |
Aug 03 08:02:37 PM PDT 24 |
6445913128 ps |
| T54 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.1047583346 |
|
|
Aug 03 07:26:14 PM PDT 24 |
Aug 03 07:49:29 PM PDT 24 |
10215698104 ps |
| T60 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.368308122 |
|
|
Aug 03 07:53:49 PM PDT 24 |
Aug 03 07:59:04 PM PDT 24 |
4415873352 ps |
| T58 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.2627121681 |
|
|
Aug 03 07:21:35 PM PDT 24 |
Aug 03 07:43:00 PM PDT 24 |
8945271812 ps |
| T31 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.140743225 |
|
|
Aug 03 07:50:24 PM PDT 24 |
Aug 03 07:58:54 PM PDT 24 |
4673003048 ps |
| T59 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.1998962736 |
|
|
Aug 03 07:10:14 PM PDT 24 |
Aug 03 07:16:19 PM PDT 24 |
6991868028 ps |
| T119 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.2441560343 |
|
|
Aug 03 07:44:56 PM PDT 24 |
Aug 03 07:56:13 PM PDT 24 |
5412589010 ps |
| T5 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.3359322715 |
|
|
Aug 03 07:47:24 PM PDT 24 |
Aug 03 08:00:28 PM PDT 24 |
7211785245 ps |
| T353 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.2309541218 |
|
|
Aug 03 07:42:39 PM PDT 24 |
Aug 03 07:53:01 PM PDT 24 |
3133503898 ps |
| T200 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.2522680311 |
|
|
Aug 03 07:34:17 PM PDT 24 |
Aug 03 07:39:51 PM PDT 24 |
3416424216 ps |
| T69 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.2553315043 |
|
|
Aug 03 07:40:58 PM PDT 24 |
Aug 03 08:08:31 PM PDT 24 |
8974675452 ps |
| T255 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.3425888528 |
|
|
Aug 03 07:53:37 PM PDT 24 |
Aug 03 07:59:36 PM PDT 24 |
3639344120 ps |
| T47 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2432231805 |
|
|
Aug 03 07:30:34 PM PDT 24 |
Aug 03 07:41:14 PM PDT 24 |
4730629272 ps |
| T319 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.554818664 |
|
|
Aug 03 07:06:19 PM PDT 24 |
Aug 03 07:24:41 PM PDT 24 |
9452182750 ps |
| T14 |
/workspace/coverage/default/1.chip_sw_gpio.3436127802 |
|
|
Aug 03 07:25:07 PM PDT 24 |
Aug 03 07:32:24 PM PDT 24 |
4542184509 ps |
| T55 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.3111040251 |
|
|
Aug 03 07:29:14 PM PDT 24 |
Aug 03 07:32:58 PM PDT 24 |
2773115800 ps |
| T11 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.3832121769 |
|
|
Aug 03 07:24:08 PM PDT 24 |
Aug 03 07:28:57 PM PDT 24 |
3218325440 ps |
| T149 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3104170383 |
|
|
Aug 03 07:31:35 PM PDT 24 |
Aug 03 07:44:50 PM PDT 24 |
4989110340 ps |
| T117 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.1382552723 |
|
|
Aug 03 07:16:11 PM PDT 24 |
Aug 03 07:21:09 PM PDT 24 |
3059418067 ps |
| T393 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.267230940 |
|
|
Aug 03 07:34:19 PM PDT 24 |
Aug 03 07:42:41 PM PDT 24 |
5706643712 ps |
| T150 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.1767181886 |
|
|
Aug 03 07:29:45 PM PDT 24 |
Aug 03 07:57:57 PM PDT 24 |
11140521920 ps |
| T201 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.4117986135 |
|
|
Aug 03 07:20:22 PM PDT 24 |
Aug 03 07:25:55 PM PDT 24 |
3403863480 ps |
| T203 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.1931705716 |
|
|
Aug 03 07:33:48 PM PDT 24 |
Aug 03 07:39:34 PM PDT 24 |
2819375170 ps |
| T242 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.679084356 |
|
|
Aug 03 07:08:06 PM PDT 24 |
Aug 03 07:12:46 PM PDT 24 |
3010429008 ps |
| T187 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.1885824553 |
|
|
Aug 03 07:49:59 PM PDT 24 |
Aug 03 08:01:20 PM PDT 24 |
5266136196 ps |
| T189 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.4106322312 |
|
|
Aug 03 07:47:45 PM PDT 24 |
Aug 03 07:59:06 PM PDT 24 |
5958567594 ps |
| T61 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.3986158201 |
|
|
Aug 03 07:31:27 PM PDT 24 |
Aug 03 09:10:11 PM PDT 24 |
31249683833 ps |
| T62 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.2786105424 |
|
|
Aug 03 07:37:22 PM PDT 24 |
Aug 03 07:51:19 PM PDT 24 |
4562131055 ps |
| T215 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.581935907 |
|
|
Aug 03 07:51:12 PM PDT 24 |
Aug 03 08:01:18 PM PDT 24 |
5452072820 ps |
| T151 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.930830980 |
|
|
Aug 03 07:49:51 PM PDT 24 |
Aug 03 07:56:55 PM PDT 24 |
3606967328 ps |
| T70 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.76858610 |
|
|
Aug 03 07:27:57 PM PDT 24 |
Aug 03 07:46:57 PM PDT 24 |
6644844398 ps |
| T84 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.51604463 |
|
|
Aug 03 07:06:53 PM PDT 24 |
Aug 03 07:14:47 PM PDT 24 |
3822754296 ps |
| T296 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.3002206514 |
|
|
Aug 03 07:44:58 PM PDT 24 |
Aug 03 08:08:00 PM PDT 24 |
5718239192 ps |
| T297 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.2183799105 |
|
|
Aug 03 07:15:51 PM PDT 24 |
Aug 03 07:30:12 PM PDT 24 |
6804998498 ps |
| T202 |
/workspace/coverage/default/2.chip_sw_kmac_idle.3996924313 |
|
|
Aug 03 07:42:44 PM PDT 24 |
Aug 03 07:46:30 PM PDT 24 |
2919343880 ps |
| T359 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.4054136860 |
|
|
Aug 03 07:55:14 PM PDT 24 |
Aug 03 08:02:23 PM PDT 24 |
3296700360 ps |
| T410 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.1341044334 |
|
|
Aug 03 07:36:19 PM PDT 24 |
Aug 03 07:42:31 PM PDT 24 |
3579372840 ps |
| T6 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.2047963314 |
|
|
Aug 03 07:42:27 PM PDT 24 |
Aug 03 07:52:07 PM PDT 24 |
8837859468 ps |
| T63 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.3146163752 |
|
|
Aug 03 07:31:56 PM PDT 24 |
Aug 03 08:44:06 PM PDT 24 |
26588846216 ps |
| T225 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.2958960233 |
|
|
Aug 03 07:41:24 PM PDT 24 |
Aug 03 07:47:39 PM PDT 24 |
3769169660 ps |
| T68 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.1336843451 |
|
|
Aug 03 07:41:45 PM PDT 24 |
Aug 03 07:54:29 PM PDT 24 |
3491783126 ps |
| T92 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.758338754 |
|
|
Aug 03 07:50:49 PM PDT 24 |
Aug 03 07:57:58 PM PDT 24 |
3813346054 ps |
| T48 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.4037671536 |
|
|
Aug 03 07:29:24 PM PDT 24 |
Aug 03 07:38:47 PM PDT 24 |
4226066332 ps |
| T44 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.2739507912 |
|
|
Aug 03 07:49:20 PM PDT 24 |
Aug 03 08:48:35 PM PDT 24 |
15706657048 ps |
| T188 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.784378806 |
|
|
Aug 03 07:55:42 PM PDT 24 |
Aug 03 08:02:11 PM PDT 24 |
4817556940 ps |
| T89 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.3869602835 |
|
|
Aug 03 07:20:36 PM PDT 24 |
Aug 03 07:22:19 PM PDT 24 |
2573496811 ps |
| T196 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.2184900002 |
|
|
Aug 03 07:50:01 PM PDT 24 |
Aug 03 08:01:54 PM PDT 24 |
4951266576 ps |
| T411 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.2722882542 |
|
|
Aug 03 07:23:09 PM PDT 24 |
Aug 03 07:26:51 PM PDT 24 |
2915925400 ps |
| T79 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.2826876197 |
|
|
Aug 03 07:34:07 PM PDT 24 |
Aug 03 07:43:45 PM PDT 24 |
5729835832 ps |
| T159 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.1210448006 |
|
|
Aug 03 07:11:12 PM PDT 24 |
Aug 03 07:18:00 PM PDT 24 |
4295546600 ps |
| T162 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.1360869303 |
|
|
Aug 03 07:51:46 PM PDT 24 |
Aug 03 08:01:23 PM PDT 24 |
5306293510 ps |
| T37 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.3168553403 |
|
|
Aug 03 07:24:38 PM PDT 24 |
Aug 03 07:30:55 PM PDT 24 |
3079918317 ps |
| T15 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.3162827680 |
|
|
Aug 03 07:45:53 PM PDT 24 |
Aug 03 07:54:09 PM PDT 24 |
4107145072 ps |
| T197 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.3024901429 |
|
|
Aug 03 07:34:21 PM PDT 24 |
Aug 03 07:42:09 PM PDT 24 |
3850863390 ps |
| T152 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.3377414516 |
|
|
Aug 03 07:57:35 PM PDT 24 |
Aug 03 08:02:43 PM PDT 24 |
3550608530 ps |
| T46 |
/workspace/coverage/default/0.chip_tap_straps_rma.1517971094 |
|
|
Aug 03 07:16:06 PM PDT 24 |
Aug 03 07:22:49 PM PDT 24 |
4810914236 ps |
| T258 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.818852060 |
|
|
Aug 03 07:08:34 PM PDT 24 |
Aug 03 07:12:30 PM PDT 24 |
3125519978 ps |
| T243 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.2058513499 |
|
|
Aug 03 07:25:09 PM PDT 24 |
Aug 03 07:31:28 PM PDT 24 |
3453423032 ps |
| T540 |
/workspace/coverage/default/1.chip_sw_kmac_idle.1813831955 |
|
|
Aug 03 07:28:50 PM PDT 24 |
Aug 03 07:33:28 PM PDT 24 |
2732360772 ps |
| T222 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.1585785304 |
|
|
Aug 03 07:57:22 PM PDT 24 |
Aug 03 08:05:04 PM PDT 24 |
4332771350 ps |
| T360 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.2999178733 |
|
|
Aug 03 07:55:24 PM PDT 24 |
Aug 03 08:02:12 PM PDT 24 |
3623098464 ps |
| T17 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.2185068781 |
|
|
Aug 03 07:08:10 PM PDT 24 |
Aug 03 07:12:59 PM PDT 24 |
2984203968 ps |
| T7 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.3477221930 |
|
|
Aug 03 07:07:26 PM PDT 24 |
Aug 03 07:42:39 PM PDT 24 |
30381056986 ps |
| T41 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.713332420 |
|
|
Aug 03 07:22:46 PM PDT 24 |
Aug 03 08:35:21 PM PDT 24 |
14371730254 ps |
| T541 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.3317107491 |
|
|
Aug 03 07:41:31 PM PDT 24 |
Aug 03 08:24:36 PM PDT 24 |
10799052728 ps |
| T402 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.588763611 |
|
|
Aug 03 07:53:55 PM PDT 24 |
Aug 03 08:02:23 PM PDT 24 |
4630331940 ps |
| T275 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.1593112845 |
|
|
Aug 03 07:08:15 PM PDT 24 |
Aug 03 07:22:50 PM PDT 24 |
6951022099 ps |
| T45 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.312646313 |
|
|
Aug 03 07:36:20 PM PDT 24 |
Aug 03 08:26:33 PM PDT 24 |
14831966552 ps |
| T198 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.2344344150 |
|
|
Aug 03 07:11:33 PM PDT 24 |
Aug 03 07:17:05 PM PDT 24 |
3390956358 ps |
| T542 |
/workspace/coverage/default/0.chip_sw_aes_idle.3832066633 |
|
|
Aug 03 07:09:05 PM PDT 24 |
Aug 03 07:13:00 PM PDT 24 |
3169777994 ps |
| T12 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.2718115547 |
|
|
Aug 03 07:09:13 PM PDT 24 |
Aug 03 07:18:33 PM PDT 24 |
5075949483 ps |
| T169 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.454521841 |
|
|
Aug 03 07:29:41 PM PDT 24 |
Aug 03 07:45:10 PM PDT 24 |
9040861952 ps |
| T266 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1028233063 |
|
|
Aug 03 07:08:05 PM PDT 24 |
Aug 03 07:25:52 PM PDT 24 |
10898689090 ps |
| T204 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.3219496915 |
|
|
Aug 03 07:14:19 PM PDT 24 |
Aug 03 07:21:45 PM PDT 24 |
5169012110 ps |
| T194 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.1999558480 |
|
|
Aug 03 07:55:56 PM PDT 24 |
Aug 03 08:06:52 PM PDT 24 |
5295552902 ps |
| T311 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.3118785951 |
|
|
Aug 03 07:54:42 PM PDT 24 |
Aug 03 08:00:57 PM PDT 24 |
3419720032 ps |
| T113 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.681728648 |
|
|
Aug 03 07:42:58 PM PDT 24 |
Aug 03 07:50:28 PM PDT 24 |
4040608164 ps |
| T312 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.4030458373 |
|
|
Aug 03 07:47:59 PM PDT 24 |
Aug 03 07:53:23 PM PDT 24 |
2873754130 ps |
| T313 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.1060442469 |
|
|
Aug 03 07:15:26 PM PDT 24 |
Aug 03 07:23:18 PM PDT 24 |
3885367688 ps |
| T314 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.3181171317 |
|
|
Aug 03 07:29:22 PM PDT 24 |
Aug 03 07:32:41 PM PDT 24 |
2466587762 ps |
| T315 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.151874418 |
|
|
Aug 03 07:20:18 PM PDT 24 |
Aug 03 07:27:56 PM PDT 24 |
3839820124 ps |
| T114 |
/workspace/coverage/default/3.chip_tap_straps_dev.520667574 |
|
|
Aug 03 07:46:02 PM PDT 24 |
Aug 03 07:50:48 PM PDT 24 |
3601460424 ps |
| T175 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.3895579438 |
|
|
Aug 03 07:27:52 PM PDT 24 |
Aug 03 07:49:37 PM PDT 24 |
8321141588 ps |
| T264 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.1383424729 |
|
|
Aug 03 07:38:10 PM PDT 24 |
Aug 03 07:49:54 PM PDT 24 |
6373681946 ps |
| T251 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.303745728 |
|
|
Aug 03 07:46:37 PM PDT 24 |
Aug 03 07:58:41 PM PDT 24 |
4109853084 ps |
| T281 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.3984623507 |
|
|
Aug 03 07:41:06 PM PDT 24 |
Aug 03 08:20:33 PM PDT 24 |
23739191810 ps |
| T172 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.812002496 |
|
|
Aug 03 07:09:21 PM PDT 24 |
Aug 03 07:16:41 PM PDT 24 |
3959665952 ps |
| T282 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.2728389465 |
|
|
Aug 03 07:26:45 PM PDT 24 |
Aug 03 07:33:43 PM PDT 24 |
6096566998 ps |
| T180 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.2998326610 |
|
|
Aug 03 07:16:34 PM PDT 24 |
Aug 03 07:21:05 PM PDT 24 |
2822856457 ps |
| T252 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.131329371 |
|
|
Aug 03 07:49:19 PM PDT 24 |
Aug 03 07:58:09 PM PDT 24 |
3962011576 ps |
| T283 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.938393422 |
|
|
Aug 03 07:52:34 PM PDT 24 |
Aug 03 08:01:20 PM PDT 24 |
4119805640 ps |
| T284 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.2586886211 |
|
|
Aug 03 07:55:08 PM PDT 24 |
Aug 03 08:03:39 PM PDT 24 |
5393208632 ps |
| T276 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.61334629 |
|
|
Aug 03 07:24:28 PM PDT 24 |
Aug 03 07:30:21 PM PDT 24 |
4353405924 ps |
| T49 |
/workspace/coverage/default/1.chip_jtag_mem_access.2273711279 |
|
|
Aug 03 07:23:06 PM PDT 24 |
Aug 03 07:51:38 PM PDT 24 |
14152350153 ps |
| T307 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.1142869089 |
|
|
Aug 03 07:56:53 PM PDT 24 |
Aug 03 08:06:04 PM PDT 24 |
4238287960 ps |
| T308 |
/workspace/coverage/default/2.chip_sw_example_concurrency.572483688 |
|
|
Aug 03 07:35:46 PM PDT 24 |
Aug 03 07:39:54 PM PDT 24 |
2810376556 ps |
| T309 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3169626077 |
|
|
Aug 03 07:47:20 PM PDT 24 |
Aug 03 08:04:06 PM PDT 24 |
6873213556 ps |
| T310 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.1451690418 |
|
|
Aug 03 07:09:11 PM PDT 24 |
Aug 03 07:21:51 PM PDT 24 |
4552832094 ps |
| T199 |
/workspace/coverage/default/0.chip_sw_hmac_enc.2527576871 |
|
|
Aug 03 07:11:07 PM PDT 24 |
Aug 03 07:15:09 PM PDT 24 |
3142360508 ps |
| T212 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.1962546743 |
|
|
Aug 03 07:22:15 PM PDT 24 |
Aug 03 07:35:53 PM PDT 24 |
5104606100 ps |
| T66 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.2976027831 |
|
|
Aug 03 07:47:53 PM PDT 24 |
Aug 03 08:29:45 PM PDT 24 |
13377583285 ps |
| T227 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.5762279 |
|
|
Aug 03 07:11:36 PM PDT 24 |
Aug 03 07:15:20 PM PDT 24 |
2845530722 ps |
| T355 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.220767157 |
|
|
Aug 03 07:49:53 PM PDT 24 |
Aug 03 08:43:06 PM PDT 24 |
15331210346 ps |
| T380 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.3817211172 |
|
|
Aug 03 07:47:48 PM PDT 24 |
Aug 03 08:08:26 PM PDT 24 |
7910306980 ps |
| T357 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.4041756881 |
|
|
Aug 03 07:55:44 PM PDT 24 |
Aug 03 08:02:58 PM PDT 24 |
3213860000 ps |
| T88 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.178193408 |
|
|
Aug 03 07:30:21 PM PDT 24 |
Aug 03 07:40:57 PM PDT 24 |
5456661708 ps |
| T160 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.2165739474 |
|
|
Aug 03 07:55:48 PM PDT 24 |
Aug 03 08:01:49 PM PDT 24 |
3356444004 ps |
| T543 |
/workspace/coverage/default/2.chip_sw_example_flash.2975853477 |
|
|
Aug 03 07:40:12 PM PDT 24 |
Aug 03 07:43:31 PM PDT 24 |
2529884872 ps |
| T90 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.1344962420 |
|
|
Aug 03 07:36:09 PM PDT 24 |
Aug 03 07:38:28 PM PDT 24 |
3206472004 ps |
| T386 |
/workspace/coverage/default/4.chip_tap_straps_dev.705867991 |
|
|
Aug 03 07:45:10 PM PDT 24 |
Aug 03 07:50:45 PM PDT 24 |
3885720220 ps |
| T544 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.3326965414 |
|
|
Aug 03 07:42:56 PM PDT 24 |
Aug 03 07:48:34 PM PDT 24 |
2728012739 ps |
| T545 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.4119795636 |
|
|
Aug 03 07:16:46 PM PDT 24 |
Aug 03 07:21:37 PM PDT 24 |
2996437514 ps |
| T163 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.1890232357 |
|
|
Aug 03 07:23:09 PM PDT 24 |
Aug 03 07:27:18 PM PDT 24 |
3580164102 ps |
| T409 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.371652277 |
|
|
Aug 03 07:50:04 PM PDT 24 |
Aug 03 07:56:20 PM PDT 24 |
3248751652 ps |
| T546 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.1096550692 |
|
|
Aug 03 07:45:18 PM PDT 24 |
Aug 03 07:51:38 PM PDT 24 |
3292622264 ps |
| T256 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3318907807 |
|
|
Aug 03 07:45:12 PM PDT 24 |
Aug 03 07:58:28 PM PDT 24 |
5296257476 ps |
| T547 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.2186970612 |
|
|
Aug 03 07:47:05 PM PDT 24 |
Aug 03 07:52:42 PM PDT 24 |
2960902130 ps |
| T173 |
/workspace/coverage/default/0.chip_sw_flash_init.4227776782 |
|
|
Aug 03 07:06:51 PM PDT 24 |
Aug 03 07:41:34 PM PDT 24 |
23898550725 ps |
| T93 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.364036626 |
|
|
Aug 03 07:42:03 PM PDT 24 |
Aug 03 07:49:09 PM PDT 24 |
2890257520 ps |
| T548 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.1083003815 |
|
|
Aug 03 07:30:02 PM PDT 24 |
Aug 03 07:38:07 PM PDT 24 |
3359642552 ps |
| T71 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.2104657586 |
|
|
Aug 03 07:08:33 PM PDT 24 |
Aug 03 08:17:58 PM PDT 24 |
18994021072 ps |
| T91 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.1692413600 |
|
|
Aug 03 07:06:48 PM PDT 24 |
Aug 03 07:10:01 PM PDT 24 |
2594298440 ps |
| T155 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1618411999 |
|
|
Aug 03 07:45:58 PM PDT 24 |
Aug 03 08:57:59 PM PDT 24 |
25058867878 ps |
| T64 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.3321477067 |
|
|
Aug 03 07:40:50 PM PDT 24 |
Aug 03 08:20:29 PM PDT 24 |
11597132944 ps |
| T213 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.438169721 |
|
|
Aug 03 07:23:35 PM PDT 24 |
Aug 03 07:40:54 PM PDT 24 |
6134877636 ps |
| T214 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.2780335035 |
|
|
Aug 03 07:08:28 PM PDT 24 |
Aug 03 07:20:26 PM PDT 24 |
4160279388 ps |
| T549 |
/workspace/coverage/default/0.chip_sw_example_flash.2956030462 |
|
|
Aug 03 07:05:57 PM PDT 24 |
Aug 03 07:09:50 PM PDT 24 |
3575568714 ps |
| T550 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.1776317701 |
|
|
Aug 03 07:08:33 PM PDT 24 |
Aug 03 07:16:02 PM PDT 24 |
5542596870 ps |
| T65 |
/workspace/coverage/default/0.chip_sw_ast_clk_rst_inputs.1329817963 |
|
|
Aug 03 07:20:23 PM PDT 24 |
Aug 03 08:31:01 PM PDT 24 |
22576016640 ps |
| T257 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3138244992 |
|
|
Aug 03 07:11:20 PM PDT 24 |
Aug 03 07:44:25 PM PDT 24 |
8448777854 ps |
| T209 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.841710808 |
|
|
Aug 03 07:45:39 PM PDT 24 |
Aug 03 07:49:33 PM PDT 24 |
2723836978 ps |
| T551 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.3829957435 |
|
|
Aug 03 07:07:00 PM PDT 24 |
Aug 03 07:22:45 PM PDT 24 |
6512090518 ps |
| T552 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.541835747 |
|
|
Aug 03 07:20:53 PM PDT 24 |
Aug 03 07:24:55 PM PDT 24 |
2564166408 ps |
| T553 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.479447619 |
|
|
Aug 03 07:21:47 PM PDT 24 |
Aug 03 07:28:34 PM PDT 24 |
5024099850 ps |
| T554 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.389900551 |
|
|
Aug 03 07:24:37 PM PDT 24 |
Aug 03 07:29:55 PM PDT 24 |
4064508138 ps |
| T205 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.3062975855 |
|
|
Aug 03 07:14:16 PM PDT 24 |
Aug 03 07:19:38 PM PDT 24 |
4069723560 ps |
| T370 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.4248530040 |
|
|
Aug 03 07:44:11 PM PDT 24 |
Aug 03 07:51:48 PM PDT 24 |
3868006440 ps |
| T381 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.3909448508 |
|
|
Aug 03 07:56:34 PM PDT 24 |
Aug 03 08:05:40 PM PDT 24 |
4761193240 ps |
| T555 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.1450703331 |
|
|
Aug 03 07:21:03 PM PDT 24 |
Aug 03 07:25:42 PM PDT 24 |
2859339700 ps |
| T231 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.220869657 |
|
|
Aug 03 07:49:40 PM PDT 24 |
Aug 03 08:04:58 PM PDT 24 |
11132750651 ps |
| T178 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.4287239556 |
|
|
Aug 03 07:31:50 PM PDT 24 |
Aug 03 07:44:26 PM PDT 24 |
5375671229 ps |
| T13 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.2012816256 |
|
|
Aug 03 07:36:35 PM PDT 24 |
Aug 03 07:46:33 PM PDT 24 |
3793202583 ps |
| T556 |
/workspace/coverage/default/1.rom_keymgr_functest.2121370246 |
|
|
Aug 03 07:38:45 PM PDT 24 |
Aug 03 07:46:13 PM PDT 24 |
4244252700 ps |
| T83 |
/workspace/coverage/default/3.chip_tap_straps_rma.4238366796 |
|
|
Aug 03 07:45:56 PM PDT 24 |
Aug 03 07:52:46 PM PDT 24 |
4503879685 ps |
| T557 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.757828364 |
|
|
Aug 03 07:37:59 PM PDT 24 |
Aug 03 07:43:41 PM PDT 24 |
4102160074 ps |
| T250 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.1096339001 |
|
|
Aug 03 07:48:37 PM PDT 24 |
Aug 03 08:09:25 PM PDT 24 |
8975455192 ps |
| T156 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.3821817442 |
|
|
Aug 03 07:46:51 PM PDT 24 |
Aug 03 08:14:45 PM PDT 24 |
8485827266 ps |
| T223 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.1080471346 |
|
|
Aug 03 07:06:31 PM PDT 24 |
Aug 03 07:18:12 PM PDT 24 |
5235945296 ps |
| T166 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.3449578327 |
|
|
Aug 03 07:11:56 PM PDT 24 |
Aug 03 07:13:44 PM PDT 24 |
2934003047 ps |
| T228 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.187146693 |
|
|
Aug 03 07:29:36 PM PDT 24 |
Aug 03 07:33:37 PM PDT 24 |
3140774526 ps |
| T219 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.2188904034 |
|
|
Aug 03 07:10:46 PM PDT 24 |
Aug 03 07:26:55 PM PDT 24 |
5520906576 ps |
| T263 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.3520141457 |
|
|
Aug 03 07:44:54 PM PDT 24 |
Aug 03 07:56:26 PM PDT 24 |
6608024912 ps |
| T558 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.1407633238 |
|
|
Aug 03 07:24:31 PM PDT 24 |
Aug 03 07:30:41 PM PDT 24 |
6167326938 ps |
| T18 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.3947896288 |
|
|
Aug 03 07:08:07 PM PDT 24 |
Aug 03 09:21:44 PM PDT 24 |
31205599800 ps |
| T174 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.2463137622 |
|
|
Aug 03 07:22:32 PM PDT 24 |
Aug 03 08:40:50 PM PDT 24 |
43702741148 ps |
| T271 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.446710504 |
|
|
Aug 03 07:22:35 PM PDT 24 |
Aug 03 09:18:56 PM PDT 24 |
24412964920 ps |
| T371 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.4098833828 |
|
|
Aug 03 07:25:30 PM PDT 24 |
Aug 03 07:35:08 PM PDT 24 |
4107550880 ps |
| T559 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.739399656 |
|
|
Aug 03 07:18:23 PM PDT 24 |
Aug 03 07:27:36 PM PDT 24 |
5091722444 ps |
| T176 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.1669392439 |
|
|
Aug 03 07:06:49 PM PDT 24 |
Aug 03 07:09:00 PM PDT 24 |
3583116180 ps |
| T50 |
/workspace/coverage/default/2.rom_raw_unlock.2023415331 |
|
|
Aug 03 07:46:03 PM PDT 24 |
Aug 03 07:50:22 PM PDT 24 |
5142688796 ps |
| T352 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.867247268 |
|
|
Aug 03 07:39:03 PM PDT 24 |
Aug 03 07:55:31 PM PDT 24 |
8811252328 ps |
| T372 |
/workspace/coverage/default/2.chip_sival_flash_info_access.1642795106 |
|
|
Aug 03 07:34:48 PM PDT 24 |
Aug 03 07:39:56 PM PDT 24 |
2608163312 ps |
| T324 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.2938485060 |
|
|
Aug 03 07:12:29 PM PDT 24 |
Aug 03 07:58:54 PM PDT 24 |
13341219404 ps |
| T323 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1908959230 |
|
|
Aug 03 07:27:51 PM PDT 24 |
Aug 03 08:23:55 PM PDT 24 |
13252461520 ps |
| T265 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.2936507603 |
|
|
Aug 03 07:54:38 PM PDT 24 |
Aug 03 08:05:10 PM PDT 24 |
6571565816 ps |
| T161 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.4001379955 |
|
|
Aug 03 07:07:47 PM PDT 24 |
Aug 03 07:46:34 PM PDT 24 |
14969138226 ps |
| T167 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.590345839 |
|
|
Aug 03 07:07:38 PM PDT 24 |
Aug 03 07:23:13 PM PDT 24 |
7593125524 ps |
| T145 |
/workspace/coverage/default/2.chip_rv_dm_ndm_reset_req.3085008185 |
|
|
Aug 03 07:42:38 PM PDT 24 |
Aug 03 07:51:59 PM PDT 24 |
4401210168 ps |
| T413 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.2085305456 |
|
|
Aug 03 07:41:56 PM PDT 24 |
Aug 03 09:00:50 PM PDT 24 |
17663357050 ps |
| T56 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.4044114764 |
|
|
Aug 03 07:25:32 PM PDT 24 |
Aug 03 07:32:13 PM PDT 24 |
7418248370 ps |
| T95 |
/workspace/coverage/default/1.chip_sw_spi_device_pinmux_sleep_retention.3458775529 |
|
|
Aug 03 07:23:19 PM PDT 24 |
Aug 03 07:28:41 PM PDT 24 |
3877690516 ps |
| T137 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.1091679063 |
|
|
Aug 03 07:48:53 PM PDT 24 |
Aug 03 09:24:31 PM PDT 24 |
27810733810 ps |
| T138 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.2051937779 |
|
|
Aug 03 07:38:42 PM PDT 24 |
Aug 03 07:54:14 PM PDT 24 |
7628171950 ps |
| T42 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.3297075511 |
|
|
Aug 03 07:21:54 PM PDT 24 |
Aug 03 08:29:59 PM PDT 24 |
14383692643 ps |
| T139 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2754912642 |
|
|
Aug 03 07:42:46 PM PDT 24 |
Aug 03 07:54:21 PM PDT 24 |
3875483402 ps |
| T140 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2533476017 |
|
|
Aug 03 07:24:11 PM PDT 24 |
Aug 03 07:26:08 PM PDT 24 |
2123436208 ps |
| T141 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.1201061440 |
|
|
Aug 03 07:23:53 PM PDT 24 |
Aug 03 07:27:55 PM PDT 24 |
2988156136 ps |
| T142 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.111019842 |
|
|
Aug 03 07:49:46 PM PDT 24 |
Aug 03 07:56:40 PM PDT 24 |
3869571764 ps |
| T143 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.2374985757 |
|
|
Aug 03 07:47:41 PM PDT 24 |
Aug 03 07:56:58 PM PDT 24 |
3397193440 ps |
| T144 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1995220335 |
|
|
Aug 03 07:25:38 PM PDT 24 |
Aug 03 07:46:14 PM PDT 24 |
14741068162 ps |
| T316 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.4014588743 |
|
|
Aug 03 07:48:39 PM PDT 24 |
Aug 03 07:57:16 PM PDT 24 |
4568974520 ps |
| T460 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.3447679890 |
|
|
Aug 03 07:49:08 PM PDT 24 |
Aug 03 07:57:38 PM PDT 24 |
3870871940 ps |
| T268 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.2361768908 |
|
|
Aug 03 07:34:39 PM PDT 24 |
Aug 03 07:44:39 PM PDT 24 |
5437545632 ps |
| T298 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.1903628168 |
|
|
Aug 03 07:55:44 PM PDT 24 |
Aug 03 08:05:31 PM PDT 24 |
5011047922 ps |
| T299 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.2804768858 |
|
|
Aug 03 07:56:49 PM PDT 24 |
Aug 03 08:06:43 PM PDT 24 |
4859557900 ps |
| T300 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.1258482687 |
|
|
Aug 03 07:50:49 PM PDT 24 |
Aug 03 07:57:44 PM PDT 24 |
4223136080 ps |
| T301 |
/workspace/coverage/default/2.chip_tap_straps_prod.3429816115 |
|
|
Aug 03 07:43:03 PM PDT 24 |
Aug 03 07:46:06 PM PDT 24 |
2743547387 ps |
| T34 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2513913215 |
|
|
Aug 03 07:40:01 PM PDT 24 |
Aug 03 07:46:51 PM PDT 24 |
4623142840 ps |
| T302 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.4251794340 |
|
|
Aug 03 07:41:39 PM PDT 24 |
Aug 03 07:57:58 PM PDT 24 |
12153065076 ps |
| T20 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.2816696851 |
|
|
Aug 03 07:08:31 PM PDT 24 |
Aug 03 07:41:26 PM PDT 24 |
24894099600 ps |
| T303 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.2377522850 |
|
|
Aug 03 07:23:53 PM PDT 24 |
Aug 03 08:50:46 PM PDT 24 |
49318074780 ps |
| T43 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.1939452567 |
|
|
Aug 03 07:49:28 PM PDT 24 |
Aug 03 08:40:32 PM PDT 24 |
24887130186 ps |
| T206 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.4181539270 |
|
|
Aug 03 07:41:39 PM PDT 24 |
Aug 03 07:48:09 PM PDT 24 |
5609269938 ps |
| T388 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.638293034 |
|
|
Aug 03 07:39:59 PM PDT 24 |
Aug 03 07:54:51 PM PDT 24 |
5104570970 ps |
| T560 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.2612030140 |
|
|
Aug 03 07:42:11 PM PDT 24 |
Aug 03 07:47:38 PM PDT 24 |
3505852770 ps |
| T383 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.530458532 |
|
|
Aug 03 07:24:14 PM PDT 24 |
Aug 03 08:12:08 PM PDT 24 |
45747015992 ps |
| T561 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.3797851822 |
|
|
Aug 03 07:14:52 PM PDT 24 |
Aug 03 07:23:41 PM PDT 24 |
4595565450 ps |
| T459 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2983232801 |
|
|
Aug 03 07:09:19 PM PDT 24 |
Aug 03 08:03:52 PM PDT 24 |
39091532100 ps |
| T562 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.1441786496 |
|
|
Aug 03 07:30:35 PM PDT 24 |
Aug 03 07:35:06 PM PDT 24 |
2613852290 ps |
| T362 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.3625977832 |
|
|
Aug 03 07:53:49 PM PDT 24 |
Aug 03 07:58:47 PM PDT 24 |
4339793790 ps |
| T497 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.1216702294 |
|
|
Aug 03 07:53:16 PM PDT 24 |
Aug 03 08:03:46 PM PDT 24 |
5177616500 ps |
| T94 |
/workspace/coverage/default/1.chip_sw_alert_handler_entropy.3164451699 |
|
|
Aug 03 07:27:19 PM PDT 24 |
Aug 03 07:32:37 PM PDT 24 |
2655061988 ps |
| T563 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.297918469 |
|
|
Aug 03 07:28:04 PM PDT 24 |
Aug 03 07:55:18 PM PDT 24 |
6629006844 ps |
| T384 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.1150696601 |
|
|
Aug 03 07:39:20 PM PDT 24 |
Aug 03 08:23:10 PM PDT 24 |
33917955644 ps |
| T564 |
/workspace/coverage/default/1.rom_e2e_static_critical.327369481 |
|
|
Aug 03 07:37:15 PM PDT 24 |
Aug 03 08:49:20 PM PDT 24 |
16816149054 ps |
| T565 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.944311841 |
|
|
Aug 03 07:17:56 PM PDT 24 |
Aug 03 08:32:37 PM PDT 24 |
22570478224 ps |
| T19 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.3421292350 |
|
|
Aug 03 07:21:32 PM PDT 24 |
Aug 03 07:27:12 PM PDT 24 |
6222506110 ps |
| T566 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3687901557 |
|
|
Aug 03 07:29:50 PM PDT 24 |
Aug 03 07:39:21 PM PDT 24 |
4068205000 ps |
| T16 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.3249050676 |
|
|
Aug 03 07:07:06 PM PDT 24 |
Aug 03 07:17:09 PM PDT 24 |
4270718160 ps |
| T98 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.2402156713 |
|
|
Aug 03 07:29:45 PM PDT 24 |
Aug 03 07:38:06 PM PDT 24 |
3440156380 ps |
| T170 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.1251611823 |
|
|
Aug 03 07:15:36 PM PDT 24 |
Aug 03 07:23:37 PM PDT 24 |
4862378440 ps |
| T164 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.3426831403 |
|
|
Aug 03 07:06:59 PM PDT 24 |
Aug 03 07:10:59 PM PDT 24 |
3029397534 ps |
| T85 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.535575642 |
|
|
Aug 03 07:45:57 PM PDT 24 |
Aug 03 07:58:12 PM PDT 24 |
4360278712 ps |
| T567 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.2479804823 |
|
|
Aug 03 07:49:23 PM PDT 24 |
Aug 03 08:45:25 PM PDT 24 |
14608025478 ps |
| T392 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.2975599959 |
|
|
Aug 03 07:47:49 PM PDT 24 |
Aug 03 08:47:10 PM PDT 24 |
15192548572 ps |
| T568 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2469857780 |
|
|
Aug 03 07:25:29 PM PDT 24 |
Aug 03 08:20:33 PM PDT 24 |
11984553444 ps |
| T322 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.100037615 |
|
|
Aug 03 07:25:51 PM PDT 24 |
Aug 03 07:51:32 PM PDT 24 |
7822088568 ps |
| T569 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.2692271547 |
|
|
Aug 03 07:44:42 PM PDT 24 |
Aug 03 07:49:47 PM PDT 24 |
2577915218 ps |
| T361 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.3053290664 |
|
|
Aug 03 07:48:20 PM PDT 24 |
Aug 03 07:57:12 PM PDT 24 |
4071928834 ps |
| T570 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.831042458 |
|
|
Aug 03 07:42:22 PM PDT 24 |
Aug 03 07:47:49 PM PDT 24 |
3267645468 ps |
| T463 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.3347911251 |
|
|
Aug 03 07:54:29 PM PDT 24 |
Aug 03 08:05:34 PM PDT 24 |
5606013504 ps |
| T285 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.332285574 |
|
|
Aug 03 07:23:01 PM PDT 24 |
Aug 03 08:56:22 PM PDT 24 |
22276602305 ps |
| T21 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.1229602644 |
|
|
Aug 03 07:26:42 PM PDT 24 |
Aug 03 07:32:42 PM PDT 24 |
3017077496 ps |
| T335 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.3122062673 |
|
|
Aug 03 07:07:32 PM PDT 24 |
Aug 03 08:43:21 PM PDT 24 |
48934818180 ps |
| T412 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.2410327824 |
|
|
Aug 03 07:42:31 PM PDT 24 |
Aug 03 08:02:06 PM PDT 24 |
6647866840 ps |
| T571 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.3918298254 |
|
|
Aug 03 07:06:11 PM PDT 24 |
Aug 03 07:09:47 PM PDT 24 |
2743983984 ps |
| T387 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.2957023474 |
|
|
Aug 03 07:56:00 PM PDT 24 |
Aug 03 08:06:23 PM PDT 24 |
5954652410 ps |
| T72 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3246026898 |
|
|
Aug 03 07:13:08 PM PDT 24 |
Aug 03 07:21:04 PM PDT 24 |
5778378418 ps |
| T185 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.2785060088 |
|
|
Aug 03 07:40:44 PM PDT 24 |
Aug 03 07:49:28 PM PDT 24 |
3859258504 ps |
| T286 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.3764395219 |
|
|
Aug 03 07:32:15 PM PDT 24 |
Aug 03 07:34:07 PM PDT 24 |
2981017842 ps |
| T375 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.3843691918 |
|
|
Aug 03 07:46:07 PM PDT 24 |
Aug 03 08:12:07 PM PDT 24 |
7740943064 ps |
| T397 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.1281486913 |
|
|
Aug 03 07:56:11 PM PDT 24 |
Aug 03 08:02:12 PM PDT 24 |
4061378816 ps |
| T487 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.1862785261 |
|
|
Aug 03 07:54:38 PM PDT 24 |
Aug 03 08:01:02 PM PDT 24 |
3622125548 ps |
| T338 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.3313271399 |
|
|
Aug 03 07:24:52 PM PDT 24 |
Aug 03 08:52:58 PM PDT 24 |
44749939061 ps |
| T462 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.2515360210 |
|
|
Aug 03 07:54:15 PM PDT 24 |
Aug 03 08:04:25 PM PDT 24 |
5676463380 ps |
| T179 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.898514214 |
|
|
Aug 03 07:17:35 PM PDT 24 |
Aug 03 07:24:34 PM PDT 24 |
5428351990 ps |
| T572 |
/workspace/coverage/default/0.rom_e2e_self_hash.472581673 |
|
|
Aug 03 07:25:04 PM PDT 24 |
Aug 03 08:58:10 PM PDT 24 |
25693960964 ps |
| T573 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.2349284505 |
|
|
Aug 03 07:09:57 PM PDT 24 |
Aug 03 07:24:28 PM PDT 24 |
5291933248 ps |
| T247 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.2758801834 |
|
|
Aug 03 07:20:36 PM PDT 24 |
Aug 03 07:28:39 PM PDT 24 |
5140964472 ps |
| T345 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.1010780001 |
|
|
Aug 03 07:11:58 PM PDT 24 |
Aug 03 07:15:22 PM PDT 24 |
3200629974 ps |
| T346 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3091284654 |
|
|
Aug 03 07:30:48 PM PDT 24 |
Aug 03 07:53:16 PM PDT 24 |
7919441096 ps |
| T347 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.2437092436 |
|
|
Aug 03 07:55:00 PM PDT 24 |
Aug 03 08:01:30 PM PDT 24 |
3665844144 ps |
| T96 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.1397337005 |
|
|
Aug 03 07:23:35 PM PDT 24 |
Aug 03 07:32:31 PM PDT 24 |
6178985071 ps |
| T73 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.2640788750 |
|
|
Aug 03 07:13:47 PM PDT 24 |
Aug 03 07:30:36 PM PDT 24 |
7173362456 ps |
| T348 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.2362797108 |
|
|
Aug 03 07:12:11 PM PDT 24 |
Aug 03 07:15:03 PM PDT 24 |
2576364678 ps |
| T349 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.1982889951 |
|
|
Aug 03 07:36:16 PM PDT 24 |
Aug 03 07:48:58 PM PDT 24 |
4625933792 ps |
| T350 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.1786050143 |
|
|
Aug 03 07:26:19 PM PDT 24 |
Aug 03 07:29:20 PM PDT 24 |
2939370856 ps |