SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
83.70 | 83.70 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 83.89 | 83.89 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
83.89 | 83.89 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
83.89 | 83.89 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.19 | 92.47 | 87.09 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 121 | 73.78 |
Total Bits | 11012 | 9217 | 83.70 |
Total Bits 0->1 | 5506 | 4622 | 83.94 |
Total Bits 1->0 | 5506 | 4595 | 83.45 |
Ports | 164 | 121 | 73.78 |
Port Bits | 11012 | 9217 | 83.70 |
Port Bits 0->1 | 5506 | 4622 | 83.94 |
Port Bits 1->0 | 5506 | 4595 | 83.45 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_i.edn_fips | No | No | Yes | T63,T195,T196 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[2:1] | No | No | No | INPUT | ||
core_tl_i.a_user.instr_type[3] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[1:0] | No | No | No | INPUT | ||
core_tl_i.a_address[11:2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T4,*T6,*T52 | Yes | T4,T6,T52 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[0] | Yes | Yes | *T6,*T52,*T53 | Yes | T6,T52,T53 | INPUT |
core_tl_i.a_opcode[1] | No | No | No | INPUT | ||
core_tl_i.a_opcode[2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | No | No | No | OUTPUT | ||
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[1:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[3:2] | No | No | No | OUTPUT | ||
core_tl_o.d_user.rsp_intg[5:4] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6] | No | No | No | OUTPUT | ||
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | No | No | No | OUTPUT | ||
core_tl_o.d_source[1:0] | Yes | Yes | *T4,*T197,*T198 | Yes | T4,T197,T198 | OUTPUT |
core_tl_o.d_source[5:2] | No | No | No | OUTPUT | ||
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[0] | No | No | No | OUTPUT | ||
core_tl_o.d_size[1] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T32,*T4,*T5 | Yes | T32,T4,T5 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | No | No | No | INPUT | ||
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[2:1] | No | No | No | INPUT | ||
prim_tl_i.a_user.instr_type[3] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | No | No | No | INPUT | ||
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[1:0] | No | No | No | INPUT | ||
prim_tl_i.a_address[4:2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[15] | No | No | No | INPUT | ||
prim_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T4,*T6,*T52 | Yes | T4,T6,T52 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[0] | Yes | Yes | *T6,*T52,*T53 | Yes | T6,T52,T53 | INPUT |
prim_tl_i.a_opcode[1] | No | No | No | INPUT | ||
prim_tl_i.a_opcode[2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_valid | No | No | No | INPUT | ||
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | No | No | No | OUTPUT | ||
prim_tl_o.d_user.rsp_intg[1:0] | No | No | No | OUTPUT | ||
prim_tl_o.d_user.rsp_intg[2] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
prim_tl_o.d_user.rsp_intg[4:3] | No | No | No | OUTPUT | ||
prim_tl_o.d_user.rsp_intg[5] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6] | No | No | No | OUTPUT | ||
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
prim_tl_o.d_sink | No | No | No | OUTPUT | ||
prim_tl_o.d_source[5:0] | No | No | No | OUTPUT | ||
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | No | No | No | OUTPUT | ||
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | No | No | No | OUTPUT | ||
intr_otp_operation_done_o | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | OUTPUT |
intr_otp_error_o | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T2,T3,T113 | Yes | T2,T3,T113 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T199,T96,T99 | Yes | T96,T99,T124 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T96,T99,T124 | Yes | T199,T96,T99 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T113,T96,T97 | Yes | T113,T96,T97 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T2,T3,T113 | Yes | T2,T3,T113 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T113,T96,T97 | Yes | T113,T96,T97 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T37,T60,T62 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[5:0] | No | No | Yes | T200,T201,T202 | INPUT | |
lc_otp_vendor_test_i.ctrl[6] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[8:7] | No | No | Yes | T201,T202 | INPUT | |
lc_otp_vendor_test_i.ctrl[9] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[12:10] | No | No | Yes | T200,T202,T201 | INPUT | |
lc_otp_vendor_test_i.ctrl[14:13] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[24:15] | No | No | Yes | T201,T202,T200 | INPUT | |
lc_otp_vendor_test_i.ctrl[25] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[26] | No | No | Yes | T200,T202 | INPUT | |
lc_otp_vendor_test_i.ctrl[28:27] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[30:29] | No | No | Yes | T200,T201,T202 | INPUT | |
lc_otp_vendor_test_i.ctrl[31] | No | No | No | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[16:0] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[17] | No | No | No | INPUT | ||
lc_otp_program_i.count[25:18] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[26] | No | No | No | INPUT | ||
lc_otp_program_i.count[33:27] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[34] | No | No | No | INPUT | ||
lc_otp_program_i.count[36:35] | Yes | Yes | T5,T112,*T204 | Yes | T5,T203,T205 | INPUT |
lc_otp_program_i.count[37] | No | No | No | INPUT | ||
lc_otp_program_i.count[54:38] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[56:55] | No | No | No | INPUT | ||
lc_otp_program_i.count[72:57] | Yes | Yes | *T5,*T112,*T204 | Yes | T5,T203,T205 | INPUT |
lc_otp_program_i.count[73] | No | No | No | INPUT | ||
lc_otp_program_i.count[75:74] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[76] | No | No | No | INPUT | ||
lc_otp_program_i.count[80:77] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[81] | No | No | No | INPUT | ||
lc_otp_program_i.count[84:82] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[85] | No | No | No | INPUT | ||
lc_otp_program_i.count[99:86] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[100] | No | No | No | INPUT | ||
lc_otp_program_i.count[122:101] | Yes | Yes | *T119,*T5,*T112 | Yes | T5,T203,T46 | INPUT |
lc_otp_program_i.count[123] | No | No | No | INPUT | ||
lc_otp_program_i.count[142:124] | Yes | Yes | *T119,*T5,*T112 | Yes | T5,T203,T46 | INPUT |
lc_otp_program_i.count[143] | No | No | No | INPUT | ||
lc_otp_program_i.count[149:144] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[150] | No | No | No | INPUT | ||
lc_otp_program_i.count[155:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[156] | No | No | No | INPUT | ||
lc_otp_program_i.count[161:157] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[163:162] | No | No | No | INPUT | ||
lc_otp_program_i.count[177:164] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[178] | No | No | No | INPUT | ||
lc_otp_program_i.count[181:179] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[182] | No | No | No | INPUT | ||
lc_otp_program_i.count[188:183] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[190:189] | No | No | No | INPUT | ||
lc_otp_program_i.count[195:191] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[196] | No | No | No | INPUT | ||
lc_otp_program_i.count[208:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[209] | No | No | No | INPUT | ||
lc_otp_program_i.count[210] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[211] | No | No | No | INPUT | ||
lc_otp_program_i.count[223:212] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[224] | No | No | No | INPUT | ||
lc_otp_program_i.count[228:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[229] | No | No | No | INPUT | ||
lc_otp_program_i.count[254:230] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[255] | No | No | No | INPUT | ||
lc_otp_program_i.count[256] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[258:257] | No | No | No | INPUT | ||
lc_otp_program_i.count[263:259] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[264] | No | No | No | INPUT | ||
lc_otp_program_i.count[283:265] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[284] | No | No | No | INPUT | ||
lc_otp_program_i.count[302:285] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.count[303] | No | No | No | INPUT | ||
lc_otp_program_i.count[308:304] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[309] | No | No | No | INPUT | ||
lc_otp_program_i.count[314:310] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[315] | No | No | No | INPUT | ||
lc_otp_program_i.count[316] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[317] | No | No | No | INPUT | ||
lc_otp_program_i.count[328:318] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[330:329] | No | No | No | INPUT | ||
lc_otp_program_i.count[339:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[340] | No | No | No | INPUT | ||
lc_otp_program_i.count[345:341] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[346] | No | No | No | INPUT | ||
lc_otp_program_i.count[357:347] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[359:358] | No | No | No | INPUT | ||
lc_otp_program_i.count[365:360] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[366] | No | No | No | INPUT | ||
lc_otp_program_i.count[377:367] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.count[378] | No | No | No | INPUT | ||
lc_otp_program_i.count[380:379] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | INPUT |
lc_otp_program_i.count[382:381] | No | No | No | INPUT | ||
lc_otp_program_i.count[383] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[16:0] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[17] | No | No | No | INPUT | ||
lc_otp_program_i.state[40:18] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T203 | INPUT |
lc_otp_program_i.state[41] | No | No | No | INPUT | ||
lc_otp_program_i.state[50:42] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[51] | No | No | No | INPUT | ||
lc_otp_program_i.state[52] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[53] | No | No | No | INPUT | ||
lc_otp_program_i.state[58:54] | Yes | Yes | *T4,T5,T112 | Yes | T4,T5,T203 | INPUT |
lc_otp_program_i.state[59] | No | No | No | INPUT | ||
lc_otp_program_i.state[64:60] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T203 | INPUT |
lc_otp_program_i.state[65] | No | No | No | INPUT | ||
lc_otp_program_i.state[68:66] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[69] | No | No | No | INPUT | ||
lc_otp_program_i.state[71:70] | Yes | Yes | T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[72] | No | No | No | INPUT | ||
lc_otp_program_i.state[79:73] | Yes | Yes | *T4,T5,T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[80] | No | No | No | INPUT | ||
lc_otp_program_i.state[88:81] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[89] | No | No | No | INPUT | ||
lc_otp_program_i.state[91:90] | Yes | Yes | T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[92] | No | No | No | INPUT | ||
lc_otp_program_i.state[98:93] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[99] | No | No | No | INPUT | ||
lc_otp_program_i.state[107:100] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[108] | No | No | No | INPUT | ||
lc_otp_program_i.state[112:109] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[113] | No | No | No | INPUT | ||
lc_otp_program_i.state[121:114] | Yes | Yes | *T4,T5,T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[122] | No | No | No | INPUT | ||
lc_otp_program_i.state[136:123] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[137] | No | No | No | INPUT | ||
lc_otp_program_i.state[138] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[139] | No | No | No | INPUT | ||
lc_otp_program_i.state[141:140] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[142] | No | No | No | INPUT | ||
lc_otp_program_i.state[143] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[144] | No | No | No | INPUT | ||
lc_otp_program_i.state[157:145] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[158] | No | No | No | INPUT | ||
lc_otp_program_i.state[161:159] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[162] | No | No | No | INPUT | ||
lc_otp_program_i.state[163] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[165:164] | No | No | No | INPUT | ||
lc_otp_program_i.state[170:166] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[171] | No | No | No | INPUT | ||
lc_otp_program_i.state[178:172] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[179] | No | No | No | INPUT | ||
lc_otp_program_i.state[191:180] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[192] | No | No | No | INPUT | ||
lc_otp_program_i.state[214:193] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[215] | No | No | No | INPUT | ||
lc_otp_program_i.state[222:216] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[223] | No | No | No | INPUT | ||
lc_otp_program_i.state[234:224] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[235] | No | No | No | INPUT | ||
lc_otp_program_i.state[238:236] | Yes | Yes | T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[239] | No | No | No | INPUT | ||
lc_otp_program_i.state[240] | Yes | Yes | *T119,*T4,*T5 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[241] | No | No | No | INPUT | ||
lc_otp_program_i.state[244:242] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[245] | No | No | No | INPUT | ||
lc_otp_program_i.state[249:246] | Yes | Yes | *T119,*T4,*T5 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[250] | No | No | No | INPUT | ||
lc_otp_program_i.state[252:251] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[253] | No | No | No | INPUT | ||
lc_otp_program_i.state[254] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[256:255] | No | No | No | INPUT | ||
lc_otp_program_i.state[259:257] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[260] | No | No | No | INPUT | ||
lc_otp_program_i.state[263:261] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[264] | No | No | No | INPUT | ||
lc_otp_program_i.state[280:265] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT |
lc_otp_program_i.state[281] | No | No | No | INPUT | ||
lc_otp_program_i.state[286:282] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[287] | No | No | No | INPUT | ||
lc_otp_program_i.state[291:288] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[292] | No | No | No | INPUT | ||
lc_otp_program_i.state[299:293] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT |
lc_otp_program_i.state[301:300] | No | No | No | INPUT | ||
lc_otp_program_i.state[317:302] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.state[318] | No | No | No | INPUT | ||
lc_otp_program_i.state[319] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT |
lc_otp_program_i.req | Yes | Yes | T4,T5,T112 | Yes | T4,T5,T112 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T4,T5,T112 | Yes | T4,T5,T112 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T209,T210,T211 | Yes | T209,T210,T211 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T2,T3,T113 | Yes | T2,T3,T113 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T4,T5,T54 | Yes | T4,T5,T112 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T37,T95,T212 | Yes | T37,T213,T13 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T5,T214,T215 | Yes | T32,T5,T214 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T3,T32 | Yes | T3,T32,T113 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T5,T214,T215 | Yes | T32,T5,T214 | OUTPUT |
otp_lc_data_o.count[16:0] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[25:18] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[26] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[33:27] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[34] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[36:35] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[37] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[54:38] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[56:55] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[72:57] | Yes | Yes | *T5,*T112,*T204 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[73] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[75:74] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[80:77] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[81] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[84:82] | Yes | Yes | T5,T112,T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[85] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[99:86] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[100] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[122:101] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[142:124] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[143] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[149:144] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[150] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[155:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[161:157] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.count[163:162] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[177:164] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[181:179] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[182] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[188:183] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[190:189] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[195:191] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[196] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[208:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.count[209] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[210] | Yes | Yes | *T216,*T217,*T218 | Yes | T216,T209,T217 | OUTPUT |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[223:212] | Yes | Yes | *T216,*T217,*T218 | Yes | T216,T209,T217 | OUTPUT |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[228:225] | Yes | Yes | *T216,*T217,*T218 | Yes | T216,T209,T217 | OUTPUT |
otp_lc_data_o.count[229] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[254:230] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[256] | Yes | Yes | *T216,*T217,*T218 | Yes | T216,T209,T217 | OUTPUT |
otp_lc_data_o.count[258:257] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[263:259] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[264] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[283:265] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[284] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[302:285] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.count[303] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[308:304] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.count[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[314:310] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[315] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[316] | Yes | Yes | *T216,*T217,*T218 | Yes | T216,T209,T217 | OUTPUT |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[328:318] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.count[330:329] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[339:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.count[340] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[345:341] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[346] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[357:347] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[359:358] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[365:360] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[366] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[377:367] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.count[378] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[380:379] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.count[382:381] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[16:0] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.state[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[40:18] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T203 | OUTPUT |
otp_lc_data_o.state[41] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[50:42] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[51] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[52] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[53] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[58:54] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[59] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[64:60] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[65] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[68:66] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.state[69] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[71:70] | Yes | Yes | *T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[72] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[79:73] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | OUTPUT |
otp_lc_data_o.state[80] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[88:81] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[89] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[91:90] | Yes | Yes | *T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[92] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[98:93] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[99] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[107:100] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | OUTPUT |
otp_lc_data_o.state[108] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[112:109] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[121:114] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | OUTPUT |
otp_lc_data_o.state[122] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[136:123] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[138] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.state[139] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[141:140] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[142] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[143] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[144] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[157:145] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | OUTPUT |
otp_lc_data_o.state[158] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[161:159] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[162] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[163] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[165:164] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[170:166] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[171] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[178:172] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[191:180] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.state[192] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[214:193] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[215] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[222:216] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[223] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[234:224] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | OUTPUT |
otp_lc_data_o.state[235] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[238:236] | Yes | Yes | *T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[239] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[240] | Yes | Yes | *T119,*T4,*T5 | Yes | T4,T5,T54 | OUTPUT |
otp_lc_data_o.state[241] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[244:242] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[245] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[249:246] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[250] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[252:251] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[254] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[256:255] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[259:257] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[263:261] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[264] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[280:265] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[281] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[286:282] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[287] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[291:288] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[292] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[299:293] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_lc_data_o.state[301:300] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[317:302] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.state[318] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319] | Yes | Yes | T5,T112,T203 | Yes | T5,T203,T205 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T2,T3,T113 | Yes | T2,T3,T113 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T5,T214,T215 | Yes | T32,T5,T214 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T2,T3,T63 | Yes | T2,T3,T61 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T5,T214,T215 | Yes | T32,T5,T214 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T2,T3,T32 | Yes | T2,T3,T32 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T179,T49,T50 | Yes | T179,T49,T50 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T179,T219,T220 | Yes | T179,T219,T220 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T221,T222,T223 | Yes | T221,T222,T223 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T179,T49,T50 | Yes | T179,T49,T50 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T179,T219,T220 | Yes | T179,T219,T220 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T221,T222,T223 | Yes | T221,T222,T223 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T63,T49,T50 | Yes | T63,T49,T50 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T63,T49,T50 | Yes | T63,T49,T50 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T60 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[62:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[63] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[68:64] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[69] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[122:70] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[123] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[205:124] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[206] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:207] | Yes | Yes | T214,T181,T224 | Yes | T214,T181,T224 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T3,T37,T60 | Yes | T3,T37,T63 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[40:0] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[41] | No | No | Yes | T224,T225,T226 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:42] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T7,T8,T9 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 121 | 75.62 |
Total Bits | 10986 | 9216 | 83.89 |
Total Bits 0->1 | 5493 | 4621 | 84.13 |
Total Bits 1->0 | 5493 | 4595 | 83.65 |
Ports | 160 | 121 | 75.62 |
Port Bits | 10986 | 9216 | 83.89 |
Port Bits 0->1 | 5493 | 4621 | 84.13 |
Port Bits 1->0 | 5493 | 4595 | 83.65 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_i.edn_fips | No | No | Yes | T63,T195,T196 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[2:1] | No | No | No | INPUT | |||
core_tl_i.a_user.instr_type[3] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[1:0] | No | No | No | INPUT | |||
core_tl_i.a_address[11:2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T4,*T6,*T52 | Yes | T4,T6,T52 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[0] | Yes | Yes | *T6,*T52,*T53 | Yes | T6,T52,T53 | INPUT | |
core_tl_i.a_opcode[1] | No | No | No | INPUT | |||
core_tl_i.a_opcode[2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | No | No | No | OUTPUT | |||
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[1:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[3:2] | No | No | No | OUTPUT | |||
core_tl_o.d_user.rsp_intg[5:4] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6] | No | No | No | OUTPUT | |||
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | No | No | No | OUTPUT | |||
core_tl_o.d_source[1:0] | Yes | Yes | *T4,*T197,*T198 | Yes | T4,T197,T198 | OUTPUT | |
core_tl_o.d_source[5:2] | No | No | No | OUTPUT | |||
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[0] | No | No | No | OUTPUT | |||
core_tl_o.d_size[1] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T32,*T4,*T5 | Yes | T32,T4,T5 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | No | No | No | INPUT | |||
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[2:1] | No | No | No | INPUT | |||
prim_tl_i.a_user.instr_type[3] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | No | No | No | INPUT | |||
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[1:0] | No | No | No | INPUT | |||
prim_tl_i.a_address[4:2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[15] | No | No | No | INPUT | |||
prim_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T4,*T6,*T52 | Yes | T4,T6,T52 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T29,T30,T31 | Yes | T29,T30,T31 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[0] | Yes | Yes | *T6,*T52,*T53 | Yes | T6,T52,T53 | INPUT | |
prim_tl_i.a_opcode[1] | No | No | No | INPUT | |||
prim_tl_i.a_opcode[2] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_valid | No | No | No | INPUT | |||
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | No | No | No | OUTPUT | |||
prim_tl_o.d_user.rsp_intg[1:0] | No | No | No | OUTPUT | |||
prim_tl_o.d_user.rsp_intg[2] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[4:3] | No | No | No | OUTPUT | |||
prim_tl_o.d_user.rsp_intg[5] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6] | No | No | No | OUTPUT | |||
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
prim_tl_o.d_sink | No | No | No | OUTPUT | |||
prim_tl_o.d_source[5:0] | No | No | No | OUTPUT | |||
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | No | No | No | OUTPUT | |||
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | No | No | No | OUTPUT | |||
intr_otp_operation_done_o | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T102,T103,T104 | Yes | T102,T103,T104 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T2,T3,T113 | Yes | T2,T3,T113 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T199,T96,T99 | Yes | T96,T99,T124 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T96,T99,T124 | Yes | T199,T96,T99 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T113,T96,T97 | Yes | T113,T96,T97 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T96,T99,T124 | Yes | T96,T99,T124 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T2,T3,T113 | Yes | T2,T3,T113 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T113,T96,T97 | Yes | T113,T96,T97 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T96,T97,T99 | Yes | T96,T97,T99 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T37,T60,T62 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[5:0] | No | No | Yes | T200,T201,T202 | INPUT | ||
lc_otp_vendor_test_i.ctrl[6] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[8:7] | No | No | Yes | T201,T202 | INPUT | ||
lc_otp_vendor_test_i.ctrl[9] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[12:10] | No | No | Yes | T200,T202,T201 | INPUT | ||
lc_otp_vendor_test_i.ctrl[14:13] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[24:15] | No | No | Yes | T201,T202,T200 | INPUT | ||
lc_otp_vendor_test_i.ctrl[25] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[26] | No | No | Yes | T200,T202 | INPUT | ||
lc_otp_vendor_test_i.ctrl[28:27] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[30:29] | No | No | Yes | T200,T201,T202 | INPUT | ||
lc_otp_vendor_test_i.ctrl[31] | No | No | No | INPUT | |||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[16:0] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[17] | No | No | No | INPUT | |||
lc_otp_program_i.count[25:18] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[26] | No | No | No | INPUT | |||
lc_otp_program_i.count[33:27] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[34] | No | No | No | INPUT | |||
lc_otp_program_i.count[36:35] | Yes | Yes | T5,T112,*T204 | Yes | T5,T203,T205 | INPUT | |
lc_otp_program_i.count[37] | No | No | No | INPUT | |||
lc_otp_program_i.count[54:38] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[56:55] | No | No | No | INPUT | |||
lc_otp_program_i.count[72:57] | Yes | Yes | *T5,*T112,*T204 | Yes | T5,T203,T205 | INPUT | |
lc_otp_program_i.count[73] | No | No | No | INPUT | |||
lc_otp_program_i.count[75:74] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[76] | No | No | No | INPUT | |||
lc_otp_program_i.count[80:77] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[81] | No | No | No | INPUT | |||
lc_otp_program_i.count[84:82] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[85] | No | No | No | INPUT | |||
lc_otp_program_i.count[99:86] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[100] | No | No | No | INPUT | |||
lc_otp_program_i.count[122:101] | Yes | Yes | *T119,*T5,*T112 | Yes | T5,T203,T46 | INPUT | |
lc_otp_program_i.count[123] | No | No | No | INPUT | |||
lc_otp_program_i.count[142:124] | Yes | Yes | *T119,*T5,*T112 | Yes | T5,T203,T46 | INPUT | |
lc_otp_program_i.count[143] | No | No | No | INPUT | |||
lc_otp_program_i.count[149:144] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[150] | No | No | No | INPUT | |||
lc_otp_program_i.count[155:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[156] | No | No | No | INPUT | |||
lc_otp_program_i.count[161:157] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[163:162] | No | No | No | INPUT | |||
lc_otp_program_i.count[177:164] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[178] | No | No | No | INPUT | |||
lc_otp_program_i.count[181:179] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[182] | No | No | No | INPUT | |||
lc_otp_program_i.count[188:183] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[190:189] | No | No | No | INPUT | |||
lc_otp_program_i.count[195:191] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[196] | No | No | No | INPUT | |||
lc_otp_program_i.count[208:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[209] | No | No | No | INPUT | |||
lc_otp_program_i.count[210] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[211] | No | No | No | INPUT | |||
lc_otp_program_i.count[223:212] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[224] | No | No | No | INPUT | |||
lc_otp_program_i.count[228:225] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[229] | No | No | No | INPUT | |||
lc_otp_program_i.count[254:230] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[255] | No | No | No | INPUT | |||
lc_otp_program_i.count[256] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[258:257] | No | No | No | INPUT | |||
lc_otp_program_i.count[263:259] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[264] | No | No | No | INPUT | |||
lc_otp_program_i.count[283:265] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[284] | No | No | No | INPUT | |||
lc_otp_program_i.count[302:285] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.count[303] | No | No | No | INPUT | |||
lc_otp_program_i.count[308:304] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[309] | No | No | No | INPUT | |||
lc_otp_program_i.count[314:310] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[315] | No | No | No | INPUT | |||
lc_otp_program_i.count[316] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[317] | No | No | No | INPUT | |||
lc_otp_program_i.count[328:318] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[330:329] | No | No | No | INPUT | |||
lc_otp_program_i.count[339:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[340] | No | No | No | INPUT | |||
lc_otp_program_i.count[345:341] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[346] | No | No | No | INPUT | |||
lc_otp_program_i.count[357:347] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[359:358] | No | No | No | INPUT | |||
lc_otp_program_i.count[365:360] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[366] | No | No | No | INPUT | |||
lc_otp_program_i.count[377:367] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.count[378] | No | No | No | INPUT | |||
lc_otp_program_i.count[380:379] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | INPUT | |
lc_otp_program_i.count[382:381] | No | No | No | INPUT | |||
lc_otp_program_i.count[383] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[16:0] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[17] | No | No | No | INPUT | |||
lc_otp_program_i.state[40:18] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T203 | INPUT | |
lc_otp_program_i.state[41] | No | No | No | INPUT | |||
lc_otp_program_i.state[50:42] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[51] | No | No | No | INPUT | |||
lc_otp_program_i.state[52] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[53] | No | No | No | INPUT | |||
lc_otp_program_i.state[58:54] | Yes | Yes | *T4,T5,T112 | Yes | T4,T5,T203 | INPUT | |
lc_otp_program_i.state[59] | No | No | No | INPUT | |||
lc_otp_program_i.state[64:60] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T203 | INPUT | |
lc_otp_program_i.state[65] | No | No | No | INPUT | |||
lc_otp_program_i.state[68:66] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[69] | No | No | No | INPUT | |||
lc_otp_program_i.state[71:70] | Yes | Yes | T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[72] | No | No | No | INPUT | |||
lc_otp_program_i.state[79:73] | Yes | Yes | *T4,T5,T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[80] | No | No | No | INPUT | |||
lc_otp_program_i.state[88:81] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[89] | No | No | No | INPUT | |||
lc_otp_program_i.state[91:90] | Yes | Yes | T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[92] | No | No | No | INPUT | |||
lc_otp_program_i.state[98:93] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[99] | No | No | No | INPUT | |||
lc_otp_program_i.state[107:100] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[108] | No | No | No | INPUT | |||
lc_otp_program_i.state[112:109] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[113] | No | No | No | INPUT | |||
lc_otp_program_i.state[121:114] | Yes | Yes | *T4,T5,T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[122] | No | No | No | INPUT | |||
lc_otp_program_i.state[136:123] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[137] | No | No | No | INPUT | |||
lc_otp_program_i.state[138] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[139] | No | No | No | INPUT | |||
lc_otp_program_i.state[141:140] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[142] | No | No | No | INPUT | |||
lc_otp_program_i.state[143] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[144] | No | No | No | INPUT | |||
lc_otp_program_i.state[157:145] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[158] | No | No | No | INPUT | |||
lc_otp_program_i.state[161:159] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[162] | No | No | No | INPUT | |||
lc_otp_program_i.state[163] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[165:164] | No | No | No | INPUT | |||
lc_otp_program_i.state[170:166] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[171] | No | No | No | INPUT | |||
lc_otp_program_i.state[178:172] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[179] | No | No | No | INPUT | |||
lc_otp_program_i.state[191:180] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[192] | No | No | No | INPUT | |||
lc_otp_program_i.state[214:193] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[215] | No | No | No | INPUT | |||
lc_otp_program_i.state[222:216] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[223] | No | No | No | INPUT | |||
lc_otp_program_i.state[234:224] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[235] | No | No | No | INPUT | |||
lc_otp_program_i.state[238:236] | Yes | Yes | T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[239] | No | No | No | INPUT | |||
lc_otp_program_i.state[240] | Yes | Yes | *T119,*T4,*T5 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[241] | No | No | No | INPUT | |||
lc_otp_program_i.state[244:242] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[245] | No | No | No | INPUT | |||
lc_otp_program_i.state[249:246] | Yes | Yes | *T119,*T4,*T5 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[250] | No | No | No | INPUT | |||
lc_otp_program_i.state[252:251] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[253] | No | No | No | INPUT | |||
lc_otp_program_i.state[254] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[256:255] | No | No | No | INPUT | |||
lc_otp_program_i.state[259:257] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[260] | No | No | No | INPUT | |||
lc_otp_program_i.state[263:261] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[264] | No | No | No | INPUT | |||
lc_otp_program_i.state[280:265] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | INPUT | |
lc_otp_program_i.state[281] | No | No | No | INPUT | |||
lc_otp_program_i.state[286:282] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[287] | No | No | No | INPUT | |||
lc_otp_program_i.state[291:288] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[292] | No | No | No | INPUT | |||
lc_otp_program_i.state[299:293] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | INPUT | |
lc_otp_program_i.state[301:300] | No | No | No | INPUT | |||
lc_otp_program_i.state[317:302] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.state[318] | No | No | No | INPUT | |||
lc_otp_program_i.state[319] | Yes | Yes | T5,T112,T203 | Yes | T5,T112,T203 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T4,T5,T112 | Yes | T4,T5,T112 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T4,T5,T112 | Yes | T4,T5,T112 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T209,T210,T211 | Yes | T209,T210,T211 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T2,T3,T113 | Yes | T2,T3,T113 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T4,T5,T54 | Yes | T4,T5,T112 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T37,T95,T212 | Yes | T37,T213,T13 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T5,T214,T215 | Yes | T32,T5,T214 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T1,T3,T32 | Yes | T3,T32,T113 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T5,T214,T215 | Yes | T32,T5,T214 | OUTPUT | |
otp_lc_data_o.count[16:0] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[25:18] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[26] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[33:27] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[34] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[36:35] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[37] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[54:38] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[56:55] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[72:57] | Yes | Yes | *T5,*T112,*T204 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[73] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[75:74] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[80:77] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[81] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[84:82] | Yes | Yes | T5,T112,T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[85] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[99:86] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[100] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[122:101] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[123] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[142:124] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[143] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[149:144] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[150] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[155:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[161:157] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.count[163:162] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[177:164] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[178] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[181:179] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[182] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[188:183] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[190:189] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[195:191] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[196] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[208:197] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.count[209] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[210] | Yes | Yes | *T216,*T217,*T218 | Yes | T216,T209,T217 | OUTPUT | |
otp_lc_data_o.count[211] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[223:212] | Yes | Yes | *T216,*T217,*T218 | Yes | T216,T209,T217 | OUTPUT | |
otp_lc_data_o.count[224] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[228:225] | Yes | Yes | *T216,*T217,*T218 | Yes | T216,T209,T217 | OUTPUT | |
otp_lc_data_o.count[229] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[254:230] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[256] | Yes | Yes | *T216,*T217,*T218 | Yes | T216,T209,T217 | OUTPUT | |
otp_lc_data_o.count[258:257] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[263:259] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[264] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[283:265] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[284] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[302:285] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.count[303] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[308:304] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.count[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[314:310] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[315] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[316] | Yes | Yes | *T216,*T217,*T218 | Yes | T216,T209,T217 | OUTPUT | |
otp_lc_data_o.count[317] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[328:318] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.count[330:329] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[339:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.count[340] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[345:341] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[346] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[357:347] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[359:358] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[365:360] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[366] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[377:367] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.count[378] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[380:379] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.count[382:381] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[16:0] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.state[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[40:18] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T203 | OUTPUT | |
otp_lc_data_o.state[41] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[50:42] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[51] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[52] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[53] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[58:54] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[59] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[64:60] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[65] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[68:66] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.state[69] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[71:70] | Yes | Yes | *T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[72] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[79:73] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | OUTPUT | |
otp_lc_data_o.state[80] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[88:81] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[89] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[91:90] | Yes | Yes | *T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[92] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[98:93] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[99] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[107:100] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | OUTPUT | |
otp_lc_data_o.state[108] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[112:109] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[121:114] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | OUTPUT | |
otp_lc_data_o.state[122] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[136:123] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[137] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[138] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.state[139] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[141:140] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[142] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[143] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[144] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[157:145] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | OUTPUT | |
otp_lc_data_o.state[158] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[161:159] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[162] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[163] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[165:164] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[170:166] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[171] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[178:172] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.state[179] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[191:180] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.state[192] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[214:193] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[215] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[222:216] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[223] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[234:224] | Yes | Yes | *T4,*T5,*T112 | Yes | T4,T5,T54 | OUTPUT | |
otp_lc_data_o.state[235] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[238:236] | Yes | Yes | *T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[239] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[240] | Yes | Yes | *T119,*T4,*T5 | Yes | T4,T5,T54 | OUTPUT | |
otp_lc_data_o.state[241] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[244:242] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[245] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[249:246] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[250] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[252:251] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[254] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[256:255] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[259:257] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[263:261] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[264] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[280:265] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[281] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[286:282] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[287] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[291:288] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[292] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[299:293] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_lc_data_o.state[301:300] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[317:302] | Yes | Yes | *T5,*T112,*T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.state[318] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319] | Yes | Yes | T5,T112,T203 | Yes | T5,T203,T205 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T2,T3,T113 | Yes | T2,T3,T113 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T5,T214,T215 | Yes | T32,T5,T214 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T2,T3,T63 | Yes | T2,T3,T61 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T5,T214,T215 | Yes | T32,T5,T214 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T2,T3,T32 | Yes | T2,T3,T32 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T179,T49,T50 | Yes | T179,T49,T50 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T179,T219,T220 | Yes | T179,T219,T220 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T221,T222,T223 | Yes | T221,T222,T223 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T179,T49,T50 | Yes | T179,T49,T50 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T179,T219,T220 | Yes | T179,T219,T220 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T221,T222,T223 | Yes | T221,T222,T223 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T63,T49,T50 | Yes | T63,T49,T50 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T63,T49,T50 | Yes | T63,T49,T50 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T2,T32 | Yes | T2,T32,T60 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[62:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[63] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[68:64] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[69] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[122:70] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[123] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[205:124] | Yes | Yes | *T1,*T2,*T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[206] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:207] | Yes | Yes | T214,T181,T224 | Yes | T214,T181,T224 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T3,T37,T60 | Yes | T3,T37,T63 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T2,T3,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[40:0] | Yes | Yes | *T2,*T3,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[41] | No | No | Yes | T224,T225,T226 | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:42] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T2,T3,T32 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |