| T299 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.3839697823 |
|
|
Aug 07 08:30:27 PM PDT 24 |
Aug 07 08:38:10 PM PDT 24 |
3789466692 ps |
| T300 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.3097157290 |
|
|
Aug 07 08:13:11 PM PDT 24 |
Aug 07 08:39:05 PM PDT 24 |
6914324512 ps |
| T189 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.967397556 |
|
|
Aug 07 07:53:23 PM PDT 24 |
Aug 07 08:06:40 PM PDT 24 |
7171027674 ps |
| T301 |
/workspace/coverage/default/2.rom_e2e_self_hash.3620265856 |
|
|
Aug 07 08:24:04 PM PDT 24 |
Aug 07 09:57:49 PM PDT 24 |
26180860296 ps |
| T279 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.1202055403 |
|
|
Aug 07 08:09:02 PM PDT 24 |
Aug 07 08:20:24 PM PDT 24 |
5036695408 ps |
| T154 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.3425880057 |
|
|
Aug 07 08:21:02 PM PDT 24 |
Aug 07 08:56:12 PM PDT 24 |
9537668870 ps |
| T956 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.174748421 |
|
|
Aug 07 08:11:10 PM PDT 24 |
Aug 07 08:17:01 PM PDT 24 |
3450505232 ps |
| T957 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.2366082150 |
|
|
Aug 07 08:13:31 PM PDT 24 |
Aug 07 09:22:13 PM PDT 24 |
15228131122 ps |
| T958 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.2874678525 |
|
|
Aug 07 08:16:32 PM PDT 24 |
Aug 07 08:32:39 PM PDT 24 |
13281930718 ps |
| T959 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.2494229152 |
|
|
Aug 07 08:25:33 PM PDT 24 |
Aug 07 08:52:48 PM PDT 24 |
8260289000 ps |
| T214 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.1002132127 |
|
|
Aug 07 08:11:40 PM PDT 24 |
Aug 07 08:18:20 PM PDT 24 |
3658883341 ps |
| T58 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.3168139230 |
|
|
Aug 07 07:58:53 PM PDT 24 |
Aug 07 08:03:32 PM PDT 24 |
3535161060 ps |
| T417 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.3051170948 |
|
|
Aug 07 08:14:58 PM PDT 24 |
Aug 07 08:37:01 PM PDT 24 |
4791785760 ps |
| T418 |
/workspace/coverage/default/2.chip_sw_hmac_oneshot.700528046 |
|
|
Aug 07 08:13:30 PM PDT 24 |
Aug 07 08:18:47 PM PDT 24 |
2739940106 ps |
| T419 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.3469554741 |
|
|
Aug 07 08:31:10 PM PDT 24 |
Aug 07 08:40:13 PM PDT 24 |
4324286460 ps |
| T255 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.1893555426 |
|
|
Aug 07 07:54:09 PM PDT 24 |
Aug 07 07:58:39 PM PDT 24 |
2861073000 ps |
| T420 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.2275081845 |
|
|
Aug 07 08:04:03 PM PDT 24 |
Aug 07 08:24:22 PM PDT 24 |
12798750832 ps |
| T91 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.2756868225 |
|
|
Aug 07 08:29:47 PM PDT 24 |
Aug 07 08:37:43 PM PDT 24 |
3981931580 ps |
| T27 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.1499275050 |
|
|
Aug 07 07:51:41 PM PDT 24 |
Aug 07 08:40:08 PM PDT 24 |
11661393734 ps |
| T155 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.4119861316 |
|
|
Aug 07 08:17:56 PM PDT 24 |
Aug 07 09:23:52 PM PDT 24 |
25377333811 ps |
| T397 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.2881585842 |
|
|
Aug 07 07:51:46 PM PDT 24 |
Aug 07 08:06:21 PM PDT 24 |
5926821780 ps |
| T727 |
/workspace/coverage/default/0.chip_sw_power_idle_load.2506990064 |
|
|
Aug 07 07:54:54 PM PDT 24 |
Aug 07 08:04:41 PM PDT 24 |
4223181680 ps |
| T960 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.1140600016 |
|
|
Aug 07 07:56:35 PM PDT 24 |
Aug 07 08:00:43 PM PDT 24 |
3561946000 ps |
| T327 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.3853515936 |
|
|
Aug 07 07:51:12 PM PDT 24 |
Aug 07 08:23:52 PM PDT 24 |
12623654312 ps |
| T961 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.789684990 |
|
|
Aug 07 08:14:07 PM PDT 24 |
Aug 07 08:18:25 PM PDT 24 |
2824417964 ps |
| T64 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.1962372455 |
|
|
Aug 07 08:10:38 PM PDT 24 |
Aug 07 08:16:24 PM PDT 24 |
3255700710 ps |
| T423 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.1871458499 |
|
|
Aug 07 08:00:40 PM PDT 24 |
Aug 07 08:03:31 PM PDT 24 |
2574344760 ps |
| T89 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.1728249895 |
|
|
Aug 07 07:51:19 PM PDT 24 |
Aug 07 08:12:16 PM PDT 24 |
11978450328 ps |
| T424 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.3532962302 |
|
|
Aug 07 07:59:22 PM PDT 24 |
Aug 07 08:01:22 PM PDT 24 |
2566950837 ps |
| T425 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.4179709213 |
|
|
Aug 07 08:10:52 PM PDT 24 |
Aug 07 08:15:43 PM PDT 24 |
2521391388 ps |
| T426 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.646404346 |
|
|
Aug 07 07:58:29 PM PDT 24 |
Aug 07 08:56:46 PM PDT 24 |
13998289668 ps |
| T427 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.155362856 |
|
|
Aug 07 08:25:36 PM PDT 24 |
Aug 07 08:35:55 PM PDT 24 |
5910651880 ps |
| T428 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.3839218258 |
|
|
Aug 07 08:13:08 PM PDT 24 |
Aug 07 08:35:53 PM PDT 24 |
7541073612 ps |
| T379 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.342563549 |
|
|
Aug 07 08:01:18 PM PDT 24 |
Aug 07 09:48:02 PM PDT 24 |
24052334124 ps |
| T429 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.2117070730 |
|
|
Aug 07 08:24:25 PM PDT 24 |
Aug 07 08:38:49 PM PDT 24 |
5411465170 ps |
| T317 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3987772086 |
|
|
Aug 07 08:06:24 PM PDT 24 |
Aug 07 08:21:22 PM PDT 24 |
5110027168 ps |
| T215 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.46392967 |
|
|
Aug 07 07:51:52 PM PDT 24 |
Aug 07 08:22:35 PM PDT 24 |
23236508888 ps |
| T778 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.3857605913 |
|
|
Aug 07 08:23:42 PM PDT 24 |
Aug 07 08:31:20 PM PDT 24 |
3416575800 ps |
| T339 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.2504689804 |
|
|
Aug 07 08:10:07 PM PDT 24 |
Aug 07 08:42:30 PM PDT 24 |
8768288592 ps |
| T55 |
/workspace/coverage/default/0.chip_sw_alert_test.845592612 |
|
|
Aug 07 07:53:02 PM PDT 24 |
Aug 07 07:58:34 PM PDT 24 |
2405972664 ps |
| T962 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.3664337599 |
|
|
Aug 07 08:02:28 PM PDT 24 |
Aug 07 09:17:34 PM PDT 24 |
14445169750 ps |
| T835 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.2868578904 |
|
|
Aug 07 08:31:35 PM PDT 24 |
Aug 07 08:42:39 PM PDT 24 |
5191103284 ps |
| T963 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.3240498107 |
|
|
Aug 07 08:08:02 PM PDT 24 |
Aug 07 08:15:18 PM PDT 24 |
3162008312 ps |
| T256 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.3660584664 |
|
|
Aug 07 08:01:14 PM PDT 24 |
Aug 07 08:06:34 PM PDT 24 |
3693050296 ps |
| T816 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.872694246 |
|
|
Aug 07 08:26:42 PM PDT 24 |
Aug 07 08:32:52 PM PDT 24 |
3854427450 ps |
| T964 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3055062137 |
|
|
Aug 07 08:22:24 PM PDT 24 |
Aug 07 08:52:17 PM PDT 24 |
13288883384 ps |
| T965 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.2918343901 |
|
|
Aug 07 08:10:09 PM PDT 24 |
Aug 07 08:32:06 PM PDT 24 |
7834538208 ps |
| T128 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1890169735 |
|
|
Aug 07 07:55:00 PM PDT 24 |
Aug 07 08:04:59 PM PDT 24 |
4287766760 ps |
| T183 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.3345879965 |
|
|
Aug 07 07:54:16 PM PDT 24 |
Aug 07 08:37:34 PM PDT 24 |
35890809660 ps |
| T376 |
/workspace/coverage/default/2.chip_tap_straps_prod.650673402 |
|
|
Aug 07 08:16:08 PM PDT 24 |
Aug 07 08:19:25 PM PDT 24 |
3175596294 ps |
| T966 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.1801748217 |
|
|
Aug 07 07:53:11 PM PDT 24 |
Aug 07 08:37:58 PM PDT 24 |
10012522568 ps |
| T967 |
/workspace/coverage/default/1.chip_sw_entropy_src_ast_rng_req.3435477967 |
|
|
Aug 07 08:03:08 PM PDT 24 |
Aug 07 08:08:16 PM PDT 24 |
3338768480 ps |
| T968 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.3683619164 |
|
|
Aug 07 08:19:54 PM PDT 24 |
Aug 07 08:23:16 PM PDT 24 |
2836371774 ps |
| T969 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.1444162380 |
|
|
Aug 07 08:00:51 PM PDT 24 |
Aug 07 08:13:09 PM PDT 24 |
4251182100 ps |
| T970 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.1618651766 |
|
|
Aug 07 08:18:34 PM PDT 24 |
Aug 07 08:31:15 PM PDT 24 |
9995104828 ps |
| T314 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.3190627785 |
|
|
Aug 07 08:29:59 PM PDT 24 |
Aug 07 08:40:02 PM PDT 24 |
5731675400 ps |
| T223 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.2617009957 |
|
|
Aug 07 08:00:56 PM PDT 24 |
Aug 07 08:54:50 PM PDT 24 |
20797306864 ps |
| T813 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.3422868896 |
|
|
Aug 07 08:28:47 PM PDT 24 |
Aug 07 08:39:31 PM PDT 24 |
5400143722 ps |
| T971 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.21282498 |
|
|
Aug 07 08:11:32 PM PDT 24 |
Aug 07 09:20:55 PM PDT 24 |
16226818104 ps |
| T972 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.3389385222 |
|
|
Aug 07 07:53:03 PM PDT 24 |
Aug 07 08:28:16 PM PDT 24 |
10932595273 ps |
| T728 |
/workspace/coverage/default/1.chip_sw_power_idle_load.149773451 |
|
|
Aug 07 08:05:54 PM PDT 24 |
Aug 07 08:14:02 PM PDT 24 |
4158305300 ps |
| T973 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.4220216129 |
|
|
Aug 07 08:07:18 PM PDT 24 |
Aug 07 08:13:12 PM PDT 24 |
3147970902 ps |
| T775 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.3230922315 |
|
|
Aug 07 08:26:35 PM PDT 24 |
Aug 07 08:39:47 PM PDT 24 |
6172699122 ps |
| T194 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.1752272360 |
|
|
Aug 07 07:51:22 PM PDT 24 |
Aug 07 09:27:55 PM PDT 24 |
44361677740 ps |
| T412 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.3613353016 |
|
|
Aug 07 07:53:26 PM PDT 24 |
Aug 07 08:04:10 PM PDT 24 |
8351513316 ps |
| T822 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.3626350951 |
|
|
Aug 07 08:30:02 PM PDT 24 |
Aug 07 08:38:49 PM PDT 24 |
4005415072 ps |
| T159 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.3383158656 |
|
|
Aug 07 07:53:10 PM PDT 24 |
Aug 07 08:01:28 PM PDT 24 |
4149531886 ps |
| T974 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.2585239067 |
|
|
Aug 07 08:09:09 PM PDT 24 |
Aug 07 08:15:40 PM PDT 24 |
6006420344 ps |
| T186 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.876408488 |
|
|
Aug 07 08:14:34 PM PDT 24 |
Aug 07 08:23:55 PM PDT 24 |
3885078504 ps |
| T975 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.3992184675 |
|
|
Aug 07 08:20:15 PM PDT 24 |
Aug 07 08:31:26 PM PDT 24 |
4402758968 ps |
| T354 |
/workspace/coverage/default/0.chip_sival_flash_info_access.3475296970 |
|
|
Aug 07 07:51:55 PM PDT 24 |
Aug 07 07:57:45 PM PDT 24 |
3787845800 ps |
| T976 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.2513138862 |
|
|
Aug 07 08:00:20 PM PDT 24 |
Aug 07 09:17:52 PM PDT 24 |
17703841374 ps |
| T977 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.2166581056 |
|
|
Aug 07 08:13:24 PM PDT 24 |
Aug 07 08:51:42 PM PDT 24 |
10040061960 ps |
| T978 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.3436392756 |
|
|
Aug 07 08:07:58 PM PDT 24 |
Aug 07 08:11:08 PM PDT 24 |
2591416560 ps |
| T979 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.3285538061 |
|
|
Aug 07 08:05:23 PM PDT 24 |
Aug 07 08:09:17 PM PDT 24 |
2569233900 ps |
| T370 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.3623708854 |
|
|
Aug 07 08:00:51 PM PDT 24 |
Aug 07 08:08:49 PM PDT 24 |
3587047446 ps |
| T980 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.2440997117 |
|
|
Aug 07 07:58:57 PM PDT 24 |
Aug 07 08:05:08 PM PDT 24 |
3579290650 ps |
| T981 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.246190877 |
|
|
Aug 07 08:04:09 PM PDT 24 |
Aug 07 09:51:28 PM PDT 24 |
22549574021 ps |
| T982 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.1275590980 |
|
|
Aug 07 08:16:12 PM PDT 24 |
Aug 07 08:21:22 PM PDT 24 |
3462897358 ps |
| T983 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.944324437 |
|
|
Aug 07 08:16:06 PM PDT 24 |
Aug 07 08:19:43 PM PDT 24 |
2904553848 ps |
| T984 |
/workspace/coverage/default/0.chip_sw_example_rom.3914415446 |
|
|
Aug 07 07:50:17 PM PDT 24 |
Aug 07 07:52:24 PM PDT 24 |
2408973496 ps |
| T985 |
/workspace/coverage/default/0.chip_sw_example_concurrency.344532671 |
|
|
Aug 07 07:50:08 PM PDT 24 |
Aug 07 07:53:20 PM PDT 24 |
2466298906 ps |
| T59 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.3339191875 |
|
|
Aug 07 07:50:44 PM PDT 24 |
Aug 07 07:55:57 PM PDT 24 |
4307555900 ps |
| T986 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3858079295 |
|
|
Aug 07 08:04:33 PM PDT 24 |
Aug 07 08:12:49 PM PDT 24 |
4320478670 ps |
| T355 |
/workspace/coverage/default/0.chip_sw_hmac_enc.3096156176 |
|
|
Aug 07 07:53:51 PM PDT 24 |
Aug 07 07:59:14 PM PDT 24 |
2809072552 ps |
| T987 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1575258929 |
|
|
Aug 07 07:55:40 PM PDT 24 |
Aug 07 08:13:57 PM PDT 24 |
6912497583 ps |
| T988 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.3345941788 |
|
|
Aug 07 08:13:35 PM PDT 24 |
Aug 07 08:29:59 PM PDT 24 |
8661312264 ps |
| T776 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.1845886010 |
|
|
Aug 07 08:29:19 PM PDT 24 |
Aug 07 08:35:39 PM PDT 24 |
3686971134 ps |
| T374 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.4052106120 |
|
|
Aug 07 08:01:10 PM PDT 24 |
Aug 07 09:09:09 PM PDT 24 |
26030988425 ps |
| T989 |
/workspace/coverage/default/2.chip_sw_example_concurrency.239697310 |
|
|
Aug 07 08:11:08 PM PDT 24 |
Aug 07 08:16:28 PM PDT 24 |
2945842500 ps |
| T249 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.2824732216 |
|
|
Aug 07 07:59:12 PM PDT 24 |
Aug 07 08:12:45 PM PDT 24 |
5643862220 ps |
| T990 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.718374846 |
|
|
Aug 07 08:26:28 PM PDT 24 |
Aug 07 08:37:30 PM PDT 24 |
5115337454 ps |
| T135 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.3480969297 |
|
|
Aug 07 07:54:36 PM PDT 24 |
Aug 07 08:03:30 PM PDT 24 |
6277028920 ps |
| T991 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.1002859065 |
|
|
Aug 07 08:29:15 PM PDT 24 |
Aug 07 08:36:52 PM PDT 24 |
3859403024 ps |
| T168 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.2119701574 |
|
|
Aug 07 07:51:43 PM PDT 24 |
Aug 07 08:00:05 PM PDT 24 |
4775363220 ps |
| T992 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.918800647 |
|
|
Aug 07 08:23:16 PM PDT 24 |
Aug 07 08:34:36 PM PDT 24 |
4194617422 ps |
| T157 |
/workspace/coverage/default/2.rom_raw_unlock.2439141028 |
|
|
Aug 07 08:19:27 PM PDT 24 |
Aug 07 08:23:46 PM PDT 24 |
4063797535 ps |
| T993 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.3407227536 |
|
|
Aug 07 07:54:38 PM PDT 24 |
Aug 07 08:38:25 PM PDT 24 |
32562839006 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.113021546 |
|
|
Aug 07 08:17:49 PM PDT 24 |
Aug 07 08:28:40 PM PDT 24 |
7158351240 ps |
| T995 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.1158903004 |
|
|
Aug 07 08:03:33 PM PDT 24 |
Aug 07 08:09:08 PM PDT 24 |
3316131868 ps |
| T257 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.1287049774 |
|
|
Aug 07 08:11:32 PM PDT 24 |
Aug 07 08:15:40 PM PDT 24 |
2666484698 ps |
| T996 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.1436316001 |
|
|
Aug 07 07:59:21 PM PDT 24 |
Aug 07 08:03:34 PM PDT 24 |
2790813846 ps |
| T997 |
/workspace/coverage/default/2.rom_e2e_smoke.303060799 |
|
|
Aug 07 08:23:39 PM PDT 24 |
Aug 07 09:20:22 PM PDT 24 |
15265610000 ps |
| T136 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.751461731 |
|
|
Aug 07 08:15:26 PM PDT 24 |
Aug 07 08:25:51 PM PDT 24 |
5190415416 ps |
| T998 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.3167860164 |
|
|
Aug 07 08:15:40 PM PDT 24 |
Aug 07 08:34:55 PM PDT 24 |
10203817064 ps |
| T44 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.556643338 |
|
|
Aug 07 07:58:31 PM PDT 24 |
Aug 07 08:04:09 PM PDT 24 |
3581264047 ps |
| T999 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.295549499 |
|
|
Aug 07 08:19:59 PM PDT 24 |
Aug 07 08:25:27 PM PDT 24 |
2374340512 ps |
| T121 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.1645005850 |
|
|
Aug 07 08:20:06 PM PDT 24 |
Aug 07 09:28:36 PM PDT 24 |
25516744117 ps |
| T1000 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.1122286521 |
|
|
Aug 07 08:21:13 PM PDT 24 |
Aug 07 08:34:00 PM PDT 24 |
4853081000 ps |
| T830 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.3914027037 |
|
|
Aug 07 08:25:14 PM PDT 24 |
Aug 07 08:34:20 PM PDT 24 |
5851121694 ps |
| T1001 |
/workspace/coverage/default/0.chip_sw_edn_kat.143237040 |
|
|
Aug 07 07:52:25 PM PDT 24 |
Aug 07 08:03:52 PM PDT 24 |
3895504504 ps |
| T204 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.1441095913 |
|
|
Aug 07 07:53:19 PM PDT 24 |
Aug 07 08:02:22 PM PDT 24 |
5687746264 ps |
| T1002 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.4084665569 |
|
|
Aug 07 07:56:33 PM PDT 24 |
Aug 07 07:59:52 PM PDT 24 |
2881098400 ps |
| T781 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.4224826059 |
|
|
Aug 07 08:29:38 PM PDT 24 |
Aug 07 08:37:14 PM PDT 24 |
3919231512 ps |
| T323 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.2555474423 |
|
|
Aug 07 07:52:48 PM PDT 24 |
Aug 07 08:07:20 PM PDT 24 |
4535437600 ps |
| T1003 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.577255106 |
|
|
Aug 07 08:10:34 PM PDT 24 |
Aug 07 09:13:55 PM PDT 24 |
11545897584 ps |
| T1004 |
/workspace/coverage/default/1.chip_sival_flash_info_access.906464329 |
|
|
Aug 07 07:56:47 PM PDT 24 |
Aug 07 08:01:59 PM PDT 24 |
3291201850 ps |
| T1005 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.1586708827 |
|
|
Aug 07 08:14:30 PM PDT 24 |
Aug 07 08:49:22 PM PDT 24 |
8313940914 ps |
| T786 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.367049019 |
|
|
Aug 07 07:56:40 PM PDT 24 |
Aug 07 08:10:57 PM PDT 24 |
8164498416 ps |
| T768 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.3096828338 |
|
|
Aug 07 08:27:31 PM PDT 24 |
Aug 07 08:34:15 PM PDT 24 |
3693632012 ps |
| T804 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.617848859 |
|
|
Aug 07 08:27:40 PM PDT 24 |
Aug 07 08:33:35 PM PDT 24 |
3599997750 ps |
| T1006 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.2615221327 |
|
|
Aug 07 07:53:35 PM PDT 24 |
Aug 07 08:27:39 PM PDT 24 |
8792808818 ps |
| T1007 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.3319760240 |
|
|
Aug 07 08:22:44 PM PDT 24 |
Aug 07 08:41:57 PM PDT 24 |
12166044066 ps |
| T235 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.3681905787 |
|
|
Aug 07 07:53:43 PM PDT 24 |
Aug 07 09:31:09 PM PDT 24 |
51320436504 ps |
| T66 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.2350018929 |
|
|
Aug 07 07:51:58 PM PDT 24 |
Aug 07 07:59:47 PM PDT 24 |
3787214280 ps |
| T280 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.322777891 |
|
|
Aug 07 07:54:04 PM PDT 24 |
Aug 07 08:05:52 PM PDT 24 |
5013281302 ps |
| T1008 |
/workspace/coverage/default/2.chip_sw_aes_entropy.1572044666 |
|
|
Aug 07 08:13:09 PM PDT 24 |
Aug 07 08:16:50 PM PDT 24 |
2409354280 ps |
| T1009 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3835762312 |
|
|
Aug 07 08:27:09 PM PDT 24 |
Aug 07 08:39:39 PM PDT 24 |
5539471400 ps |
| T1010 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.1855199952 |
|
|
Aug 07 07:52:30 PM PDT 24 |
Aug 07 07:59:25 PM PDT 24 |
5520471016 ps |
| T398 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.2205022615 |
|
|
Aug 07 07:53:02 PM PDT 24 |
Aug 07 08:03:51 PM PDT 24 |
3085065316 ps |
| T1011 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.1651592179 |
|
|
Aug 07 08:22:07 PM PDT 24 |
Aug 07 09:04:43 PM PDT 24 |
13322129336 ps |
| T92 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.723632743 |
|
|
Aug 07 08:27:19 PM PDT 24 |
Aug 07 08:32:55 PM PDT 24 |
3726859222 ps |
| T264 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.3413276605 |
|
|
Aug 07 08:02:24 PM PDT 24 |
Aug 07 08:27:43 PM PDT 24 |
12040147648 ps |
| T706 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.3651739321 |
|
|
Aug 07 08:02:53 PM PDT 24 |
Aug 07 08:13:19 PM PDT 24 |
3107291462 ps |
| T1012 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.3593583603 |
|
|
Aug 07 08:04:10 PM PDT 24 |
Aug 07 08:12:49 PM PDT 24 |
4287265020 ps |
| T1013 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.302697486 |
|
|
Aug 07 08:11:30 PM PDT 24 |
Aug 07 08:20:02 PM PDT 24 |
3749533248 ps |
| T1014 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.1409568077 |
|
|
Aug 07 07:54:41 PM PDT 24 |
Aug 07 08:06:32 PM PDT 24 |
4604294680 ps |
| T1015 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.3898482455 |
|
|
Aug 07 08:13:14 PM PDT 24 |
Aug 07 08:22:03 PM PDT 24 |
5160329144 ps |
| T1016 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.1571911505 |
|
|
Aug 07 08:02:57 PM PDT 24 |
Aug 07 08:12:41 PM PDT 24 |
5595605036 ps |
| T556 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.779104074 |
|
|
Aug 07 07:53:07 PM PDT 24 |
Aug 07 08:21:51 PM PDT 24 |
9015984623 ps |
| T147 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.1361469741 |
|
|
Aug 07 08:17:46 PM PDT 24 |
Aug 07 08:21:15 PM PDT 24 |
2963054421 ps |
| T1017 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.1621300646 |
|
|
Aug 07 07:57:49 PM PDT 24 |
Aug 07 08:03:30 PM PDT 24 |
3257182292 ps |
| T175 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.413307091 |
|
|
Aug 07 08:05:58 PM PDT 24 |
Aug 07 08:13:36 PM PDT 24 |
4780432304 ps |
| T769 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.2604629062 |
|
|
Aug 07 08:29:13 PM PDT 24 |
Aug 07 08:41:16 PM PDT 24 |
5596226792 ps |
| T148 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.1984427678 |
|
|
Aug 07 08:01:32 PM PDT 24 |
Aug 07 08:11:53 PM PDT 24 |
8118690225 ps |
| T860 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.1730964378 |
|
|
Aug 07 08:30:43 PM PDT 24 |
Aug 07 08:36:34 PM PDT 24 |
4201358488 ps |
| T1018 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.2469601082 |
|
|
Aug 07 07:54:14 PM PDT 24 |
Aug 07 09:02:40 PM PDT 24 |
18393247263 ps |
| T1019 |
/workspace/coverage/default/1.chip_sw_kmac_idle.544215938 |
|
|
Aug 07 08:04:30 PM PDT 24 |
Aug 07 08:07:43 PM PDT 24 |
2105096926 ps |
| T1020 |
/workspace/coverage/default/1.rom_keymgr_functest.2547767407 |
|
|
Aug 07 08:07:26 PM PDT 24 |
Aug 07 08:19:00 PM PDT 24 |
4770002584 ps |
| T719 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.2101410791 |
|
|
Aug 07 08:18:48 PM PDT 24 |
Aug 07 08:20:59 PM PDT 24 |
3032490272 ps |
| T1021 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.4218956656 |
|
|
Aug 07 08:01:18 PM PDT 24 |
Aug 07 09:06:42 PM PDT 24 |
14210982154 ps |
| T1022 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.2507310579 |
|
|
Aug 07 07:58:06 PM PDT 24 |
Aug 07 08:01:53 PM PDT 24 |
2516447818 ps |
| T1023 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.1832185381 |
|
|
Aug 07 08:19:24 PM PDT 24 |
Aug 07 08:26:29 PM PDT 24 |
3672502056 ps |
| T734 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.217712778 |
|
|
Aug 07 07:51:21 PM PDT 24 |
Aug 07 07:56:13 PM PDT 24 |
3722714610 ps |
| T1024 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.3018069873 |
|
|
Aug 07 08:02:25 PM PDT 24 |
Aug 07 09:11:53 PM PDT 24 |
15086402260 ps |
| T1025 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.338097620 |
|
|
Aug 07 08:00:11 PM PDT 24 |
Aug 07 09:11:21 PM PDT 24 |
15226960365 ps |
| T1026 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.567308311 |
|
|
Aug 07 08:02:45 PM PDT 24 |
Aug 07 08:06:50 PM PDT 24 |
3102930440 ps |
| T190 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.1469082316 |
|
|
Aug 07 08:17:42 PM PDT 24 |
Aug 07 08:22:48 PM PDT 24 |
3002599200 ps |
| T184 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.422882477 |
|
|
Aug 07 07:53:31 PM PDT 24 |
Aug 07 07:57:44 PM PDT 24 |
3053193729 ps |
| T45 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.3530808928 |
|
|
Aug 07 08:17:29 PM PDT 24 |
Aug 07 08:22:53 PM PDT 24 |
3400984183 ps |
| T281 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.4219289247 |
|
|
Aug 07 07:53:35 PM PDT 24 |
Aug 07 08:05:22 PM PDT 24 |
4779741103 ps |
| T402 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.3552169201 |
|
|
Aug 07 08:22:33 PM PDT 24 |
Aug 07 08:39:07 PM PDT 24 |
6124725000 ps |
| T403 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.4145661161 |
|
|
Aug 07 08:24:09 PM PDT 24 |
Aug 07 09:35:06 PM PDT 24 |
14881334904 ps |
| T404 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.3483152662 |
|
|
Aug 07 08:01:43 PM PDT 24 |
Aug 07 08:10:56 PM PDT 24 |
5515890720 ps |
| T40 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1637042303 |
|
|
Aug 07 07:52:28 PM PDT 24 |
Aug 07 07:59:59 PM PDT 24 |
6105834780 ps |
| T405 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.4249230929 |
|
|
Aug 07 08:26:39 PM PDT 24 |
Aug 07 08:33:46 PM PDT 24 |
3305545608 ps |
| T406 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.3552998629 |
|
|
Aug 07 08:24:38 PM PDT 24 |
Aug 07 09:32:52 PM PDT 24 |
14893696280 ps |
| T844 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.2566865471 |
|
|
Aug 07 08:28:33 PM PDT 24 |
Aug 07 08:34:45 PM PDT 24 |
3626066380 ps |
| T1027 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.108573067 |
|
|
Aug 07 07:54:12 PM PDT 24 |
Aug 07 08:03:43 PM PDT 24 |
4096596648 ps |
| T1028 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.77063006 |
|
|
Aug 07 08:15:25 PM PDT 24 |
Aug 07 08:45:27 PM PDT 24 |
6621469368 ps |
| T1029 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.3239121658 |
|
|
Aug 07 08:25:18 PM PDT 24 |
Aug 07 09:43:52 PM PDT 24 |
15087084085 ps |
| T1030 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.2143562826 |
|
|
Aug 07 07:59:44 PM PDT 24 |
Aug 07 08:24:38 PM PDT 24 |
13719025730 ps |
| T855 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.1327546334 |
|
|
Aug 07 08:27:50 PM PDT 24 |
Aug 07 08:33:51 PM PDT 24 |
3365303886 ps |
| T1031 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.1674676410 |
|
|
Aug 07 08:04:23 PM PDT 24 |
Aug 07 08:35:49 PM PDT 24 |
22377068047 ps |
| T1032 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.3643215645 |
|
|
Aug 07 08:22:25 PM PDT 24 |
Aug 07 08:33:00 PM PDT 24 |
3623678000 ps |
| T282 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.2681556171 |
|
|
Aug 07 08:04:39 PM PDT 24 |
Aug 07 08:12:32 PM PDT 24 |
4270529365 ps |
| T833 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.223684572 |
|
|
Aug 07 08:23:24 PM PDT 24 |
Aug 07 08:30:32 PM PDT 24 |
3597106906 ps |
| T1033 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.3838482255 |
|
|
Aug 07 07:53:32 PM PDT 24 |
Aug 07 08:00:35 PM PDT 24 |
3182826168 ps |
| T234 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1355830864 |
|
|
Aug 07 08:03:55 PM PDT 24 |
Aug 07 09:21:15 PM PDT 24 |
17225058072 ps |
| T1034 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.4191875161 |
|
|
Aug 07 07:56:29 PM PDT 24 |
Aug 07 08:07:34 PM PDT 24 |
5608961168 ps |
| T1035 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.1497336679 |
|
|
Aug 07 08:02:38 PM PDT 24 |
Aug 07 09:05:52 PM PDT 24 |
17416587068 ps |
| T236 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.860640021 |
|
|
Aug 07 07:59:19 PM PDT 24 |
Aug 07 09:46:05 PM PDT 24 |
48028687343 ps |
| T1036 |
/workspace/coverage/default/2.chip_sw_kmac_idle.3166707407 |
|
|
Aug 07 08:14:18 PM PDT 24 |
Aug 07 08:17:58 PM PDT 24 |
2644011800 ps |
| T1037 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.3522465003 |
|
|
Aug 07 07:52:52 PM PDT 24 |
Aug 07 07:57:44 PM PDT 24 |
2874857104 ps |
| T846 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.4194646830 |
|
|
Aug 07 08:26:07 PM PDT 24 |
Aug 07 08:34:13 PM PDT 24 |
3728088090 ps |
| T238 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.3224293075 |
|
|
Aug 07 07:51:38 PM PDT 24 |
Aug 07 09:39:43 PM PDT 24 |
46865506778 ps |
| T1038 |
/workspace/coverage/default/1.chip_sw_hmac_oneshot.1760785252 |
|
|
Aug 07 08:05:10 PM PDT 24 |
Aug 07 08:10:57 PM PDT 24 |
2509300640 ps |
| T1039 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.4207265411 |
|
|
Aug 07 08:21:10 PM PDT 24 |
Aug 07 08:35:43 PM PDT 24 |
10840747690 ps |
| T1040 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.395416863 |
|
|
Aug 07 07:52:48 PM PDT 24 |
Aug 07 08:10:01 PM PDT 24 |
5614581390 ps |
| T360 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.593554043 |
|
|
Aug 07 08:22:19 PM PDT 24 |
Aug 07 08:32:43 PM PDT 24 |
5569783524 ps |
| T350 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.2233649331 |
|
|
Aug 07 08:09:53 PM PDT 24 |
Aug 07 08:21:45 PM PDT 24 |
4850975597 ps |
| T78 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.228215823 |
|
|
Aug 07 07:54:05 PM PDT 24 |
Aug 07 08:01:02 PM PDT 24 |
7144967740 ps |
| T1041 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.3075466304 |
|
|
Aug 07 08:11:22 PM PDT 24 |
Aug 07 08:30:54 PM PDT 24 |
6750032160 ps |
| T1042 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.2935666034 |
|
|
Aug 07 08:12:38 PM PDT 24 |
Aug 07 09:18:01 PM PDT 24 |
14331965424 ps |
| T265 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.2062744990 |
|
|
Aug 07 08:12:39 PM PDT 24 |
Aug 07 08:20:36 PM PDT 24 |
5756117560 ps |
| T735 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.1055537910 |
|
|
Aug 07 08:11:11 PM PDT 24 |
Aug 07 08:15:47 PM PDT 24 |
3443031116 ps |
| T1043 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.4178380682 |
|
|
Aug 07 07:58:47 PM PDT 24 |
Aug 07 08:32:50 PM PDT 24 |
26174862133 ps |
| T858 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.1731056149 |
|
|
Aug 07 08:26:03 PM PDT 24 |
Aug 07 08:37:22 PM PDT 24 |
5458372616 ps |
| T361 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.2509462142 |
|
|
Aug 07 08:05:08 PM PDT 24 |
Aug 07 08:09:26 PM PDT 24 |
2893709607 ps |
| T845 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.1193446908 |
|
|
Aug 07 08:30:14 PM PDT 24 |
Aug 07 08:39:12 PM PDT 24 |
4528286496 ps |
| T1044 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.353097318 |
|
|
Aug 07 07:50:56 PM PDT 24 |
Aug 07 07:55:35 PM PDT 24 |
2734264223 ps |
| T240 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.752694967 |
|
|
Aug 07 08:17:43 PM PDT 24 |
Aug 07 08:59:56 PM PDT 24 |
21357422403 ps |
| T803 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.1776654659 |
|
|
Aug 07 08:30:18 PM PDT 24 |
Aug 07 08:41:13 PM PDT 24 |
4504092428 ps |
| T1045 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.2949529185 |
|
|
Aug 07 07:56:16 PM PDT 24 |
Aug 07 08:17:36 PM PDT 24 |
9960156408 ps |
| T859 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.1540389297 |
|
|
Aug 07 08:27:28 PM PDT 24 |
Aug 07 08:34:37 PM PDT 24 |
4230302454 ps |
| T1046 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.1872784926 |
|
|
Aug 07 08:23:10 PM PDT 24 |
Aug 07 08:46:27 PM PDT 24 |
7925796852 ps |
| T1047 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.3858595414 |
|
|
Aug 07 07:53:14 PM PDT 24 |
Aug 07 08:16:04 PM PDT 24 |
5895916380 ps |
| T1048 |
/workspace/coverage/default/2.rom_e2e_static_critical.2253055342 |
|
|
Aug 07 08:24:03 PM PDT 24 |
Aug 07 09:38:37 PM PDT 24 |
16960168542 ps |
| T1049 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.1037220919 |
|
|
Aug 07 08:10:12 PM PDT 24 |
Aug 07 08:31:32 PM PDT 24 |
5966991883 ps |
| T1050 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.2331349307 |
|
|
Aug 07 08:04:10 PM PDT 24 |
Aug 07 08:11:02 PM PDT 24 |
4098516850 ps |
| T780 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.1860516347 |
|
|
Aug 07 08:24:10 PM PDT 24 |
Aug 07 08:31:27 PM PDT 24 |
3490545230 ps |
| T1051 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.1292558707 |
|
|
Aug 07 07:56:41 PM PDT 24 |
Aug 07 08:09:13 PM PDT 24 |
4437878398 ps |
| T1052 |
/workspace/coverage/default/4.chip_tap_straps_prod.2489500636 |
|
|
Aug 07 08:20:50 PM PDT 24 |
Aug 07 08:23:39 PM PDT 24 |
2337147690 ps |
| T1053 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.629409634 |
|
|
Aug 07 08:18:19 PM PDT 24 |
Aug 07 08:22:37 PM PDT 24 |
3493192344 ps |
| T823 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.3257807614 |
|
|
Aug 07 08:27:37 PM PDT 24 |
Aug 07 08:35:33 PM PDT 24 |
3238839400 ps |
| T849 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.2382629860 |
|
|
Aug 07 08:25:23 PM PDT 24 |
Aug 07 08:39:07 PM PDT 24 |
5832946572 ps |
| T720 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.992245429 |
|
|
Aug 07 07:52:27 PM PDT 24 |
Aug 07 07:55:06 PM PDT 24 |
3272084610 ps |
| T315 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.46666717 |
|
|
Aug 07 08:31:41 PM PDT 24 |
Aug 07 08:40:39 PM PDT 24 |
5630845224 ps |
| T1054 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.4084468666 |
|
|
Aug 07 08:21:58 PM PDT 24 |
Aug 07 09:26:30 PM PDT 24 |
14502185154 ps |
| T1055 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3689384426 |
|
|
Aug 07 07:54:49 PM PDT 24 |
Aug 07 08:05:05 PM PDT 24 |
4733659200 ps |
| T1056 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.353569735 |
|
|
Aug 07 07:55:18 PM PDT 24 |
Aug 07 08:00:48 PM PDT 24 |
3146601087 ps |
| T1057 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.732066102 |
|
|
Aug 07 08:10:44 PM PDT 24 |
Aug 07 09:45:14 PM PDT 24 |
49439741748 ps |
| T809 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.3218407096 |
|
|
Aug 07 08:28:05 PM PDT 24 |
Aug 07 08:40:52 PM PDT 24 |
5863204900 ps |
| T335 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.1283668394 |
|
|
Aug 07 07:50:40 PM PDT 24 |
Aug 07 08:03:39 PM PDT 24 |
4630033410 ps |
| T557 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.2586964655 |
|
|
Aug 07 08:00:26 PM PDT 24 |
Aug 07 08:30:11 PM PDT 24 |
12997367787 ps |
| T70 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.4207920842 |
|
|
Aug 07 07:57:14 PM PDT 24 |
Aug 07 08:09:17 PM PDT 24 |
7013476056 ps |
| T1058 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.465268061 |
|
|
Aug 07 07:51:58 PM PDT 24 |
Aug 07 07:55:31 PM PDT 24 |
2690460000 ps |
| T1059 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.3903414062 |
|
|
Aug 07 08:23:43 PM PDT 24 |
Aug 07 08:32:19 PM PDT 24 |
4084260388 ps |
| T106 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.425787795 |
|
|
Aug 07 08:16:44 PM PDT 24 |
Aug 07 08:48:50 PM PDT 24 |
25547750250 ps |
| T1060 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.102226376 |
|
|
Aug 07 07:53:04 PM PDT 24 |
Aug 07 08:07:17 PM PDT 24 |
8439246595 ps |
| T1061 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.1947918433 |
|
|
Aug 07 07:51:52 PM PDT 24 |
Aug 07 08:03:07 PM PDT 24 |
4696206132 ps |
| T817 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.1175685291 |
|
|
Aug 07 08:27:14 PM PDT 24 |
Aug 07 08:41:16 PM PDT 24 |
4032763448 ps |
| T1062 |
/workspace/coverage/default/1.rom_e2e_self_hash.69148574 |
|
|
Aug 07 08:11:32 PM PDT 24 |
Aug 07 09:47:37 PM PDT 24 |
26208562308 ps |
| T1063 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.3526927405 |
|
|
Aug 07 08:03:59 PM PDT 24 |
Aug 07 08:18:43 PM PDT 24 |
7585258362 ps |
| T1064 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.1271907670 |
|
|
Aug 07 08:02:14 PM PDT 24 |
Aug 07 08:07:10 PM PDT 24 |
3563529769 ps |
| T834 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.4068609889 |
|
|
Aug 07 08:26:07 PM PDT 24 |
Aug 07 08:35:12 PM PDT 24 |
4049585836 ps |
| T788 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.2155367222 |
|
|
Aug 07 08:28:50 PM PDT 24 |
Aug 07 08:38:16 PM PDT 24 |
5028622738 ps |
| T1065 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.1545681630 |
|
|
Aug 07 07:54:59 PM PDT 24 |
Aug 07 08:05:04 PM PDT 24 |
5522426488 ps |
| T1066 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.439996500 |
|
|
Aug 07 08:24:00 PM PDT 24 |
Aug 07 08:36:12 PM PDT 24 |
6115464612 ps |
| T1067 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.4043139116 |
|
|
Aug 07 08:05:38 PM PDT 24 |
Aug 07 08:16:14 PM PDT 24 |
5177644720 ps |
| T1068 |
/workspace/coverage/default/2.chip_sw_aes_enc.695035965 |
|
|
Aug 07 08:12:17 PM PDT 24 |
Aug 07 08:17:30 PM PDT 24 |
3155829524 ps |
| T1069 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.768438062 |
|
|
Aug 07 08:14:53 PM PDT 24 |
Aug 07 08:28:07 PM PDT 24 |
7627632860 ps |
| T1070 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.2128393170 |
|
|
Aug 07 07:52:20 PM PDT 24 |
Aug 07 07:58:47 PM PDT 24 |
4874144732 ps |
| T773 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.4136077078 |
|
|
Aug 07 08:28:27 PM PDT 24 |
Aug 07 08:38:17 PM PDT 24 |
5332284000 ps |
| T1071 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.2799889559 |
|
|
Aug 07 08:12:10 PM PDT 24 |
Aug 07 08:21:22 PM PDT 24 |
6724284575 ps |
| T807 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.3784342494 |
|
|
Aug 07 08:24:06 PM PDT 24 |
Aug 07 08:37:40 PM PDT 24 |
4748814960 ps |
| T1072 |
/workspace/coverage/default/2.chip_tap_straps_dev.2429195165 |
|
|
Aug 07 08:17:44 PM PDT 24 |
Aug 07 08:22:12 PM PDT 24 |
3733962853 ps |
| T1073 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.425920879 |
|
|
Aug 07 08:15:28 PM PDT 24 |
Aug 07 08:20:23 PM PDT 24 |
2873909195 ps |
| T721 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.3895912463 |
|
|
Aug 07 07:56:50 PM PDT 24 |
Aug 07 07:58:35 PM PDT 24 |
2576247077 ps |
| T1074 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2906567038 |
|
|
Aug 07 08:01:25 PM PDT 24 |
Aug 07 08:38:54 PM PDT 24 |
18881081079 ps |