| T383 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.3952866681 |
|
|
Aug 15 07:22:50 PM PDT 24 |
Aug 15 07:26:12 PM PDT 24 |
2916939064 ps |
| T214 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.1983262320 |
|
|
Aug 15 07:35:01 PM PDT 24 |
Aug 15 07:45:23 PM PDT 24 |
4252564416 ps |
| T327 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.183038411 |
|
|
Aug 15 07:09:33 PM PDT 24 |
Aug 15 07:21:01 PM PDT 24 |
4332610928 ps |
| T992 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.3226843837 |
|
|
Aug 15 07:11:37 PM PDT 24 |
Aug 15 07:19:22 PM PDT 24 |
5403556000 ps |
| T993 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.3655825449 |
|
|
Aug 15 07:24:57 PM PDT 24 |
Aug 15 07:38:13 PM PDT 24 |
8092756360 ps |
| T12 |
/workspace/coverage/default/1.chip_sw_power_virus.3632697899 |
|
|
Aug 15 07:22:23 PM PDT 24 |
Aug 15 07:47:08 PM PDT 24 |
5439312398 ps |
| T994 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.1564317235 |
|
|
Aug 15 07:12:48 PM PDT 24 |
Aug 15 07:16:42 PM PDT 24 |
2549848162 ps |
| T995 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.334978531 |
|
|
Aug 15 07:14:42 PM PDT 24 |
Aug 15 07:33:20 PM PDT 24 |
10108950832 ps |
| T858 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.3226146695 |
|
|
Aug 15 07:38:27 PM PDT 24 |
Aug 15 07:48:06 PM PDT 24 |
5466169252 ps |
| T272 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.1041683604 |
|
|
Aug 15 07:32:07 PM PDT 24 |
Aug 15 08:26:22 PM PDT 24 |
24425203150 ps |
| T996 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.2208326659 |
|
|
Aug 15 07:27:24 PM PDT 24 |
Aug 15 07:33:35 PM PDT 24 |
3133818022 ps |
| T828 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.3555404310 |
|
|
Aug 15 07:38:29 PM PDT 24 |
Aug 15 07:48:47 PM PDT 24 |
5579323222 ps |
| T997 |
/workspace/coverage/default/0.chip_sw_aes_idle.609817398 |
|
|
Aug 15 07:07:31 PM PDT 24 |
Aug 15 07:13:45 PM PDT 24 |
2619373480 ps |
| T998 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.1228930051 |
|
|
Aug 15 07:17:25 PM PDT 24 |
Aug 15 07:21:23 PM PDT 24 |
3181903375 ps |
| T9 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.3837566601 |
|
|
Aug 15 07:09:45 PM PDT 24 |
Aug 15 07:16:25 PM PDT 24 |
3011914747 ps |
| T359 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.1518853817 |
|
|
Aug 15 07:21:32 PM PDT 24 |
Aug 15 07:42:31 PM PDT 24 |
11287356903 ps |
| T212 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.2227205939 |
|
|
Aug 15 07:23:24 PM PDT 24 |
Aug 15 07:56:42 PM PDT 24 |
7657116950 ps |
| T999 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.3917838917 |
|
|
Aug 15 07:08:19 PM PDT 24 |
Aug 15 07:38:33 PM PDT 24 |
7335067128 ps |
| T747 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.2817755357 |
|
|
Aug 15 07:20:07 PM PDT 24 |
Aug 15 07:21:51 PM PDT 24 |
1744028635 ps |
| T247 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.2733623696 |
|
|
Aug 15 07:16:15 PM PDT 24 |
Aug 15 07:26:03 PM PDT 24 |
6075070663 ps |
| T273 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.2711244489 |
|
|
Aug 15 07:15:24 PM PDT 24 |
Aug 15 08:19:04 PM PDT 24 |
14608990002 ps |
| T1000 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.2639213074 |
|
|
Aug 15 07:14:59 PM PDT 24 |
Aug 15 07:32:29 PM PDT 24 |
11203976040 ps |
| T1001 |
/workspace/coverage/default/1.chip_sw_example_concurrency.2955188812 |
|
|
Aug 15 07:09:06 PM PDT 24 |
Aug 15 07:14:11 PM PDT 24 |
3406763812 ps |
| T22 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.3239422149 |
|
|
Aug 15 07:14:07 PM PDT 24 |
Aug 15 08:04:09 PM PDT 24 |
20942556550 ps |
| T187 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.872765068 |
|
|
Aug 15 07:14:14 PM PDT 24 |
Aug 15 07:29:21 PM PDT 24 |
8068897124 ps |
| T366 |
/workspace/coverage/default/4.chip_tap_straps_prod.346367988 |
|
|
Aug 15 07:29:17 PM PDT 24 |
Aug 15 07:31:54 PM PDT 24 |
2447213738 ps |
| T231 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.1644614968 |
|
|
Aug 15 07:06:06 PM PDT 24 |
Aug 15 08:38:05 PM PDT 24 |
50156200220 ps |
| T85 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.2692115861 |
|
|
Aug 15 07:35:32 PM PDT 24 |
Aug 15 07:42:11 PM PDT 24 |
3945098650 ps |
| T1002 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.3183032847 |
|
|
Aug 15 07:16:00 PM PDT 24 |
Aug 15 08:12:48 PM PDT 24 |
18778770605 ps |
| T397 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.2094251491 |
|
|
Aug 15 07:23:16 PM PDT 24 |
Aug 15 07:30:52 PM PDT 24 |
9957905967 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.1859823273 |
|
|
Aug 15 07:06:39 PM PDT 24 |
Aug 15 07:15:31 PM PDT 24 |
4571834744 ps |
| T1004 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.2988876084 |
|
|
Aug 15 07:31:23 PM PDT 24 |
Aug 15 07:47:21 PM PDT 24 |
5910682670 ps |
| T1005 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.744142838 |
|
|
Aug 15 07:11:58 PM PDT 24 |
Aug 15 07:18:19 PM PDT 24 |
4028895292 ps |
| T793 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.4014194315 |
|
|
Aug 15 07:39:13 PM PDT 24 |
Aug 15 07:47:08 PM PDT 24 |
4432162534 ps |
| T1006 |
/workspace/coverage/default/0.chip_sw_example_concurrency.487934431 |
|
|
Aug 15 07:03:43 PM PDT 24 |
Aug 15 07:07:10 PM PDT 24 |
2926602726 ps |
| T1007 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.1916236230 |
|
|
Aug 15 07:11:00 PM PDT 24 |
Aug 15 08:08:33 PM PDT 24 |
15377543464 ps |
| T1008 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.2258126184 |
|
|
Aug 15 07:18:35 PM PDT 24 |
Aug 15 07:22:48 PM PDT 24 |
2698160494 ps |
| T334 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.793405155 |
|
|
Aug 15 07:03:46 PM PDT 24 |
Aug 15 07:12:19 PM PDT 24 |
4083515168 ps |
| T1009 |
/workspace/coverage/default/1.rom_e2e_static_critical.1833631549 |
|
|
Aug 15 07:21:59 PM PDT 24 |
Aug 15 08:33:33 PM PDT 24 |
16816590504 ps |
| T62 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.1384476141 |
|
|
Aug 15 07:25:46 PM PDT 24 |
Aug 15 07:50:58 PM PDT 24 |
25028339048 ps |
| T863 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.1413517932 |
|
|
Aug 15 07:39:56 PM PDT 24 |
Aug 15 07:49:36 PM PDT 24 |
4335914570 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.2422042535 |
|
|
Aug 15 07:24:04 PM PDT 24 |
Aug 15 07:32:20 PM PDT 24 |
4695698840 ps |
| T1011 |
/workspace/coverage/default/2.chip_sw_example_rom.2262126792 |
|
|
Aug 15 07:19:04 PM PDT 24 |
Aug 15 07:20:59 PM PDT 24 |
1972815394 ps |
| T736 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.904557537 |
|
|
Aug 15 07:37:12 PM PDT 24 |
Aug 15 07:44:41 PM PDT 24 |
5702005606 ps |
| T1012 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.4205652672 |
|
|
Aug 15 07:19:08 PM PDT 24 |
Aug 15 07:27:58 PM PDT 24 |
3126782600 ps |
| T1013 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.260377322 |
|
|
Aug 15 07:11:24 PM PDT 24 |
Aug 15 07:33:46 PM PDT 24 |
6698144024 ps |
| T1014 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.2678442425 |
|
|
Aug 15 07:21:25 PM PDT 24 |
Aug 15 08:17:31 PM PDT 24 |
15657435501 ps |
| T802 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.58893641 |
|
|
Aug 15 07:40:30 PM PDT 24 |
Aug 15 07:51:28 PM PDT 24 |
4463875816 ps |
| T184 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.2330939424 |
|
|
Aug 15 07:09:12 PM PDT 24 |
Aug 15 07:24:13 PM PDT 24 |
8323543770 ps |
| T1015 |
/workspace/coverage/default/1.chip_sw_example_rom.4158254654 |
|
|
Aug 15 07:07:18 PM PDT 24 |
Aug 15 07:09:20 PM PDT 24 |
2061269660 ps |
| T13 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.841167552 |
|
|
Aug 15 07:10:35 PM PDT 24 |
Aug 15 07:18:32 PM PDT 24 |
4624064758 ps |
| T360 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.554281541 |
|
|
Aug 15 07:06:54 PM PDT 24 |
Aug 15 07:30:39 PM PDT 24 |
12299370031 ps |
| T162 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.2098909227 |
|
|
Aug 15 07:35:57 PM PDT 24 |
Aug 15 07:42:33 PM PDT 24 |
3703375304 ps |
| T1016 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.4040561208 |
|
|
Aug 15 07:21:49 PM PDT 24 |
Aug 15 07:25:23 PM PDT 24 |
2319391160 ps |
| T1017 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.3413428504 |
|
|
Aug 15 07:08:21 PM PDT 24 |
Aug 15 07:34:50 PM PDT 24 |
12376609368 ps |
| T1018 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.1869005534 |
|
|
Aug 15 07:13:08 PM PDT 24 |
Aug 15 07:30:51 PM PDT 24 |
6207138944 ps |
| T361 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.4192091002 |
|
|
Aug 15 07:07:15 PM PDT 24 |
Aug 15 07:58:15 PM PDT 24 |
27444702656 ps |
| T344 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.2803038212 |
|
|
Aug 15 07:04:57 PM PDT 24 |
Aug 15 07:14:28 PM PDT 24 |
3745363712 ps |
| T23 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.802169239 |
|
|
Aug 15 07:23:57 PM PDT 24 |
Aug 15 08:20:22 PM PDT 24 |
19989875970 ps |
| T14 |
/workspace/coverage/default/2.chip_sw_power_virus.1102813015 |
|
|
Aug 15 07:31:05 PM PDT 24 |
Aug 15 07:51:41 PM PDT 24 |
5562511070 ps |
| T205 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.951321806 |
|
|
Aug 15 07:20:36 PM PDT 24 |
Aug 15 11:12:29 PM PDT 24 |
78430126950 ps |
| T1019 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.2029064802 |
|
|
Aug 15 07:08:57 PM PDT 24 |
Aug 15 07:17:34 PM PDT 24 |
4809713750 ps |
| T1020 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.3815153151 |
|
|
Aug 15 07:04:43 PM PDT 24 |
Aug 15 07:08:28 PM PDT 24 |
2564956392 ps |
| T319 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.1131892966 |
|
|
Aug 15 07:20:25 PM PDT 24 |
Aug 15 07:34:49 PM PDT 24 |
4445745364 ps |
| T1021 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.3548198246 |
|
|
Aug 15 07:13:33 PM PDT 24 |
Aug 15 07:24:00 PM PDT 24 |
5184182472 ps |
| T345 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.1018953377 |
|
|
Aug 15 07:20:02 PM PDT 24 |
Aug 15 07:32:39 PM PDT 24 |
4659019315 ps |
| T1022 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.102717096 |
|
|
Aug 15 07:29:13 PM PDT 24 |
Aug 15 09:03:06 PM PDT 24 |
25288914960 ps |
| T237 |
/workspace/coverage/default/1.chip_sw_flash_init.3475454389 |
|
|
Aug 15 07:08:23 PM PDT 24 |
Aug 15 07:37:09 PM PDT 24 |
19436552366 ps |
| T1023 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.2791861322 |
|
|
Aug 15 07:10:21 PM PDT 24 |
Aug 15 07:13:45 PM PDT 24 |
2741974376 ps |
| T413 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.3080812279 |
|
|
Aug 15 07:11:52 PM PDT 24 |
Aug 15 07:38:12 PM PDT 24 |
7930677940 ps |
| T362 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.1865940500 |
|
|
Aug 15 07:09:50 PM PDT 24 |
Aug 15 07:15:34 PM PDT 24 |
3304153710 ps |
| T786 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.1677748067 |
|
|
Aug 15 07:37:36 PM PDT 24 |
Aug 15 07:43:11 PM PDT 24 |
3733726700 ps |
| T1024 |
/workspace/coverage/default/2.chip_sw_kmac_idle.1612298787 |
|
|
Aug 15 07:23:35 PM PDT 24 |
Aug 15 07:27:52 PM PDT 24 |
3098134182 ps |
| T846 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.1077266231 |
|
|
Aug 15 07:36:30 PM PDT 24 |
Aug 15 07:45:19 PM PDT 24 |
6126502500 ps |
| T43 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.1618240552 |
|
|
Aug 15 07:10:40 PM PDT 24 |
Aug 15 07:23:52 PM PDT 24 |
6293055409 ps |
| T335 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.2279485348 |
|
|
Aug 15 07:36:38 PM PDT 24 |
Aug 15 07:43:32 PM PDT 24 |
3951939360 ps |
| T1025 |
/workspace/coverage/default/0.chip_sw_coremark.1166087355 |
|
|
Aug 15 07:11:24 PM PDT 24 |
Aug 15 11:23:45 PM PDT 24 |
71513622810 ps |
| T157 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.44176960 |
|
|
Aug 15 07:13:12 PM PDT 24 |
Aug 15 07:23:26 PM PDT 24 |
3870184070 ps |
| T188 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.1389192067 |
|
|
Aug 15 07:19:03 PM PDT 24 |
Aug 15 07:22:50 PM PDT 24 |
2427397792 ps |
| T1026 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2229069905 |
|
|
Aug 15 07:08:04 PM PDT 24 |
Aug 15 07:26:02 PM PDT 24 |
7132380742 ps |
| T86 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.111634865 |
|
|
Aug 15 07:04:35 PM PDT 24 |
Aug 15 09:59:12 PM PDT 24 |
255910792760 ps |
| T800 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.989709480 |
|
|
Aug 15 07:34:07 PM PDT 24 |
Aug 15 07:43:55 PM PDT 24 |
5360510892 ps |
| T1027 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.962325432 |
|
|
Aug 15 07:25:05 PM PDT 24 |
Aug 15 07:39:01 PM PDT 24 |
4992940038 ps |
| T1028 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.3999450547 |
|
|
Aug 15 07:23:26 PM PDT 24 |
Aug 15 07:48:22 PM PDT 24 |
6783013840 ps |
| T1029 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.1490681112 |
|
|
Aug 15 07:31:59 PM PDT 24 |
Aug 15 07:53:51 PM PDT 24 |
7987290872 ps |
| T348 |
/workspace/coverage/default/0.chip_sw_pattgen_ios.4148564718 |
|
|
Aug 15 07:04:31 PM PDT 24 |
Aug 15 07:08:38 PM PDT 24 |
2761429962 ps |
| T815 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.121908324 |
|
|
Aug 15 07:36:39 PM PDT 24 |
Aug 15 07:42:22 PM PDT 24 |
3287779020 ps |
| T340 |
/workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.2321678415 |
|
|
Aug 15 07:15:46 PM PDT 24 |
Aug 15 07:23:20 PM PDT 24 |
4123350160 ps |
| T1030 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.3626715954 |
|
|
Aug 15 07:27:38 PM PDT 24 |
Aug 15 07:34:36 PM PDT 24 |
3341296088 ps |
| T1031 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.514752593 |
|
|
Aug 15 07:08:10 PM PDT 24 |
Aug 15 07:12:41 PM PDT 24 |
5949105032 ps |
| T262 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.802616712 |
|
|
Aug 15 07:39:33 PM PDT 24 |
Aug 15 07:48:03 PM PDT 24 |
5986683190 ps |
| T744 |
/workspace/coverage/default/2.chip_tap_straps_dev.3764819047 |
|
|
Aug 15 07:26:46 PM PDT 24 |
Aug 15 07:44:27 PM PDT 24 |
9128427364 ps |
| T181 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.3329396994 |
|
|
Aug 15 07:29:35 PM PDT 24 |
Aug 15 07:41:28 PM PDT 24 |
9751607508 ps |
| T1032 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.2496839025 |
|
|
Aug 15 07:29:39 PM PDT 24 |
Aug 15 07:39:45 PM PDT 24 |
6382292539 ps |
| T805 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.2213833557 |
|
|
Aug 15 07:38:41 PM PDT 24 |
Aug 15 07:46:15 PM PDT 24 |
4177757364 ps |
| T1033 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.2550194823 |
|
|
Aug 15 07:17:53 PM PDT 24 |
Aug 15 08:10:45 PM PDT 24 |
11433885012 ps |
| T833 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.2015762082 |
|
|
Aug 15 07:33:08 PM PDT 24 |
Aug 15 07:39:04 PM PDT 24 |
3903995860 ps |
| T1034 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.1600164496 |
|
|
Aug 15 07:29:09 PM PDT 24 |
Aug 15 07:33:20 PM PDT 24 |
3018534396 ps |
| T134 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2924028138 |
|
|
Aug 15 07:13:47 PM PDT 24 |
Aug 15 07:21:43 PM PDT 24 |
5192795740 ps |
| T179 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.2082226008 |
|
|
Aug 15 07:04:42 PM PDT 24 |
Aug 15 07:06:49 PM PDT 24 |
3168019315 ps |
| T795 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.2293329175 |
|
|
Aug 15 07:35:03 PM PDT 24 |
Aug 15 07:43:59 PM PDT 24 |
4485470476 ps |
| T258 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.2896764739 |
|
|
Aug 15 07:09:57 PM PDT 24 |
Aug 15 07:43:25 PM PDT 24 |
24978362699 ps |
| T206 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.3105516681 |
|
|
Aug 15 07:11:15 PM PDT 24 |
Aug 15 10:22:38 PM PDT 24 |
58472560554 ps |
| T363 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.4232219440 |
|
|
Aug 15 07:07:11 PM PDT 24 |
Aug 15 07:13:10 PM PDT 24 |
3248727160 ps |
| T249 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.1642064016 |
|
|
Aug 15 07:37:55 PM PDT 24 |
Aug 15 07:45:48 PM PDT 24 |
4960376002 ps |
| T1035 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.65095199 |
|
|
Aug 15 07:05:34 PM PDT 24 |
Aug 15 07:41:13 PM PDT 24 |
8603817560 ps |
| T1036 |
/workspace/coverage/default/2.chip_sw_otbn_randomness.1591174264 |
|
|
Aug 15 07:22:17 PM PDT 24 |
Aug 15 07:37:03 PM PDT 24 |
6141117000 ps |
| T794 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.2282309166 |
|
|
Aug 15 07:36:51 PM PDT 24 |
Aug 15 07:42:33 PM PDT 24 |
3392717890 ps |
| T748 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.2338319940 |
|
|
Aug 15 07:12:50 PM PDT 24 |
Aug 15 07:14:53 PM PDT 24 |
2483393931 ps |
| T1037 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.1694912047 |
|
|
Aug 15 07:16:55 PM PDT 24 |
Aug 15 07:20:23 PM PDT 24 |
2932882864 ps |
| T1038 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.3825629921 |
|
|
Aug 15 07:13:58 PM PDT 24 |
Aug 15 07:57:58 PM PDT 24 |
32377718504 ps |
| T1039 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1617149961 |
|
|
Aug 15 07:12:06 PM PDT 24 |
Aug 15 07:38:13 PM PDT 24 |
11934687468 ps |
| T41 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.4054736462 |
|
|
Aug 15 07:32:50 PM PDT 24 |
Aug 15 07:38:43 PM PDT 24 |
3206934236 ps |
| T280 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.4191876483 |
|
|
Aug 15 07:09:01 PM PDT 24 |
Aug 15 07:17:52 PM PDT 24 |
3793559964 ps |
| T281 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.1437858334 |
|
|
Aug 15 07:28:46 PM PDT 24 |
Aug 15 07:38:59 PM PDT 24 |
5423163536 ps |
| T803 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.1508143610 |
|
|
Aug 15 07:32:31 PM PDT 24 |
Aug 15 07:38:03 PM PDT 24 |
3651081032 ps |
| T1040 |
/workspace/coverage/default/2.rom_e2e_self_hash.319204908 |
|
|
Aug 15 07:32:53 PM PDT 24 |
Aug 15 09:07:39 PM PDT 24 |
26933236936 ps |
| T1041 |
/workspace/coverage/default/0.chip_sw_edn_kat.1323632504 |
|
|
Aug 15 07:06:07 PM PDT 24 |
Aug 15 07:14:32 PM PDT 24 |
3207533080 ps |
| T864 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.288462982 |
|
|
Aug 15 07:20:42 PM PDT 24 |
Aug 15 07:35:05 PM PDT 24 |
5392335980 ps |
| T1042 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.19310293 |
|
|
Aug 15 07:10:51 PM PDT 24 |
Aug 15 07:14:07 PM PDT 24 |
2226632200 ps |
| T1043 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.1792739003 |
|
|
Aug 15 07:05:29 PM PDT 24 |
Aug 15 07:29:42 PM PDT 24 |
7283175400 ps |
| T1044 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.4121583934 |
|
|
Aug 15 07:24:43 PM PDT 24 |
Aug 15 07:32:56 PM PDT 24 |
5640123526 ps |
| T790 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.1440978205 |
|
|
Aug 15 07:34:39 PM PDT 24 |
Aug 15 07:43:29 PM PDT 24 |
5572973000 ps |
| T371 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.119049334 |
|
|
Aug 15 07:25:56 PM PDT 24 |
Aug 15 07:35:36 PM PDT 24 |
6069416956 ps |
| T1045 |
/workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.2323554077 |
|
|
Aug 15 07:06:27 PM PDT 24 |
Aug 15 07:26:45 PM PDT 24 |
9035730220 ps |
| T1046 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.2017840840 |
|
|
Aug 15 07:14:47 PM PDT 24 |
Aug 15 08:07:02 PM PDT 24 |
14117703024 ps |
| T850 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.3048255071 |
|
|
Aug 15 07:37:54 PM PDT 24 |
Aug 15 07:44:31 PM PDT 24 |
4348714750 ps |
| T1047 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.700610105 |
|
|
Aug 15 07:10:34 PM PDT 24 |
Aug 15 07:21:30 PM PDT 24 |
4703565480 ps |
| T862 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.3395179651 |
|
|
Aug 15 07:32:38 PM PDT 24 |
Aug 15 07:41:17 PM PDT 24 |
3864411584 ps |
| T1048 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.3814028775 |
|
|
Aug 15 07:26:13 PM PDT 24 |
Aug 15 07:36:28 PM PDT 24 |
5525748444 ps |
| T1049 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.2649852159 |
|
|
Aug 15 07:12:47 PM PDT 24 |
Aug 15 08:17:51 PM PDT 24 |
15361808428 ps |
| T58 |
/workspace/coverage/default/1.chip_jtag_csr_rw.3662804781 |
|
|
Aug 15 07:07:47 PM PDT 24 |
Aug 15 07:34:56 PM PDT 24 |
14513651995 ps |
| T180 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.425472843 |
|
|
Aug 15 07:07:12 PM PDT 24 |
Aug 15 07:11:00 PM PDT 24 |
3759171706 ps |
| T28 |
/workspace/coverage/default/1.chip_sw_gpio.751073732 |
|
|
Aug 15 07:10:11 PM PDT 24 |
Aug 15 07:18:23 PM PDT 24 |
4210880224 ps |
| T1050 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.197430015 |
|
|
Aug 15 07:08:14 PM PDT 24 |
Aug 15 07:12:47 PM PDT 24 |
2493504872 ps |
| T1051 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.3279410440 |
|
|
Aug 15 07:24:27 PM PDT 24 |
Aug 15 07:29:38 PM PDT 24 |
3074822167 ps |
| T355 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.2514555783 |
|
|
Aug 15 07:06:50 PM PDT 24 |
Aug 15 07:12:39 PM PDT 24 |
3502231402 ps |
| T306 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.3783459072 |
|
|
Aug 15 07:36:43 PM PDT 24 |
Aug 15 07:46:45 PM PDT 24 |
4706025832 ps |
| T228 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.3276287230 |
|
|
Aug 15 07:14:10 PM PDT 24 |
Aug 15 07:56:59 PM PDT 24 |
10452697760 ps |
| T1052 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.9365838 |
|
|
Aug 15 07:07:21 PM PDT 24 |
Aug 15 07:20:09 PM PDT 24 |
5319401592 ps |
| T64 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.3185614342 |
|
|
Aug 15 07:11:19 PM PDT 24 |
Aug 15 07:19:05 PM PDT 24 |
5142498480 ps |
| T1053 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.2580512189 |
|
|
Aug 15 07:26:07 PM PDT 24 |
Aug 15 07:33:43 PM PDT 24 |
5602289104 ps |
| T855 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.2472384172 |
|
|
Aug 15 07:33:51 PM PDT 24 |
Aug 15 07:43:12 PM PDT 24 |
5425329480 ps |
| T1054 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.3068150947 |
|
|
Aug 15 07:17:10 PM PDT 24 |
Aug 15 07:26:39 PM PDT 24 |
6180772040 ps |
| T24 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.1330268511 |
|
|
Aug 15 07:06:28 PM PDT 24 |
Aug 15 07:12:41 PM PDT 24 |
3343971640 ps |
| T723 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.3163343780 |
|
|
Aug 15 07:37:33 PM PDT 24 |
Aug 15 07:43:54 PM PDT 24 |
4195405876 ps |
| T856 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.1664207654 |
|
|
Aug 15 07:33:12 PM PDT 24 |
Aug 15 07:39:30 PM PDT 24 |
4126749080 ps |
| T10 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.2149420713 |
|
|
Aug 15 07:20:15 PM PDT 24 |
Aug 15 07:25:19 PM PDT 24 |
3181725095 ps |
| T1055 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.1176008625 |
|
|
Aug 15 07:26:08 PM PDT 24 |
Aug 15 07:30:29 PM PDT 24 |
2842819405 ps |
| T836 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.4174232044 |
|
|
Aug 15 07:31:56 PM PDT 24 |
Aug 15 07:39:40 PM PDT 24 |
3543132324 ps |
| T1056 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.3759029328 |
|
|
Aug 15 07:18:49 PM PDT 24 |
Aug 15 07:23:00 PM PDT 24 |
3218500317 ps |
| T1057 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.3878192547 |
|
|
Aug 15 07:15:24 PM PDT 24 |
Aug 15 08:26:10 PM PDT 24 |
14998013389 ps |
| T1058 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.1272791001 |
|
|
Aug 15 07:24:38 PM PDT 24 |
Aug 15 07:48:26 PM PDT 24 |
7963926956 ps |
| T251 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.1515175226 |
|
|
Aug 15 07:25:35 PM PDT 24 |
Aug 15 07:30:55 PM PDT 24 |
3177961116 ps |
| T1059 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.205654996 |
|
|
Aug 15 07:16:49 PM PDT 24 |
Aug 15 07:24:24 PM PDT 24 |
4460270510 ps |
| T770 |
/workspace/coverage/default/1.chip_sw_power_idle_load.1547265590 |
|
|
Aug 15 07:18:25 PM PDT 24 |
Aug 15 07:27:16 PM PDT 24 |
4570042936 ps |
| T1060 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.1527379693 |
|
|
Aug 15 07:09:50 PM PDT 24 |
Aug 15 07:14:12 PM PDT 24 |
2914705074 ps |
| T1061 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.392017971 |
|
|
Aug 15 07:04:17 PM PDT 24 |
Aug 15 07:13:55 PM PDT 24 |
3710224302 ps |
| T164 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.2270233926 |
|
|
Aug 15 07:08:21 PM PDT 24 |
Aug 15 07:11:21 PM PDT 24 |
2846835968 ps |
| T1062 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.298732355 |
|
|
Aug 15 07:29:35 PM PDT 24 |
Aug 15 07:40:19 PM PDT 24 |
4337782094 ps |
| T1063 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.1974304230 |
|
|
Aug 15 07:23:53 PM PDT 24 |
Aug 15 07:29:56 PM PDT 24 |
2355628828 ps |
| T876 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.1488636761 |
|
|
Aug 15 07:30:34 PM PDT 24 |
Aug 15 07:43:06 PM PDT 24 |
5849943090 ps |
| T223 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.1020444652 |
|
|
Aug 15 07:23:26 PM PDT 24 |
Aug 15 07:40:22 PM PDT 24 |
7038528508 ps |
| T321 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.267303986 |
|
|
Aug 15 07:13:34 PM PDT 24 |
Aug 15 07:43:49 PM PDT 24 |
11178640158 ps |
| T772 |
/workspace/coverage/default/1.rom_raw_unlock.3933356807 |
|
|
Aug 15 07:18:57 PM PDT 24 |
Aug 15 07:22:53 PM PDT 24 |
4347653404 ps |
| T29 |
/workspace/coverage/default/2.chip_sw_gpio.1005389470 |
|
|
Aug 15 07:21:10 PM PDT 24 |
Aug 15 07:28:51 PM PDT 24 |
3855297015 ps |
| T822 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.2459038109 |
|
|
Aug 15 07:39:25 PM PDT 24 |
Aug 15 07:50:15 PM PDT 24 |
4933537352 ps |
| T1064 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.2378472366 |
|
|
Aug 15 07:14:29 PM PDT 24 |
Aug 15 07:19:10 PM PDT 24 |
2364316979 ps |
| T1065 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.959684737 |
|
|
Aug 15 07:17:38 PM PDT 24 |
Aug 15 07:25:19 PM PDT 24 |
3258719122 ps |
| T1066 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.1926741874 |
|
|
Aug 15 07:25:07 PM PDT 24 |
Aug 15 07:30:15 PM PDT 24 |
2817449192 ps |
| T190 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.724427300 |
|
|
Aug 15 07:18:39 PM PDT 24 |
Aug 15 08:48:18 PM PDT 24 |
42936996940 ps |
| T259 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1886937094 |
|
|
Aug 15 07:25:36 PM PDT 24 |
Aug 15 07:38:37 PM PDT 24 |
4803324616 ps |
| T236 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.3640412316 |
|
|
Aug 15 07:21:54 PM PDT 24 |
Aug 15 08:47:25 PM PDT 24 |
47098349013 ps |
| T808 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.2934860372 |
|
|
Aug 15 07:36:56 PM PDT 24 |
Aug 15 07:48:39 PM PDT 24 |
4990752488 ps |
| T1067 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.386103568 |
|
|
Aug 15 07:31:03 PM PDT 24 |
Aug 15 08:29:47 PM PDT 24 |
15365634860 ps |
| T199 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.1831504599 |
|
|
Aug 15 07:31:54 PM PDT 24 |
Aug 15 07:40:12 PM PDT 24 |
4850504277 ps |
| T823 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.2933884959 |
|
|
Aug 15 07:37:48 PM PDT 24 |
Aug 15 07:45:54 PM PDT 24 |
3275306440 ps |
| T1068 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.136869561 |
|
|
Aug 15 07:25:49 PM PDT 24 |
Aug 15 07:29:46 PM PDT 24 |
2602619305 ps |
| T1069 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.4109919987 |
|
|
Aug 15 07:07:37 PM PDT 24 |
Aug 15 08:07:24 PM PDT 24 |
17305468888 ps |
| T171 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.1781500923 |
|
|
Aug 15 07:38:01 PM PDT 24 |
Aug 15 07:49:15 PM PDT 24 |
5101592652 ps |
| T1070 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.2275720713 |
|
|
Aug 15 07:23:19 PM PDT 24 |
Aug 15 08:31:10 PM PDT 24 |
14379582796 ps |
| T1071 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1047988959 |
|
|
Aug 15 07:19:46 PM PDT 24 |
Aug 15 07:30:41 PM PDT 24 |
4581177850 ps |
| T398 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.118107078 |
|
|
Aug 15 07:07:42 PM PDT 24 |
Aug 15 07:12:39 PM PDT 24 |
3265527788 ps |
| T1072 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.2436204071 |
|
|
Aug 15 07:14:10 PM PDT 24 |
Aug 15 07:44:47 PM PDT 24 |
6986327942 ps |
| T1073 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.1181322789 |
|
|
Aug 15 07:05:32 PM PDT 24 |
Aug 15 07:13:19 PM PDT 24 |
6462696854 ps |
| T1074 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.1029537130 |
|
|
Aug 15 07:12:34 PM PDT 24 |
Aug 15 07:16:36 PM PDT 24 |
3088991222 ps |
| T1075 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.999615612 |
|
|
Aug 15 07:12:17 PM PDT 24 |
Aug 15 08:20:11 PM PDT 24 |
15191855944 ps |
| T36 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.3172674027 |
|
|
Aug 15 07:08:14 PM PDT 24 |
Aug 15 07:13:46 PM PDT 24 |
3416118718 ps |
| T1076 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.3466379947 |
|
|
Aug 15 07:30:39 PM PDT 24 |
Aug 15 07:40:52 PM PDT 24 |
5325165338 ps |
| T797 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.2190878681 |
|
|
Aug 15 07:09:20 PM PDT 24 |
Aug 15 07:19:21 PM PDT 24 |
5664083190 ps |
| T1077 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.1483789821 |
|
|
Aug 15 07:11:23 PM PDT 24 |
Aug 15 07:19:54 PM PDT 24 |
4340588250 ps |
| T1078 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1184362579 |
|
|
Aug 15 07:08:36 PM PDT 24 |
Aug 15 07:27:36 PM PDT 24 |
8323847782 ps |
| T1079 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.1129281444 |
|
|
Aug 15 07:32:23 PM PDT 24 |
Aug 15 09:02:08 PM PDT 24 |
28103562720 ps |
| T1080 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.1350474850 |
|
|
Aug 15 07:10:00 PM PDT 24 |
Aug 15 07:16:54 PM PDT 24 |
5057925652 ps |
| T1081 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.1709088496 |
|
|
Aug 15 07:10:35 PM PDT 24 |
Aug 15 07:14:34 PM PDT 24 |
2308566340 ps |
| T868 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.3288059589 |
|
|
Aug 15 07:38:15 PM PDT 24 |
Aug 15 07:47:07 PM PDT 24 |
5044609736 ps |
| T1082 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.390036268 |
|
|
Aug 15 07:10:47 PM PDT 24 |
Aug 15 07:23:14 PM PDT 24 |
4462864646 ps |
| T75 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.3500313737 |
|
|
Aug 15 07:06:41 PM PDT 24 |
Aug 15 07:11:41 PM PDT 24 |
2766933496 ps |
| T338 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.2748314760 |
|
|
Aug 15 07:06:28 PM PDT 24 |
Aug 15 07:14:15 PM PDT 24 |
3549760706 ps |
| T824 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.3666923042 |
|
|
Aug 15 07:37:17 PM PDT 24 |
Aug 15 07:43:56 PM PDT 24 |
3711047912 ps |
| T749 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.3992767659 |
|
|
Aug 15 07:17:35 PM PDT 24 |
Aug 15 07:19:27 PM PDT 24 |
2659350543 ps |
| T875 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.1448732456 |
|
|
Aug 15 07:37:46 PM PDT 24 |
Aug 15 07:47:29 PM PDT 24 |
4751203528 ps |
| T1083 |
/workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.1110036864 |
|
|
Aug 15 07:22:22 PM PDT 24 |
Aug 15 07:58:53 PM PDT 24 |
11871534854 ps |
| T189 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.1953974046 |
|
|
Aug 15 07:25:49 PM PDT 24 |
Aug 15 07:30:08 PM PDT 24 |
2902539363 ps |
| T330 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.1621842916 |
|
|
Aug 15 07:05:24 PM PDT 24 |
Aug 15 07:21:58 PM PDT 24 |
5354008544 ps |
| T1084 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1098191663 |
|
|
Aug 15 07:17:16 PM PDT 24 |
Aug 15 07:46:38 PM PDT 24 |
9745892342 ps |
| T818 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.3113935188 |
|
|
Aug 15 07:33:54 PM PDT 24 |
Aug 15 07:45:26 PM PDT 24 |
4799499108 ps |
| T1085 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.2001448874 |
|
|
Aug 15 07:14:17 PM PDT 24 |
Aug 15 07:21:34 PM PDT 24 |
4894665076 ps |
| T750 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1398800172 |
|
|
Aug 15 07:10:56 PM PDT 24 |
Aug 15 07:12:54 PM PDT 24 |
2411117568 ps |
| T1086 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.1121664654 |
|
|
Aug 15 07:30:51 PM PDT 24 |
Aug 15 07:39:10 PM PDT 24 |
4306952824 ps |
| T1087 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.4011508076 |
|
|
Aug 15 07:31:25 PM PDT 24 |
Aug 15 08:39:51 PM PDT 24 |
20364925928 ps |
| T1088 |
/workspace/coverage/default/2.rom_e2e_static_critical.1348019219 |
|
|
Aug 15 07:31:48 PM PDT 24 |
Aug 15 08:31:10 PM PDT 24 |
17249394476 ps |
| T1089 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.777498877 |
|
|
Aug 15 07:23:35 PM PDT 24 |
Aug 15 07:31:40 PM PDT 24 |
3759645304 ps |
| T165 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.3570067225 |
|
|
Aug 15 07:20:25 PM PDT 24 |
Aug 15 07:23:07 PM PDT 24 |
2874669499 ps |
| T1090 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2830338780 |
|
|
Aug 15 07:05:57 PM PDT 24 |
Aug 15 07:50:07 PM PDT 24 |
23305679656 ps |
| T1091 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.754181813 |
|
|
Aug 15 07:03:52 PM PDT 24 |
Aug 15 07:13:53 PM PDT 24 |
4380339640 ps |
| T240 |
/workspace/coverage/default/0.chip_sw_flash_init.2712029782 |
|
|
Aug 15 07:05:07 PM PDT 24 |
Aug 15 07:49:14 PM PDT 24 |
26303785000 ps |
| T1092 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2875448725 |
|
|
Aug 15 07:08:19 PM PDT 24 |
Aug 15 07:14:13 PM PDT 24 |
4716967653 ps |
| T717 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.2319127826 |
|
|
Aug 15 07:10:54 PM PDT 24 |
Aug 15 07:21:41 PM PDT 24 |
3268815722 ps |
| T1093 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.3603473649 |
|
|
Aug 15 07:20:10 PM PDT 24 |
Aug 15 07:29:08 PM PDT 24 |
6775917430 ps |
| T835 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.694695008 |
|
|
Aug 15 07:33:22 PM PDT 24 |
Aug 15 07:44:07 PM PDT 24 |
5030469192 ps |
| T791 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.2578327186 |
|
|
Aug 15 07:31:00 PM PDT 24 |
Aug 15 07:38:03 PM PDT 24 |
3994002216 ps |
| T1094 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1580139443 |
|
|
Aug 15 07:13:27 PM PDT 24 |
Aug 15 07:22:58 PM PDT 24 |
4479341500 ps |
| T1095 |
/workspace/coverage/default/1.rom_e2e_smoke.947179607 |
|
|
Aug 15 07:22:21 PM PDT 24 |
Aug 15 08:17:55 PM PDT 24 |
14804509752 ps |
| T1096 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.2219265500 |
|
|
Aug 15 07:28:28 PM PDT 24 |
Aug 15 07:34:19 PM PDT 24 |
2604628802 ps |
| T1097 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.1920688887 |
|
|
Aug 15 07:16:11 PM PDT 24 |
Aug 15 07:21:35 PM PDT 24 |
2532805800 ps |
| T282 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.3516572599 |
|
|
Aug 15 07:25:56 PM PDT 24 |
Aug 15 07:34:37 PM PDT 24 |
7386931184 ps |
| T773 |
/workspace/coverage/default/2.rom_raw_unlock.4194235291 |
|
|
Aug 15 07:27:36 PM PDT 24 |
Aug 15 07:31:13 PM PDT 24 |
4942853177 ps |
| T1098 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.235598904 |
|
|
Aug 15 07:25:51 PM PDT 24 |
Aug 15 07:30:09 PM PDT 24 |
3004019258 ps |
| T742 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.1023107341 |
|
|
Aug 15 07:26:35 PM PDT 24 |
Aug 15 07:37:54 PM PDT 24 |
4802363888 ps |
| T1099 |
/workspace/coverage/default/2.chip_sw_edn_kat.3564026079 |
|
|
Aug 15 07:23:03 PM PDT 24 |
Aug 15 07:35:24 PM PDT 24 |
3380964200 ps |
| T885 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.1411078460 |
|
|
Aug 15 07:35:09 PM PDT 24 |
Aug 15 07:39:53 PM PDT 24 |
3295357124 ps |
| T860 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.3003019752 |
|
|
Aug 15 07:32:51 PM PDT 24 |
Aug 15 07:46:01 PM PDT 24 |
6020917770 ps |
| T1100 |
/workspace/coverage/default/0.chip_tap_straps_prod.226306751 |
|
|
Aug 15 07:07:03 PM PDT 24 |
Aug 15 07:10:08 PM PDT 24 |
3022640086 ps |
| T1101 |
/workspace/coverage/default/0.chip_sw_power_idle_load.1293998979 |
|
|
Aug 15 07:07:15 PM PDT 24 |
Aug 15 07:16:13 PM PDT 24 |
4977071240 ps |
| T1102 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.1782818193 |
|
|
Aug 15 07:36:09 PM PDT 24 |
Aug 15 07:43:00 PM PDT 24 |
4398894812 ps |
| T1103 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.2222534606 |
|
|
Aug 15 07:13:30 PM PDT 24 |
Aug 15 07:17:50 PM PDT 24 |
2937110906 ps |
| T737 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.643190073 |
|
|
Aug 15 07:34:28 PM PDT 24 |
Aug 15 07:42:47 PM PDT 24 |
4304576240 ps |
| T1104 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.3996250531 |
|
|
Aug 15 07:27:53 PM PDT 24 |
Aug 15 07:37:02 PM PDT 24 |
4446259860 ps |
| T283 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.3153184888 |
|
|
Aug 15 07:14:32 PM PDT 24 |
Aug 15 07:28:02 PM PDT 24 |
5842025748 ps |
| T1105 |
/workspace/coverage/default/1.rom_e2e_self_hash.1042711566 |
|
|
Aug 15 07:24:33 PM PDT 24 |
Aug 15 08:57:37 PM PDT 24 |
26025328616 ps |
| T104 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3845364886 |
|
|
Aug 15 07:17:43 PM PDT 24 |
Aug 15 07:37:24 PM PDT 24 |
21693573488 ps |
| T1106 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.1079844346 |
|
|
Aug 15 07:11:25 PM PDT 24 |
Aug 15 07:44:55 PM PDT 24 |
8534569988 ps |
| T1107 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.4085691258 |
|
|
Aug 15 07:15:14 PM PDT 24 |
Aug 15 08:14:13 PM PDT 24 |
14343830200 ps |
| T1108 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.3957480945 |
|
|
Aug 15 07:11:45 PM PDT 24 |
Aug 15 07:37:16 PM PDT 24 |
8425566724 ps |
| T263 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.3496249472 |
|
|
Aug 15 07:22:43 PM PDT 24 |
Aug 15 07:33:11 PM PDT 24 |
5568414648 ps |
| T145 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.1677325054 |
|
|
Aug 15 07:24:36 PM PDT 24 |
Aug 15 07:29:27 PM PDT 24 |
3247105662 ps |
| T1109 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.3898891525 |
|
|
Aug 15 07:23:52 PM PDT 24 |
Aug 15 08:14:46 PM PDT 24 |
14516526690 ps |
| T72 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.3700733728 |
|
|
Aug 15 07:28:29 PM PDT 24 |
Aug 15 07:32:40 PM PDT 24 |
3022756172 ps |
| T1110 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.1220360043 |
|
|
Aug 15 07:33:28 PM PDT 24 |
Aug 15 08:24:30 PM PDT 24 |
14868828925 ps |