| T845 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.1012873163 |
|
|
Aug 15 07:10:14 PM PDT 24 |
Aug 15 07:21:45 PM PDT 24 |
5094790540 ps |
| T1111 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.3480458829 |
|
|
Aug 15 07:29:44 PM PDT 24 |
Aug 15 07:56:46 PM PDT 24 |
9437619874 ps |
| T1112 |
/workspace/coverage/default/0.rom_keymgr_functest.119960536 |
|
|
Aug 15 07:08:08 PM PDT 24 |
Aug 15 07:16:25 PM PDT 24 |
5171847534 ps |
| T313 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.1133624739 |
|
|
Aug 15 07:13:58 PM PDT 24 |
Aug 15 07:31:32 PM PDT 24 |
6481697260 ps |
| T817 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.320955047 |
|
|
Aug 15 07:36:34 PM PDT 24 |
Aug 15 07:43:54 PM PDT 24 |
5732615608 ps |
| T37 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.1099715481 |
|
|
Aug 15 07:08:08 PM PDT 24 |
Aug 15 07:11:48 PM PDT 24 |
2468383060 ps |
| T1113 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.2197459664 |
|
|
Aug 15 07:04:33 PM PDT 24 |
Aug 15 07:13:34 PM PDT 24 |
4344639978 ps |
| T367 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.4023501964 |
|
|
Aug 15 07:31:41 PM PDT 24 |
Aug 15 07:39:30 PM PDT 24 |
3907111668 ps |
| T1114 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.624505082 |
|
|
Aug 15 07:15:09 PM PDT 24 |
Aug 15 08:23:57 PM PDT 24 |
14903478134 ps |
| T1115 |
/workspace/coverage/default/1.chip_sw_aes_idle.262823789 |
|
|
Aug 15 07:11:56 PM PDT 24 |
Aug 15 07:16:48 PM PDT 24 |
2959457512 ps |
| T264 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.2527539845 |
|
|
Aug 15 07:11:39 PM PDT 24 |
Aug 15 07:19:58 PM PDT 24 |
5671225824 ps |
| T317 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.2989055303 |
|
|
Aug 15 07:07:55 PM PDT 24 |
Aug 15 07:20:18 PM PDT 24 |
4840286302 ps |
| T159 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.113948000 |
|
|
Aug 15 07:22:44 PM PDT 24 |
Aug 15 10:46:46 PM PDT 24 |
256211762150 ps |
| T806 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.3151200803 |
|
|
Aug 15 07:34:35 PM PDT 24 |
Aug 15 07:45:58 PM PDT 24 |
5612768712 ps |
| T208 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.2894160392 |
|
|
Aug 15 07:21:51 PM PDT 24 |
Aug 15 07:34:02 PM PDT 24 |
4438591736 ps |
| T1116 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.1324655850 |
|
|
Aug 15 07:34:59 PM PDT 24 |
Aug 15 07:40:09 PM PDT 24 |
3540793516 ps |
| T799 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.1325233670 |
|
|
Aug 15 07:26:07 PM PDT 24 |
Aug 15 07:42:32 PM PDT 24 |
7706701752 ps |
| T1117 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.175141152 |
|
|
Aug 15 07:09:00 PM PDT 24 |
Aug 15 07:57:04 PM PDT 24 |
12674416922 ps |
| T514 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.3147926125 |
|
|
Aug 15 07:06:13 PM PDT 24 |
Aug 15 07:22:02 PM PDT 24 |
4565299344 ps |
| T1118 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.493804954 |
|
|
Aug 15 07:09:36 PM PDT 24 |
Aug 15 07:13:27 PM PDT 24 |
3594949577 ps |
| T851 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.1983419198 |
|
|
Aug 15 07:29:17 PM PDT 24 |
Aug 15 07:35:06 PM PDT 24 |
3346965992 ps |
| T1119 |
/workspace/coverage/default/1.chip_sw_kmac_idle.483298307 |
|
|
Aug 15 07:14:07 PM PDT 24 |
Aug 15 07:18:28 PM PDT 24 |
2730875152 ps |
| T1120 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.4263405196 |
|
|
Aug 15 07:05:48 PM PDT 24 |
Aug 15 07:12:09 PM PDT 24 |
5075713336 ps |
| T1121 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.3211904284 |
|
|
Aug 15 07:11:08 PM PDT 24 |
Aug 15 08:12:18 PM PDT 24 |
25677449665 ps |
| T1122 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.211119692 |
|
|
Aug 15 07:08:20 PM PDT 24 |
Aug 15 07:13:16 PM PDT 24 |
3416222432 ps |
| T1123 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.1210525051 |
|
|
Aug 15 07:05:47 PM PDT 24 |
Aug 15 07:10:35 PM PDT 24 |
2720811712 ps |
| T192 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.1270071456 |
|
|
Aug 15 07:11:27 PM PDT 24 |
Aug 15 08:32:26 PM PDT 24 |
44295349404 ps |
| T1124 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_reduced_freq.2371587116 |
|
|
Aug 15 07:26:25 PM PDT 24 |
Aug 15 07:30:08 PM PDT 24 |
2915558242 ps |
| T1125 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.4137841873 |
|
|
Aug 15 07:19:59 PM PDT 24 |
Aug 15 07:42:05 PM PDT 24 |
10307993500 ps |
| T751 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.3650328085 |
|
|
Aug 15 07:06:50 PM PDT 24 |
Aug 15 07:09:09 PM PDT 24 |
3513840968 ps |
| T1126 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.1066960886 |
|
|
Aug 15 07:19:48 PM PDT 24 |
Aug 15 07:23:24 PM PDT 24 |
2600883410 ps |
| T209 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.2088390440 |
|
|
Aug 15 07:14:35 PM PDT 24 |
Aug 15 07:21:28 PM PDT 24 |
3962838842 ps |
| T1127 |
/workspace/coverage/default/1.chip_sw_aes_enc.1971523658 |
|
|
Aug 15 07:14:05 PM PDT 24 |
Aug 15 07:18:26 PM PDT 24 |
2862465896 ps |
| T839 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.3735629485 |
|
|
Aug 15 07:31:12 PM PDT 24 |
Aug 15 07:37:39 PM PDT 24 |
3296876208 ps |
| T515 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.2987772445 |
|
|
Aug 15 07:10:27 PM PDT 24 |
Aug 15 07:19:16 PM PDT 24 |
5025214280 ps |
| T1128 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.3159867518 |
|
|
Aug 15 07:22:58 PM PDT 24 |
Aug 15 07:41:30 PM PDT 24 |
6318716980 ps |
| T1129 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.2194130999 |
|
|
Aug 15 07:34:56 PM PDT 24 |
Aug 15 07:44:23 PM PDT 24 |
6927928756 ps |
| T1130 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.1393382262 |
|
|
Aug 15 07:30:49 PM PDT 24 |
Aug 15 07:55:55 PM PDT 24 |
8209321176 ps |
| T38 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1340496076 |
|
|
Aug 15 07:13:05 PM PDT 24 |
Aug 15 07:22:29 PM PDT 24 |
7124418192 ps |
| T752 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2916200605 |
|
|
Aug 15 07:22:19 PM PDT 24 |
Aug 15 07:26:41 PM PDT 24 |
3876818040 ps |
| T105 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1341880904 |
|
|
Aug 15 07:07:43 PM PDT 24 |
Aug 15 07:39:43 PM PDT 24 |
22163902664 ps |
| T1131 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.718631969 |
|
|
Aug 15 07:15:50 PM PDT 24 |
Aug 15 07:24:32 PM PDT 24 |
5454140760 ps |
| T843 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.2448413037 |
|
|
Aug 15 07:37:10 PM PDT 24 |
Aug 15 07:43:02 PM PDT 24 |
3853248628 ps |
| T877 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.704262671 |
|
|
Aug 15 07:36:42 PM PDT 24 |
Aug 15 07:42:34 PM PDT 24 |
4098487936 ps |
| T1132 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.3840036625 |
|
|
Aug 15 07:19:25 PM PDT 24 |
Aug 15 07:31:45 PM PDT 24 |
4842926552 ps |
| T1133 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.726012357 |
|
|
Aug 15 07:29:46 PM PDT 24 |
Aug 15 07:40:29 PM PDT 24 |
10400842160 ps |
| T1134 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.4075432219 |
|
|
Aug 15 07:25:40 PM PDT 24 |
Aug 15 07:30:41 PM PDT 24 |
3155767527 ps |
| T1135 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.3408405523 |
|
|
Aug 15 07:08:25 PM PDT 24 |
Aug 15 07:10:20 PM PDT 24 |
3024465927 ps |
| T852 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.2470160988 |
|
|
Aug 15 07:33:04 PM PDT 24 |
Aug 15 07:43:54 PM PDT 24 |
4908246038 ps |
| T320 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.1944241502 |
|
|
Aug 15 07:09:43 PM PDT 24 |
Aug 15 07:30:35 PM PDT 24 |
6132478516 ps |
| T1136 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.2527820728 |
|
|
Aug 15 07:21:56 PM PDT 24 |
Aug 15 07:25:19 PM PDT 24 |
3069836278 ps |
| T1137 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.1222563209 |
|
|
Aug 15 07:13:33 PM PDT 24 |
Aug 15 08:26:03 PM PDT 24 |
13586014089 ps |
| T1138 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.3754976470 |
|
|
Aug 15 07:24:29 PM PDT 24 |
Aug 15 07:32:26 PM PDT 24 |
4635925440 ps |
| T1139 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.752954198 |
|
|
Aug 15 07:05:41 PM PDT 24 |
Aug 15 07:18:26 PM PDT 24 |
5318682264 ps |
| T825 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.2011292718 |
|
|
Aug 15 07:36:14 PM PDT 24 |
Aug 15 07:41:50 PM PDT 24 |
3666785338 ps |
| T1140 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.3542425974 |
|
|
Aug 15 07:11:10 PM PDT 24 |
Aug 15 07:15:31 PM PDT 24 |
2860268472 ps |
| T11 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.4031509911 |
|
|
Aug 15 07:04:22 PM PDT 24 |
Aug 15 07:08:26 PM PDT 24 |
3059515073 ps |
| T322 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.3161522075 |
|
|
Aug 15 07:21:18 PM PDT 24 |
Aug 15 07:46:33 PM PDT 24 |
9642439322 ps |
| T225 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1729677224 |
|
|
Aug 15 07:14:07 PM PDT 24 |
Aug 15 08:20:11 PM PDT 24 |
12030420250 ps |
| T163 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.1558240394 |
|
|
Aug 15 07:05:32 PM PDT 24 |
Aug 15 07:30:21 PM PDT 24 |
11363411562 ps |
| T238 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.4164367563 |
|
|
Aug 15 07:04:59 PM PDT 24 |
Aug 15 07:15:06 PM PDT 24 |
5750784880 ps |
| T1141 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.3508917571 |
|
|
Aug 15 07:27:57 PM PDT 24 |
Aug 15 07:32:01 PM PDT 24 |
2390911138 ps |
| T1142 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1264681933 |
|
|
Aug 15 07:11:23 PM PDT 24 |
Aug 15 07:23:59 PM PDT 24 |
4183727820 ps |
| T1143 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.2983362021 |
|
|
Aug 15 07:08:03 PM PDT 24 |
Aug 15 07:14:49 PM PDT 24 |
5950240138 ps |
| T331 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.3179433335 |
|
|
Aug 15 07:22:08 PM PDT 24 |
Aug 15 07:31:26 PM PDT 24 |
5113695100 ps |
| T25 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.2927540058 |
|
|
Aug 15 07:03:57 PM PDT 24 |
Aug 15 07:52:31 PM PDT 24 |
11839433320 ps |
| T136 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.1385181846 |
|
|
Aug 15 07:10:36 PM PDT 24 |
Aug 15 07:27:17 PM PDT 24 |
9033442426 ps |
| T200 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.1070078171 |
|
|
Aug 15 07:08:15 PM PDT 24 |
Aug 15 07:23:35 PM PDT 24 |
6940609689 ps |
| T1144 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.1255334963 |
|
|
Aug 15 07:31:16 PM PDT 24 |
Aug 15 07:43:24 PM PDT 24 |
4676981502 ps |
| T1145 |
/workspace/coverage/default/2.chip_sw_hmac_oneshot.26324593 |
|
|
Aug 15 07:25:40 PM PDT 24 |
Aug 15 07:30:49 PM PDT 24 |
3795258188 ps |
| T859 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.2029604781 |
|
|
Aug 15 07:36:29 PM PDT 24 |
Aug 15 07:42:05 PM PDT 24 |
3525661450 ps |
| T1146 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.3083913176 |
|
|
Aug 15 07:34:32 PM PDT 24 |
Aug 15 08:57:22 PM PDT 24 |
23913436016 ps |
| T754 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.1232816098 |
|
|
Aug 15 07:22:54 PM PDT 24 |
Aug 15 07:27:30 PM PDT 24 |
3323280040 ps |
| T866 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.1269901709 |
|
|
Aug 15 07:28:29 PM PDT 24 |
Aug 15 07:39:29 PM PDT 24 |
4274884756 ps |
| T1147 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.1403585682 |
|
|
Aug 15 07:19:18 PM PDT 24 |
Aug 15 07:23:46 PM PDT 24 |
2483965347 ps |
| T1148 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3442456661 |
|
|
Aug 15 07:12:03 PM PDT 24 |
Aug 15 07:20:17 PM PDT 24 |
7525347120 ps |
| T1149 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.1393931687 |
|
|
Aug 15 07:27:41 PM PDT 24 |
Aug 15 07:36:57 PM PDT 24 |
6236161180 ps |
| T1150 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.3941617275 |
|
|
Aug 15 07:06:59 PM PDT 24 |
Aug 15 07:11:16 PM PDT 24 |
2894222510 ps |
| T1151 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.2841834174 |
|
|
Aug 15 07:31:03 PM PDT 24 |
Aug 15 07:35:26 PM PDT 24 |
3233906924 ps |
| T39 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.653484475 |
|
|
Aug 15 07:22:37 PM PDT 24 |
Aug 15 07:31:26 PM PDT 24 |
6947024200 ps |
| T1152 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.2443092902 |
|
|
Aug 15 07:14:14 PM PDT 24 |
Aug 15 07:20:04 PM PDT 24 |
3361963538 ps |
| T201 |
/workspace/coverage/default/0.chip_sw_power_virus.3030568303 |
|
|
Aug 15 07:13:18 PM PDT 24 |
Aug 15 07:39:35 PM PDT 24 |
6005459832 ps |
| T172 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.1498611605 |
|
|
Aug 15 07:09:27 PM PDT 24 |
Aug 15 07:20:29 PM PDT 24 |
5108805176 ps |
| T1153 |
/workspace/coverage/default/1.chip_tap_straps_prod.4030603698 |
|
|
Aug 15 07:14:53 PM PDT 24 |
Aug 15 07:45:26 PM PDT 24 |
18233246479 ps |
| T368 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.1026427065 |
|
|
Aug 15 07:23:18 PM PDT 24 |
Aug 15 07:31:53 PM PDT 24 |
3966337348 ps |
| T1154 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.2355431332 |
|
|
Aug 15 07:19:17 PM PDT 24 |
Aug 15 07:47:26 PM PDT 24 |
9008159968 ps |
| T1155 |
/workspace/coverage/default/1.chip_sw_aes_entropy.3512753469 |
|
|
Aug 15 07:12:27 PM PDT 24 |
Aug 15 07:16:30 PM PDT 24 |
3064092640 ps |
| T1156 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.1572069649 |
|
|
Aug 15 07:10:41 PM PDT 24 |
Aug 15 07:19:15 PM PDT 24 |
8247293531 ps |
| T1157 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.1483158453 |
|
|
Aug 15 07:24:10 PM PDT 24 |
Aug 15 07:45:19 PM PDT 24 |
11768997120 ps |
| T1158 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2314178410 |
|
|
Aug 15 07:19:59 PM PDT 24 |
Aug 15 07:37:53 PM PDT 24 |
8401037682 ps |
| T1159 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.497271440 |
|
|
Aug 15 07:22:24 PM PDT 24 |
Aug 15 08:27:20 PM PDT 24 |
14657932601 ps |
| T226 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.660419163 |
|
|
Aug 15 07:07:01 PM PDT 24 |
Aug 15 08:36:39 PM PDT 24 |
15880953852 ps |
| T1160 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.1606167345 |
|
|
Aug 15 07:14:54 PM PDT 24 |
Aug 15 08:43:54 PM PDT 24 |
22989214627 ps |
| T1161 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.1522574679 |
|
|
Aug 15 07:06:48 PM PDT 24 |
Aug 15 07:41:52 PM PDT 24 |
20410565804 ps |
| T1162 |
/workspace/coverage/default/0.chip_tap_straps_rma.1185521710 |
|
|
Aug 15 07:05:37 PM PDT 24 |
Aug 15 07:14:07 PM PDT 24 |
6397060421 ps |
| T1163 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.4047547351 |
|
|
Aug 15 07:30:42 PM PDT 24 |
Aug 15 07:41:16 PM PDT 24 |
4890961080 ps |
| T1164 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.2052130853 |
|
|
Aug 15 07:11:34 PM PDT 24 |
Aug 15 07:23:05 PM PDT 24 |
4290808326 ps |
| T1165 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.3718922972 |
|
|
Aug 15 07:31:38 PM PDT 24 |
Aug 15 07:40:47 PM PDT 24 |
4372491704 ps |
| T386 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.2492579099 |
|
|
Aug 15 07:13:56 PM PDT 24 |
Aug 15 08:47:30 PM PDT 24 |
24330870540 ps |
| T1166 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.243617119 |
|
|
Aug 15 07:06:53 PM PDT 24 |
Aug 15 07:09:35 PM PDT 24 |
3207900368 ps |
| T1167 |
/workspace/coverage/default/1.rom_keymgr_functest.1521203548 |
|
|
Aug 15 07:19:50 PM PDT 24 |
Aug 15 07:27:27 PM PDT 24 |
4368088400 ps |
| T1168 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.3472861496 |
|
|
Aug 15 07:04:57 PM PDT 24 |
Aug 15 07:15:20 PM PDT 24 |
4261579180 ps |
| T1169 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.1259534803 |
|
|
Aug 15 07:29:47 PM PDT 24 |
Aug 15 07:40:36 PM PDT 24 |
5594107632 ps |
| T861 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.3953298135 |
|
|
Aug 15 07:30:58 PM PDT 24 |
Aug 15 07:37:07 PM PDT 24 |
4295205860 ps |
| T224 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.2840944963 |
|
|
Aug 15 07:11:42 PM PDT 24 |
Aug 15 07:46:06 PM PDT 24 |
9010526536 ps |
| T1170 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.1957117089 |
|
|
Aug 15 07:27:56 PM PDT 24 |
Aug 15 07:34:00 PM PDT 24 |
5214210592 ps |
| T1171 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.323092301 |
|
|
Aug 15 07:08:51 PM PDT 24 |
Aug 15 07:13:19 PM PDT 24 |
3056686444 ps |
| T827 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.3751795800 |
|
|
Aug 15 07:39:02 PM PDT 24 |
Aug 15 07:45:09 PM PDT 24 |
3273325304 ps |
| T1172 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.142577706 |
|
|
Aug 15 07:27:32 PM PDT 24 |
Aug 15 07:31:20 PM PDT 24 |
2446207050 ps |
| T1173 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.2031938683 |
|
|
Aug 15 07:16:36 PM PDT 24 |
Aug 15 07:23:14 PM PDT 24 |
2996886293 ps |
| T241 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.620783523 |
|
|
Aug 15 07:13:00 PM PDT 24 |
Aug 15 07:41:16 PM PDT 24 |
12973111390 ps |
| T1174 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.2897139752 |
|
|
Aug 15 07:23:54 PM PDT 24 |
Aug 15 07:29:48 PM PDT 24 |
3331127205 ps |
| T307 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.754829849 |
|
|
Aug 15 07:32:51 PM PDT 24 |
Aug 15 07:39:18 PM PDT 24 |
4045979920 ps |
| T1175 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.1014016959 |
|
|
Aug 15 07:35:17 PM PDT 24 |
Aug 15 08:29:46 PM PDT 24 |
14996608072 ps |
| T1176 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.3379217592 |
|
|
Aug 15 07:25:03 PM PDT 24 |
Aug 15 08:06:32 PM PDT 24 |
12743341448 ps |
| T308 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.3196641010 |
|
|
Aug 15 07:41:44 PM PDT 24 |
Aug 15 07:47:42 PM PDT 24 |
3598748696 ps |
| T1177 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1361487082 |
|
|
Aug 15 07:14:49 PM PDT 24 |
Aug 15 07:26:19 PM PDT 24 |
5227541440 ps |
| T1178 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3685644988 |
|
|
Aug 15 07:20:57 PM PDT 24 |
Aug 15 07:22:55 PM PDT 24 |
3176311191 ps |
| T1179 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.584195310 |
|
|
Aug 15 07:24:47 PM PDT 24 |
Aug 15 07:29:00 PM PDT 24 |
2916376414 ps |
| T1180 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_smoketest.2306450703 |
|
|
Aug 15 07:09:41 PM PDT 24 |
Aug 15 07:12:55 PM PDT 24 |
3096625180 ps |
| T166 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.3705438980 |
|
|
Aug 15 07:12:41 PM PDT 24 |
Aug 15 07:15:47 PM PDT 24 |
2608185140 ps |
| T819 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.2340208427 |
|
|
Aug 15 07:34:21 PM PDT 24 |
Aug 15 07:43:54 PM PDT 24 |
5487819420 ps |
| T284 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2340723396 |
|
|
Aug 15 07:08:34 PM PDT 24 |
Aug 15 07:17:27 PM PDT 24 |
4833278881 ps |
| T1181 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.640085460 |
|
|
Aug 15 07:31:27 PM PDT 24 |
Aug 15 07:39:16 PM PDT 24 |
5538477839 ps |
| T1182 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.3114041022 |
|
|
Aug 15 07:32:13 PM PDT 24 |
Aug 15 07:38:50 PM PDT 24 |
4315643330 ps |
| T1183 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.3043142534 |
|
|
Aug 15 07:14:37 PM PDT 24 |
Aug 15 07:34:22 PM PDT 24 |
6509621728 ps |
| T1184 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.1854002264 |
|
|
Aug 15 07:17:12 PM PDT 24 |
Aug 15 07:22:33 PM PDT 24 |
2850609400 ps |
| T1185 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.792537571 |
|
|
Aug 15 07:14:18 PM PDT 24 |
Aug 15 07:27:11 PM PDT 24 |
8398755572 ps |
| T1186 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.1930382624 |
|
|
Aug 15 07:31:07 PM PDT 24 |
Aug 15 07:39:57 PM PDT 24 |
4447652248 ps |
| T1187 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.3762209212 |
|
|
Aug 15 07:11:02 PM PDT 24 |
Aug 15 07:31:11 PM PDT 24 |
5396743692 ps |
| T1188 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.3917654926 |
|
|
Aug 15 07:11:32 PM PDT 24 |
Aug 15 07:28:18 PM PDT 24 |
10901467624 ps |
| T1189 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.264200612 |
|
|
Aug 15 07:22:18 PM PDT 24 |
Aug 15 08:17:55 PM PDT 24 |
19498781640 ps |
| T785 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.3021691333 |
|
|
Aug 15 07:35:49 PM PDT 24 |
Aug 15 07:43:14 PM PDT 24 |
4428199788 ps |
| T811 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.3747124431 |
|
|
Aug 15 07:41:31 PM PDT 24 |
Aug 15 07:47:00 PM PDT 24 |
4124088464 ps |
| T1190 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.50078916 |
|
|
Aug 15 07:10:29 PM PDT 24 |
Aug 15 08:11:04 PM PDT 24 |
14526653264 ps |
| T834 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.3154580429 |
|
|
Aug 15 07:35:53 PM PDT 24 |
Aug 15 07:45:27 PM PDT 24 |
5193743688 ps |
| T1191 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.875295335 |
|
|
Aug 15 07:22:55 PM PDT 24 |
Aug 15 07:45:18 PM PDT 24 |
8453955654 ps |
| T1192 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.3933303603 |
|
|
Aug 15 07:27:20 PM PDT 24 |
Aug 15 07:29:01 PM PDT 24 |
1963034216 ps |
| T780 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.1851244325 |
|
|
Aug 15 07:10:33 PM PDT 24 |
Aug 15 07:41:57 PM PDT 24 |
11665273905 ps |
| T1193 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.399087773 |
|
|
Aug 15 07:25:28 PM PDT 24 |
Aug 15 07:56:15 PM PDT 24 |
19905660803 ps |
| T1194 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.2908391501 |
|
|
Aug 15 07:32:28 PM PDT 24 |
Aug 15 07:40:44 PM PDT 24 |
5356940200 ps |
| T42 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.3953628931 |
|
|
Aug 15 07:04:45 PM PDT 24 |
Aug 15 07:10:18 PM PDT 24 |
3679762519 ps |
| T1195 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.458048084 |
|
|
Aug 15 07:39:03 PM PDT 24 |
Aug 15 08:10:21 PM PDT 24 |
13304061000 ps |
| T1196 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.1359156910 |
|
|
Aug 15 07:06:33 PM PDT 24 |
Aug 15 07:11:12 PM PDT 24 |
3078914573 ps |
| T1197 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3496008959 |
|
|
Aug 15 07:05:08 PM PDT 24 |
Aug 15 07:14:06 PM PDT 24 |
4801755492 ps |
| T1198 |
/workspace/coverage/default/1.chip_tap_straps_dev.2836913745 |
|
|
Aug 15 07:16:17 PM PDT 24 |
Aug 15 07:23:14 PM PDT 24 |
3472942064 ps |
| T404 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.3965900083 |
|
|
Aug 15 07:15:58 PM PDT 24 |
Aug 15 07:23:37 PM PDT 24 |
5156189984 ps |
| T1199 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.4153705744 |
|
|
Aug 15 07:25:24 PM PDT 24 |
Aug 15 07:35:39 PM PDT 24 |
3928352452 ps |
| T1200 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.3683884268 |
|
|
Aug 15 07:17:44 PM PDT 24 |
Aug 15 07:21:20 PM PDT 24 |
2772455480 ps |
| T1201 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.1323289563 |
|
|
Aug 15 07:22:42 PM PDT 24 |
Aug 15 07:28:24 PM PDT 24 |
3872218520 ps |
| T1202 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.3081616685 |
|
|
Aug 15 07:30:27 PM PDT 24 |
Aug 15 07:38:28 PM PDT 24 |
3328852248 ps |
| T778 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.3681136675 |
|
|
Aug 15 07:08:08 PM PDT 24 |
Aug 15 07:39:50 PM PDT 24 |
21815129464 ps |
| T1203 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.746419540 |
|
|
Aug 15 07:27:26 PM PDT 24 |
Aug 15 07:32:05 PM PDT 24 |
3379692480 ps |
| T1204 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.2204571475 |
|
|
Aug 15 07:11:32 PM PDT 24 |
Aug 15 08:08:10 PM PDT 24 |
14951746444 ps |
| T1205 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.3924348635 |
|
|
Aug 15 07:23:33 PM PDT 24 |
Aug 15 07:27:54 PM PDT 24 |
2496668328 ps |
| T1206 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.748042770 |
|
|
Aug 15 07:23:10 PM PDT 24 |
Aug 15 07:38:45 PM PDT 24 |
5669411976 ps |
| T76 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.3934547437 |
|
|
Aug 15 07:04:32 PM PDT 24 |
Aug 15 07:12:09 PM PDT 24 |
3571322550 ps |
| T1207 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.782930034 |
|
|
Aug 15 07:19:31 PM PDT 24 |
Aug 15 07:24:27 PM PDT 24 |
2526179850 ps |
| T1208 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.4055433277 |
|
|
Aug 15 07:24:16 PM PDT 24 |
Aug 15 07:32:22 PM PDT 24 |
5016154744 ps |
| T352 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.3408355656 |
|
|
Aug 15 07:10:35 PM PDT 24 |
Aug 15 07:15:46 PM PDT 24 |
3207605308 ps |
| T1209 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.1838948404 |
|
|
Aug 15 07:19:17 PM PDT 24 |
Aug 15 07:24:30 PM PDT 24 |
3160930050 ps |
| T1210 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.797220195 |
|
|
Aug 15 07:13:43 PM PDT 24 |
Aug 15 07:35:59 PM PDT 24 |
7940565400 ps |
| T787 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.654227030 |
|
|
Aug 15 07:37:49 PM PDT 24 |
Aug 15 07:48:41 PM PDT 24 |
6315006824 ps |
| T1211 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.2368493106 |
|
|
Aug 15 07:07:26 PM PDT 24 |
Aug 15 07:38:46 PM PDT 24 |
7404125592 ps |
| T1212 |
/workspace/coverage/default/2.chip_sival_flash_info_access.3996219347 |
|
|
Aug 15 07:19:52 PM PDT 24 |
Aug 15 07:25:48 PM PDT 24 |
2926204964 ps |
| T1213 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.712400694 |
|
|
Aug 15 07:17:39 PM PDT 24 |
Aug 15 07:22:03 PM PDT 24 |
2519225244 ps |
| T798 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.589571316 |
|
|
Aug 15 07:21:49 PM PDT 24 |
Aug 15 08:03:22 PM PDT 24 |
41416225878 ps |
| T318 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.1802024148 |
|
|
Aug 15 07:26:09 PM PDT 24 |
Aug 15 07:40:35 PM PDT 24 |
6355386308 ps |
| T1214 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.573794794 |
|
|
Aug 15 07:24:14 PM PDT 24 |
Aug 15 08:24:55 PM PDT 24 |
14914389100 ps |
| T1215 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.625643878 |
|
|
Aug 15 07:11:07 PM PDT 24 |
Aug 15 07:17:17 PM PDT 24 |
2830689256 ps |
| T191 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.4154372606 |
|
|
Aug 15 07:03:47 PM PDT 24 |
Aug 15 08:19:14 PM PDT 24 |
44851085664 ps |
| T1216 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2682207935 |
|
|
Aug 15 07:17:48 PM PDT 24 |
Aug 15 07:22:47 PM PDT 24 |
3379706080 ps |
| T387 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.2553382200 |
|
|
Aug 15 07:12:56 PM PDT 24 |
Aug 15 08:56:06 PM PDT 24 |
23997351676 ps |
| T173 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.4194297049 |
|
|
Aug 15 07:25:36 PM PDT 24 |
Aug 15 07:35:50 PM PDT 24 |
4001066544 ps |
| T1217 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.389338827 |
|
|
Aug 15 07:08:33 PM PDT 24 |
Aug 15 07:32:02 PM PDT 24 |
7289404306 ps |
| T779 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.1504172610 |
|
|
Aug 15 07:14:00 PM PDT 24 |
Aug 15 07:20:02 PM PDT 24 |
3794480824 ps |
| T356 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.744502072 |
|
|
Aug 15 07:10:35 PM PDT 24 |
Aug 15 07:22:23 PM PDT 24 |
5329081424 ps |
| T719 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.864967131 |
|
|
Aug 15 07:24:09 PM PDT 24 |
Aug 15 07:34:21 PM PDT 24 |
2687235736 ps |
| T1218 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.2137695268 |
|
|
Aug 15 07:27:37 PM PDT 24 |
Aug 15 07:31:25 PM PDT 24 |
2494952848 ps |
| T1219 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.2890821419 |
|
|
Aug 15 07:07:02 PM PDT 24 |
Aug 15 07:10:52 PM PDT 24 |
2509320320 ps |
| T788 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.2075638018 |
|
|
Aug 15 07:37:38 PM PDT 24 |
Aug 15 07:44:51 PM PDT 24 |
3918231590 ps |
| T1220 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.565941530 |
|
|
Aug 15 07:10:52 PM PDT 24 |
Aug 15 07:18:05 PM PDT 24 |
4108632428 ps |
| T1221 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.3426924140 |
|
|
Aug 15 07:12:39 PM PDT 24 |
Aug 15 07:22:06 PM PDT 24 |
4017929912 ps |
| T1222 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.2191168942 |
|
|
Aug 15 07:28:42 PM PDT 24 |
Aug 15 07:36:11 PM PDT 24 |
7544364310 ps |
| T1223 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.2794378855 |
|
|
Aug 15 07:31:41 PM PDT 24 |
Aug 15 07:38:24 PM PDT 24 |
3935174208 ps |
| T1224 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.845765886 |
|
|
Aug 15 07:17:03 PM PDT 24 |
Aug 15 07:46:58 PM PDT 24 |
11589539577 ps |
| T1225 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.3921676197 |
|
|
Aug 15 07:13:11 PM PDT 24 |
Aug 15 07:24:42 PM PDT 24 |
5950408148 ps |
| T329 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.604316258 |
|
|
Aug 15 07:07:28 PM PDT 24 |
Aug 15 07:17:38 PM PDT 24 |
4639458792 ps |
| T1226 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.2343803115 |
|
|
Aug 15 07:11:29 PM PDT 24 |
Aug 15 07:20:03 PM PDT 24 |
5024364896 ps |
| T1227 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.4286308677 |
|
|
Aug 15 07:10:26 PM PDT 24 |
Aug 15 07:18:59 PM PDT 24 |
3499134228 ps |
| T1228 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.310968290 |
|
|
Aug 15 07:13:58 PM PDT 24 |
Aug 15 08:01:29 PM PDT 24 |
12299555416 ps |
| T202 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.4014114043 |
|
|
Aug 15 07:20:15 PM PDT 24 |
Aug 15 07:29:45 PM PDT 24 |
6137249511 ps |
| T239 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.2427458531 |
|
|
Aug 15 07:08:51 PM PDT 24 |
Aug 15 07:49:16 PM PDT 24 |
25537056095 ps |
| T1229 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3728746940 |
|
|
Aug 15 07:11:31 PM PDT 24 |
Aug 15 08:09:57 PM PDT 24 |
34569634040 ps |
| T1230 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.1045468604 |
|
|
Aug 15 07:22:55 PM PDT 24 |
Aug 15 07:28:22 PM PDT 24 |
2917140408 ps |
| T816 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.2341735757 |
|
|
Aug 15 07:38:48 PM PDT 24 |
Aug 15 07:49:17 PM PDT 24 |
6229148052 ps |
| T1231 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.4198336730 |
|
|
Aug 15 07:29:49 PM PDT 24 |
Aug 15 07:55:27 PM PDT 24 |
8065785884 ps |
| T1232 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.1975361516 |
|
|
Aug 15 07:10:28 PM PDT 24 |
Aug 15 07:16:37 PM PDT 24 |
2764590680 ps |
| T1233 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.2702899845 |
|
|
Aug 15 07:15:02 PM PDT 24 |
Aug 15 07:33:34 PM PDT 24 |
7967384550 ps |
| T1234 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3605532610 |
|
|
Aug 15 07:05:45 PM PDT 24 |
Aug 15 07:17:23 PM PDT 24 |
4361941550 ps |
| T227 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.2242807674 |
|
|
Aug 15 07:23:25 PM PDT 24 |
Aug 15 08:23:11 PM PDT 24 |
15538126752 ps |
| T323 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.3278162490 |
|
|
Aug 15 07:05:18 PM PDT 24 |
Aug 15 07:34:50 PM PDT 24 |
12231362696 ps |
| T1235 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.494682806 |
|
|
Aug 15 07:31:32 PM PDT 24 |
Aug 15 07:55:26 PM PDT 24 |
8854696964 ps |
| T1236 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.1899647513 |
|
|
Aug 15 07:36:02 PM PDT 24 |
Aug 15 07:41:52 PM PDT 24 |
3815201928 ps |
| T1237 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.1785108219 |
|
|
Aug 15 07:30:55 PM PDT 24 |
Aug 15 07:55:45 PM PDT 24 |
8076777432 ps |
| T1238 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.4049402365 |
|
|
Aug 15 07:14:45 PM PDT 24 |
Aug 15 07:25:30 PM PDT 24 |
3491432812 ps |
| T1239 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.1429440783 |
|
|
Aug 15 07:39:27 PM PDT 24 |
Aug 15 07:50:56 PM PDT 24 |
6328441200 ps |
| T106 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.577019075 |
|
|
Aug 15 07:25:36 PM PDT 24 |
Aug 15 07:35:18 PM PDT 24 |
7870168942 ps |
| T1240 |
/workspace/coverage/default/4.chip_tap_straps_rma.743997245 |
|
|
Aug 15 07:29:41 PM PDT 24 |
Aug 15 07:33:24 PM PDT 24 |
3208503047 ps |
| T1241 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.2247714366 |
|
|
Aug 15 07:32:36 PM PDT 24 |
Aug 15 07:40:54 PM PDT 24 |
3773187750 ps |
| T870 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.1242970092 |
|
|
Aug 15 07:38:52 PM PDT 24 |
Aug 15 07:45:39 PM PDT 24 |
3790515482 ps |
| T1242 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.1430823802 |
|
|
Aug 15 07:31:38 PM PDT 24 |
Aug 15 08:26:28 PM PDT 24 |
15616725185 ps |
| T1243 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.2589357663 |
|
|
Aug 15 07:12:01 PM PDT 24 |
Aug 15 07:23:54 PM PDT 24 |
4038190792 ps |
| T1244 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.3400881956 |
|
|
Aug 15 07:20:03 PM PDT 24 |
Aug 15 10:23:28 PM PDT 24 |
63554553874 ps |
| T137 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.4087412075 |
|
|
Aug 15 07:08:41 PM PDT 24 |
Aug 15 07:16:05 PM PDT 24 |
5576707912 ps |
| T1245 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.695883516 |
|
|
Aug 15 07:11:58 PM PDT 24 |
Aug 15 07:21:44 PM PDT 24 |
4113670424 ps |
| T1246 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.844490062 |
|
|
Aug 15 07:24:09 PM PDT 24 |
Aug 15 07:29:50 PM PDT 24 |
2994750336 ps |
| T1247 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.441726130 |
|
|
Aug 15 07:05:16 PM PDT 24 |
Aug 15 07:20:36 PM PDT 24 |
5490676640 ps |
| T878 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.4149107468 |
|
|
Aug 15 07:33:21 PM PDT 24 |
Aug 15 07:39:19 PM PDT 24 |
3644088448 ps |
| T1248 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.21545396 |
|
|
Aug 15 07:09:12 PM PDT 24 |
Aug 15 07:18:01 PM PDT 24 |
6078692406 ps |
| T388 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.650712341 |
|
|
Aug 15 07:13:42 PM PDT 24 |
Aug 15 08:47:27 PM PDT 24 |
23190224740 ps |
| T1249 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.3678700919 |
|
|
Aug 15 07:12:05 PM PDT 24 |
Aug 15 07:22:53 PM PDT 24 |
7232654184 ps |
| T755 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.1553949520 |
|
|
Aug 15 07:04:28 PM PDT 24 |
Aug 15 07:07:52 PM PDT 24 |
2910433048 ps |
| T1250 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1592286012 |
|
|
Aug 15 07:12:01 PM PDT 24 |
Aug 15 10:36:44 PM PDT 24 |
255811971074 ps |
| T880 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.2986138140 |
|
|
Aug 15 07:34:47 PM PDT 24 |
Aug 15 07:43:43 PM PDT 24 |
5689214514 ps |
| T743 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.1065244699 |
|
|
Aug 15 07:12:29 PM PDT 24 |
Aug 15 07:22:37 PM PDT 24 |
4733671302 ps |
| T745 |
/workspace/coverage/default/0.chip_tap_straps_dev.748989572 |
|
|
Aug 15 07:08:17 PM PDT 24 |
Aug 15 07:38:02 PM PDT 24 |
18982782085 ps |
| T1251 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.2909611874 |
|
|
Aug 15 07:30:25 PM PDT 24 |
Aug 15 08:10:16 PM PDT 24 |
12911403848 ps |
| T1252 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.931578359 |
|
|
Aug 15 07:10:47 PM PDT 24 |
Aug 15 08:30:05 PM PDT 24 |
16783018400 ps |
| T765 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.267436364 |
|
|
Aug 15 07:08:51 PM PDT 24 |
Aug 15 07:36:59 PM PDT 24 |
22365945064 ps |
| T54 |
/workspace/coverage/default/1.chip_sw_spi_device_pinmux_sleep_retention.2802288521 |
|
|
Aug 15 07:13:49 PM PDT 24 |
Aug 15 07:19:27 PM PDT 24 |
4094391469 ps |
| T1253 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.2959615891 |
|
|
Aug 15 07:21:28 PM PDT 24 |
Aug 15 08:25:10 PM PDT 24 |
14461613760 ps |
| T1254 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.2095861794 |
|
|
Aug 15 07:07:58 PM PDT 24 |
Aug 15 07:12:50 PM PDT 24 |
3244237882 ps |
| T832 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.157552484 |
|
|
Aug 15 07:37:52 PM PDT 24 |
Aug 15 07:46:44 PM PDT 24 |
4577696622 ps |
| T879 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.3406994624 |
|
|
Aug 15 07:32:26 PM PDT 24 |
Aug 15 07:39:40 PM PDT 24 |
3731271560 ps |
| T812 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.1071726761 |
|
|
Aug 15 07:37:22 PM PDT 24 |
Aug 15 07:44:33 PM PDT 24 |
4271224936 ps |
| T1255 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.4198318604 |
|
|
Aug 15 07:14:15 PM PDT 24 |
Aug 15 07:24:56 PM PDT 24 |
4343060632 ps |
| T1256 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.2391350608 |
|
|
Aug 15 07:31:19 PM PDT 24 |
Aug 15 08:25:27 PM PDT 24 |
15681351937 ps |
| T26 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.1162485467 |
|
|
Aug 15 07:05:23 PM PDT 24 |
Aug 15 09:03:35 PM PDT 24 |
31897161850 ps |
| T1257 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.166944373 |
|
|
Aug 15 07:33:28 PM PDT 24 |
Aug 15 07:46:48 PM PDT 24 |
5901762782 ps |
| T1258 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.2689997521 |
|
|
Aug 15 07:07:29 PM PDT 24 |
Aug 15 07:24:29 PM PDT 24 |
4929258376 ps |
| T1259 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2561242711 |
|
|
Aug 15 07:25:48 PM PDT 24 |
Aug 15 08:37:05 PM PDT 24 |
24601300596 ps |
| T365 |
/workspace/coverage/default/0.chip_sw_hmac_enc.2185683300 |
|
|
Aug 15 07:06:45 PM PDT 24 |
Aug 15 07:10:47 PM PDT 24 |
2496034042 ps |
| T1260 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.354613073 |
|
|
Aug 15 07:33:10 PM PDT 24 |
Aug 15 07:44:25 PM PDT 24 |
5651359872 ps |
| T1261 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.2355476741 |
|
|
Aug 15 07:14:10 PM PDT 24 |
Aug 15 07:26:29 PM PDT 24 |
7071166480 ps |
| T847 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.3779872559 |
|
|
Aug 15 07:34:47 PM PDT 24 |
Aug 15 07:47:21 PM PDT 24 |
5456934440 ps |
| T1262 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.4253933831 |
|
|
Aug 15 07:09:25 PM PDT 24 |
Aug 15 07:24:01 PM PDT 24 |
13093474957 ps |
| T1263 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.3094209819 |
|
|
Aug 15 07:12:23 PM PDT 24 |
Aug 15 07:45:01 PM PDT 24 |
23382768550 ps |
| T1264 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.3497613439 |
|
|
Aug 15 07:12:42 PM PDT 24 |
Aug 15 08:11:49 PM PDT 24 |
15484103232 ps |
| T867 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.2008352972 |
|
|
Aug 15 07:30:56 PM PDT 24 |
Aug 15 07:37:35 PM PDT 24 |
3686908728 ps |