| T789 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.749125527 |
|
|
Aug 15 07:30:41 PM PDT 24 |
Aug 15 07:38:01 PM PDT 24 |
4036253932 ps |
| T1265 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.3712721218 |
|
|
Aug 15 07:10:49 PM PDT 24 |
Aug 15 07:16:41 PM PDT 24 |
3022844358 ps |
| T1266 |
/workspace/coverage/default/2.chip_sw_example_concurrency.696189136 |
|
|
Aug 15 07:19:12 PM PDT 24 |
Aug 15 07:23:10 PM PDT 24 |
3149643340 ps |
| T1267 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.1701757654 |
|
|
Aug 15 07:05:17 PM PDT 24 |
Aug 15 08:41:55 PM PDT 24 |
27943407870 ps |
| T1268 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.2011161095 |
|
|
Aug 15 07:35:18 PM PDT 24 |
Aug 15 07:47:46 PM PDT 24 |
4675662680 ps |
| T1269 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.878698511 |
|
|
Aug 15 07:31:31 PM PDT 24 |
Aug 15 07:43:21 PM PDT 24 |
6144460088 ps |
| T1270 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.1529426067 |
|
|
Aug 15 07:14:37 PM PDT 24 |
Aug 15 08:47:26 PM PDT 24 |
17773573152 ps |
| T854 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.637099778 |
|
|
Aug 15 07:36:57 PM PDT 24 |
Aug 15 07:45:30 PM PDT 24 |
3478466834 ps |
| T1271 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.599731704 |
|
|
Aug 15 07:21:41 PM PDT 24 |
Aug 15 08:03:27 PM PDT 24 |
29217733025 ps |
| T300 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3935505062 |
|
|
Aug 15 07:08:18 PM PDT 24 |
Aug 15 07:17:01 PM PDT 24 |
4329465160 ps |
| T1272 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.3669529644 |
|
|
Aug 15 07:07:50 PM PDT 24 |
Aug 15 07:34:10 PM PDT 24 |
7338978660 ps |
| T1273 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.2769116411 |
|
|
Aug 15 07:30:54 PM PDT 24 |
Aug 15 07:43:08 PM PDT 24 |
9864423759 ps |
| T837 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.1140482354 |
|
|
Aug 15 07:37:01 PM PDT 24 |
Aug 15 07:44:13 PM PDT 24 |
3959062028 ps |
| T1274 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.2995426668 |
|
|
Aug 15 07:17:56 PM PDT 24 |
Aug 15 07:23:07 PM PDT 24 |
3644226982 ps |
| T336 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.2324020061 |
|
|
Aug 15 07:19:16 PM PDT 24 |
Aug 15 07:29:44 PM PDT 24 |
4595962724 ps |
| T1275 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.2496893883 |
|
|
Aug 15 07:09:02 PM PDT 24 |
Aug 15 07:13:03 PM PDT 24 |
3238206756 ps |
| T1276 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.2470204950 |
|
|
Aug 15 07:07:53 PM PDT 24 |
Aug 15 07:18:05 PM PDT 24 |
4496826348 ps |
| T1277 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.232424372 |
|
|
Aug 15 07:30:50 PM PDT 24 |
Aug 15 07:44:15 PM PDT 24 |
10971601670 ps |
| T1278 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.533751004 |
|
|
Aug 15 07:29:17 PM PDT 24 |
Aug 15 07:32:55 PM PDT 24 |
2581666664 ps |
| T1279 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.2265662526 |
|
|
Aug 15 07:13:11 PM PDT 24 |
Aug 15 07:18:19 PM PDT 24 |
3751824318 ps |
| T1280 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.2246668470 |
|
|
Aug 15 07:13:25 PM PDT 24 |
Aug 15 08:25:33 PM PDT 24 |
19345159822 ps |
| T1281 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.1272648296 |
|
|
Aug 15 07:12:16 PM PDT 24 |
Aug 15 07:35:21 PM PDT 24 |
7531742880 ps |
| T857 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.1314522045 |
|
|
Aug 15 07:36:16 PM PDT 24 |
Aug 15 07:44:48 PM PDT 24 |
4731016000 ps |
| T1282 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.1484268464 |
|
|
Aug 15 07:32:32 PM PDT 24 |
Aug 15 08:33:21 PM PDT 24 |
14376723680 ps |
| T373 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3804003771 |
|
|
Aug 15 07:35:31 PM PDT 24 |
Aug 15 07:43:47 PM PDT 24 |
4025228644 ps |
| T853 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.4025878308 |
|
|
Aug 15 07:06:53 PM PDT 24 |
Aug 15 07:13:57 PM PDT 24 |
3583959504 ps |
| T1283 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.4043576907 |
|
|
Aug 15 07:16:07 PM PDT 24 |
Aug 15 07:22:01 PM PDT 24 |
3900663152 ps |
| T1284 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.1753768251 |
|
|
Aug 15 07:07:50 PM PDT 24 |
Aug 15 07:41:19 PM PDT 24 |
7172108016 ps |
| T1285 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.2416792459 |
|
|
Aug 15 07:31:35 PM PDT 24 |
Aug 15 08:17:53 PM PDT 24 |
11673256353 ps |
| T801 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.2212615231 |
|
|
Aug 15 07:35:11 PM PDT 24 |
Aug 15 07:43:58 PM PDT 24 |
4113943232 ps |
| T792 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.2756814058 |
|
|
Aug 15 07:32:32 PM PDT 24 |
Aug 15 07:44:37 PM PDT 24 |
5923512650 ps |
| T1286 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.771996936 |
|
|
Aug 15 07:08:52 PM PDT 24 |
Aug 15 07:33:52 PM PDT 24 |
8016382000 ps |
| T332 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.3687878259 |
|
|
Aug 15 07:25:36 PM PDT 24 |
Aug 15 07:39:02 PM PDT 24 |
4492025000 ps |
| T1287 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.1382612043 |
|
|
Aug 15 07:23:15 PM PDT 24 |
Aug 15 07:54:34 PM PDT 24 |
25163249578 ps |
| T1288 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.1275261627 |
|
|
Aug 15 07:15:13 PM PDT 24 |
Aug 15 08:37:58 PM PDT 24 |
23082843856 ps |
| T820 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.3792366269 |
|
|
Aug 15 07:37:39 PM PDT 24 |
Aug 15 07:48:33 PM PDT 24 |
5527499960 ps |
| T93 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.1104642867 |
|
|
Aug 15 07:31:38 PM PDT 24 |
Aug 15 07:39:38 PM PDT 24 |
3700749172 ps |
| T95 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.828810704 |
|
|
Aug 15 07:05:23 PM PDT 24 |
Aug 15 07:14:36 PM PDT 24 |
3945073661 ps |
| T96 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.666819497 |
|
|
Aug 15 07:31:55 PM PDT 24 |
Aug 15 07:36:01 PM PDT 24 |
3461501276 ps |
| T97 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.367927039 |
|
|
Aug 15 07:21:04 PM PDT 24 |
Aug 15 07:31:41 PM PDT 24 |
4555892404 ps |
| T98 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.3112031018 |
|
|
Aug 15 07:06:17 PM PDT 24 |
Aug 15 07:17:50 PM PDT 24 |
5779991420 ps |
| T99 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.3177867149 |
|
|
Aug 15 07:30:53 PM PDT 24 |
Aug 15 07:43:17 PM PDT 24 |
5652364192 ps |
| T100 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2823416526 |
|
|
Aug 15 07:29:21 PM PDT 24 |
Aug 15 07:38:27 PM PDT 24 |
4982704868 ps |
| T101 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.1266688995 |
|
|
Aug 15 07:15:16 PM PDT 24 |
Aug 15 07:23:22 PM PDT 24 |
4574119168 ps |
| T102 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.1904046494 |
|
|
Aug 15 07:35:03 PM PDT 24 |
Aug 15 07:47:52 PM PDT 24 |
5120635640 ps |
| T103 |
/workspace/coverage/default/2.chip_tap_straps_rma.2382834099 |
|
|
Aug 15 07:24:42 PM PDT 24 |
Aug 15 07:44:59 PM PDT 24 |
13097056479 ps |
| T1289 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3835428339 |
|
|
Aug 15 07:06:41 PM PDT 24 |
Aug 15 07:34:45 PM PDT 24 |
15351546898 ps |
| T813 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.4095192267 |
|
|
Aug 15 07:33:26 PM PDT 24 |
Aug 15 07:43:38 PM PDT 24 |
6003345548 ps |
| T1290 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.1274439041 |
|
|
Aug 15 07:06:28 PM PDT 24 |
Aug 15 11:06:12 PM PDT 24 |
77925392064 ps |
| T1291 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.2806011640 |
|
|
Aug 15 07:15:35 PM PDT 24 |
Aug 15 08:14:12 PM PDT 24 |
17412163640 ps |
| T821 |
/workspace/coverage/default/40.chip_sw_all_escalation_resets.239654324 |
|
|
Aug 15 07:34:58 PM PDT 24 |
Aug 15 07:45:19 PM PDT 24 |
4905206826 ps |
| T1292 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.2751697658 |
|
|
Aug 15 07:27:48 PM PDT 24 |
Aug 15 07:32:39 PM PDT 24 |
2879650488 ps |
| T1293 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.3382851472 |
|
|
Aug 15 07:11:32 PM PDT 24 |
Aug 15 07:22:24 PM PDT 24 |
4344177264 ps |
| T1294 |
/workspace/coverage/default/1.chip_sw_edn_kat.1415075698 |
|
|
Aug 15 07:12:19 PM PDT 24 |
Aug 15 07:24:05 PM PDT 24 |
3473533256 ps |
| T814 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1989461091 |
|
|
Aug 15 07:34:18 PM PDT 24 |
Aug 15 07:41:42 PM PDT 24 |
3578854730 ps |
| T1295 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.299902556 |
|
|
Aug 15 07:29:01 PM PDT 24 |
Aug 15 07:39:50 PM PDT 24 |
3842865940 ps |
| T1296 |
/workspace/coverage/default/2.chip_sw_aes_idle.4292768429 |
|
|
Aug 15 07:23:39 PM PDT 24 |
Aug 15 07:29:02 PM PDT 24 |
2793901206 ps |
| T1297 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.3877107313 |
|
|
Aug 15 07:07:30 PM PDT 24 |
Aug 15 07:37:11 PM PDT 24 |
11251073482 ps |
| T1298 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2457513776 |
|
|
Aug 15 07:30:06 PM PDT 24 |
Aug 15 07:37:10 PM PDT 24 |
3801868304 ps |
| T775 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.2520558284 |
|
|
Aug 15 07:09:34 PM PDT 24 |
Aug 15 07:41:48 PM PDT 24 |
11447953108 ps |
| T1299 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.537911951 |
|
|
Aug 15 07:13:04 PM PDT 24 |
Aug 15 07:17:20 PM PDT 24 |
2264313390 ps |
| T1300 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.1825363203 |
|
|
Aug 15 07:11:18 PM PDT 24 |
Aug 15 07:29:54 PM PDT 24 |
5989210376 ps |
| T829 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.2082251439 |
|
|
Aug 15 07:34:08 PM PDT 24 |
Aug 15 07:39:40 PM PDT 24 |
3911544000 ps |
| T1301 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.3098268296 |
|
|
Aug 15 07:13:59 PM PDT 24 |
Aug 15 09:12:35 PM PDT 24 |
24537358096 ps |
| T55 |
/workspace/coverage/default/0.chip_sw_spi_device_pinmux_sleep_retention.2227248685 |
|
|
Aug 15 07:07:01 PM PDT 24 |
Aug 15 07:11:46 PM PDT 24 |
3688070400 ps |
| T848 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.4139439208 |
|
|
Aug 15 07:31:51 PM PDT 24 |
Aug 15 07:38:11 PM PDT 24 |
3832005110 ps |
| T1302 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.3683981873 |
|
|
Aug 15 07:04:39 PM PDT 24 |
Aug 15 07:29:14 PM PDT 24 |
8549569990 ps |
| T1303 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.458464372 |
|
|
Aug 15 07:23:17 PM PDT 24 |
Aug 15 07:42:21 PM PDT 24 |
7300377989 ps |
| T295 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.51580278 |
|
|
Aug 15 07:08:52 PM PDT 24 |
Aug 15 07:13:01 PM PDT 24 |
2690560338 ps |
| T1304 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.2375865925 |
|
|
Aug 15 07:10:33 PM PDT 24 |
Aug 15 07:17:39 PM PDT 24 |
4911385784 ps |
| T1305 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.2266603 |
|
|
Aug 15 07:10:37 PM PDT 24 |
Aug 15 07:27:55 PM PDT 24 |
5746089902 ps |
| T1306 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.3515877798 |
|
|
Aug 15 07:21:24 PM PDT 24 |
Aug 15 07:30:37 PM PDT 24 |
5919795778 ps |
| T1307 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_power_glitch_reset.13296278 |
|
|
Aug 15 07:12:13 PM PDT 24 |
Aug 15 07:19:17 PM PDT 24 |
4795142838 ps |
| T1308 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.2579856785 |
|
|
Aug 15 07:16:01 PM PDT 24 |
Aug 15 07:26:04 PM PDT 24 |
4112542092 ps |
| T1309 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.3406880782 |
|
|
Aug 15 07:11:21 PM PDT 24 |
Aug 15 07:40:08 PM PDT 24 |
22612799770 ps |
| T882 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.3206479078 |
|
|
Aug 15 07:32:20 PM PDT 24 |
Aug 15 07:38:40 PM PDT 24 |
3572816470 ps |
| T1310 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.1452384225 |
|
|
Aug 15 07:13:55 PM PDT 24 |
Aug 15 08:27:58 PM PDT 24 |
17817708943 ps |
| T1311 |
/workspace/coverage/default/0.rom_e2e_static_critical.609216438 |
|
|
Aug 15 07:14:14 PM PDT 24 |
Aug 15 08:28:43 PM PDT 24 |
17089184552 ps |
| T174 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.3206714421 |
|
|
Aug 15 07:16:46 PM PDT 24 |
Aug 15 07:26:40 PM PDT 24 |
5414720360 ps |
| T1312 |
/workspace/coverage/default/1.chip_sw_hmac_oneshot.1207821686 |
|
|
Aug 15 07:13:26 PM PDT 24 |
Aug 15 07:19:24 PM PDT 24 |
3112214782 ps |
| T1313 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.586686261 |
|
|
Aug 15 07:10:22 PM PDT 24 |
Aug 15 07:14:38 PM PDT 24 |
2437052242 ps |
| T1314 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.1031975731 |
|
|
Aug 15 07:14:15 PM PDT 24 |
Aug 15 07:25:38 PM PDT 24 |
8613893237 ps |
| T1315 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.2743497579 |
|
|
Aug 15 07:33:33 PM PDT 24 |
Aug 15 08:21:26 PM PDT 24 |
14551990480 ps |
| T1316 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.996908400 |
|
|
Aug 15 07:05:20 PM PDT 24 |
Aug 15 07:18:26 PM PDT 24 |
3888047466 ps |
| T1317 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.2916932218 |
|
|
Aug 15 07:18:08 PM PDT 24 |
Aug 15 07:23:04 PM PDT 24 |
2928585854 ps |
| T1318 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.461417792 |
|
|
Aug 15 07:11:16 PM PDT 24 |
Aug 15 07:19:17 PM PDT 24 |
5027071439 ps |
| T1319 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.1602621485 |
|
|
Aug 15 07:10:03 PM PDT 24 |
Aug 15 07:24:01 PM PDT 24 |
5604951394 ps |
| T1320 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.1764344509 |
|
|
Aug 15 07:08:29 PM PDT 24 |
Aug 15 07:18:04 PM PDT 24 |
4202619574 ps |
| T1321 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1561841774 |
|
|
Aug 15 07:14:37 PM PDT 24 |
Aug 15 07:26:38 PM PDT 24 |
4602617142 ps |
| T865 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.769417340 |
|
|
Aug 15 07:36:41 PM PDT 24 |
Aug 15 07:43:25 PM PDT 24 |
4331526328 ps |
| T1322 |
/workspace/coverage/default/0.chip_sw_aes_enc.2293378462 |
|
|
Aug 15 07:06:58 PM PDT 24 |
Aug 15 07:12:13 PM PDT 24 |
3057987560 ps |
| T1323 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.2174739237 |
|
|
Aug 15 07:10:22 PM PDT 24 |
Aug 15 07:14:08 PM PDT 24 |
3520871640 ps |
| T1324 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.1114775889 |
|
|
Aug 15 07:05:42 PM PDT 24 |
Aug 15 08:34:38 PM PDT 24 |
52183402504 ps |
| T746 |
/workspace/coverage/default/3.chip_tap_straps_dev.3613704713 |
|
|
Aug 15 07:33:22 PM PDT 24 |
Aug 15 07:57:09 PM PDT 24 |
13779648471 ps |
| T1325 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.366925317 |
|
|
Aug 15 07:23:17 PM PDT 24 |
Aug 15 07:29:44 PM PDT 24 |
3612764220 ps |
| T203 |
/workspace/coverage/default/0.chip_jtag_mem_access.1135868424 |
|
|
Aug 15 06:58:45 PM PDT 24 |
Aug 15 07:24:59 PM PDT 24 |
13473563318 ps |
| T250 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.2583175808 |
|
|
Aug 15 07:30:34 PM PDT 24 |
Aug 15 07:37:28 PM PDT 24 |
4069751980 ps |
| T1326 |
/workspace/coverage/default/2.chip_tap_straps_prod.80652025 |
|
|
Aug 15 07:25:17 PM PDT 24 |
Aug 15 07:53:49 PM PDT 24 |
14393323437 ps |
| T1327 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2770737854 |
|
|
Aug 15 07:06:44 PM PDT 24 |
Aug 15 07:18:05 PM PDT 24 |
19355925584 ps |
| T1328 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3655640773 |
|
|
Aug 15 07:17:16 PM PDT 24 |
Aug 15 07:24:52 PM PDT 24 |
7554616860 ps |
| T1329 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.596051054 |
|
|
Aug 15 07:30:46 PM PDT 24 |
Aug 15 07:44:41 PM PDT 24 |
8724800229 ps |
| T1330 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.1995720169 |
|
|
Aug 15 07:25:31 PM PDT 24 |
Aug 15 07:54:41 PM PDT 24 |
26836994678 ps |
| T1331 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.326449993 |
|
|
Aug 15 07:06:19 PM PDT 24 |
Aug 15 07:23:02 PM PDT 24 |
10016895488 ps |
| T339 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.3721282556 |
|
|
Aug 15 07:10:20 PM PDT 24 |
Aug 15 07:20:39 PM PDT 24 |
4484116074 ps |
| T30 |
/workspace/coverage/default/0.chip_sw_gpio.4135355908 |
|
|
Aug 15 07:06:03 PM PDT 24 |
Aug 15 07:14:21 PM PDT 24 |
4732563700 ps |
| T1332 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.3459287470 |
|
|
Aug 15 07:05:09 PM PDT 24 |
Aug 15 07:10:26 PM PDT 24 |
2684245719 ps |
| T1333 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.141245648 |
|
|
Aug 15 07:24:37 PM PDT 24 |
Aug 15 07:30:18 PM PDT 24 |
2441967280 ps |
| T1334 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.1724102093 |
|
|
Aug 15 07:10:04 PM PDT 24 |
Aug 15 07:25:01 PM PDT 24 |
7445345340 ps |
| T1335 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.3305428875 |
|
|
Aug 15 07:06:08 PM PDT 24 |
Aug 15 10:10:09 PM PDT 24 |
58145592442 ps |
| T1336 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.2996864260 |
|
|
Aug 15 07:15:54 PM PDT 24 |
Aug 15 08:10:10 PM PDT 24 |
15103982227 ps |
| T840 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.834151314 |
|
|
Aug 15 07:39:59 PM PDT 24 |
Aug 15 07:50:21 PM PDT 24 |
5009677716 ps |
| T1337 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.2402121878 |
|
|
Aug 15 07:06:32 PM PDT 24 |
Aug 15 07:51:33 PM PDT 24 |
11089098216 ps |
| T1338 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.3895238030 |
|
|
Aug 15 07:22:31 PM PDT 24 |
Aug 15 07:33:46 PM PDT 24 |
5510986720 ps |
| T1339 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.4000832640 |
|
|
Aug 15 07:31:35 PM PDT 24 |
Aug 15 07:38:11 PM PDT 24 |
3153315384 ps |
| T1340 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2605021104 |
|
|
Aug 15 07:08:24 PM PDT 24 |
Aug 15 07:19:17 PM PDT 24 |
3770319288 ps |
| T1341 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.1295074043 |
|
|
Aug 15 07:24:21 PM PDT 24 |
Aug 15 07:36:21 PM PDT 24 |
4994142820 ps |
| T1342 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.2929556434 |
|
|
Aug 15 07:19:35 PM PDT 24 |
Aug 15 07:32:58 PM PDT 24 |
4681146428 ps |
| T1343 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.53138885 |
|
|
Aug 15 07:10:12 PM PDT 24 |
Aug 15 07:15:18 PM PDT 24 |
2840190839 ps |
| T1344 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.4261152241 |
|
|
Aug 15 07:39:19 PM PDT 24 |
Aug 15 07:45:00 PM PDT 24 |
4074350950 ps |
| T1345 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.1343585863 |
|
|
Aug 15 07:05:23 PM PDT 24 |
Aug 15 07:25:04 PM PDT 24 |
7804471120 ps |
| T1346 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.3139619991 |
|
|
Aug 15 07:20:39 PM PDT 24 |
Aug 15 07:40:00 PM PDT 24 |
5558775387 ps |
| T1347 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.1300745096 |
|
|
Aug 15 07:29:16 PM PDT 24 |
Aug 15 07:40:11 PM PDT 24 |
3780121324 ps |
| T1348 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.1620061748 |
|
|
Aug 15 07:12:28 PM PDT 24 |
Aug 15 08:24:12 PM PDT 24 |
14999170214 ps |
| T252 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.3987988666 |
|
|
Aug 15 07:06:33 PM PDT 24 |
Aug 15 07:10:25 PM PDT 24 |
3138431968 ps |
| T883 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.3166564398 |
|
|
Aug 15 07:35:54 PM PDT 24 |
Aug 15 07:45:00 PM PDT 24 |
5509628160 ps |
| T299 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.1727761727 |
|
|
Aug 15 07:06:35 PM PDT 24 |
Aug 15 07:18:02 PM PDT 24 |
7552711597 ps |
| T871 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.130379282 |
|
|
Aug 15 07:36:39 PM PDT 24 |
Aug 15 07:43:44 PM PDT 24 |
4132890018 ps |
| T1349 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.1069705894 |
|
|
Aug 15 07:09:34 PM PDT 24 |
Aug 15 07:12:59 PM PDT 24 |
2584441812 ps |
| T1350 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2561560524 |
|
|
Aug 15 07:22:06 PM PDT 24 |
Aug 15 07:38:38 PM PDT 24 |
8220942900 ps |
| T1351 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.2131312202 |
|
|
Aug 15 07:13:27 PM PDT 24 |
Aug 15 10:14:23 PM PDT 24 |
64991275057 ps |
| T1352 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3526914710 |
|
|
Aug 15 07:21:09 PM PDT 24 |
Aug 15 07:30:22 PM PDT 24 |
4741211300 ps |
| T1353 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.2273251728 |
|
|
Aug 15 07:07:17 PM PDT 24 |
Aug 15 07:13:23 PM PDT 24 |
3249513549 ps |
| T1354 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.3095012350 |
|
|
Aug 15 07:30:53 PM PDT 24 |
Aug 15 07:46:53 PM PDT 24 |
10453679458 ps |
| T1355 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.3606913780 |
|
|
Aug 15 07:14:56 PM PDT 24 |
Aug 15 07:20:32 PM PDT 24 |
3480919292 ps |
| T372 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.141059741 |
|
|
Aug 15 07:08:21 PM PDT 24 |
Aug 15 07:15:40 PM PDT 24 |
6874559642 ps |
| T1356 |
/workspace/coverage/default/1.chip_sw_hmac_enc.4014203221 |
|
|
Aug 15 07:14:24 PM PDT 24 |
Aug 15 07:18:51 PM PDT 24 |
3043350344 ps |
| T1357 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.2132166536 |
|
|
Aug 15 07:14:11 PM PDT 24 |
Aug 15 07:58:11 PM PDT 24 |
10770725688 ps |
| T59 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.2523095928 |
|
|
Aug 15 07:09:51 PM PDT 24 |
Aug 15 07:14:09 PM PDT 24 |
2732375436 ps |
| T1358 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.2811526359 |
|
|
Aug 15 07:25:03 PM PDT 24 |
Aug 15 07:43:28 PM PDT 24 |
11338545084 ps |
| T1359 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1790701629 |
|
|
Aug 15 07:25:38 PM PDT 24 |
Aug 15 07:37:10 PM PDT 24 |
4072887818 ps |
| T1360 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.2828554901 |
|
|
Aug 15 07:07:35 PM PDT 24 |
Aug 15 07:24:23 PM PDT 24 |
9216668840 ps |
| T1361 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.2484250469 |
|
|
Aug 15 07:23:47 PM PDT 24 |
Aug 15 07:32:46 PM PDT 24 |
5884306844 ps |
| T142 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.3841975880 |
|
|
Aug 15 07:27:04 PM PDT 24 |
Aug 15 08:01:05 PM PDT 24 |
15401453356 ps |
| T1362 |
/workspace/coverage/default/3.chip_tap_straps_prod.4121046815 |
|
|
Aug 15 07:28:12 PM PDT 24 |
Aug 15 07:30:53 PM PDT 24 |
2609868405 ps |
| T1363 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3371164109 |
|
|
Aug 15 07:28:56 PM PDT 24 |
Aug 15 07:44:08 PM PDT 24 |
8401211212 ps |
| T66 |
/workspace/coverage/default/1.chip_sw_alert_test.1641069965 |
|
|
Aug 15 07:13:37 PM PDT 24 |
Aug 15 07:18:46 PM PDT 24 |
2840445594 ps |
| T1364 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.108622195 |
|
|
Aug 15 07:17:47 PM PDT 24 |
Aug 15 07:27:21 PM PDT 24 |
4911301862 ps |
| T364 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.3640412882 |
|
|
Aug 15 07:20:29 PM PDT 24 |
Aug 15 07:31:33 PM PDT 24 |
3277783270 ps |
| T1365 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.1553322521 |
|
|
Aug 15 07:11:51 PM PDT 24 |
Aug 15 07:43:57 PM PDT 24 |
11187319287 ps |
| T1366 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.3797875572 |
|
|
Aug 15 07:18:05 PM PDT 24 |
Aug 15 08:24:25 PM PDT 24 |
14594087772 ps |
| T873 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.3218072032 |
|
|
Aug 15 07:32:31 PM PDT 24 |
Aug 15 07:38:55 PM PDT 24 |
3231199184 ps |
| T1367 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.3557708740 |
|
|
Aug 15 07:05:28 PM PDT 24 |
Aug 15 07:11:44 PM PDT 24 |
7206253598 ps |
| T1368 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2890872246 |
|
|
Aug 15 07:21:52 PM PDT 24 |
Aug 15 07:59:45 PM PDT 24 |
19713145134 ps |
| T1369 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.3936237925 |
|
|
Aug 15 07:23:49 PM PDT 24 |
Aug 15 07:43:18 PM PDT 24 |
6456487900 ps |
| T1370 |
/workspace/coverage/default/1.chip_sw_example_flash.4200039866 |
|
|
Aug 15 07:10:51 PM PDT 24 |
Aug 15 07:14:27 PM PDT 24 |
2433143536 ps |
| T1371 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.3916793868 |
|
|
Aug 15 07:07:21 PM PDT 24 |
Aug 15 07:12:35 PM PDT 24 |
3878058028 ps |
| T1372 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.2845719847 |
|
|
Aug 15 07:17:48 PM PDT 24 |
Aug 15 07:22:58 PM PDT 24 |
3539240161 ps |
| T841 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.944615073 |
|
|
Aug 15 07:35:07 PM PDT 24 |
Aug 15 07:45:01 PM PDT 24 |
5548191384 ps |
| T1373 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.2930614144 |
|
|
Aug 15 07:23:30 PM PDT 24 |
Aug 15 07:40:24 PM PDT 24 |
7003050836 ps |
| T1374 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.4207181041 |
|
|
Aug 15 07:04:48 PM PDT 24 |
Aug 15 07:20:47 PM PDT 24 |
11196922091 ps |
| T1375 |
/workspace/coverage/default/4.chip_tap_straps_dev.1014519503 |
|
|
Aug 15 07:29:58 PM PDT 24 |
Aug 15 07:32:41 PM PDT 24 |
2448470116 ps |
| T1376 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.4112569330 |
|
|
Aug 15 07:14:56 PM PDT 24 |
Aug 15 07:18:28 PM PDT 24 |
2051945042 ps |
| T1377 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.2122644452 |
|
|
Aug 15 07:30:44 PM PDT 24 |
Aug 15 08:39:28 PM PDT 24 |
22375498176 ps |
| T1378 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.568565480 |
|
|
Aug 15 07:06:11 PM PDT 24 |
Aug 15 07:16:14 PM PDT 24 |
4215984332 ps |
| T1379 |
/workspace/coverage/default/0.chip_sw_example_rom.932209170 |
|
|
Aug 15 07:03:12 PM PDT 24 |
Aug 15 07:05:16 PM PDT 24 |
2197350500 ps |
| T1380 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.831573694 |
|
|
Aug 15 07:38:20 PM PDT 24 |
Aug 15 07:42:57 PM PDT 24 |
3366893144 ps |
| T1381 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.3977417487 |
|
|
Aug 15 07:22:00 PM PDT 24 |
Aug 15 07:35:31 PM PDT 24 |
9812469102 ps |
| T1382 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.2298501742 |
|
|
Aug 15 07:11:12 PM PDT 24 |
Aug 15 11:03:27 PM PDT 24 |
79253717330 ps |
| T881 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.3985108114 |
|
|
Aug 15 07:37:19 PM PDT 24 |
Aug 15 07:46:13 PM PDT 24 |
4396940920 ps |
| T1383 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1081688069 |
|
|
Aug 15 07:21:04 PM PDT 24 |
Aug 15 07:27:02 PM PDT 24 |
5762586292 ps |
| T342 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.3996936059 |
|
|
Aug 15 07:27:03 PM PDT 24 |
Aug 15 07:35:03 PM PDT 24 |
3762610520 ps |
| T374 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.3203481059 |
|
|
Aug 15 07:34:28 PM PDT 24 |
Aug 15 07:42:33 PM PDT 24 |
3516621888 ps |
| T1384 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.1894216379 |
|
|
Aug 15 07:11:59 PM PDT 24 |
Aug 15 07:17:54 PM PDT 24 |
2752590520 ps |
| T1385 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.3852037649 |
|
|
Aug 15 07:06:06 PM PDT 24 |
Aug 15 07:14:01 PM PDT 24 |
4102496580 ps |
| T1386 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.1827664343 |
|
|
Aug 15 07:06:39 PM PDT 24 |
Aug 15 08:10:33 PM PDT 24 |
18913696122 ps |
| T204 |
/workspace/coverage/default/2.chip_jtag_mem_access.2101495572 |
|
|
Aug 15 07:18:09 PM PDT 24 |
Aug 15 07:41:32 PM PDT 24 |
13314924036 ps |
| T1387 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.4040281951 |
|
|
Aug 15 07:24:44 PM PDT 24 |
Aug 15 08:22:01 PM PDT 24 |
17024860600 ps |
| T1388 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.512291148 |
|
|
Aug 15 07:17:39 PM PDT 24 |
Aug 15 08:07:43 PM PDT 24 |
11595255264 ps |
| T337 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.2189025841 |
|
|
Aug 15 07:21:41 PM PDT 24 |
Aug 15 07:38:28 PM PDT 24 |
5187052528 ps |
| T1389 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.98767362 |
|
|
Aug 15 07:27:56 PM PDT 24 |
Aug 15 07:32:15 PM PDT 24 |
3066729182 ps |
| T1390 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.3686233099 |
|
|
Aug 15 07:23:08 PM PDT 24 |
Aug 15 08:27:06 PM PDT 24 |
15150869330 ps |
| T1391 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.382798897 |
|
|
Aug 15 07:20:32 PM PDT 24 |
Aug 15 07:28:08 PM PDT 24 |
3272232888 ps |
| T1392 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.1587214760 |
|
|
Aug 15 07:17:21 PM PDT 24 |
Aug 15 08:12:23 PM PDT 24 |
15396552616 ps |
| T67 |
/workspace/coverage/default/0.chip_sw_alert_test.4014655811 |
|
|
Aug 15 07:05:24 PM PDT 24 |
Aug 15 07:10:24 PM PDT 24 |
2818250132 ps |
| T1393 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.1886996117 |
|
|
Aug 15 07:07:25 PM PDT 24 |
Aug 15 08:14:42 PM PDT 24 |
20352364821 ps |
| T56 |
/workspace/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.555866597 |
|
|
Aug 15 07:21:00 PM PDT 24 |
Aug 15 07:25:50 PM PDT 24 |
4041990208 ps |
| T1394 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.3348507954 |
|
|
Aug 15 07:08:19 PM PDT 24 |
Aug 15 07:20:20 PM PDT 24 |
5680005840 ps |
| T1395 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.2047969853 |
|
|
Aug 15 07:08:57 PM PDT 24 |
Aug 15 07:18:00 PM PDT 24 |
4239553160 ps |
| T1396 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.21192723 |
|
|
Aug 15 07:10:35 PM PDT 24 |
Aug 15 07:19:02 PM PDT 24 |
10004803581 ps |
| T1397 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.1229106457 |
|
|
Aug 15 07:20:17 PM PDT 24 |
Aug 15 07:25:23 PM PDT 24 |
3268268736 ps |
| T826 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.4290158228 |
|
|
Aug 15 07:35:53 PM PDT 24 |
Aug 15 07:41:02 PM PDT 24 |
3294183352 ps |
| T838 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.3885765172 |
|
|
Aug 15 07:41:53 PM PDT 24 |
Aug 15 07:51:57 PM PDT 24 |
4567484582 ps |
| T1398 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_power_glitch_reset.219386778 |
|
|
Aug 15 07:04:52 PM PDT 24 |
Aug 15 07:11:40 PM PDT 24 |
6326325243 ps |
| T253 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.1324833612 |
|
|
Aug 15 07:15:23 PM PDT 24 |
Aug 15 07:18:36 PM PDT 24 |
3139901300 ps |
| T1399 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.1116195847 |
|
|
Aug 15 07:24:47 PM PDT 24 |
Aug 15 07:31:40 PM PDT 24 |
6988542399 ps |
| T1400 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.3703093276 |
|
|
Aug 15 07:09:15 PM PDT 24 |
Aug 15 07:53:15 PM PDT 24 |
11974652519 ps |
| T874 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.1602570660 |
|
|
Aug 15 07:37:04 PM PDT 24 |
Aug 15 07:43:19 PM PDT 24 |
3892815222 ps |
| T1401 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.1779372827 |
|
|
Aug 15 07:07:13 PM PDT 24 |
Aug 15 07:20:42 PM PDT 24 |
6372712930 ps |
| T1402 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.2260091026 |
|
|
Aug 15 07:22:06 PM PDT 24 |
Aug 15 07:32:31 PM PDT 24 |
6859189489 ps |
| T265 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.451566538 |
|
|
Aug 15 07:06:35 PM PDT 24 |
Aug 15 07:15:47 PM PDT 24 |
6387088300 ps |
| T884 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.3801189531 |
|
|
Aug 15 07:34:24 PM PDT 24 |
Aug 15 07:40:45 PM PDT 24 |
3679028420 ps |
| T1403 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.3287966180 |
|
|
Aug 15 07:34:12 PM PDT 24 |
Aug 15 07:45:32 PM PDT 24 |
5711541666 ps |
| T1404 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.4198990239 |
|
|
Aug 15 07:09:32 PM PDT 24 |
Aug 15 07:11:20 PM PDT 24 |
2831685275 ps |
| T1405 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.3975795974 |
|
|
Aug 15 07:07:32 PM PDT 24 |
Aug 15 07:11:38 PM PDT 24 |
2819098536 ps |
| T830 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3786338385 |
|
|
Aug 15 07:35:28 PM PDT 24 |
Aug 15 07:43:59 PM PDT 24 |
5018183120 ps |
| T872 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.1675920301 |
|
|
Aug 15 07:36:24 PM PDT 24 |
Aug 15 07:42:16 PM PDT 24 |
3980721704 ps |
| T148 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.736689257 |
|
|
Aug 15 07:04:56 PM PDT 24 |
Aug 15 07:37:28 PM PDT 24 |
7601731700 ps |
| T1406 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.1781239562 |
|
|
Aug 15 07:14:26 PM PDT 24 |
Aug 15 08:47:53 PM PDT 24 |
24204745295 ps |
| T1407 |
/workspace/coverage/default/1.chip_sw_hmac_multistream.3080045116 |
|
|
Aug 15 07:12:34 PM PDT 24 |
Aug 15 07:37:07 PM PDT 24 |
6401419280 ps |
| T1408 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3338214222 |
|
|
Aug 15 07:26:32 PM PDT 24 |
Aug 15 07:31:48 PM PDT 24 |
3522356336 ps |
| T1409 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1378369305 |
|
|
Aug 15 07:16:38 PM PDT 24 |
Aug 15 07:26:38 PM PDT 24 |
5065566622 ps |
| T1410 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.1840663077 |
|
|
Aug 15 07:31:19 PM PDT 24 |
Aug 15 07:41:30 PM PDT 24 |
6272026379 ps |
| T1411 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.131049592 |
|
|
Aug 15 07:29:41 PM PDT 24 |
Aug 15 07:33:34 PM PDT 24 |
2754492704 ps |
| T94 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.701432418 |
|
|
Aug 15 07:33:46 PM PDT 24 |
Aug 15 07:43:06 PM PDT 24 |
5610942000 ps |
| T1412 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.3527916585 |
|
|
Aug 15 07:29:14 PM PDT 24 |
Aug 15 07:40:23 PM PDT 24 |
5070965928 ps |
| T143 |
/workspace/coverage/default/0.chip_sw_ast_clk_rst_inputs.2136401841 |
|
|
Aug 15 07:07:43 PM PDT 24 |
Aug 15 07:41:54 PM PDT 24 |
17321930074 ps |
| T325 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.1011179394 |
|
|
Aug 15 07:23:53 PM PDT 24 |
Aug 15 07:49:47 PM PDT 24 |
7953521076 ps |
| T1413 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.191728275 |
|
|
Aug 15 07:23:02 PM PDT 24 |
Aug 15 07:28:17 PM PDT 24 |
3410357624 ps |
| T776 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.1022189767 |
|
|
Aug 15 07:10:30 PM PDT 24 |
Aug 15 07:42:15 PM PDT 24 |
11181894544 ps |
| T1414 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.520852583 |
|
|
Aug 15 07:27:05 PM PDT 24 |
Aug 15 07:35:46 PM PDT 24 |
3805485500 ps |
| T1415 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.3780442728 |
|
|
Aug 15 07:19:26 PM PDT 24 |
Aug 15 07:25:59 PM PDT 24 |
3372963500 ps |
| T1416 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.2804920333 |
|
|
Aug 15 07:38:09 PM PDT 24 |
Aug 15 07:46:24 PM PDT 24 |
3920557728 ps |
| T1417 |
/workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.626759940 |
|
|
Aug 15 07:09:41 PM PDT 24 |
Aug 15 07:15:29 PM PDT 24 |
4313311632 ps |
| T1418 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.1593472741 |
|
|
Aug 15 07:18:28 PM PDT 24 |
Aug 15 07:22:02 PM PDT 24 |
3268579088 ps |
| T1419 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.1920412408 |
|
|
Aug 15 07:17:41 PM PDT 24 |
Aug 15 08:27:15 PM PDT 24 |
14946467444 ps |
| T1420 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3845157945 |
|
|
Aug 15 07:21:33 PM PDT 24 |
Aug 15 07:29:54 PM PDT 24 |
18495472592 ps |
| T315 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.3855060338 |
|
|
Aug 15 07:13:36 PM PDT 24 |
Aug 15 07:25:33 PM PDT 24 |
4994162440 ps |
| T1421 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.1574927736 |
|
|
Aug 15 07:21:44 PM PDT 24 |
Aug 15 08:28:38 PM PDT 24 |
29523523758 ps |
| T230 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.3903286140 |
|
|
Aug 15 07:22:54 PM PDT 24 |
Aug 15 08:45:55 PM PDT 24 |
47401205711 ps |
| T296 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.690866778 |
|
|
Aug 15 07:25:59 PM PDT 24 |
Aug 15 07:30:31 PM PDT 24 |
2761598376 ps |
| T831 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.258014776 |
|
|
Aug 15 07:35:06 PM PDT 24 |
Aug 15 07:43:57 PM PDT 24 |
5485979136 ps |
| T1422 |
/workspace/coverage/default/3.chip_tap_straps_rma.278703259 |
|
|
Aug 15 07:28:59 PM PDT 24 |
Aug 15 07:32:06 PM PDT 24 |
2485830691 ps |
| T1423 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.3269086396 |
|
|
Aug 15 07:32:56 PM PDT 24 |
Aug 15 07:50:19 PM PDT 24 |
12431523494 ps |
| T1424 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.943890959 |
|
|
Aug 15 07:29:15 PM PDT 24 |
Aug 15 07:41:52 PM PDT 24 |
5922957224 ps |
| T1425 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.1983047011 |
|
|
Aug 15 07:04:00 PM PDT 24 |
Aug 15 07:12:17 PM PDT 24 |
4316580820 ps |
| T1426 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3585209264 |
|
|
Aug 15 07:05:43 PM PDT 24 |
Aug 15 07:13:28 PM PDT 24 |
4681367659 ps |
| T1427 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.1957536620 |
|
|
Aug 15 07:11:33 PM PDT 24 |
Aug 15 08:15:24 PM PDT 24 |
15616747720 ps |
| T1428 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.760900070 |
|
|
Aug 15 07:30:56 PM PDT 24 |
Aug 15 07:41:31 PM PDT 24 |
4741961040 ps |
| T1429 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.2386588122 |
|
|
Aug 15 07:19:00 PM PDT 24 |
Aug 15 07:40:20 PM PDT 24 |
5075328350 ps |
| T1430 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.48351738 |
|
|
Aug 15 07:36:11 PM PDT 24 |
Aug 15 07:44:59 PM PDT 24 |
5896475560 ps |
| T1431 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.2905443392 |
|
|
Aug 15 07:32:29 PM PDT 24 |
Aug 15 07:55:05 PM PDT 24 |
7747873232 ps |
| T1432 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.2426295975 |
|
|
Aug 15 07:06:51 PM PDT 24 |
Aug 15 07:42:02 PM PDT 24 |
8469365894 ps |
| T138 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2620146671 |
|
|
Aug 15 07:24:06 PM PDT 24 |
Aug 15 07:32:43 PM PDT 24 |
5293694608 ps |
| T1433 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.3603477087 |
|
|
Aug 15 07:07:32 PM PDT 24 |
Aug 15 07:14:14 PM PDT 24 |
4911477368 ps |
| T1434 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.2248103666 |
|
|
Aug 15 07:05:21 PM PDT 24 |
Aug 15 07:22:25 PM PDT 24 |
5655452608 ps |
| T1435 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1253159802 |
|
|
Aug 15 07:15:13 PM PDT 24 |
Aug 15 07:24:26 PM PDT 24 |
4052331030 ps |
| T1436 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.550778641 |
|
|
Aug 15 07:28:30 PM PDT 24 |
Aug 15 07:44:29 PM PDT 24 |
7635375997 ps |
| T1437 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.2898074040 |
|
|
Aug 15 07:21:53 PM PDT 24 |
Aug 15 07:26:59 PM PDT 24 |
3501819732 ps |
| T1438 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.3464126874 |
|
|
Aug 15 07:12:29 PM PDT 24 |
Aug 15 08:07:49 PM PDT 24 |
14954520140 ps |
| T1439 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.3075641765 |
|
|
Aug 15 07:08:30 PM PDT 24 |
Aug 15 07:16:15 PM PDT 24 |
4336781560 ps |