SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.75 | 84.75 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 84.94 | 84.94 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.94 | 84.94 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.94 | 84.94 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 141 | 85.98 |
Total Bits | 11012 | 9333 | 84.75 |
Total Bits 0->1 | 5506 | 4682 | 85.03 |
Total Bits 1->0 | 5506 | 4651 | 84.47 |
Ports | 164 | 141 | 85.98 |
Port Bits | 11012 | 9333 | 84.75 |
Port Bits 0->1 | 5506 | 4682 | 85.03 |
Port Bits 1->0 | 5506 | 4651 | 84.47 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | INPUT |
edn_i.edn_fips | No | No | Yes | T115,T155,T117 | INPUT | |
edn_i.edn_ack | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T43,*T65,*T75 | Yes | T43,T65,T75 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T65,T75,T76 | Yes | T65,T75,T76 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T156,*T157,*T158 | Yes | T156,T157,T158 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T3,*T5,*T6 | Yes | T3,T5,T6 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T72,*T74,*T77 | Yes | T72,T74,T77 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T43,*T65,*T75 | Yes | T43,T65,T75 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T65,T75,T76 | Yes | T65,T75,T76 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T20 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T20 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T20 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT |
intr_otp_error_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T79,T49,T80 | Yes | T79,T49,T80 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T2,T61,T62 | Yes | T2,T61,T62 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T79,T153,T49 | Yes | T79,T153,T49 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T79,T153,T80 | Yes | T79,T80,T82 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T79,T80,T82 | Yes | T79,T153,T80 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T162,T79,T49 | Yes | T162,T79,T49 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T79,T80,T81 | Yes | T79,T81,T82 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T79,T81,T82 | Yes | T79,T80,T81 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T79,T49,T80 | Yes | T79,T49,T80 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T79,T80,T163 | Yes | T79,T81,T82 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T79,T81,T82 | Yes | T79,T80,T163 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T79,T49,T80 | Yes | T79,T49,T80 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T2,T61,T62 | Yes | T2,T61,T62 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T79,T153,T49 | Yes | T79,T153,T49 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T162,T79,T49 | Yes | T162,T79,T49 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T79,T49,T80 | Yes | T79,T49,T80 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T4 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[0] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[1] | No | No | Yes | T164 | INPUT | |
lc_otp_vendor_test_i.ctrl[2] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[11:3] | No | No | Yes | T165,T164,T166 | INPUT | |
lc_otp_vendor_test_i.ctrl[12] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[30:13] | No | No | Yes | T165,T164,T166 | INPUT | |
lc_otp_vendor_test_i.ctrl[31] | No | No | No | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[4:0] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[5] | No | No | No | INPUT | ||
lc_otp_program_i.count[9:6] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[10] | No | No | No | INPUT | ||
lc_otp_program_i.count[27:11] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.count[28] | No | No | No | INPUT | ||
lc_otp_program_i.count[38:29] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T41,T171 | INPUT |
lc_otp_program_i.count[39] | No | No | No | INPUT | ||
lc_otp_program_i.count[41:40] | Yes | Yes | T45,T104,T91 | Yes | T47,T41,T171 | INPUT |
lc_otp_program_i.count[42] | No | No | No | INPUT | ||
lc_otp_program_i.count[44:43] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[46:45] | No | No | No | INPUT | ||
lc_otp_program_i.count[47] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[49:48] | No | No | No | INPUT | ||
lc_otp_program_i.count[60:50] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[61] | No | No | No | INPUT | ||
lc_otp_program_i.count[75:62] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T41,T171 | INPUT |
lc_otp_program_i.count[76] | No | No | No | INPUT | ||
lc_otp_program_i.count[77] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.count[78] | No | No | No | INPUT | ||
lc_otp_program_i.count[79] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[80] | No | No | No | INPUT | ||
lc_otp_program_i.count[82:81] | Yes | Yes | T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[83] | No | No | No | INPUT | ||
lc_otp_program_i.count[85:84] | Yes | Yes | *T48,*T44,*T45 | Yes | T40,T47,T41 | INPUT |
lc_otp_program_i.count[87:86] | No | No | No | INPUT | ||
lc_otp_program_i.count[94:88] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[95] | No | No | No | INPUT | ||
lc_otp_program_i.count[97:96] | Yes | Yes | *T48,*T44,*T45 | Yes | T40,T47,T41 | INPUT |
lc_otp_program_i.count[99:98] | No | No | No | INPUT | ||
lc_otp_program_i.count[114:100] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.count[115] | No | No | No | INPUT | ||
lc_otp_program_i.count[118:116] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[119] | No | No | No | INPUT | ||
lc_otp_program_i.count[120] | Yes | Yes | *T48,*T44,*T45 | Yes | T40,T47,T41 | INPUT |
lc_otp_program_i.count[121] | No | No | No | INPUT | ||
lc_otp_program_i.count[126:122] | Yes | Yes | *T48,*T44,*T45 | Yes | T40,T47,T41 | INPUT |
lc_otp_program_i.count[127] | No | No | No | INPUT | ||
lc_otp_program_i.count[132:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[133] | No | No | No | INPUT | ||
lc_otp_program_i.count[146:134] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[147] | No | No | No | INPUT | ||
lc_otp_program_i.count[155:148] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[156] | No | No | No | INPUT | ||
lc_otp_program_i.count[162:157] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[164:163] | No | No | No | INPUT | ||
lc_otp_program_i.count[165] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.count[166] | No | No | No | INPUT | ||
lc_otp_program_i.count[179:167] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[180] | No | No | No | INPUT | ||
lc_otp_program_i.count[182:181] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.count[183] | No | No | No | INPUT | ||
lc_otp_program_i.count[188:184] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.count[189] | No | No | No | INPUT | ||
lc_otp_program_i.count[191:190] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[192] | No | No | No | INPUT | ||
lc_otp_program_i.count[214:193] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[215] | No | No | No | INPUT | ||
lc_otp_program_i.count[223:216] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[225:224] | No | No | No | INPUT | ||
lc_otp_program_i.count[229:226] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.count[231:230] | No | No | No | INPUT | ||
lc_otp_program_i.count[234:232] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[235] | No | No | No | INPUT | ||
lc_otp_program_i.count[245:236] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[246] | No | No | No | INPUT | ||
lc_otp_program_i.count[254:247] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[256:255] | No | No | No | INPUT | ||
lc_otp_program_i.count[258:257] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[259] | No | No | No | INPUT | ||
lc_otp_program_i.count[266:260] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[267] | No | No | No | INPUT | ||
lc_otp_program_i.count[268] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[270:269] | No | No | No | INPUT | ||
lc_otp_program_i.count[300:271] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[301] | No | No | No | INPUT | ||
lc_otp_program_i.count[315:302] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[316] | No | No | No | INPUT | ||
lc_otp_program_i.count[322:317] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[323] | No | No | No | INPUT | ||
lc_otp_program_i.count[333:324] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[334] | No | No | No | INPUT | ||
lc_otp_program_i.count[335] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.count[336] | No | No | No | INPUT | ||
lc_otp_program_i.count[343:337] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.count[344] | No | No | No | INPUT | ||
lc_otp_program_i.count[348:345] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[349] | No | No | No | INPUT | ||
lc_otp_program_i.count[355:350] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[356] | No | No | No | INPUT | ||
lc_otp_program_i.count[359:357] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[360] | No | No | No | INPUT | ||
lc_otp_program_i.count[369:361] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[370] | No | No | No | INPUT | ||
lc_otp_program_i.count[375:371] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[376] | No | No | No | INPUT | ||
lc_otp_program_i.count[377] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.count[379:378] | No | No | No | INPUT | ||
lc_otp_program_i.count[382:380] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.count[383] | No | No | No | INPUT | ||
lc_otp_program_i.state[10:0] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[11] | No | No | No | INPUT | ||
lc_otp_program_i.state[18:12] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.state[19] | No | No | No | INPUT | ||
lc_otp_program_i.state[25:20] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.state[26] | No | No | No | INPUT | ||
lc_otp_program_i.state[32:27] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T41,T171 | INPUT |
lc_otp_program_i.state[33] | No | No | No | INPUT | ||
lc_otp_program_i.state[42:34] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[43] | No | No | No | INPUT | ||
lc_otp_program_i.state[58:44] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.state[61:59] | No | No | No | INPUT | ||
lc_otp_program_i.state[62] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[63] | No | No | No | INPUT | ||
lc_otp_program_i.state[64] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT |
lc_otp_program_i.state[65] | No | No | No | INPUT | ||
lc_otp_program_i.state[70:66] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT |
lc_otp_program_i.state[71] | No | No | No | INPUT | ||
lc_otp_program_i.state[79:72] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT |
lc_otp_program_i.state[80] | No | No | No | INPUT | ||
lc_otp_program_i.state[84:81] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[86:85] | No | No | No | INPUT | ||
lc_otp_program_i.state[103:87] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT |
lc_otp_program_i.state[104] | No | No | No | INPUT | ||
lc_otp_program_i.state[105] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT |
lc_otp_program_i.state[106] | No | No | No | INPUT | ||
lc_otp_program_i.state[112:107] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT |
lc_otp_program_i.state[113] | No | No | No | INPUT | ||
lc_otp_program_i.state[114] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[116:115] | No | No | No | INPUT | ||
lc_otp_program_i.state[117] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[118] | No | No | No | INPUT | ||
lc_otp_program_i.state[130:119] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[131] | No | No | No | INPUT | ||
lc_otp_program_i.state[134:132] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[135] | No | No | No | INPUT | ||
lc_otp_program_i.state[140:136] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[141] | No | No | No | INPUT | ||
lc_otp_program_i.state[147:142] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[148] | No | No | No | INPUT | ||
lc_otp_program_i.state[170:149] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[171] | No | No | No | INPUT | ||
lc_otp_program_i.state[187:172] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT |
lc_otp_program_i.state[188] | No | No | No | INPUT | ||
lc_otp_program_i.state[212:189] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[214:213] | No | No | No | INPUT | ||
lc_otp_program_i.state[215] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[216] | No | No | No | INPUT | ||
lc_otp_program_i.state[230:217] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT |
lc_otp_program_i.state[232:231] | No | No | No | INPUT | ||
lc_otp_program_i.state[243:233] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[244] | No | No | No | INPUT | ||
lc_otp_program_i.state[258:245] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[259] | No | No | No | INPUT | ||
lc_otp_program_i.state[261:260] | Yes | Yes | T47,T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[262] | No | No | No | INPUT | ||
lc_otp_program_i.state[267:263] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[268] | No | No | No | INPUT | ||
lc_otp_program_i.state[272:269] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[274:273] | No | No | No | INPUT | ||
lc_otp_program_i.state[280:275] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
lc_otp_program_i.state[281] | No | No | No | INPUT | ||
lc_otp_program_i.state[286:282] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[288:287] | No | No | No | INPUT | ||
lc_otp_program_i.state[308:289] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.state[309] | No | No | No | INPUT | ||
lc_otp_program_i.state[314:310] | Yes | Yes | *T3,*T5,*T48 | Yes | T3,T5,T6 | INPUT |
lc_otp_program_i.state[315] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:316] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT |
lc_otp_program_i.req | Yes | Yes | T3,T47,T60 | Yes | T3,T47,T60 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T3,T47,T60 | Yes | T3,T47,T60 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T172,T173,T174 | Yes | T172,T173,T174 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T2,T61,T62 | Yes | T2,T61,T62 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T3,T47,T60 | Yes | T3,T47,T60 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T1,T3,T84 | Yes | T1,T3,T5 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T3,T6,T47 | Yes | T3,T6,T99 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T85,T43 | Yes | T2,T61,T6 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T5,T61 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T3,T6,T47 | Yes | T3,T6,T99 | OUTPUT |
otp_lc_data_o.count[4:0] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[5] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[9:6] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[10] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[27:11] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[28] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[38:29] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[39] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[41:40] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T41,T171 | OUTPUT |
otp_lc_data_o.count[42] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[44:43] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[46:45] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[47] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[49:48] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[60:50] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[61] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[75:62] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[77] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[78] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[79] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[80] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[82:81] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[83] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[85:84] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[87:86] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[94:88] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[97:96] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[99:98] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[114:100] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[115] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[118:116] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[120] | Yes | Yes | *T48,*T44,*T45 | Yes | T40,T47,T41 | OUTPUT |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[126:122] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[127] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[132:128] | Yes | Yes | *T60,*T123,*T176 | Yes | T3,T60,T177 | OUTPUT |
otp_lc_data_o.count[133] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[146:134] | Yes | Yes | *T60,*T123,*T176 | Yes | T3,T60,T177 | OUTPUT |
otp_lc_data_o.count[147] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[155:148] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[162:157] | Yes | Yes | *T60,*T123,*T176 | Yes | T60,T123,T176 | OUTPUT |
otp_lc_data_o.count[164:163] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[165] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[166] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[179:167] | Yes | Yes | *T60,*T123,*T176 | Yes | T60,T123,T176 | OUTPUT |
otp_lc_data_o.count[180] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[182:181] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[183] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[188:184] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[189] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[191:190] | Yes | Yes | T47,T122,T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[192] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[214:193] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[215] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[223:216] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[225:224] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[229:226] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[231:230] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[234:232] | Yes | Yes | *T60,*T178,*T179 | Yes | T60,T178,T172 | OUTPUT |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[245:236] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[246] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[254:247] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[256:255] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[258:257] | Yes | Yes | T47,T122,T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[259] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[266:260] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[267] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[268] | Yes | Yes | *T60,*T178,*T179 | Yes | T60,T178,T172 | OUTPUT |
otp_lc_data_o.count[270:269] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[300:271] | Yes | Yes | *T60,*T178,*T179 | Yes | T60,T178,T172 | OUTPUT |
otp_lc_data_o.count[301] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[315:302] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[316] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[322:317] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[333:324] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[335] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[336] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[343:337] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[344] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[348:345] | Yes | Yes | *T60,*T178,*T179 | Yes | T60,T178,T172 | OUTPUT |
otp_lc_data_o.count[349] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[355:350] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[356] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[359:357] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[360] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[369:361] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[370] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[375:371] | Yes | Yes | *T60,*T178,*T179 | Yes | T60,T178,T172 | OUTPUT |
otp_lc_data_o.count[376] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[377] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[379:378] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[382:380] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[383] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[10:0] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[11] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[18:12] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[19] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[25:20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[26] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[32:27] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[33] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[42:34] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[58:44] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[61:59] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[62] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[63] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[64] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[65] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[70:66] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[71] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[79:72] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[80] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[84:81] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[86:85] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[103:87] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[104] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[105] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[106] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[112:107] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[114] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[116:115] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[117] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[118] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[130:119] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[131] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[134:132] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[135] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[140:136] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[147:142] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[148] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[170:149] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[171] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[187:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[188] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[212:189] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[214:213] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[215] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[216] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[230:217] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | OUTPUT |
otp_lc_data_o.state[232:231] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[243:233] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[244] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[258:245] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[259] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[261:260] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[262] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[267:263] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[268] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[272:269] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT |
otp_lc_data_o.state[274:273] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[280:275] | Yes | Yes | *T60,*T171,*T178 | Yes | T94,T60,T180 | OUTPUT |
otp_lc_data_o.state[281] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[286:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[288:287] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[308:289] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[314:310] | Yes | Yes | *T1,*T2,*T20 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[315] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:316] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T2,T61,T62 | Yes | T2,T61,T62 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T3,T6,T47 | Yes | T3,T6,T99 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T3,T6,T47 | Yes | T3,T6,T99 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T84,T5 | Yes | T1,T5,T181 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T86,T43,T44 | Yes | T86,T43,T44 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T86,T118,T121 | Yes | T86,T118,T121 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T5,T182,T183 | Yes | T5,T182,T183 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T86,T43,T44 | Yes | T86,T43,T44 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T86,T118,T121 | Yes | T86,T118,T121 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T182,T183,T184 | Yes | T182,T183,T184 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T44,T45,T40 | Yes | T44,T45,T40 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T44,T45,T40 | Yes | T44,T45,T40 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T5,T181 | Yes | T1,T5,T181 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[35:0] | Yes | Yes | *T3,*T177,*T185 | Yes | T3,T177,T185 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[36] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[72:37] | Yes | Yes | *T3,*T185,*T1 | Yes | T3,T185,T1 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[79:74] | Yes | Yes | *T3,*T185,*T1 | Yes | T3,T185,T1 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[137:81] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[138] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[251:139] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[252] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:253] | Yes | Yes | T177,T3,T5 | Yes | T177,T3,T5 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T85,T5 | Yes | T1,T5,T61 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T20 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[20:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[21] | No | No | Yes | T186,T187,T188 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:22] | Yes | Yes | T5,T40,T41 | Yes | T5,T43,T44 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T7,T8,T9 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 141 | 88.12 |
Total Bits | 10986 | 9332 | 84.94 |
Total Bits 0->1 | 5493 | 4681 | 85.22 |
Total Bits 1->0 | 5493 | 4651 | 84.67 |
Ports | 160 | 141 | 88.12 |
Port Bits | 10986 | 9332 | 84.94 |
Port Bits 0->1 | 5493 | 4681 | 85.22 |
Port Bits 1->0 | 5493 | 4651 | 84.67 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | INPUT | |
edn_i.edn_fips | No | No | Yes | T115,T155,T117 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T43,*T65,*T75 | Yes | T43,T65,T75 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T65,T75,T76 | Yes | T65,T75,T76 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T156,*T157,*T158 | Yes | T156,T157,T158 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T3,*T5,*T6 | Yes | T3,T5,T6 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T72,*T73,*T74 | Yes | T72,T73,T74 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T72,*T74,*T77 | Yes | T72,T74,T77 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T43,*T65,*T75 | Yes | T43,T65,T75 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T72,T73,T74 | Yes | T72,T73,T74 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T65,T75,T76 | Yes | T65,T75,T76 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T20 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T20 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T20 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T72,T74,T77 | Yes | T72,T74,T77 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T159,T160,T161 | Yes | T159,T160,T161 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T79,T49,T80 | Yes | T79,T49,T80 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T2,T61,T62 | Yes | T2,T61,T62 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T79,T80,T82 | Yes | T79,T80,T82 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T79,T153,T49 | Yes | T79,T153,T49 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T79,T153,T80 | Yes | T79,T80,T82 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T79,T80,T82 | Yes | T79,T153,T80 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T162,T79,T49 | Yes | T162,T79,T49 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T79,T80,T81 | Yes | T79,T81,T82 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T79,T81,T82 | Yes | T79,T80,T81 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T79,T49,T80 | Yes | T79,T49,T80 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T79,T80,T163 | Yes | T79,T81,T82 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T79,T81,T82 | Yes | T79,T80,T163 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T79,T49,T80 | Yes | T79,T49,T80 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T2,T61,T62 | Yes | T2,T61,T62 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T79,T153,T49 | Yes | T79,T153,T49 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T162,T79,T49 | Yes | T162,T79,T49 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T79,T49,T80 | Yes | T79,T49,T80 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T4 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[0] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[1] | No | No | Yes | T164 | INPUT | ||
lc_otp_vendor_test_i.ctrl[2] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[11:3] | No | No | Yes | T165,T164,T166 | INPUT | ||
lc_otp_vendor_test_i.ctrl[12] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[30:13] | No | No | Yes | T165,T164,T166 | INPUT | ||
lc_otp_vendor_test_i.ctrl[31] | No | No | No | INPUT | |||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[4:0] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[5] | No | No | No | INPUT | |||
lc_otp_program_i.count[9:6] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[10] | No | No | No | INPUT | |||
lc_otp_program_i.count[27:11] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.count[28] | No | No | No | INPUT | |||
lc_otp_program_i.count[38:29] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T41,T171 | INPUT | |
lc_otp_program_i.count[39] | No | No | No | INPUT | |||
lc_otp_program_i.count[41:40] | Yes | Yes | T45,T104,T91 | Yes | T47,T41,T171 | INPUT | |
lc_otp_program_i.count[42] | No | No | No | INPUT | |||
lc_otp_program_i.count[44:43] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[46:45] | No | No | No | INPUT | |||
lc_otp_program_i.count[47] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[49:48] | No | No | No | INPUT | |||
lc_otp_program_i.count[60:50] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[61] | No | No | No | INPUT | |||
lc_otp_program_i.count[75:62] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T41,T171 | INPUT | |
lc_otp_program_i.count[76] | No | No | No | INPUT | |||
lc_otp_program_i.count[77] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.count[78] | No | No | No | INPUT | |||
lc_otp_program_i.count[79] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[80] | No | No | No | INPUT | |||
lc_otp_program_i.count[82:81] | Yes | Yes | T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[83] | No | No | No | INPUT | |||
lc_otp_program_i.count[85:84] | Yes | Yes | *T48,*T44,*T45 | Yes | T40,T47,T41 | INPUT | |
lc_otp_program_i.count[87:86] | No | No | No | INPUT | |||
lc_otp_program_i.count[94:88] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[95] | No | No | No | INPUT | |||
lc_otp_program_i.count[97:96] | Yes | Yes | *T48,*T44,*T45 | Yes | T40,T47,T41 | INPUT | |
lc_otp_program_i.count[99:98] | No | No | No | INPUT | |||
lc_otp_program_i.count[114:100] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.count[115] | No | No | No | INPUT | |||
lc_otp_program_i.count[118:116] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[119] | No | No | No | INPUT | |||
lc_otp_program_i.count[120] | Yes | Yes | *T48,*T44,*T45 | Yes | T40,T47,T41 | INPUT | |
lc_otp_program_i.count[121] | No | No | No | INPUT | |||
lc_otp_program_i.count[126:122] | Yes | Yes | *T48,*T44,*T45 | Yes | T40,T47,T41 | INPUT | |
lc_otp_program_i.count[127] | No | No | No | INPUT | |||
lc_otp_program_i.count[132:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[133] | No | No | No | INPUT | |||
lc_otp_program_i.count[146:134] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[147] | No | No | No | INPUT | |||
lc_otp_program_i.count[155:148] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[156] | No | No | No | INPUT | |||
lc_otp_program_i.count[162:157] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[164:163] | No | No | No | INPUT | |||
lc_otp_program_i.count[165] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.count[166] | No | No | No | INPUT | |||
lc_otp_program_i.count[179:167] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[180] | No | No | No | INPUT | |||
lc_otp_program_i.count[182:181] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.count[183] | No | No | No | INPUT | |||
lc_otp_program_i.count[188:184] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.count[189] | No | No | No | INPUT | |||
lc_otp_program_i.count[191:190] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[192] | No | No | No | INPUT | |||
lc_otp_program_i.count[214:193] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[215] | No | No | No | INPUT | |||
lc_otp_program_i.count[223:216] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[225:224] | No | No | No | INPUT | |||
lc_otp_program_i.count[229:226] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.count[231:230] | No | No | No | INPUT | |||
lc_otp_program_i.count[234:232] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[235] | No | No | No | INPUT | |||
lc_otp_program_i.count[245:236] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[246] | No | No | No | INPUT | |||
lc_otp_program_i.count[254:247] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[256:255] | No | No | No | INPUT | |||
lc_otp_program_i.count[258:257] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[259] | No | No | No | INPUT | |||
lc_otp_program_i.count[266:260] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[267] | No | No | No | INPUT | |||
lc_otp_program_i.count[268] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[270:269] | No | No | No | INPUT | |||
lc_otp_program_i.count[300:271] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[301] | No | No | No | INPUT | |||
lc_otp_program_i.count[315:302] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[316] | No | No | No | INPUT | |||
lc_otp_program_i.count[322:317] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[323] | No | No | No | INPUT | |||
lc_otp_program_i.count[333:324] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[334] | No | No | No | INPUT | |||
lc_otp_program_i.count[335] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.count[336] | No | No | No | INPUT | |||
lc_otp_program_i.count[343:337] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.count[344] | No | No | No | INPUT | |||
lc_otp_program_i.count[348:345] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[349] | No | No | No | INPUT | |||
lc_otp_program_i.count[355:350] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[356] | No | No | No | INPUT | |||
lc_otp_program_i.count[359:357] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[360] | No | No | No | INPUT | |||
lc_otp_program_i.count[369:361] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[370] | No | No | No | INPUT | |||
lc_otp_program_i.count[375:371] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[376] | No | No | No | INPUT | |||
lc_otp_program_i.count[377] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.count[379:378] | No | No | No | INPUT | |||
lc_otp_program_i.count[382:380] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.count[383] | No | No | No | INPUT | |||
lc_otp_program_i.state[10:0] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[11] | No | No | No | INPUT | |||
lc_otp_program_i.state[18:12] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.state[19] | No | No | No | INPUT | |||
lc_otp_program_i.state[25:20] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.state[26] | No | No | No | INPUT | |||
lc_otp_program_i.state[32:27] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T41,T171 | INPUT | |
lc_otp_program_i.state[33] | No | No | No | INPUT | |||
lc_otp_program_i.state[42:34] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[43] | No | No | No | INPUT | |||
lc_otp_program_i.state[58:44] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.state[61:59] | No | No | No | INPUT | |||
lc_otp_program_i.state[62] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[63] | No | No | No | INPUT | |||
lc_otp_program_i.state[64] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT | |
lc_otp_program_i.state[65] | No | No | No | INPUT | |||
lc_otp_program_i.state[70:66] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT | |
lc_otp_program_i.state[71] | No | No | No | INPUT | |||
lc_otp_program_i.state[79:72] | Yes | Yes | *T168,*T169,*T170 | Yes | T168,T169,T170 | INPUT | |
lc_otp_program_i.state[80] | No | No | No | INPUT | |||
lc_otp_program_i.state[84:81] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[86:85] | No | No | No | INPUT | |||
lc_otp_program_i.state[103:87] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT | |
lc_otp_program_i.state[104] | No | No | No | INPUT | |||
lc_otp_program_i.state[105] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT | |
lc_otp_program_i.state[106] | No | No | No | INPUT | |||
lc_otp_program_i.state[112:107] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT | |
lc_otp_program_i.state[113] | No | No | No | INPUT | |||
lc_otp_program_i.state[114] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[116:115] | No | No | No | INPUT | |||
lc_otp_program_i.state[117] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[118] | No | No | No | INPUT | |||
lc_otp_program_i.state[130:119] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[131] | No | No | No | INPUT | |||
lc_otp_program_i.state[134:132] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[135] | No | No | No | INPUT | |||
lc_otp_program_i.state[140:136] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[141] | No | No | No | INPUT | |||
lc_otp_program_i.state[147:142] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[148] | No | No | No | INPUT | |||
lc_otp_program_i.state[170:149] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[171] | No | No | No | INPUT | |||
lc_otp_program_i.state[187:172] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT | |
lc_otp_program_i.state[188] | No | No | No | INPUT | |||
lc_otp_program_i.state[212:189] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[214:213] | No | No | No | INPUT | |||
lc_otp_program_i.state[215] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[216] | No | No | No | INPUT | |||
lc_otp_program_i.state[230:217] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | INPUT | |
lc_otp_program_i.state[232:231] | No | No | No | INPUT | |||
lc_otp_program_i.state[243:233] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[244] | No | No | No | INPUT | |||
lc_otp_program_i.state[258:245] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[259] | No | No | No | INPUT | |||
lc_otp_program_i.state[261:260] | Yes | Yes | T47,T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[262] | No | No | No | INPUT | |||
lc_otp_program_i.state[267:263] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[268] | No | No | No | INPUT | |||
lc_otp_program_i.state[272:269] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[274:273] | No | No | No | INPUT | |||
lc_otp_program_i.state[280:275] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
lc_otp_program_i.state[281] | No | No | No | INPUT | |||
lc_otp_program_i.state[286:282] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[288:287] | No | No | No | INPUT | |||
lc_otp_program_i.state[308:289] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.state[309] | No | No | No | INPUT | |||
lc_otp_program_i.state[314:310] | Yes | Yes | *T3,*T5,*T48 | Yes | T3,T5,T6 | INPUT | |
lc_otp_program_i.state[315] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:316] | Yes | Yes | T47,T122,T167 | Yes | T47,T122,T167 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T3,T47,T60 | Yes | T3,T47,T60 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T3,T47,T60 | Yes | T3,T47,T60 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T172,T173,T174 | Yes | T172,T173,T174 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T2,T61,T62 | Yes | T2,T61,T62 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T3,T47,T60 | Yes | T3,T47,T60 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T1,T3,T84 | Yes | T1,T3,T5 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T3,T6,T47 | Yes | T3,T6,T99 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T2,T85,T43 | Yes | T2,T61,T6 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T5,T61 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T3,T6,T47 | Yes | T3,T6,T99 | OUTPUT | |
otp_lc_data_o.count[4:0] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[5] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[9:6] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[10] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[27:11] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[28] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[38:29] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[39] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[41:40] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T41,T171 | OUTPUT | |
otp_lc_data_o.count[42] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[44:43] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[46:45] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[47] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[49:48] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[60:50] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[61] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[75:62] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[76] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[77] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[78] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[79] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[80] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[82:81] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[83] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[85:84] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[87:86] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[94:88] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[97:96] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[99:98] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[114:100] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[115] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[118:116] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[120] | Yes | Yes | *T48,*T44,*T45 | Yes | T40,T47,T41 | OUTPUT | |
otp_lc_data_o.count[121] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[126:122] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[127] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[132:128] | Yes | Yes | *T60,*T123,*T176 | Yes | T3,T60,T177 | OUTPUT | |
otp_lc_data_o.count[133] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[146:134] | Yes | Yes | *T60,*T123,*T176 | Yes | T3,T60,T177 | OUTPUT | |
otp_lc_data_o.count[147] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[155:148] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[156] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[162:157] | Yes | Yes | *T60,*T123,*T176 | Yes | T60,T123,T176 | OUTPUT | |
otp_lc_data_o.count[164:163] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[165] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[166] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[179:167] | Yes | Yes | *T60,*T123,*T176 | Yes | T60,T123,T176 | OUTPUT | |
otp_lc_data_o.count[180] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[182:181] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[183] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[188:184] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[189] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[191:190] | Yes | Yes | T47,T122,T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[192] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[214:193] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[215] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[223:216] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[225:224] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[229:226] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[231:230] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[234:232] | Yes | Yes | *T60,*T178,*T179 | Yes | T60,T178,T172 | OUTPUT | |
otp_lc_data_o.count[235] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[245:236] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[246] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[254:247] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[256:255] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[258:257] | Yes | Yes | T47,T122,T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[259] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[266:260] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[267] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[268] | Yes | Yes | *T60,*T178,*T179 | Yes | T60,T178,T172 | OUTPUT | |
otp_lc_data_o.count[270:269] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[300:271] | Yes | Yes | *T60,*T178,*T179 | Yes | T60,T178,T172 | OUTPUT | |
otp_lc_data_o.count[301] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[315:302] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[316] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[322:317] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.count[323] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[333:324] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[334] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[335] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[336] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[343:337] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[344] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[348:345] | Yes | Yes | *T60,*T178,*T179 | Yes | T60,T178,T172 | OUTPUT | |
otp_lc_data_o.count[349] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[355:350] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[356] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[359:357] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[360] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[369:361] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[370] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[375:371] | Yes | Yes | *T60,*T178,*T179 | Yes | T60,T178,T172 | OUTPUT | |
otp_lc_data_o.count[376] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[377] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[379:378] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[382:380] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[383] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[10:0] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[11] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[18:12] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[19] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[25:20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[26] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[32:27] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[33] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[42:34] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[43] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[58:44] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[61:59] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[62] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[63] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[64] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[65] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[70:66] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[71] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[79:72] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[80] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[84:81] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[86:85] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[103:87] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[104] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[105] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[106] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[112:107] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[114] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[116:115] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[117] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[118] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[130:119] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[131] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[134:132] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[135] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[140:136] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[147:142] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[148] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[170:149] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[171] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[187:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[188] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[212:189] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[214:213] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[215] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[216] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[230:217] | Yes | Yes | *T45,*T104,*T91 | Yes | T47,T60,T41 | OUTPUT | |
otp_lc_data_o.state[232:231] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[243:233] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[244] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[258:245] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[259] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[261:260] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[262] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[267:263] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[268] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[272:269] | Yes | Yes | *T47,*T122,*T167 | Yes | T47,T171,T175 | OUTPUT | |
otp_lc_data_o.state[274:273] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[280:275] | Yes | Yes | *T60,*T171,*T178 | Yes | T94,T60,T180 | OUTPUT | |
otp_lc_data_o.state[281] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[286:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[288:287] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[308:289] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[314:310] | Yes | Yes | *T1,*T2,*T20 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[315] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:316] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T2,T61,T62 | Yes | T2,T61,T62 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T3,T6,T47 | Yes | T3,T6,T99 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T3,T6,T47 | Yes | T3,T6,T99 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T1,T84,T5 | Yes | T1,T5,T181 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T86,T43,T44 | Yes | T86,T43,T44 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T86,T118,T121 | Yes | T86,T118,T121 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T5,T182,T183 | Yes | T5,T182,T183 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T86,T43,T44 | Yes | T86,T43,T44 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T86,T118,T121 | Yes | T86,T118,T121 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T182,T183,T184 | Yes | T182,T183,T184 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T44,T45,T40 | Yes | T44,T45,T40 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T84 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T84 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T84,T4,T85 | Yes | T4,T85,T5 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T44,T45,T40 | Yes | T44,T45,T40 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T1,T5,T181 | Yes | T1,T5,T181 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[35:0] | Yes | Yes | *T3,*T177,*T185 | Yes | T3,T177,T185 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[36] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[72:37] | Yes | Yes | *T3,*T185,*T1 | Yes | T3,T185,T1 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[73] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[79:74] | Yes | Yes | *T3,*T185,*T1 | Yes | T3,T185,T1 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[80] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[137:81] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[138] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[251:139] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[252] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:253] | Yes | Yes | T177,T3,T5 | Yes | T177,T3,T5 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T1,T85,T5 | Yes | T1,T5,T61 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T84 | Yes | T1,T2,T20 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[20:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[21] | No | No | Yes | T186,T187,T188 | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:22] | Yes | Yes | T5,T40,T41 | Yes | T5,T43,T44 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T1,T2,T20 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |