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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
86.66 90.80 80.18 90.27 92.19 81.66 84.87


Total test records in report: 1023
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T603 /workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.3745587733 Aug 19 06:52:55 PM PDT 24 Aug 19 08:06:33 PM PDT 24 20757477220 ps
T604 /workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.3298590406 Aug 19 06:40:42 PM PDT 24 Aug 19 06:45:24 PM PDT 24 3238588320 ps
T334 /workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.2572571784 Aug 19 06:55:31 PM PDT 24 Aug 19 07:02:40 PM PDT 24 3759771770 ps
T371 /workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.4070429421 Aug 19 06:38:31 PM PDT 24 Aug 19 06:50:58 PM PDT 24 5285939841 ps
T605 /workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.323830199 Aug 19 06:39:53 PM PDT 24 Aug 19 06:46:46 PM PDT 24 4226703736 ps
T606 /workspace/coverage/default/2.chip_sw_example_flash.927624090 Aug 19 06:42:12 PM PDT 24 Aug 19 06:46:35 PM PDT 24 2963149504 ps
T607 /workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.1300161432 Aug 19 06:40:07 PM PDT 24 Aug 19 07:23:37 PM PDT 24 11699848864 ps
T608 /workspace/coverage/default/2.chip_sw_rstmgr_sw_req.496938772 Aug 19 06:42:19 PM PDT 24 Aug 19 06:48:08 PM PDT 24 4207568264 ps
T423 /workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2579892821 Aug 19 06:37:03 PM PDT 24 Aug 19 06:44:17 PM PDT 24 4318122240 ps
T609 /workspace/coverage/default/1.chip_sw_csrng_kat_test.2563744506 Aug 19 06:36:43 PM PDT 24 Aug 19 06:40:09 PM PDT 24 2729219364 ps
T68 /workspace/coverage/default/1.chip_sw_spi_device_pinmux_sleep_retention.3137357559 Aug 19 06:37:58 PM PDT 24 Aug 19 06:43:52 PM PDT 24 3812215354 ps
T23 /workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.3191105351 Aug 19 06:31:43 PM PDT 24 Aug 19 06:36:04 PM PDT 24 3069757380 ps
T407 /workspace/coverage/default/0.chip_sw_ast_clk_outputs.3048241111 Aug 19 06:34:59 PM PDT 24 Aug 19 06:51:46 PM PDT 24 7061714564 ps
T610 /workspace/coverage/default/2.chip_sw_rstmgr_smoketest.2402411249 Aug 19 06:55:21 PM PDT 24 Aug 19 06:59:09 PM PDT 24 2915899708 ps
T611 /workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1687108505 Aug 19 06:39:23 PM PDT 24 Aug 19 07:21:24 PM PDT 24 27091299351 ps
T203 /workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.3529562712 Aug 19 06:33:16 PM PDT 24 Aug 19 06:36:28 PM PDT 24 3484492835 ps
T221 /workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3681305079 Aug 19 06:37:29 PM PDT 24 Aug 19 09:41:51 PM PDT 24 255326597142 ps
T612 /workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.1164771480 Aug 19 06:41:05 PM PDT 24 Aug 19 06:46:07 PM PDT 24 2862927677 ps
T185 /workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.3566367029 Aug 19 06:35:54 PM PDT 24 Aug 19 07:43:00 PM PDT 24 19066948913 ps
T613 /workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3940444218 Aug 19 06:35:22 PM PDT 24 Aug 19 06:43:13 PM PDT 24 3195616556 ps
T614 /workspace/coverage/default/1.chip_sw_edn_auto_mode.353913578 Aug 19 06:37:43 PM PDT 24 Aug 19 06:50:30 PM PDT 24 3565681360 ps
T615 /workspace/coverage/default/2.rom_e2e_self_hash.3114097176 Aug 19 06:56:03 PM PDT 24 Aug 19 08:29:14 PM PDT 24 26936058130 ps
T555 /workspace/coverage/default/71.chip_sw_all_escalation_resets.2530703747 Aug 19 06:59:08 PM PDT 24 Aug 19 07:08:52 PM PDT 24 4851990616 ps
T616 /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.1981343544 Aug 19 06:37:16 PM PDT 24 Aug 19 06:57:41 PM PDT 24 5283528010 ps
T617 /workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.1766092748 Aug 19 06:34:31 PM PDT 24 Aug 19 06:41:14 PM PDT 24 3775984818 ps
T343 /workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.3476278900 Aug 19 06:56:14 PM PDT 24 Aug 19 07:02:59 PM PDT 24 3983860316 ps
T618 /workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.1094075036 Aug 19 06:39:12 PM PDT 24 Aug 19 06:43:40 PM PDT 24 2743145626 ps
T408 /workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.2273572001 Aug 19 07:00:15 PM PDT 24 Aug 19 07:07:11 PM PDT 24 3928276548 ps
T127 /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.3477659982 Aug 19 06:51:01 PM PDT 24 Aug 19 07:03:06 PM PDT 24 5804060756 ps
T351 /workspace/coverage/default/57.chip_sw_all_escalation_resets.1742748354 Aug 19 06:58:32 PM PDT 24 Aug 19 07:07:03 PM PDT 24 4710637250 ps
T213 /workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.3586169142 Aug 19 07:04:04 PM PDT 24 Aug 19 07:10:33 PM PDT 24 3714001616 ps
T619 /workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.1720236213 Aug 19 06:53:41 PM PDT 24 Aug 19 07:22:03 PM PDT 24 9176328232 ps
T620 /workspace/coverage/default/2.chip_sw_aes_idle.3764262719 Aug 19 06:46:40 PM PDT 24 Aug 19 06:52:40 PM PDT 24 2867375000 ps
T621 /workspace/coverage/default/1.chip_sw_kmac_mode_cshake.2092827926 Aug 19 06:36:17 PM PDT 24 Aug 19 06:39:55 PM PDT 24 2451320056 ps
T33 /workspace/coverage/default/0.chip_sw_usbdev_config_host.3518115626 Aug 19 06:33:18 PM PDT 24 Aug 19 07:04:40 PM PDT 24 7792609336 ps
T401 /workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.2850729829 Aug 19 06:57:34 PM PDT 24 Aug 19 07:03:45 PM PDT 24 3993585926 ps
T622 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2789322623 Aug 19 06:36:06 PM PDT 24 Aug 19 06:45:25 PM PDT 24 4791420140 ps
T623 /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.2145703669 Aug 19 06:38:22 PM PDT 24 Aug 19 06:41:47 PM PDT 24 2482973554 ps
T394 /workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.3155947447 Aug 19 06:57:05 PM PDT 24 Aug 19 07:01:46 PM PDT 24 3220359438 ps
T624 /workspace/coverage/default/0.chip_sw_hmac_oneshot.45978350 Aug 19 06:33:52 PM PDT 24 Aug 19 06:40:24 PM PDT 24 3086757962 ps
T625 /workspace/coverage/default/1.rom_e2e_asm_init_prod.1450624841 Aug 19 06:41:39 PM PDT 24 Aug 19 07:39:22 PM PDT 24 15283008280 ps
T128 /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_wake_5_bug.527788629 Aug 19 06:41:30 PM PDT 24 Aug 19 06:48:00 PM PDT 24 5828165440 ps
T20 /workspace/coverage/default/2.chip_sw_alert_handler_entropy.3581907340 Aug 19 06:47:15 PM PDT 24 Aug 19 06:53:00 PM PDT 24 2928251309 ps
T626 /workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.1528077199 Aug 19 06:35:52 PM PDT 24 Aug 19 08:06:30 PM PDT 24 27106522034 ps
T627 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2645421024 Aug 19 06:35:25 PM PDT 24 Aug 19 06:46:17 PM PDT 24 4524261400 ps
T222 /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.1693421884 Aug 19 06:36:10 PM PDT 24 Aug 19 06:46:32 PM PDT 24 5423766440 ps
T531 /workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.1929698990 Aug 19 06:59:38 PM PDT 24 Aug 19 07:06:53 PM PDT 24 3999966200 ps
T111 /workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.1281020818 Aug 19 06:34:15 PM PDT 24 Aug 19 06:40:08 PM PDT 24 5260613389 ps
T628 /workspace/coverage/default/0.chip_sw_aes_smoketest.3164130411 Aug 19 06:34:25 PM PDT 24 Aug 19 06:38:20 PM PDT 24 2248665824 ps
T548 /workspace/coverage/default/41.chip_sw_all_escalation_resets.1330338295 Aug 19 06:59:11 PM PDT 24 Aug 19 07:11:17 PM PDT 24 4874831656 ps
T82 /workspace/coverage/default/2.chip_tap_straps_rma.1412734531 Aug 19 06:49:38 PM PDT 24 Aug 19 06:56:38 PM PDT 24 5648411904 ps
T561 /workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.1504967220 Aug 19 06:54:38 PM PDT 24 Aug 19 07:02:16 PM PDT 24 4362071250 ps
T501 /workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.1614302045 Aug 19 07:01:41 PM PDT 24 Aug 19 07:07:27 PM PDT 24 4141435600 ps
T263 /workspace/coverage/default/2.chip_sw_plic_sw_irq.1086156087 Aug 19 06:52:57 PM PDT 24 Aug 19 06:56:35 PM PDT 24 2637232134 ps
T34 /workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.3119757931 Aug 19 06:40:44 PM PDT 24 Aug 19 07:08:19 PM PDT 24 23993717064 ps
T288 /workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.3905523304 Aug 19 06:51:11 PM PDT 24 Aug 19 07:01:28 PM PDT 24 4650948434 ps
T388 /workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.1981618280 Aug 19 06:36:52 PM PDT 24 Aug 19 06:40:57 PM PDT 24 3145547624 ps
T629 /workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.1378785525 Aug 19 06:34:39 PM PDT 24 Aug 19 06:50:47 PM PDT 24 9882448200 ps
T482 /workspace/coverage/default/36.chip_sw_all_escalation_resets.3268406541 Aug 19 06:57:09 PM PDT 24 Aug 19 07:08:35 PM PDT 24 5824089588 ps
T476 /workspace/coverage/default/0.chip_sw_all_escalation_resets.3057607571 Aug 19 06:36:45 PM PDT 24 Aug 19 06:49:09 PM PDT 24 4863383876 ps
T395 /workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3273223154 Aug 19 06:57:59 PM PDT 24 Aug 19 07:04:57 PM PDT 24 4163187000 ps
T630 /workspace/coverage/default/5.chip_sw_uart_rand_baudrate.899532166 Aug 19 06:53:28 PM PDT 24 Aug 19 07:04:00 PM PDT 24 4043629856 ps
T223 /workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.1686242054 Aug 19 06:37:34 PM PDT 24 Aug 19 06:53:46 PM PDT 24 5562680480 ps
T631 /workspace/coverage/default/2.chip_sw_uart_tx_rx.2662839714 Aug 19 06:41:34 PM PDT 24 Aug 19 06:53:08 PM PDT 24 4285274456 ps
T492 /workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.3076990966 Aug 19 06:59:47 PM PDT 24 Aug 19 07:07:29 PM PDT 24 3567932740 ps
T536 /workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.2075051480 Aug 19 07:00:09 PM PDT 24 Aug 19 07:06:05 PM PDT 24 3607849124 ps
T374 /workspace/coverage/default/89.chip_sw_all_escalation_resets.3758217854 Aug 19 06:59:50 PM PDT 24 Aug 19 07:07:49 PM PDT 24 5613982358 ps
T477 /workspace/coverage/default/59.chip_sw_all_escalation_resets.865767925 Aug 19 06:58:32 PM PDT 24 Aug 19 07:13:28 PM PDT 24 5386096054 ps
T632 /workspace/coverage/default/0.chip_sw_pwrmgr_smoketest.1586171344 Aug 19 06:32:42 PM PDT 24 Aug 19 06:36:33 PM PDT 24 6233977146 ps
T633 /workspace/coverage/default/1.chip_sw_flash_crash_alert.930835577 Aug 19 06:41:43 PM PDT 24 Aug 19 06:51:00 PM PDT 24 5604963318 ps
T634 /workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.291452223 Aug 19 06:34:02 PM PDT 24 Aug 19 06:41:39 PM PDT 24 19520615972 ps
T161 /workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.3501432510 Aug 19 06:35:18 PM PDT 24 Aug 19 06:42:45 PM PDT 24 4949806844 ps
T84 /workspace/coverage/default/0.chip_tap_straps_prod.2508240760 Aug 19 06:31:14 PM PDT 24 Aug 19 06:58:08 PM PDT 24 17043990392 ps
T484 /workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.2748858009 Aug 19 06:58:37 PM PDT 24 Aug 19 07:04:48 PM PDT 24 3862533800 ps
T281 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.2550925563 Aug 19 06:42:33 PM PDT 24 Aug 19 07:39:20 PM PDT 24 15112914570 ps
T494 /workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.3449440897 Aug 19 06:54:31 PM PDT 24 Aug 19 07:02:23 PM PDT 24 3949571918 ps
T499 /workspace/coverage/default/37.chip_sw_all_escalation_resets.1237800498 Aug 19 06:56:21 PM PDT 24 Aug 19 07:04:26 PM PDT 24 5265358220 ps
T289 /workspace/coverage/default/1.chip_sw_otbn_mem_scramble.113309453 Aug 19 06:40:58 PM PDT 24 Aug 19 06:48:56 PM PDT 24 3878125394 ps
T635 /workspace/coverage/default/13.chip_sw_lc_ctrl_transition.1461701394 Aug 19 06:53:38 PM PDT 24 Aug 19 07:02:59 PM PDT 24 6370910110 ps
T141 /workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.2707156574 Aug 19 06:34:41 PM PDT 24 Aug 19 06:39:40 PM PDT 24 3378960014 ps
T636 /workspace/coverage/default/0.rom_e2e_smoke.1346239905 Aug 19 06:44:33 PM PDT 24 Aug 19 07:38:23 PM PDT 24 14703153608 ps
T637 /workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.854350233 Aug 19 06:54:02 PM PDT 24 Aug 19 07:18:01 PM PDT 24 8079535756 ps
T638 /workspace/coverage/default/0.chip_sw_sleep_pwm_pulses.2111201239 Aug 19 06:33:25 PM PDT 24 Aug 19 06:57:10 PM PDT 24 7719656120 ps
T180 /workspace/coverage/default/2.chip_plic_all_irqs_20.2563518574 Aug 19 06:48:25 PM PDT 24 Aug 19 06:59:53 PM PDT 24 5104569940 ps
T639 /workspace/coverage/default/2.rom_e2e_asm_init_dev.1754870921 Aug 19 06:56:15 PM PDT 24 Aug 19 07:51:51 PM PDT 24 15202080709 ps
T35 /workspace/coverage/default/0.chip_sw_usbdev_setuprx.3340822585 Aug 19 06:35:01 PM PDT 24 Aug 19 06:44:32 PM PDT 24 4248515704 ps
T290 /workspace/coverage/default/1.chip_sw_data_integrity_escalation.3276697150 Aug 19 06:39:40 PM PDT 24 Aug 19 06:50:36 PM PDT 24 6621948216 ps
T410 /workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.3185608889 Aug 19 06:35:10 PM PDT 24 Aug 19 09:39:31 PM PDT 24 80578528969 ps
T562 /workspace/coverage/default/29.chip_sw_all_escalation_resets.2413429353 Aug 19 06:57:47 PM PDT 24 Aug 19 07:09:20 PM PDT 24 5795327260 ps
T390 /workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1277345174 Aug 19 06:41:30 PM PDT 24 Aug 19 06:48:19 PM PDT 24 6510515808 ps
T640 /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.745024448 Aug 19 06:56:11 PM PDT 24 Aug 19 07:06:59 PM PDT 24 5180364350 ps
T641 /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.3641639163 Aug 19 06:37:44 PM PDT 24 Aug 19 06:41:59 PM PDT 24 2945913404 ps
T642 /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.1916798135 Aug 19 06:35:33 PM PDT 24 Aug 19 07:00:33 PM PDT 24 9122242596 ps
T247 /workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.1253993729 Aug 19 06:35:47 PM PDT 24 Aug 19 06:45:40 PM PDT 24 4299636581 ps
T643 /workspace/coverage/default/0.chip_sw_coremark.377049703 Aug 19 06:35:47 PM PDT 24 Aug 19 10:27:29 PM PDT 24 71200635096 ps
T644 /workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.1110642177 Aug 19 06:35:48 PM PDT 24 Aug 19 06:45:08 PM PDT 24 4720892398 ps
T645 /workspace/coverage/default/2.chip_sw_hmac_enc_idle.1270875421 Aug 19 06:48:46 PM PDT 24 Aug 19 06:53:21 PM PDT 24 3355510274 ps
T646 /workspace/coverage/default/0.chip_sw_example_manufacturer.2099178933 Aug 19 06:38:17 PM PDT 24 Aug 19 06:41:56 PM PDT 24 2892700600 ps
T647 /workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.3527591657 Aug 19 06:45:47 PM PDT 24 Aug 19 07:02:32 PM PDT 24 7509031176 ps
T497 /workspace/coverage/default/1.chip_sw_otbn_smoketest.3666702593 Aug 19 06:37:50 PM PDT 24 Aug 19 06:55:19 PM PDT 24 5315562850 ps
T648 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.3826339312 Aug 19 06:43:27 PM PDT 24 Aug 19 07:46:28 PM PDT 24 15884308700 ps
T51 /workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2874200734 Aug 19 06:48:50 PM PDT 24 Aug 19 06:55:04 PM PDT 24 5708251762 ps
T649 /workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.4034764787 Aug 19 06:47:21 PM PDT 24 Aug 19 07:16:08 PM PDT 24 9450984500 ps
T170 /workspace/coverage/default/0.rom_e2e_jtag_debug_dev.2757714113 Aug 19 06:39:18 PM PDT 24 Aug 19 07:15:57 PM PDT 24 11818679599 ps
T487 /workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.3829285064 Aug 19 06:35:18 PM PDT 24 Aug 19 06:42:33 PM PDT 24 3523244212 ps
T333 /workspace/coverage/default/1.chip_sw_power_sleep_load.2425770101 Aug 19 06:40:28 PM PDT 24 Aug 19 06:48:01 PM PDT 24 10001287160 ps
T479 /workspace/coverage/default/87.chip_sw_all_escalation_resets.2595838524 Aug 19 07:00:05 PM PDT 24 Aug 19 07:10:36 PM PDT 24 5074790080 ps
T650 /workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.2295726061 Aug 19 06:32:38 PM PDT 24 Aug 19 06:37:26 PM PDT 24 3277123480 ps
T651 /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.201724462 Aug 19 06:44:47 PM PDT 24 Aug 19 07:47:44 PM PDT 24 14779848780 ps
T652 /workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.1864637061 Aug 19 06:38:51 PM PDT 24 Aug 19 06:57:09 PM PDT 24 5417506016 ps
T480 /workspace/coverage/default/14.chip_sw_all_escalation_resets.1266888445 Aug 19 06:53:58 PM PDT 24 Aug 19 07:05:16 PM PDT 24 5315879040 ps
T74 /workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.334646697 Aug 19 06:37:39 PM PDT 24 Aug 19 06:46:50 PM PDT 24 3872399256 ps
T244 /workspace/coverage/default/2.chip_sw_inject_scramble_seed.1349104295 Aug 19 06:43:38 PM PDT 24 Aug 19 09:51:06 PM PDT 24 63796187455 ps
T365 /workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.1733122382 Aug 19 06:36:32 PM PDT 24 Aug 19 06:42:48 PM PDT 24 4473673688 ps
T653 /workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.4101584578 Aug 19 06:52:05 PM PDT 24 Aug 19 07:03:45 PM PDT 24 4972808696 ps
T654 /workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.3822534490 Aug 19 06:37:21 PM PDT 24 Aug 19 07:04:31 PM PDT 24 8137329021 ps
T212 /workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.2899367895 Aug 19 06:37:09 PM PDT 24 Aug 19 06:46:36 PM PDT 24 3459670640 ps
T453 /workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.1775793252 Aug 19 06:39:27 PM PDT 24 Aug 19 06:50:59 PM PDT 24 4676735533 ps
T655 /workspace/coverage/default/1.chip_sw_edn_entropy_reqs.818135760 Aug 19 06:41:42 PM PDT 24 Aug 19 07:03:43 PM PDT 24 7043174960 ps
T656 /workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2385425413 Aug 19 06:33:49 PM PDT 24 Aug 19 06:59:57 PM PDT 24 12537590054 ps
T486 /workspace/coverage/default/40.chip_sw_all_escalation_resets.3270156267 Aug 19 06:56:29 PM PDT 24 Aug 19 07:05:09 PM PDT 24 4805747908 ps
T657 /workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1784711887 Aug 19 06:37:57 PM PDT 24 Aug 19 06:53:39 PM PDT 24 9510409460 ps
T305 /workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.242144944 Aug 19 06:46:52 PM PDT 24 Aug 19 07:00:41 PM PDT 24 4656027992 ps
T396 /workspace/coverage/default/28.chip_sw_alert_handler_lpg_sleep_mode_alerts.3448967448 Aug 19 06:56:13 PM PDT 24 Aug 19 07:01:34 PM PDT 24 3456773000 ps
T258 /workspace/coverage/default/15.chip_sw_all_escalation_resets.3546531557 Aug 19 06:57:43 PM PDT 24 Aug 19 07:07:03 PM PDT 24 4819839720 ps
T658 /workspace/coverage/default/1.rom_keymgr_functest.3225053198 Aug 19 06:40:21 PM PDT 24 Aug 19 06:52:54 PM PDT 24 5594881784 ps
T24 /workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.2895710391 Aug 19 06:47:16 PM PDT 24 Aug 19 06:53:32 PM PDT 24 2877237148 ps
T85 /workspace/coverage/default/0.chip_tap_straps_testunlock0.357841398 Aug 19 06:32:48 PM PDT 24 Aug 19 06:49:38 PM PDT 24 8622198749 ps
T659 /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.1024415172 Aug 19 06:39:28 PM PDT 24 Aug 19 07:04:42 PM PDT 24 8747948390 ps
T378 /workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.772854211 Aug 19 06:39:33 PM PDT 24 Aug 19 07:10:36 PM PDT 24 9920496603 ps
T481 /workspace/coverage/default/46.chip_sw_all_escalation_resets.4163862162 Aug 19 06:57:05 PM PDT 24 Aug 19 07:05:42 PM PDT 24 5918745736 ps
T660 /workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3081657366 Aug 19 06:48:43 PM PDT 24 Aug 19 06:57:31 PM PDT 24 18401545280 ps
T661 /workspace/coverage/default/0.chip_sival_flash_info_access.4089582867 Aug 19 06:38:31 PM PDT 24 Aug 19 06:43:37 PM PDT 24 2819532892 ps
T662 /workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.838632874 Aug 19 06:38:04 PM PDT 24 Aug 19 06:43:59 PM PDT 24 3123757877 ps
T663 /workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.3374834986 Aug 19 06:51:15 PM PDT 24 Aug 19 07:12:37 PM PDT 24 7800089004 ps
T664 /workspace/coverage/default/4.chip_sw_uart_tx_rx.2016523676 Aug 19 06:58:23 PM PDT 24 Aug 19 07:08:40 PM PDT 24 4001288036 ps
T306 /workspace/coverage/default/1.chip_sw_power_idle_load.1792060785 Aug 19 06:39:20 PM PDT 24 Aug 19 06:48:22 PM PDT 24 3920080980 ps
T491 /workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.1974336687 Aug 19 06:59:23 PM PDT 24 Aug 19 07:05:33 PM PDT 24 4113537012 ps
T342 /workspace/coverage/default/0.chip_sw_pattgen_ios.2727744949 Aug 19 06:37:41 PM PDT 24 Aug 19 06:44:01 PM PDT 24 2609912964 ps
T563 /workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.710932780 Aug 19 06:58:52 PM PDT 24 Aug 19 07:04:00 PM PDT 24 4063303744 ps
T57 /workspace/coverage/default/1.chip_sw_power_virus.3303405353 Aug 19 06:46:23 PM PDT 24 Aug 19 07:12:19 PM PDT 24 5744202056 ps
T346 /workspace/coverage/default/19.chip_sw_uart_rand_baudrate.699732202 Aug 19 06:55:49 PM PDT 24 Aug 19 07:35:01 PM PDT 24 12587403492 ps
T665 /workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1097785795 Aug 19 06:55:37 PM PDT 24 Aug 19 07:04:50 PM PDT 24 3392043052 ps
T498 /workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.2112547694 Aug 19 06:55:35 PM PDT 24 Aug 19 07:01:08 PM PDT 24 3895131500 ps
T666 /workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.1756213858 Aug 19 06:50:01 PM PDT 24 Aug 19 07:00:03 PM PDT 24 4848952170 ps
T667 /workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.1449604118 Aug 19 06:37:00 PM PDT 24 Aug 19 06:41:35 PM PDT 24 3108212840 ps
T75 /workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.1675819553 Aug 19 06:39:32 PM PDT 24 Aug 19 06:48:55 PM PDT 24 7949050884 ps
T668 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2025162012 Aug 19 06:38:26 PM PDT 24 Aug 19 06:50:47 PM PDT 24 4649795412 ps
T493 /workspace/coverage/default/2.chip_sw_aes_masking_off.147195299 Aug 19 06:46:41 PM PDT 24 Aug 19 06:51:42 PM PDT 24 2935140880 ps
T669 /workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.2838163199 Aug 19 06:38:12 PM PDT 24 Aug 19 06:53:44 PM PDT 24 10754539592 ps
T670 /workspace/coverage/default/1.chip_sw_rv_plic_smoketest.665557504 Aug 19 06:39:14 PM PDT 24 Aug 19 06:42:15 PM PDT 24 2094777880 ps
T671 /workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.215624793 Aug 19 06:34:40 PM PDT 24 Aug 19 07:01:21 PM PDT 24 6412856754 ps
T245 /workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.231152119 Aug 19 06:36:19 PM PDT 24 Aug 19 10:16:16 PM PDT 24 78357173966 ps
T672 /workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.1426450660 Aug 19 06:35:33 PM PDT 24 Aug 19 06:41:01 PM PDT 24 3689274446 ps
T673 /workspace/coverage/default/3.chip_sw_lc_ctrl_transition.4164454279 Aug 19 06:51:32 PM PDT 24 Aug 19 07:05:45 PM PDT 24 10325245356 ps
T674 /workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.1747315929 Aug 19 06:39:12 PM PDT 24 Aug 19 06:45:58 PM PDT 24 8075482434 ps
T675 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3418682901 Aug 19 06:41:09 PM PDT 24 Aug 19 06:52:10 PM PDT 24 5273647000 ps
T91 /workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.623889848 Aug 19 06:55:48 PM PDT 24 Aug 19 07:02:39 PM PDT 24 4218109144 ps
T96 /workspace/coverage/default/4.chip_sw_uart_rand_baudrate.2183552460 Aug 19 06:52:37 PM PDT 24 Aug 19 07:30:04 PM PDT 24 13258515948 ps
T97 /workspace/coverage/default/0.rom_e2e_shutdown_output.70745571 Aug 19 06:41:11 PM PDT 24 Aug 19 07:41:21 PM PDT 24 27028070412 ps
T98 /workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.96152721 Aug 19 06:42:06 PM PDT 24 Aug 19 07:47:41 PM PDT 24 15635067974 ps
T21 /workspace/coverage/default/0.chip_sw_alert_handler_entropy.2447567601 Aug 19 06:36:45 PM PDT 24 Aug 19 06:41:16 PM PDT 24 3273733895 ps
T99 /workspace/coverage/default/34.chip_sw_all_escalation_resets.2670689563 Aug 19 06:57:00 PM PDT 24 Aug 19 07:07:07 PM PDT 24 5544855920 ps
T100 /workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.706760562 Aug 19 06:57:44 PM PDT 24 Aug 19 07:02:57 PM PDT 24 3960424736 ps
T101 /workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.209657263 Aug 19 06:55:37 PM PDT 24 Aug 19 07:20:00 PM PDT 24 8185313703 ps
T102 /workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.993853 Aug 19 06:40:51 PM PDT 24 Aug 19 06:52:12 PM PDT 24 5129575536 ps
T103 /workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.54715392 Aug 19 06:35:19 PM PDT 24 Aug 19 06:40:17 PM PDT 24 3350815400 ps
T186 /workspace/coverage/default/1.rom_raw_unlock.952210557 Aug 19 06:41:09 PM PDT 24 Aug 19 06:46:01 PM PDT 24 6751235721 ps
T676 /workspace/coverage/default/2.chip_sw_entropy_src_smoketest.135867280 Aug 19 06:51:38 PM PDT 24 Aug 19 06:58:17 PM PDT 24 3091542346 ps
T363 /workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.2319247116 Aug 19 06:35:59 PM PDT 24 Aug 19 06:43:27 PM PDT 24 4275924602 ps
T89 /workspace/coverage/default/1.chip_jtag_mem_access.3672607766 Aug 19 06:25:00 PM PDT 24 Aug 19 06:48:10 PM PDT 24 13621348115 ps
T204 /workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.2134815702 Aug 19 06:38:47 PM PDT 24 Aug 19 06:42:07 PM PDT 24 3282094782 ps
T489 /workspace/coverage/default/98.chip_sw_all_escalation_resets.206681108 Aug 19 07:02:46 PM PDT 24 Aug 19 07:11:06 PM PDT 24 5333405950 ps
T510 /workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.1310121126 Aug 19 06:59:12 PM PDT 24 Aug 19 07:05:15 PM PDT 24 4060217522 ps
T474 /workspace/coverage/default/19.chip_sw_all_escalation_resets.781710953 Aug 19 06:55:49 PM PDT 24 Aug 19 07:05:00 PM PDT 24 5809620668 ps
T145 /workspace/coverage/default/0.chip_plic_all_irqs_10.3373207131 Aug 19 06:37:36 PM PDT 24 Aug 19 06:46:50 PM PDT 24 4042627592 ps
T677 /workspace/coverage/default/2.rom_e2e_shutdown_exception_c.863910981 Aug 19 06:56:18 PM PDT 24 Aug 19 07:51:09 PM PDT 24 14859566892 ps
T227 /workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.2352888940 Aug 19 06:39:06 PM PDT 24 Aug 19 06:55:09 PM PDT 24 5207598558 ps
T496 /workspace/coverage/default/21.chip_sw_all_escalation_resets.2327012942 Aug 19 06:58:53 PM PDT 24 Aug 19 07:08:39 PM PDT 24 5888060532 ps
T678 /workspace/coverage/default/2.chip_sw_example_manufacturer.1930382273 Aug 19 06:43:27 PM PDT 24 Aug 19 06:47:58 PM PDT 24 3563797570 ps
T679 /workspace/coverage/default/16.chip_sw_uart_rand_baudrate.826406195 Aug 19 06:54:55 PM PDT 24 Aug 19 07:16:14 PM PDT 24 8211596804 ps
T680 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod.564929709 Aug 19 06:49:45 PM PDT 24 Aug 19 08:38:34 PM PDT 24 23340422084 ps
T681 /workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.936133004 Aug 19 06:32:10 PM PDT 24 Aug 19 06:40:30 PM PDT 24 7374575506 ps
T682 /workspace/coverage/default/6.chip_sw_lc_ctrl_transition.1390288571 Aug 19 06:53:20 PM PDT 24 Aug 19 07:02:26 PM PDT 24 7071965654 ps
T389 /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.891013201 Aug 19 06:48:14 PM PDT 24 Aug 19 06:52:45 PM PDT 24 2572973224 ps
T683 /workspace/coverage/default/2.chip_sw_csrng_smoketest.1336069997 Aug 19 06:52:22 PM PDT 24 Aug 19 06:55:51 PM PDT 24 2796751520 ps
T331 /workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.2219456526 Aug 19 06:39:12 PM PDT 24 Aug 19 06:50:06 PM PDT 24 4818911704 ps
T684 /workspace/coverage/default/1.chip_sw_entropy_src_smoketest.460128496 Aug 19 06:38:28 PM PDT 24 Aug 19 06:45:16 PM PDT 24 3723846300 ps
T53 /workspace/coverage/default/2.chip_sw_spi_device_tpm.2085865260 Aug 19 06:42:00 PM PDT 24 Aug 19 06:48:26 PM PDT 24 3101830856 ps
T685 /workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.256818769 Aug 19 06:39:50 PM PDT 24 Aug 19 07:42:16 PM PDT 24 15225510769 ps
T686 /workspace/coverage/default/1.chip_sw_ast_clk_outputs.3697545422 Aug 19 06:40:28 PM PDT 24 Aug 19 06:53:30 PM PDT 24 7141610022 ps
T490 /workspace/coverage/default/91.chip_sw_all_escalation_resets.2290553937 Aug 19 07:01:21 PM PDT 24 Aug 19 07:09:07 PM PDT 24 5629522246 ps
T112 /workspace/coverage/default/1.chip_sw_sensor_ctrl_status.3604964099 Aug 19 06:40:49 PM PDT 24 Aug 19 06:45:14 PM PDT 24 3006228228 ps
T303 /workspace/coverage/default/45.chip_sw_all_escalation_resets.2480278060 Aug 19 06:58:39 PM PDT 24 Aug 19 07:08:01 PM PDT 24 5557437392 ps
T687 /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.3999454847 Aug 19 06:35:26 PM PDT 24 Aug 19 06:52:21 PM PDT 24 13706725841 ps
T94 /workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.2066376977 Aug 19 06:56:58 PM PDT 24 Aug 19 07:03:29 PM PDT 24 3628261192 ps
T39 /workspace/coverage/default/0.chip_sw_usbdev_pincfg.1545710663 Aug 19 06:36:33 PM PDT 24 Aug 19 08:21:31 PM PDT 24 31841654984 ps
T553 /workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.3795156387 Aug 19 07:03:51 PM PDT 24 Aug 19 07:11:27 PM PDT 24 3691853820 ps
T148 /workspace/coverage/default/23.chip_sw_all_escalation_resets.2738383317 Aug 19 06:56:05 PM PDT 24 Aug 19 07:06:34 PM PDT 24 5884868088 ps
T38 /workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.1921309762 Aug 19 06:34:36 PM PDT 24 Aug 19 06:40:36 PM PDT 24 4018462393 ps
T688 /workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.144193730 Aug 19 06:33:04 PM PDT 24 Aug 19 06:45:33 PM PDT 24 9586604096 ps
T90 /workspace/coverage/default/0.chip_jtag_csr_rw.4128046537 Aug 19 06:24:06 PM PDT 24 Aug 19 07:07:10 PM PDT 24 18527764045 ps
T689 /workspace/coverage/default/1.rom_e2e_asm_init_rma.472290993 Aug 19 06:43:26 PM PDT 24 Aug 19 07:55:13 PM PDT 24 15028139804 ps
T690 /workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.2391704065 Aug 19 06:34:57 PM PDT 24 Aug 19 06:40:04 PM PDT 24 3204406761 ps
T191 /workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.1749131249 Aug 19 06:38:09 PM PDT 24 Aug 19 06:43:11 PM PDT 24 3097987349 ps
T691 /workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.1889190374 Aug 19 06:36:23 PM PDT 24 Aug 19 06:41:42 PM PDT 24 3335006382 ps
T692 /workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.180003426 Aug 19 06:38:30 PM PDT 24 Aug 19 06:46:28 PM PDT 24 5733752842 ps
T693 /workspace/coverage/default/6.chip_sw_uart_rand_baudrate.3085245983 Aug 19 06:55:37 PM PDT 24 Aug 19 07:33:25 PM PDT 24 12914580404 ps
T64 /workspace/coverage/default/1.chip_sw_alert_test.4225826823 Aug 19 06:39:00 PM PDT 24 Aug 19 06:44:10 PM PDT 24 2974145760 ps
T130 /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.2101474215 Aug 19 06:52:42 PM PDT 24 Aug 19 07:01:28 PM PDT 24 5660938010 ps
T495 /workspace/coverage/default/73.chip_sw_all_escalation_resets.2827562894 Aug 19 06:59:05 PM PDT 24 Aug 19 07:09:15 PM PDT 24 5812409558 ps
T517 /workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.2190478748 Aug 19 06:59:25 PM PDT 24 Aug 19 07:07:06 PM PDT 24 4292024752 ps
T543 /workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.152705603 Aug 19 06:56:37 PM PDT 24 Aug 19 07:02:49 PM PDT 24 3709294936 ps
T694 /workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.305520890 Aug 19 06:41:59 PM PDT 24 Aug 19 08:05:29 PM PDT 24 47901003840 ps
T695 /workspace/coverage/default/1.chip_tap_straps_testunlock0.1539369756 Aug 19 06:37:42 PM PDT 24 Aug 19 06:45:26 PM PDT 24 5085261847 ps
T307 /workspace/coverage/default/2.chip_sw_power_idle_load.1292791864 Aug 19 06:51:22 PM PDT 24 Aug 19 07:01:50 PM PDT 24 3979098416 ps
T187 /workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.2850465627 Aug 19 06:41:41 PM PDT 24 Aug 19 09:43:10 PM PDT 24 59659965614 ps
T65 /workspace/coverage/default/0.chip_sw_alert_test.2319198520 Aug 19 06:33:41 PM PDT 24 Aug 19 06:38:57 PM PDT 24 2554937100 ps
T696 /workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.532938274 Aug 19 06:40:05 PM PDT 24 Aug 19 07:24:01 PM PDT 24 11712142428 ps
T195 /workspace/coverage/default/33.chip_sw_all_escalation_resets.3374296581 Aug 19 06:56:58 PM PDT 24 Aug 19 07:07:05 PM PDT 24 6056693400 ps
T697 /workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.4070097097 Aug 19 06:50:26 PM PDT 24 Aug 19 07:06:50 PM PDT 24 5722560010 ps
T205 /workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.236730613 Aug 19 06:37:47 PM PDT 24 Aug 19 06:43:00 PM PDT 24 3669103717 ps
T54 /workspace/coverage/default/1.chip_sw_spi_device_tpm.3643083415 Aug 19 06:40:44 PM PDT 24 Aug 19 06:46:02 PM PDT 24 2917870713 ps
T698 /workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.2297631601 Aug 19 06:35:31 PM PDT 24 Aug 19 06:54:14 PM PDT 24 7605440971 ps
T699 /workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.586095351 Aug 19 06:38:09 PM PDT 24 Aug 19 06:47:30 PM PDT 24 7631899019 ps
T299 /workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.2071760229 Aug 19 06:42:20 PM PDT 24 Aug 19 06:47:15 PM PDT 24 2654866338 ps
T564 /workspace/coverage/default/18.chip_sw_all_escalation_resets.2960618561 Aug 19 06:55:52 PM PDT 24 Aug 19 07:06:08 PM PDT 24 5983425032 ps
T700 /workspace/coverage/default/2.chip_sw_entropy_src_kat_test.265704384 Aug 19 06:50:29 PM PDT 24 Aug 19 06:54:27 PM PDT 24 2818620598 ps
T701 /workspace/coverage/default/1.chip_sw_uart_smoketest.3370371834 Aug 19 06:45:07 PM PDT 24 Aug 19 06:49:22 PM PDT 24 2578065310 ps
T483 /workspace/coverage/default/17.chip_sw_all_escalation_resets.1968202032 Aug 19 06:57:09 PM PDT 24 Aug 19 07:08:34 PM PDT 24 5633607056 ps
T88 /workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.2814415244 Aug 19 06:42:41 PM PDT 24 Aug 19 06:49:58 PM PDT 24 6070857684 ps
T702 /workspace/coverage/default/0.chip_sw_lc_ctrl_transition.1486337610 Aug 19 06:33:28 PM PDT 24 Aug 19 06:52:58 PM PDT 24 12005611192 ps
T703 /workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.179917663 Aug 19 06:34:14 PM PDT 24 Aug 19 06:44:23 PM PDT 24 3607434712 ps
T704 /workspace/coverage/default/2.rom_e2e_shutdown_output.2684107387 Aug 19 06:56:28 PM PDT 24 Aug 19 07:48:42 PM PDT 24 27043234029 ps
T705 /workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.48508419 Aug 19 06:43:34 PM PDT 24 Aug 19 07:42:54 PM PDT 24 15374337528 ps
T706 /workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.2443198036 Aug 19 06:37:41 PM PDT 24 Aug 19 06:54:07 PM PDT 24 6818812045 ps
T248 /workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.2067803703 Aug 19 06:46:08 PM PDT 24 Aug 19 06:51:41 PM PDT 24 3366447057 ps
T556 /workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.3514310018 Aug 19 06:56:25 PM PDT 24 Aug 19 07:02:57 PM PDT 24 4212630732 ps
T707 /workspace/coverage/default/0.chip_sw_edn_entropy_reqs.1162917553 Aug 19 06:34:18 PM PDT 24 Aug 19 06:52:54 PM PDT 24 6075804936 ps
T79 /workspace/coverage/default/2.chip_tap_straps_testunlock0.204625522 Aug 19 06:49:50 PM PDT 24 Aug 19 06:53:37 PM PDT 24 2871711874 ps
T192 /workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.3690289043 Aug 19 06:40:48 PM PDT 24 Aug 19 06:44:56 PM PDT 24 2583499068 ps
T708 /workspace/coverage/default/1.chip_sw_hmac_enc_idle.2815448716 Aug 19 06:40:00 PM PDT 24 Aug 19 06:45:00 PM PDT 24 2519186720 ps
T224 /workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.1472327963 Aug 19 06:33:13 PM PDT 24 Aug 19 06:46:18 PM PDT 24 4925884892 ps
T709 /workspace/coverage/default/0.chip_sw_power_idle_load.1335585917 Aug 19 06:39:27 PM PDT 24 Aug 19 06:52:51 PM PDT 24 4065794152 ps
T710 /workspace/coverage/default/1.chip_sw_rstmgr_sw_req.1291429902 Aug 19 06:37:32 PM PDT 24 Aug 19 06:44:59 PM PDT 24 4089216880 ps
T452 /workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.3928698009 Aug 19 06:36:39 PM PDT 24 Aug 19 06:50:26 PM PDT 24 4842488640 ps
T711 /workspace/coverage/default/1.chip_sw_otbn_randomness.3533831611 Aug 19 06:38:47 PM PDT 24 Aug 19 06:55:25 PM PDT 24 6468774696 ps
T712 /workspace/coverage/default/2.chip_sw_hmac_oneshot.2734438040 Aug 19 06:51:38 PM PDT 24 Aug 19 06:57:43 PM PDT 24 3705988704 ps
T379 /workspace/coverage/default/0.chip_sw_aon_timer_irq.2531532017 Aug 19 06:35:44 PM PDT 24 Aug 19 06:42:24 PM PDT 24 3433612660 ps
T713 /workspace/coverage/default/2.chip_sw_uart_smoketest.878879880 Aug 19 06:52:12 PM PDT 24 Aug 19 06:57:53 PM PDT 24 2899332700 ps
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