| SCORE |
LINE |
COND |
TOGGLE |
FSM |
BRANCH |
ASSERT |
GROUP |
|
| TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | NAME |
| 40.70 |
40.70 |
44.89 |
44.89 |
43.06 |
43.06 |
31.62 |
31.62 |
|
|
57.96 |
57.96 |
59.44 |
59.44 |
7.24 |
7.24 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.3713472262 |
| 48.80 |
8.10 |
44.97 |
0.07 |
43.14 |
0.08 |
33.80 |
2.18 |
|
|
57.96 |
0.01 |
59.44 |
0.00 |
53.51 |
46.27 |
/workspace/coverage/default/1.chip_sw_alert_test.4225826823 |
| 54.73 |
5.92 |
55.37 |
10.40 |
48.75 |
5.62 |
38.65 |
4.86 |
|
|
61.03 |
3.07 |
63.81 |
4.37 |
60.75 |
7.24 |
/workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.819100316 |
| 59.81 |
5.08 |
66.31 |
10.95 |
55.82 |
7.06 |
41.34 |
2.69 |
|
|
70.65 |
9.62 |
63.99 |
0.17 |
60.75 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.1353781505 |
| 63.29 |
3.48 |
72.66 |
6.35 |
62.83 |
7.02 |
41.70 |
0.35 |
|
|
77.84 |
7.19 |
63.99 |
0.00 |
60.75 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.3191105351 |
| 65.80 |
2.50 |
72.67 |
0.01 |
62.85 |
0.02 |
56.66 |
14.97 |
|
|
77.86 |
0.02 |
63.99 |
0.00 |
60.75 |
0.00 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.349634650 |
| 67.83 |
2.04 |
74.63 |
1.96 |
65.34 |
2.48 |
62.47 |
5.81 |
|
|
79.65 |
1.79 |
64.16 |
0.17 |
60.75 |
0.00 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.2814958031 |
| 69.54 |
1.70 |
77.67 |
3.04 |
69.08 |
3.75 |
62.80 |
0.33 |
|
|
82.76 |
3.11 |
64.16 |
0.00 |
60.75 |
0.00 |
/workspace/coverage/default/2.chip_jtag_csr_rw.779156682 |
| 71.13 |
1.59 |
77.96 |
0.29 |
69.24 |
0.16 |
71.38 |
8.58 |
|
|
82.94 |
0.18 |
64.51 |
0.35 |
60.75 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.442320087 |
| 72.58 |
1.45 |
79.57 |
1.62 |
69.92 |
0.68 |
76.20 |
4.82 |
|
|
83.46 |
0.52 |
65.56 |
1.05 |
60.75 |
0.00 |
/workspace/coverage/default/2.chip_sw_power_virus.4183129004 |
| 73.91 |
1.33 |
80.37 |
0.79 |
70.73 |
0.81 |
76.99 |
0.79 |
|
|
84.02 |
0.57 |
65.56 |
0.00 |
65.79 |
5.04 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.696834565 |
| 75.17 |
1.26 |
81.47 |
1.10 |
71.60 |
0.87 |
77.20 |
0.21 |
|
|
85.05 |
1.02 |
69.23 |
3.67 |
66.45 |
0.66 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.1675819553 |
| 76.34 |
1.18 |
83.77 |
2.30 |
73.54 |
1.94 |
77.76 |
0.55 |
|
|
87.31 |
2.26 |
69.23 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.528134877 |
| 77.34 |
0.99 |
84.77 |
1.00 |
74.07 |
0.53 |
77.77 |
0.01 |
|
|
87.88 |
0.57 |
73.08 |
3.85 |
66.45 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.2186915182 |
| 78.04 |
0.71 |
86.04 |
1.27 |
75.15 |
1.08 |
78.44 |
0.67 |
|
|
89.10 |
1.22 |
73.08 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.2563518574 |
| 78.74 |
0.70 |
86.91 |
0.87 |
76.13 |
0.98 |
80.59 |
2.15 |
|
|
89.29 |
0.19 |
73.08 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/1.chip_jtag_csr_rw.3813587741 |
| 79.37 |
0.63 |
87.47 |
0.56 |
76.65 |
0.52 |
80.77 |
0.17 |
|
|
89.72 |
0.43 |
75.17 |
2.10 |
66.45 |
0.00 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.74052176 |
| 79.88 |
0.51 |
87.47 |
0.00 |
76.65 |
0.00 |
83.82 |
3.05 |
|
|
89.72 |
0.00 |
75.17 |
0.00 |
66.45 |
0.00 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.2361820480 |
| 80.36 |
0.48 |
87.75 |
0.28 |
76.93 |
0.28 |
83.82 |
0.00 |
|
|
89.95 |
0.23 |
77.27 |
2.10 |
66.45 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.2617875383 |
| 80.84 |
0.48 |
88.03 |
0.28 |
77.19 |
0.26 |
83.82 |
0.00 |
|
|
90.17 |
0.22 |
79.37 |
2.10 |
66.45 |
0.00 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.2688907173 |
| 81.18 |
0.34 |
88.51 |
0.47 |
77.58 |
0.39 |
84.26 |
0.43 |
|
|
90.72 |
0.55 |
79.37 |
0.00 |
66.67 |
0.22 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.1643722910 |
| 81.49 |
0.30 |
88.54 |
0.03 |
77.59 |
0.01 |
84.30 |
0.05 |
|
|
90.73 |
0.02 |
79.55 |
0.17 |
68.20 |
1.54 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.3855261158 |
| 81.71 |
0.22 |
88.56 |
0.01 |
77.60 |
0.01 |
84.93 |
0.63 |
|
|
90.74 |
0.01 |
79.55 |
0.00 |
68.86 |
0.66 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.485684623 |
| 81.93 |
0.22 |
88.65 |
0.10 |
77.68 |
0.08 |
84.95 |
0.02 |
|
|
90.82 |
0.07 |
80.59 |
1.05 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.68685324 |
| 82.10 |
0.17 |
88.70 |
0.05 |
78.14 |
0.46 |
84.96 |
0.01 |
|
|
91.33 |
0.52 |
80.59 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.2774399480 |
| 82.26 |
0.16 |
88.80 |
0.10 |
78.14 |
0.01 |
85.83 |
0.88 |
|
|
91.33 |
0.00 |
80.59 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_jtag_csr_rw.4128046537 |
| 82.41 |
0.15 |
88.80 |
0.00 |
78.14 |
0.00 |
86.73 |
0.90 |
|
|
91.33 |
0.00 |
80.59 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3061317126 |
| 82.56 |
0.15 |
89.00 |
0.21 |
78.46 |
0.32 |
87.08 |
0.36 |
|
|
91.33 |
0.00 |
80.59 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.389993749 |
| 82.67 |
0.11 |
89.23 |
0.23 |
78.63 |
0.17 |
87.26 |
0.17 |
|
|
91.45 |
0.11 |
80.59 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/2.chip_sw_gpio.1919913754 |
| 82.78 |
0.10 |
89.32 |
0.08 |
78.71 |
0.08 |
87.26 |
0.01 |
|
|
91.51 |
0.06 |
80.77 |
0.17 |
69.08 |
0.22 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.2331412077 |
| 82.86 |
0.09 |
89.49 |
0.18 |
78.85 |
0.13 |
87.32 |
0.06 |
|
|
91.66 |
0.15 |
80.77 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.168316950 |
| 82.94 |
0.08 |
89.49 |
0.00 |
78.85 |
0.01 |
87.78 |
0.46 |
|
|
91.66 |
0.00 |
80.77 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.3374296581 |
| 83.01 |
0.07 |
89.49 |
0.00 |
78.89 |
0.04 |
87.78 |
0.00 |
|
|
91.68 |
0.02 |
80.94 |
0.17 |
69.30 |
0.22 |
/workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.2550950953 |
| 83.09 |
0.07 |
89.50 |
0.01 |
78.90 |
0.01 |
87.78 |
0.00 |
|
|
91.70 |
0.02 |
81.12 |
0.17 |
69.52 |
0.22 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3273223154 |
| 83.16 |
0.07 |
89.51 |
0.01 |
78.91 |
0.01 |
87.79 |
0.01 |
|
|
91.71 |
0.01 |
81.29 |
0.17 |
69.74 |
0.22 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.3277773886 |
| 83.23 |
0.07 |
89.51 |
0.01 |
78.92 |
0.01 |
87.80 |
0.01 |
|
|
91.72 |
0.01 |
81.47 |
0.17 |
69.96 |
0.22 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.1406699506 |
| 83.30 |
0.07 |
89.51 |
0.00 |
78.92 |
0.00 |
88.22 |
0.42 |
|
|
91.72 |
0.00 |
81.47 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.1937185872 |
| 83.36 |
0.06 |
89.52 |
0.01 |
79.08 |
0.16 |
88.22 |
0.01 |
|
|
91.89 |
0.18 |
81.47 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.2895710391 |
| 83.41 |
0.06 |
89.52 |
0.00 |
79.10 |
0.02 |
88.54 |
0.31 |
|
|
91.89 |
0.00 |
81.47 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3859752018 |
| 83.46 |
0.05 |
89.53 |
0.01 |
79.10 |
0.00 |
88.61 |
0.07 |
|
|
91.89 |
0.00 |
81.47 |
0.00 |
70.18 |
0.22 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.611246122 |
| 83.51 |
0.05 |
89.53 |
0.01 |
79.12 |
0.02 |
88.66 |
0.05 |
|
|
91.91 |
0.02 |
81.64 |
0.17 |
70.18 |
0.00 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.1532434478 |
| 83.55 |
0.05 |
89.53 |
0.00 |
79.12 |
0.00 |
88.71 |
0.05 |
|
|
91.91 |
0.00 |
81.64 |
0.00 |
70.39 |
0.22 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.954867553 |
| 83.60 |
0.04 |
89.58 |
0.04 |
79.29 |
0.17 |
88.72 |
0.01 |
|
|
91.94 |
0.03 |
81.64 |
0.00 |
70.39 |
0.00 |
/workspace/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.2734314234 |
| 83.64 |
0.04 |
89.59 |
0.02 |
79.30 |
0.01 |
88.73 |
0.01 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
70.61 |
0.22 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.279188425 |
| 83.67 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.74 |
0.01 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
70.83 |
0.22 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.1238845727 |
| 83.71 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.74 |
0.01 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
71.05 |
0.22 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.1641236912 |
| 83.75 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.01 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
71.27 |
0.22 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.1836942485 |
| 83.79 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.01 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
71.49 |
0.22 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2099059816 |
| 83.82 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
71.71 |
0.22 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2579892821 |
| 83.86 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
71.93 |
0.22 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.20346736 |
| 83.90 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
72.15 |
0.22 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.1504967220 |
| 83.93 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
72.37 |
0.22 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.152705603 |
| 83.97 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
72.59 |
0.22 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.1080978315 |
| 84.01 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
72.81 |
0.22 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.3449440897 |
| 84.04 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
73.03 |
0.22 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.543908557 |
| 84.08 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
73.25 |
0.22 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.143200089 |
| 84.12 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
73.46 |
0.22 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.1266888445 |
| 84.15 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
73.68 |
0.22 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.366367948 |
| 84.19 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
73.90 |
0.22 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.3546531557 |
| 84.23 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
74.12 |
0.22 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.623889848 |
| 84.26 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
74.34 |
0.22 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.3945126509 |
| 84.30 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
74.56 |
0.22 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.836283374 |
| 84.33 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
74.78 |
0.22 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.2572571784 |
| 84.37 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
75.00 |
0.22 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.2960618561 |
| 84.41 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
75.22 |
0.22 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.781710953 |
| 84.44 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
75.44 |
0.22 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.2079449072 |
| 84.48 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
75.66 |
0.22 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.3629505646 |
| 84.52 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
75.88 |
0.22 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.3525945218 |
| 84.55 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
76.10 |
0.22 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.706760562 |
| 84.59 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
76.32 |
0.22 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.2738383317 |
| 84.63 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
76.54 |
0.22 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.2065321311 |
| 84.66 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
76.75 |
0.22 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.2277702001 |
| 84.70 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
76.97 |
0.22 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.3476278900 |
| 84.74 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
77.19 |
0.22 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.3249046411 |
| 84.77 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
77.41 |
0.22 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.1312535691 |
| 84.81 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
77.63 |
0.22 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.359304538 |
| 84.85 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
77.85 |
0.22 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.1345692559 |
| 84.88 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
78.07 |
0.22 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.782213985 |
| 84.92 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
78.29 |
0.22 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.3540583635 |
| 84.96 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
78.51 |
0.22 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.3514310018 |
| 84.99 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
78.73 |
0.22 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.3268406541 |
| 85.03 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
78.95 |
0.22 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.734262432 |
| 85.07 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
79.17 |
0.22 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.1237800498 |
| 85.10 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
79.39 |
0.22 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.67899571 |
| 85.14 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
79.61 |
0.22 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.2766832058 |
| 85.18 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
79.82 |
0.22 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.1784941284 |
| 85.21 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
80.04 |
0.22 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2620784608 |
| 85.25 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
80.26 |
0.22 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.3906706168 |
| 85.29 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
80.48 |
0.22 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.889232857 |
| 85.32 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
80.70 |
0.22 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.2869117500 |
| 85.36 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
80.92 |
0.22 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.4163862162 |
| 85.39 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
81.14 |
0.22 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.1987712846 |
| 85.43 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
81.36 |
0.22 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.3557477383 |
| 85.47 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
81.58 |
0.22 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.3102687331 |
| 85.50 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
81.80 |
0.22 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.3209822576 |
| 85.54 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
82.02 |
0.22 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.1766704142 |
| 85.58 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
82.24 |
0.22 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.1644311289 |
| 85.61 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
82.46 |
0.22 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.502656762 |
| 85.65 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
82.68 |
0.22 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.495903355 |
| 85.69 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
82.89 |
0.22 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.2273572001 |
| 85.72 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
83.11 |
0.22 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.3898518491 |
| 85.76 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
83.33 |
0.22 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.1221617732 |
| 85.80 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
83.55 |
0.22 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.544458178 |
| 85.83 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
83.77 |
0.22 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.1060209416 |
| 85.87 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
83.99 |
0.22 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.4112886019 |
| 85.91 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
84.21 |
0.22 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.3586169142 |
| 85.94 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
84.43 |
0.22 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.2834527721 |
| 85.98 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
84.65 |
0.22 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.392793561 |
| 86.02 |
0.04 |
89.59 |
0.00 |
79.30 |
0.00 |
88.75 |
0.00 |
|
|
91.94 |
0.00 |
81.64 |
0.00 |
84.87 |
0.22 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.1610811197 |
| 86.05 |
0.03 |
89.64 |
0.04 |
79.36 |
0.06 |
88.81 |
0.05 |
|
|
91.99 |
0.05 |
81.64 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.2385625145 |
| 86.08 |
0.03 |
89.81 |
0.17 |
79.38 |
0.02 |
88.82 |
0.01 |
|
|
91.99 |
0.00 |
81.64 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.2306333588 |
| 86.12 |
0.03 |
89.81 |
0.00 |
79.38 |
0.00 |
89.02 |
0.20 |
|
|
91.99 |
0.00 |
81.64 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.515272328 |
| 86.15 |
0.03 |
89.81 |
0.00 |
79.38 |
0.00 |
89.21 |
0.19 |
|
|
91.99 |
0.00 |
81.64 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.3529562712 |
| 86.18 |
0.03 |
89.81 |
0.00 |
79.38 |
0.00 |
89.21 |
0.00 |
|
|
91.99 |
0.00 |
81.82 |
0.17 |
84.87 |
0.00 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.3344811686 |
| 86.21 |
0.03 |
89.88 |
0.07 |
79.40 |
0.03 |
89.22 |
0.01 |
|
|
92.04 |
0.05 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.2486363509 |
| 86.23 |
0.03 |
89.89 |
0.01 |
79.42 |
0.02 |
89.33 |
0.11 |
|
|
92.06 |
0.02 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.1545710663 |
| 86.26 |
0.02 |
89.96 |
0.07 |
79.42 |
0.00 |
89.40 |
0.07 |
|
|
92.06 |
0.01 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.204625522 |
| 86.28 |
0.02 |
89.96 |
0.00 |
79.53 |
0.11 |
89.41 |
0.02 |
|
|
92.06 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.2542188481 |
| 86.30 |
0.02 |
89.96 |
0.00 |
79.65 |
0.11 |
89.41 |
0.00 |
|
|
92.06 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.317070151 |
| 86.31 |
0.02 |
89.96 |
0.00 |
79.65 |
0.00 |
89.53 |
0.11 |
|
|
92.06 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.1367929974 |
| 86.33 |
0.02 |
89.96 |
0.00 |
79.65 |
0.01 |
89.63 |
0.11 |
|
|
92.06 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.3579337093 |
| 86.35 |
0.02 |
90.01 |
0.04 |
79.67 |
0.02 |
89.66 |
0.03 |
|
|
92.08 |
0.02 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2561683574 |
| 86.37 |
0.02 |
90.01 |
0.00 |
79.67 |
0.00 |
89.76 |
0.10 |
|
|
92.08 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.4077613576 |
| 86.38 |
0.01 |
90.01 |
0.00 |
79.67 |
0.00 |
89.84 |
0.08 |
|
|
92.08 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.1864196119 |
| 86.39 |
0.01 |
90.07 |
0.07 |
79.68 |
0.01 |
89.84 |
0.01 |
|
|
92.08 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1653976762 |
| 86.41 |
0.01 |
90.08 |
0.01 |
79.72 |
0.04 |
89.84 |
0.01 |
|
|
92.11 |
0.02 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.3396429090 |
| 86.42 |
0.01 |
90.11 |
0.02 |
79.74 |
0.02 |
89.85 |
0.01 |
|
|
92.13 |
0.02 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.4136226928 |
| 86.43 |
0.01 |
90.11 |
0.00 |
79.80 |
0.07 |
89.85 |
0.00 |
|
|
92.13 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.2113343764 |
| 86.44 |
0.01 |
90.14 |
0.03 |
79.81 |
0.01 |
89.85 |
0.00 |
|
|
92.15 |
0.02 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.408124489 |
| 86.45 |
0.01 |
90.14 |
0.00 |
79.87 |
0.06 |
89.85 |
0.00 |
|
|
92.15 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.3373207131 |
| 86.46 |
0.01 |
90.16 |
0.02 |
79.88 |
0.01 |
89.86 |
0.01 |
|
|
92.16 |
0.02 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.579817267 |
| 86.47 |
0.01 |
90.16 |
0.00 |
79.88 |
0.01 |
89.90 |
0.05 |
|
|
92.16 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.537703137 |
| 86.47 |
0.01 |
90.16 |
0.00 |
79.93 |
0.05 |
89.90 |
0.00 |
|
|
92.16 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.2943065784 |
| 86.48 |
0.01 |
90.16 |
0.00 |
79.93 |
0.00 |
89.95 |
0.04 |
|
|
92.16 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.3986966811 |
| 86.49 |
0.01 |
90.16 |
0.00 |
79.93 |
0.00 |
89.99 |
0.04 |
|
|
92.16 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.3690289043 |
| 86.49 |
0.01 |
90.20 |
0.03 |
79.93 |
0.01 |
89.99 |
0.01 |
|
|
92.16 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.3422917392 |
| 86.50 |
0.01 |
90.20 |
0.00 |
79.96 |
0.03 |
89.99 |
0.00 |
|
|
92.17 |
0.01 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.3119757931 |
| 86.51 |
0.01 |
90.20 |
0.01 |
79.99 |
0.02 |
90.00 |
0.01 |
|
|
92.17 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.1059386462 |
| 86.51 |
0.01 |
90.20 |
0.00 |
79.99 |
0.00 |
90.04 |
0.04 |
|
|
92.17 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.2021110602 |
| 86.52 |
0.01 |
90.20 |
0.00 |
80.01 |
0.02 |
90.05 |
0.01 |
|
|
92.17 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_power_idle_load.1792060785 |
| 86.52 |
0.01 |
90.20 |
0.01 |
80.03 |
0.02 |
90.06 |
0.01 |
|
|
92.17 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.231152119 |
| 86.53 |
0.01 |
90.20 |
0.00 |
80.03 |
0.00 |
90.09 |
0.03 |
|
|
92.17 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2280307461 |
| 86.53 |
0.01 |
90.20 |
0.00 |
80.05 |
0.02 |
90.09 |
0.00 |
|
|
92.17 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3408074754 |
| 86.54 |
0.01 |
90.20 |
0.00 |
80.05 |
0.00 |
90.10 |
0.01 |
|
|
92.18 |
0.01 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.4084164568 |
| 86.54 |
0.01 |
90.20 |
0.00 |
80.07 |
0.02 |
90.10 |
0.00 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.51140201 |
| 86.54 |
0.01 |
90.20 |
0.00 |
80.08 |
0.01 |
90.12 |
0.01 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.399149367 |
| 86.55 |
0.01 |
90.20 |
0.00 |
80.08 |
0.00 |
90.14 |
0.02 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.2360907914 |
| 86.55 |
0.01 |
90.21 |
0.01 |
80.09 |
0.01 |
90.14 |
0.01 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.334646697 |
| 86.55 |
0.01 |
90.21 |
0.00 |
80.11 |
0.02 |
90.14 |
0.00 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.1265156647 |
| 86.56 |
0.01 |
90.21 |
0.00 |
80.12 |
0.01 |
90.14 |
0.00 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_gpio.2646502088 |
| 86.56 |
0.01 |
90.21 |
0.00 |
80.13 |
0.01 |
90.15 |
0.01 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.2431806327 |
| 86.56 |
0.01 |
90.21 |
0.00 |
80.13 |
0.00 |
90.16 |
0.01 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_jtag_mem_access.2597970045 |
| 86.56 |
0.01 |
90.21 |
0.00 |
80.13 |
0.00 |
90.18 |
0.01 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.1749131249 |
| 86.57 |
0.01 |
90.21 |
0.01 |
80.13 |
0.00 |
90.18 |
0.01 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.1353047708 |
| 86.57 |
0.01 |
90.21 |
0.00 |
80.14 |
0.01 |
90.18 |
0.00 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.2977407900 |
| 86.57 |
0.01 |
90.21 |
0.00 |
80.15 |
0.01 |
90.18 |
0.00 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.609982012 |
| 86.57 |
0.01 |
90.21 |
0.00 |
80.15 |
0.00 |
90.19 |
0.01 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.1159212232 |
| 86.57 |
0.01 |
90.21 |
0.00 |
80.15 |
0.00 |
90.20 |
0.01 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.1281020818 |
| 86.57 |
0.01 |
90.21 |
0.00 |
80.15 |
0.00 |
90.21 |
0.01 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.684701059 |
| 86.58 |
0.01 |
90.21 |
0.00 |
80.15 |
0.00 |
90.22 |
0.01 |
|
|
92.18 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_init.1730198670 |
| 86.58 |
0.01 |
90.21 |
0.00 |
80.15 |
0.00 |
90.22 |
0.00 |
|
|
92.19 |
0.01 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_tap_straps_dev.3078742356 |
| 86.58 |
0.01 |
90.21 |
0.00 |
80.16 |
0.01 |
90.22 |
0.00 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.1686242054 |
| 86.58 |
0.01 |
90.21 |
0.00 |
80.16 |
0.01 |
90.22 |
0.00 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.1252637825 |
| 86.58 |
0.01 |
90.21 |
0.00 |
80.16 |
0.00 |
90.23 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.106710629 |
| 86.58 |
0.01 |
90.21 |
0.00 |
80.16 |
0.00 |
90.24 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.1447248509 |
| 86.58 |
0.01 |
90.22 |
0.01 |
80.16 |
0.00 |
90.24 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.1508042116 |
| 86.58 |
0.01 |
90.22 |
0.01 |
80.16 |
0.00 |
90.24 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.1660251027 |
| 86.58 |
0.01 |
90.22 |
0.00 |
80.16 |
0.00 |
90.25 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.979962913 |
| 86.58 |
0.01 |
90.22 |
0.00 |
80.16 |
0.00 |
90.25 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2968900675 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.16 |
0.00 |
90.25 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.2617097622 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.17 |
0.01 |
90.25 |
0.00 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_hmac_enc.565929178 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.17 |
0.01 |
90.25 |
0.00 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.2319247116 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.17 |
0.01 |
90.25 |
0.00 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.1472327963 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.18 |
0.01 |
90.25 |
0.00 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.1564184560 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.18 |
0.01 |
90.25 |
0.00 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.7257291 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.18 |
0.00 |
90.26 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_tap_straps_rma.2790781527 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.18 |
0.00 |
90.26 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.2996513450 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.18 |
0.00 |
90.26 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.1712855244 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.18 |
0.00 |
90.27 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.3335424234 |
| 86.59 |
0.01 |
90.22 |
0.00 |
80.18 |
0.00 |
90.27 |
0.01 |
|
|
92.19 |
0.00 |
81.82 |
0.00 |
84.87 |
0.00 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.2129730954 |
| Name |
| /workspace/coverage/default/0.chip_sival_flash_info_access.4089582867 |
| /workspace/coverage/default/0.chip_sw_aes_enc.1380400729 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.2145703669 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.3641639163 |
| /workspace/coverage/default/0.chip_sw_aes_entropy.3164554657 |
| /workspace/coverage/default/0.chip_sw_aes_idle.3513666931 |
| /workspace/coverage/default/0.chip_sw_aes_masking_off.2345107188 |
| /workspace/coverage/default/0.chip_sw_aes_smoketest.3164130411 |
| /workspace/coverage/default/0.chip_sw_alert_handler_entropy.2447567601 |
| /workspace/coverage/default/0.chip_sw_alert_handler_escalation.1592648819 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.215624793 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.2716083077 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.2240334375 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.1444765363 |
| /workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3681305079 |
| /workspace/coverage/default/0.chip_sw_alert_test.2319198520 |
| /workspace/coverage/default/0.chip_sw_all_escalation_resets.3057607571 |
| /workspace/coverage/default/0.chip_sw_aon_timer_irq.2531532017 |
| /workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.936133004 |
| /workspace/coverage/default/0.chip_sw_aon_timer_smoketest.3672967938 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.144193730 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.180003426 |
| /workspace/coverage/default/0.chip_sw_ast_clk_outputs.3048241111 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.3999454847 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.2645421024 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.4164696970 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2025162012 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1357679530 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1015193981 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter.1532842868 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.303627167 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.3023316941 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.918263694 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.1480250208 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.3964233205 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.2655589598 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_peri.1514024971 |
| /workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.3829285064 |
| /workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.2672772551 |
| /workspace/coverage/default/0.chip_sw_clkmgr_smoketest.1620618581 |
| /workspace/coverage/default/0.chip_sw_coremark.377049703 |
| /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.4041890299 |
| /workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.616961128 |
| /workspace/coverage/default/0.chip_sw_csrng_kat_test.3363369344 |
| /workspace/coverage/default/0.chip_sw_csrng_smoketest.3120003523 |
| /workspace/coverage/default/0.chip_sw_data_integrity_escalation.2962830702 |
| /workspace/coverage/default/0.chip_sw_edn_auto_mode.131461763 |
| /workspace/coverage/default/0.chip_sw_edn_entropy_reqs.1162917553 |
| /workspace/coverage/default/0.chip_sw_edn_kat.1518610435 |
| /workspace/coverage/default/0.chip_sw_edn_sw_mode.3532227882 |
| /workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.3985624063 |
| /workspace/coverage/default/0.chip_sw_entropy_src_kat_test.444286037 |
| /workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3940444218 |
| /workspace/coverage/default/0.chip_sw_example_concurrency.3099168554 |
| /workspace/coverage/default/0.chip_sw_example_flash.1250023939 |
| /workspace/coverage/default/0.chip_sw_example_manufacturer.2099178933 |
| /workspace/coverage/default/0.chip_sw_example_rom.4035310789 |
| /workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.3925884568 |
| /workspace/coverage/default/0.chip_sw_flash_crash_alert.1636116882 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access.1171317151 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.1981343544 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.966575171 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.3023186542 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.1427564167 |
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| /workspace/coverage/default/7.chip_sw_lc_ctrl_transition.230496735 |
| /workspace/coverage/default/7.chip_sw_uart_rand_baudrate.1929359973 |
| /workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.1974336687 |
| /workspace/coverage/default/71.chip_sw_all_escalation_resets.2530703747 |
| /workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.4163824044 |
| /workspace/coverage/default/73.chip_sw_all_escalation_resets.2827562894 |
| /workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.1572230561 |
| /workspace/coverage/default/74.chip_sw_all_escalation_resets.3724785134 |
| /workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.4150785456 |
| /workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.1894648169 |
| /workspace/coverage/default/76.chip_sw_all_escalation_resets.3143260022 |
| /workspace/coverage/default/77.chip_sw_all_escalation_resets.1817656790 |
| /workspace/coverage/default/78.chip_sw_all_escalation_resets.3367300846 |
| /workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.1294569619 |
| /workspace/coverage/default/8.chip_sw_all_escalation_resets.964210979 |
| /workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.2111274331 |
| /workspace/coverage/default/8.chip_sw_lc_ctrl_transition.3655600124 |
| /workspace/coverage/default/8.chip_sw_uart_rand_baudrate.2519979941 |
| /workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.48624004 |
| /workspace/coverage/default/80.chip_sw_all_escalation_resets.4038341874 |
| /workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.1488619117 |
| /workspace/coverage/default/81.chip_sw_all_escalation_resets.1404154872 |
| /workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.1542049633 |
| /workspace/coverage/default/82.chip_sw_all_escalation_resets.3906901396 |
| /workspace/coverage/default/83.chip_sw_all_escalation_resets.631852549 |
| /workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.1614302045 |
| /workspace/coverage/default/84.chip_sw_all_escalation_resets.3387592417 |
| /workspace/coverage/default/85.chip_sw_all_escalation_resets.2919091152 |
| /workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.3795156387 |
| /workspace/coverage/default/86.chip_sw_all_escalation_resets.3321410025 |
| /workspace/coverage/default/87.chip_sw_all_escalation_resets.2595838524 |
| /workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.1122986570 |
| /workspace/coverage/default/88.chip_sw_all_escalation_resets.2404407456 |
| /workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.1473584259 |
| /workspace/coverage/default/89.chip_sw_all_escalation_resets.3758217854 |
| /workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.2112547694 |
| /workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.876420126 |
| /workspace/coverage/default/9.chip_sw_lc_ctrl_transition.2407648369 |
| /workspace/coverage/default/9.chip_sw_uart_rand_baudrate.1619983546 |
| /workspace/coverage/default/90.chip_sw_all_escalation_resets.929380445 |
| /workspace/coverage/default/91.chip_sw_all_escalation_resets.2290553937 |
| /workspace/coverage/default/93.chip_sw_all_escalation_resets.612677556 |
| /workspace/coverage/default/94.chip_sw_all_escalation_resets.1109540960 |
| /workspace/coverage/default/98.chip_sw_all_escalation_resets.206681108 |
| /workspace/coverage/default/99.chip_sw_all_escalation_resets.2679906308 |
| /workspace/coverage/pad_ctrl_test_mode/1.chip_padctrl_attributes.798346411 |
| /workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.4225347580 |
| /workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.621085869 |
| /workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.1549313897 |
| /workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.1714017582 |
| /workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.1868087424 |
| /workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.2321429392 |
| /workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.2599461447 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/79.chip_sw_alert_handler_lpg_sleep_mode_alerts.2099059816 |
|
|
Aug 19 07:03:41 PM PDT 24 |
Aug 19 07:09:27 PM PDT 24 |
3761309000 ps |
| T2 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3467472042 |
|
|
Aug 19 06:41:42 PM PDT 24 |
Aug 19 06:48:15 PM PDT 24 |
3498544027 ps |
| T3 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.4189026599 |
|
|
Aug 19 06:55:11 PM PDT 24 |
Aug 19 07:30:20 PM PDT 24 |
12946677380 ps |
| T59 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.2814958031 |
|
|
Aug 19 06:41:25 PM PDT 24 |
Aug 19 07:26:51 PM PDT 24 |
11296279928 ps |
| T22 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.3859752018 |
|
|
Aug 19 06:38:44 PM PDT 24 |
Aug 19 06:56:30 PM PDT 24 |
5710302720 ps |
| T4 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.3713472262 |
|
|
Aug 19 07:04:16 PM PDT 24 |
Aug 19 07:12:57 PM PDT 24 |
5148462150 ps |
| T5 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.1643722910 |
|
|
Aug 19 06:42:15 PM PDT 24 |
Aug 19 07:40:59 PM PDT 24 |
15036969978 ps |
| T6 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.442320087 |
|
|
Aug 19 06:36:37 PM PDT 24 |
Aug 19 08:13:25 PM PDT 24 |
50987494936 ps |
| T93 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.2385625145 |
|
|
Aug 19 06:33:34 PM PDT 24 |
Aug 19 07:20:39 PM PDT 24 |
12992744938 ps |
| T62 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3709979066 |
|
|
Aug 19 06:48:46 PM PDT 24 |
Aug 19 07:00:13 PM PDT 24 |
4101978280 ps |
| T7 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.3842167704 |
|
|
Aug 19 06:36:15 PM PDT 24 |
Aug 19 08:10:02 PM PDT 24 |
23424631608 ps |
| T8 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1653976762 |
|
|
Aug 19 06:40:42 PM PDT 24 |
Aug 19 06:50:47 PM PDT 24 |
6853168108 ps |
| T47 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.349634650 |
|
|
Aug 19 06:39:37 PM PDT 24 |
Aug 19 07:01:09 PM PDT 24 |
6967610016 ps |
| T156 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.1518366684 |
|
|
Aug 19 06:52:15 PM PDT 24 |
Aug 19 06:57:22 PM PDT 24 |
3193471752 ps |
| T32 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.3290721623 |
|
|
Aug 19 06:31:19 PM PDT 24 |
Aug 19 06:35:45 PM PDT 24 |
3582582500 ps |
| T163 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.3363369344 |
|
|
Aug 19 06:34:19 PM PDT 24 |
Aug 19 06:39:48 PM PDT 24 |
3084494568 ps |
| T266 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.1238845727 |
|
|
Aug 19 06:38:43 PM PDT 24 |
Aug 19 06:46:15 PM PDT 24 |
3458831054 ps |
| T77 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.232767338 |
|
|
Aug 19 06:43:51 PM PDT 24 |
Aug 19 07:06:50 PM PDT 24 |
13956626156 ps |
| T129 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.3048233944 |
|
|
Aug 19 06:55:59 PM PDT 24 |
Aug 19 07:04:31 PM PDT 24 |
5007346242 ps |
| T166 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.866600755 |
|
|
Aug 19 06:50:06 PM PDT 24 |
Aug 19 08:32:41 PM PDT 24 |
18028664384 ps |
| T311 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.2734615385 |
|
|
Aug 19 06:56:43 PM PDT 24 |
Aug 19 07:07:53 PM PDT 24 |
4342598040 ps |
| T114 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.2341050674 |
|
|
Aug 19 06:40:12 PM PDT 24 |
Aug 19 06:53:51 PM PDT 24 |
10071208352 ps |
| T60 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.3061317126 |
|
|
Aug 19 06:38:28 PM PDT 24 |
Aug 19 07:57:49 PM PDT 24 |
44151609770 ps |
| T135 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.883631343 |
|
|
Aug 19 06:57:08 PM PDT 24 |
Aug 19 07:21:11 PM PDT 24 |
8536258000 ps |
| T58 |
/workspace/coverage/default/0.rom_e2e_shutdown_exception_c.2644489478 |
|
|
Aug 19 06:46:13 PM PDT 24 |
Aug 19 07:47:52 PM PDT 24 |
14938415004 ps |
| T153 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.1596798686 |
|
|
Aug 19 06:34:59 PM PDT 24 |
Aug 19 06:59:06 PM PDT 24 |
10117536992 ps |
| T78 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.611246122 |
|
|
Aug 19 07:00:59 PM PDT 24 |
Aug 19 07:10:29 PM PDT 24 |
5260735880 ps |
| T218 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.1660507238 |
|
|
Aug 19 06:40:56 PM PDT 24 |
Aug 19 06:48:01 PM PDT 24 |
3775216158 ps |
| T29 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.74052176 |
|
|
Aug 19 06:41:55 PM PDT 24 |
Aug 19 06:47:23 PM PDT 24 |
3456482662 ps |
| T104 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.366367948 |
|
|
Aug 19 06:56:10 PM PDT 24 |
Aug 19 07:02:23 PM PDT 24 |
3484088108 ps |
| T105 |
/workspace/coverage/default/0.chip_sw_power_sleep_load.1218430409 |
|
|
Aug 19 06:40:13 PM PDT 24 |
Aug 19 06:49:27 PM PDT 24 |
10913231362 ps |
| T76 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.2083286068 |
|
|
Aug 19 06:36:55 PM PDT 24 |
Aug 19 06:38:45 PM PDT 24 |
2612046730 ps |
| T106 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.4283178435 |
|
|
Aug 19 06:54:27 PM PDT 24 |
Aug 19 07:06:24 PM PDT 24 |
5447684180 ps |
| T107 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.1641236912 |
|
|
Aug 19 06:55:54 PM PDT 24 |
Aug 19 07:06:45 PM PDT 24 |
6357461664 ps |
| T108 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.3634524309 |
|
|
Aug 19 06:37:54 PM PDT 24 |
Aug 19 06:55:12 PM PDT 24 |
5191433360 ps |
| T109 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.4060990903 |
|
|
Aug 19 06:38:05 PM PDT 24 |
Aug 19 06:43:53 PM PDT 24 |
3178730006 ps |
| T67 |
/workspace/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.2734314234 |
|
|
Aug 19 06:41:05 PM PDT 24 |
Aug 19 06:44:22 PM PDT 24 |
3393252076 ps |
| T110 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.3023316941 |
|
|
Aug 19 06:33:08 PM PDT 24 |
Aug 19 06:37:44 PM PDT 24 |
3581627376 ps |
| T123 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.2127486016 |
|
|
Aug 19 06:34:54 PM PDT 24 |
Aug 19 06:50:35 PM PDT 24 |
5469862450 ps |
| T61 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.2407648369 |
|
|
Aug 19 06:54:31 PM PDT 24 |
Aug 19 07:15:50 PM PDT 24 |
10392266917 ps |
| T210 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.264246278 |
|
|
Aug 19 06:50:21 PM PDT 24 |
Aug 19 06:56:36 PM PDT 24 |
5088677496 ps |
| T158 |
/workspace/coverage/default/0.chip_sw_aes_entropy.3164554657 |
|
|
Aug 19 06:34:39 PM PDT 24 |
Aug 19 06:38:51 PM PDT 24 |
2456836300 ps |
| T154 |
/workspace/coverage/default/1.chip_sw_hmac_enc.1013735652 |
|
|
Aug 19 06:38:15 PM PDT 24 |
Aug 19 06:43:23 PM PDT 24 |
3099525620 ps |
| T275 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.136183531 |
|
|
Aug 19 06:45:31 PM PDT 24 |
Aug 19 08:20:33 PM PDT 24 |
22612397755 ps |
| T340 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.2859426956 |
|
|
Aug 19 06:43:52 PM PDT 24 |
Aug 19 06:53:14 PM PDT 24 |
9323994660 ps |
| T167 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.1458437940 |
|
|
Aug 19 06:45:05 PM PDT 24 |
Aug 19 07:59:36 PM PDT 24 |
16069406002 ps |
| T15 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.3579337093 |
|
|
Aug 19 06:35:35 PM PDT 24 |
Aug 19 07:09:13 PM PDT 24 |
11473550285 ps |
| T355 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.1836942485 |
|
|
Aug 19 07:01:24 PM PDT 24 |
Aug 19 07:09:24 PM PDT 24 |
4924439552 ps |
| T421 |
/workspace/coverage/default/2.rom_e2e_smoke.3665640442 |
|
|
Aug 19 06:55:22 PM PDT 24 |
Aug 19 07:55:17 PM PDT 24 |
15418479078 ps |
| T152 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.1532434478 |
|
|
Aug 19 06:52:45 PM PDT 24 |
Aug 19 07:04:11 PM PDT 24 |
5243761500 ps |
| T291 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.4158433331 |
|
|
Aug 19 06:41:57 PM PDT 24 |
Aug 19 06:52:00 PM PDT 24 |
4709721126 ps |
| T292 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.3442521946 |
|
|
Aug 19 06:40:25 PM PDT 24 |
Aug 19 06:47:17 PM PDT 24 |
5812339760 ps |
| T138 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.1056269313 |
|
|
Aug 19 06:53:53 PM PDT 24 |
Aug 19 07:16:57 PM PDT 24 |
12295622781 ps |
| T293 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.3549074792 |
|
|
Aug 19 06:58:41 PM PDT 24 |
Aug 19 07:05:31 PM PDT 24 |
3841392126 ps |
| T207 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.3119295659 |
|
|
Aug 19 06:49:53 PM PDT 24 |
Aug 19 06:53:34 PM PDT 24 |
2138815276 ps |
| T171 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.1425182137 |
|
|
Aug 19 06:37:15 PM PDT 24 |
Aug 19 06:49:10 PM PDT 24 |
4819555866 ps |
| T294 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.2240334375 |
|
|
Aug 19 06:37:33 PM PDT 24 |
Aug 19 07:03:35 PM PDT 24 |
7844748288 ps |
| T229 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.3898518491 |
|
|
Aug 19 07:00:35 PM PDT 24 |
Aug 19 07:05:53 PM PDT 24 |
3933926100 ps |
| T295 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.1227474978 |
|
|
Aug 19 06:52:51 PM PDT 24 |
Aug 19 07:02:21 PM PDT 24 |
4212011780 ps |
| T194 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1549834839 |
|
|
Aug 19 06:38:49 PM PDT 24 |
Aug 19 06:40:38 PM PDT 24 |
2393348658 ps |
| T179 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.2996513450 |
|
|
Aug 19 06:37:46 PM PDT 24 |
Aug 19 07:08:39 PM PDT 24 |
8222828932 ps |
| T115 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.485684623 |
|
|
Aug 19 06:37:41 PM PDT 24 |
Aug 19 07:01:25 PM PDT 24 |
7898513309 ps |
| T139 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.1353781505 |
|
|
Aug 19 06:48:32 PM PDT 24 |
Aug 19 06:58:14 PM PDT 24 |
3756620520 ps |
| T302 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.3343262252 |
|
|
Aug 19 06:58:48 PM PDT 24 |
Aug 19 07:07:36 PM PDT 24 |
5226714564 ps |
| T30 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.3216294467 |
|
|
Aug 19 06:43:23 PM PDT 24 |
Aug 19 06:55:22 PM PDT 24 |
4105852000 ps |
| T92 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.952133944 |
|
|
Aug 19 06:33:21 PM PDT 24 |
Aug 19 06:37:07 PM PDT 24 |
2908341318 ps |
| T117 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.4282742552 |
|
|
Aug 19 06:54:41 PM PDT 24 |
Aug 19 07:04:55 PM PDT 24 |
4537785107 ps |
| T197 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.992246997 |
|
|
Aug 19 06:36:30 PM PDT 24 |
Aug 19 08:05:24 PM PDT 24 |
50649835704 ps |
| T570 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.1067684830 |
|
|
Aug 19 06:50:19 PM PDT 24 |
Aug 19 06:54:49 PM PDT 24 |
2330241876 ps |
| T571 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.1676524711 |
|
|
Aug 19 06:39:32 PM PDT 24 |
Aug 19 06:50:22 PM PDT 24 |
4469448600 ps |
| T253 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.3855261158 |
|
|
Aug 19 06:39:19 PM PDT 24 |
Aug 19 06:50:03 PM PDT 24 |
5294429862 ps |
| T121 |
/workspace/coverage/default/1.chip_sw_edn_kat.637092865 |
|
|
Aug 19 06:37:36 PM PDT 24 |
Aug 19 06:47:25 PM PDT 24 |
3439514716 ps |
| T157 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.3750423908 |
|
|
Aug 19 06:37:05 PM PDT 24 |
Aug 19 06:41:54 PM PDT 24 |
2318533320 ps |
| T86 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.1359671687 |
|
|
Aug 19 06:35:38 PM PDT 24 |
Aug 19 06:41:36 PM PDT 24 |
2697632146 ps |
| T271 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.3584937675 |
|
|
Aug 19 06:39:38 PM PDT 24 |
Aug 19 06:55:51 PM PDT 24 |
5695075360 ps |
| T168 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.1592648819 |
|
|
Aug 19 06:35:05 PM PDT 24 |
Aug 19 06:46:21 PM PDT 24 |
5862364376 ps |
| T272 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.392793561 |
|
|
Aug 19 07:02:04 PM PDT 24 |
Aug 19 07:13:09 PM PDT 24 |
5526545120 ps |
| T159 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.3532227882 |
|
|
Aug 19 06:35:38 PM PDT 24 |
Aug 19 06:58:35 PM PDT 24 |
5438815272 ps |
| T273 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.1829915308 |
|
|
Aug 19 06:36:10 PM PDT 24 |
Aug 19 06:39:17 PM PDT 24 |
2691799818 ps |
| T274 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.281421168 |
|
|
Aug 19 06:54:01 PM PDT 24 |
Aug 19 07:08:59 PM PDT 24 |
7264915039 ps |
| T354 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.167660903 |
|
|
Aug 19 06:51:03 PM PDT 24 |
Aug 19 07:01:41 PM PDT 24 |
4753455848 ps |
| T9 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.536203172 |
|
|
Aug 19 06:33:52 PM PDT 24 |
Aug 19 06:41:49 PM PDT 24 |
5398543644 ps |
| T276 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.980348973 |
|
|
Aug 19 06:42:24 PM PDT 24 |
Aug 19 08:14:44 PM PDT 24 |
23638345595 ps |
| T313 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.4199611112 |
|
|
Aug 19 06:39:26 PM PDT 24 |
Aug 19 06:49:02 PM PDT 24 |
4003652996 ps |
| T267 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.2023449568 |
|
|
Aug 19 06:46:02 PM PDT 24 |
Aug 19 06:56:40 PM PDT 24 |
5171196484 ps |
| T364 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.576396850 |
|
|
Aug 19 06:49:26 PM PDT 24 |
Aug 19 06:57:54 PM PDT 24 |
4055629848 ps |
| T572 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.4064517544 |
|
|
Aug 19 06:56:59 PM PDT 24 |
Aug 19 06:59:37 PM PDT 24 |
2629342102 ps |
| T202 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.1143457790 |
|
|
Aug 19 06:55:16 PM PDT 24 |
Aug 19 07:11:32 PM PDT 24 |
14076965702 ps |
| T162 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.2313287373 |
|
|
Aug 19 06:41:55 PM PDT 24 |
Aug 19 07:21:03 PM PDT 24 |
10646508552 ps |
| T259 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.234556460 |
|
|
Aug 19 06:49:51 PM PDT 24 |
Aug 19 08:45:16 PM PDT 24 |
24814615480 ps |
| T367 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.3396429090 |
|
|
Aug 19 06:36:19 PM PDT 24 |
Aug 19 06:48:52 PM PDT 24 |
3971049960 ps |
| T155 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.2116249331 |
|
|
Aug 19 06:37:02 PM PDT 24 |
Aug 19 07:04:25 PM PDT 24 |
7201455750 ps |
| T36 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.1660251027 |
|
|
Aug 19 06:32:53 PM PDT 24 |
Aug 19 07:28:20 PM PDT 24 |
20758548647 ps |
| T208 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.1126927505 |
|
|
Aug 19 06:39:50 PM PDT 24 |
Aug 19 06:44:43 PM PDT 24 |
2471746798 ps |
| T198 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.74604987 |
|
|
Aug 19 06:38:54 PM PDT 24 |
Aug 19 07:57:42 PM PDT 24 |
44687377111 ps |
| T193 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.1159212232 |
|
|
Aug 19 06:35:15 PM PDT 24 |
Aug 19 06:39:13 PM PDT 24 |
2130102708 ps |
| T403 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1969293545 |
|
|
Aug 19 06:40:16 PM PDT 24 |
Aug 19 06:49:33 PM PDT 24 |
7644058130 ps |
| T18 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.696834565 |
|
|
Aug 19 06:51:50 PM PDT 24 |
Aug 19 07:11:11 PM PDT 24 |
9754779740 ps |
| T350 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.279188425 |
|
|
Aug 19 06:58:13 PM PDT 24 |
Aug 19 07:07:59 PM PDT 24 |
5103996250 ps |
| T404 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.305240917 |
|
|
Aug 19 06:49:39 PM PDT 24 |
Aug 19 07:07:05 PM PDT 24 |
5691914676 ps |
| T405 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.4203703460 |
|
|
Aug 19 06:56:12 PM PDT 24 |
Aug 19 07:02:05 PM PDT 24 |
2883053848 ps |
| T169 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.1220294412 |
|
|
Aug 19 06:32:57 PM PDT 24 |
Aug 19 06:41:23 PM PDT 24 |
5466852395 ps |
| T406 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.1171317151 |
|
|
Aug 19 06:34:57 PM PDT 24 |
Aug 19 06:53:49 PM PDT 24 |
5870511338 ps |
| T344 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.1572230561 |
|
|
Aug 19 06:59:49 PM PDT 24 |
Aug 19 07:05:44 PM PDT 24 |
4388213046 ps |
| T147 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.3042315738 |
|
|
Aug 19 06:48:41 PM PDT 24 |
Aug 19 06:54:00 PM PDT 24 |
3425273184 ps |
| T328 |
/workspace/coverage/default/1.chip_sw_flash_init.1730198670 |
|
|
Aug 19 06:33:39 PM PDT 24 |
Aug 19 07:02:27 PM PDT 24 |
20587291619 ps |
| T413 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.3813148944 |
|
|
Aug 19 06:58:34 PM PDT 24 |
Aug 19 07:03:36 PM PDT 24 |
3479084320 ps |
| T573 |
/workspace/coverage/default/1.chip_sw_hmac_oneshot.3232941248 |
|
|
Aug 19 06:40:39 PM PDT 24 |
Aug 19 06:45:08 PM PDT 24 |
2953329464 ps |
| T377 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.921973697 |
|
|
Aug 19 06:59:02 PM PDT 24 |
Aug 19 07:07:56 PM PDT 24 |
5418113988 ps |
| T233 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.3567287834 |
|
|
Aug 19 06:40:48 PM PDT 24 |
Aug 19 06:58:40 PM PDT 24 |
10622027723 ps |
| T26 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.2322764360 |
|
|
Aug 19 06:33:37 PM PDT 24 |
Aug 19 06:44:58 PM PDT 24 |
5895597043 ps |
| T268 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2561683574 |
|
|
Aug 19 06:46:02 PM PDT 24 |
Aug 19 07:09:38 PM PDT 24 |
11157856711 ps |
| T126 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.389993749 |
|
|
Aug 19 06:38:41 PM PDT 24 |
Aug 19 06:46:54 PM PDT 24 |
5293868218 ps |
| T142 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.1648857096 |
|
|
Aug 19 06:47:21 PM PDT 24 |
Aug 19 07:14:27 PM PDT 24 |
7227499550 ps |
| T356 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.3945126509 |
|
|
Aug 19 06:55:21 PM PDT 24 |
Aug 19 07:07:06 PM PDT 24 |
4453815712 ps |
| T574 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.303627167 |
|
|
Aug 19 06:34:01 PM PDT 24 |
Aug 19 06:41:59 PM PDT 24 |
3939565742 ps |
| T256 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.2331412077 |
|
|
Aug 19 07:03:08 PM PDT 24 |
Aug 19 07:11:01 PM PDT 24 |
4935628480 ps |
| T252 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.4270733750 |
|
|
Aug 19 06:36:01 PM PDT 24 |
Aug 19 06:43:54 PM PDT 24 |
3426543370 ps |
| T298 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.235609561 |
|
|
Aug 19 06:35:31 PM PDT 24 |
Aug 19 06:38:56 PM PDT 24 |
2468080878 ps |
| T282 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.3344811686 |
|
|
Aug 19 06:52:39 PM PDT 24 |
Aug 19 07:08:13 PM PDT 24 |
5209291368 ps |
| T283 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.3330520018 |
|
|
Aug 19 06:39:09 PM PDT 24 |
Aug 19 07:01:42 PM PDT 24 |
7876382770 ps |
| T277 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1778079830 |
|
|
Aug 19 06:43:17 PM PDT 24 |
Aug 19 06:45:05 PM PDT 24 |
2321108685 ps |
| T219 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.1845706882 |
|
|
Aug 19 06:40:42 PM PDT 24 |
Aug 19 06:57:47 PM PDT 24 |
5795819900 ps |
| T206 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.2431806327 |
|
|
Aug 19 06:42:17 PM PDT 24 |
Aug 19 06:53:21 PM PDT 24 |
6806214580 ps |
| T172 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.485496772 |
|
|
Aug 19 06:35:38 PM PDT 24 |
Aug 19 06:44:30 PM PDT 24 |
8065271776 ps |
| T136 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.4038318358 |
|
|
Aug 19 06:56:58 PM PDT 24 |
Aug 19 07:05:34 PM PDT 24 |
4130874240 ps |
| T19 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.2964677030 |
|
|
Aug 19 06:58:43 PM PDT 24 |
Aug 19 07:08:53 PM PDT 24 |
5290123244 ps |
| T284 |
/workspace/coverage/default/2.chip_sival_flash_info_access.1939856918 |
|
|
Aug 19 06:40:37 PM PDT 24 |
Aug 19 06:45:10 PM PDT 24 |
2827028212 ps |
| T261 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.1353047708 |
|
|
Aug 19 06:37:46 PM PDT 24 |
Aug 19 06:41:44 PM PDT 24 |
3049279660 ps |
| T124 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.2360907914 |
|
|
Aug 19 06:42:49 PM PDT 24 |
Aug 20 12:34:59 AM PDT 24 |
151660559206 ps |
| T575 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.3486941271 |
|
|
Aug 19 06:36:47 PM PDT 24 |
Aug 19 07:25:39 PM PDT 24 |
13198498010 ps |
| T473 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.3329781406 |
|
|
Aug 19 07:02:00 PM PDT 24 |
Aug 19 07:12:37 PM PDT 24 |
4891779736 ps |
| T352 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.3692706730 |
|
|
Aug 19 06:59:22 PM PDT 24 |
Aug 19 07:07:03 PM PDT 24 |
5664205952 ps |
| T576 |
/workspace/coverage/default/2.chip_sw_kmac_idle.1081868924 |
|
|
Aug 19 06:49:12 PM PDT 24 |
Aug 19 06:53:47 PM PDT 24 |
2643901208 ps |
| T577 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.2311985037 |
|
|
Aug 19 06:42:51 PM PDT 24 |
Aug 19 07:40:37 PM PDT 24 |
15671444848 ps |
| T578 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.2500990645 |
|
|
Aug 19 06:58:43 PM PDT 24 |
Aug 19 08:03:14 PM PDT 24 |
15346869366 ps |
| T579 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.3041982558 |
|
|
Aug 19 06:44:15 PM PDT 24 |
Aug 19 07:29:29 PM PDT 24 |
11295142740 ps |
| T231 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.1413580296 |
|
|
Aug 19 06:38:59 PM PDT 24 |
Aug 19 06:43:04 PM PDT 24 |
2832578866 ps |
| T183 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.1682471130 |
|
|
Aug 19 06:37:38 PM PDT 24 |
Aug 19 07:43:23 PM PDT 24 |
19000851811 ps |
| T278 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.98366358 |
|
|
Aug 19 06:44:39 PM PDT 24 |
Aug 19 07:34:09 PM PDT 24 |
10581198658 ps |
| T580 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1167668147 |
|
|
Aug 19 06:40:25 PM PDT 24 |
Aug 19 07:04:13 PM PDT 24 |
7850723776 ps |
| T581 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.1075718600 |
|
|
Aug 19 06:35:11 PM PDT 24 |
Aug 19 06:39:30 PM PDT 24 |
2993309306 ps |
| T73 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.408124489 |
|
|
Aug 19 06:29:54 PM PDT 24 |
Aug 19 06:35:30 PM PDT 24 |
6412053992 ps |
| T443 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.3367300846 |
|
|
Aug 19 06:58:58 PM PDT 24 |
Aug 19 07:10:03 PM PDT 24 |
4732111960 ps |
| T444 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.2294047204 |
|
|
Aug 19 06:50:30 PM PDT 24 |
Aug 19 06:57:35 PM PDT 24 |
3198403280 ps |
| T445 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.884964902 |
|
|
Aug 19 06:42:44 PM PDT 24 |
Aug 19 06:50:26 PM PDT 24 |
3841166079 ps |
| T359 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.2906789149 |
|
|
Aug 19 06:49:36 PM PDT 24 |
Aug 19 07:02:35 PM PDT 24 |
8228591088 ps |
| T341 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.4038341874 |
|
|
Aug 19 07:00:47 PM PDT 24 |
Aug 19 07:10:47 PM PDT 24 |
5705698980 ps |
| T160 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.829717195 |
|
|
Aug 19 06:40:32 PM PDT 24 |
Aug 19 06:50:55 PM PDT 24 |
5437162320 ps |
| T116 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.1558581308 |
|
|
Aug 19 06:36:00 PM PDT 24 |
Aug 19 06:44:33 PM PDT 24 |
5159394806 ps |
| T220 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.78953320 |
|
|
Aug 19 07:01:24 PM PDT 24 |
Aug 19 07:12:20 PM PDT 24 |
5700204950 ps |
| T446 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.2407789938 |
|
|
Aug 19 06:46:36 PM PDT 24 |
Aug 19 07:06:28 PM PDT 24 |
4808864700 ps |
| T31 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.1059386462 |
|
|
Aug 19 06:36:39 PM PDT 24 |
Aug 19 06:48:29 PM PDT 24 |
3967716806 ps |
| T385 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.1894648169 |
|
|
Aug 19 07:03:18 PM PDT 24 |
Aug 19 07:08:04 PM PDT 24 |
3871056452 ps |
| T417 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.3631247197 |
|
|
Aug 19 06:48:10 PM PDT 24 |
Aug 19 06:56:15 PM PDT 24 |
3684279700 ps |
| T418 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.4112886019 |
|
|
Aug 19 07:00:17 PM PDT 24 |
Aug 19 07:06:20 PM PDT 24 |
3391670520 ps |
| T314 |
/workspace/coverage/default/0.chip_tap_straps_dev.1564306552 |
|
|
Aug 19 06:37:51 PM PDT 24 |
Aug 19 06:40:35 PM PDT 24 |
2649999898 ps |
| T122 |
/workspace/coverage/default/0.chip_sw_edn_kat.1518610435 |
|
|
Aug 19 06:34:00 PM PDT 24 |
Aug 19 06:43:49 PM PDT 24 |
3057860000 ps |
| T27 |
/workspace/coverage/default/2.chip_sw_power_virus.4183129004 |
|
|
Aug 19 06:56:27 PM PDT 24 |
Aug 19 07:14:50 PM PDT 24 |
5579027056 ps |
| T419 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.4078177334 |
|
|
Aug 19 06:56:29 PM PDT 24 |
Aug 19 07:55:20 PM PDT 24 |
15186311721 ps |
| T234 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.1937185872 |
|
|
Aug 19 06:37:28 PM PDT 24 |
Aug 19 08:10:00 PM PDT 24 |
47704405479 ps |
| T319 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.488902015 |
|
|
Aug 19 06:42:16 PM PDT 24 |
Aug 19 07:05:57 PM PDT 24 |
8001582552 ps |
| T420 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.3610780834 |
|
|
Aug 19 06:53:14 PM PDT 24 |
Aug 19 07:17:00 PM PDT 24 |
7092274676 ps |
| T345 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.1221617732 |
|
|
Aug 19 06:58:57 PM PDT 24 |
Aug 19 07:08:00 PM PDT 24 |
4689673658 ps |
| T582 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.2179928527 |
|
|
Aug 19 06:43:09 PM PDT 24 |
Aug 19 06:48:06 PM PDT 24 |
2529798870 ps |
| T583 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.444286037 |
|
|
Aug 19 06:31:30 PM PDT 24 |
Aug 19 06:34:55 PM PDT 24 |
2930526312 ps |
| T12 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.4084164568 |
|
|
Aug 19 06:37:17 PM PDT 24 |
Aug 19 06:50:30 PM PDT 24 |
4884567723 ps |
| T584 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2554879014 |
|
|
Aug 19 06:50:50 PM PDT 24 |
Aug 19 06:56:18 PM PDT 24 |
3187578023 ps |
| T118 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.106710629 |
|
|
Aug 19 06:37:56 PM PDT 24 |
Aug 19 06:47:43 PM PDT 24 |
19730267444 ps |
| T140 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.1145645162 |
|
|
Aug 19 06:43:11 PM PDT 24 |
Aug 19 06:47:08 PM PDT 24 |
2767868340 ps |
| T321 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.2552149917 |
|
|
Aug 19 06:53:20 PM PDT 24 |
Aug 19 07:23:29 PM PDT 24 |
9523255472 ps |
| T257 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.1542049633 |
|
|
Aug 19 07:00:18 PM PDT 24 |
Aug 19 07:05:37 PM PDT 24 |
4041236072 ps |
| T330 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.271347429 |
|
|
Aug 19 06:40:10 PM PDT 24 |
Aug 19 07:18:29 PM PDT 24 |
22207293637 ps |
| T393 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.1925882958 |
|
|
Aug 19 07:00:07 PM PDT 24 |
Aug 19 07:06:54 PM PDT 24 |
3542593606 ps |
| T320 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.2869117500 |
|
|
Aug 19 06:58:40 PM PDT 24 |
Aug 19 07:04:51 PM PDT 24 |
3851961610 ps |
| T329 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.1367929974 |
|
|
Aug 19 06:40:39 PM PDT 24 |
Aug 19 08:11:53 PM PDT 24 |
48732578546 ps |
| T398 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.2259982982 |
|
|
Aug 19 06:58:05 PM PDT 24 |
Aug 19 07:11:35 PM PDT 24 |
8956361478 ps |
| T368 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2954774716 |
|
|
Aug 19 06:55:02 PM PDT 24 |
Aug 19 07:06:17 PM PDT 24 |
4819443209 ps |
| T399 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.3655600124 |
|
|
Aug 19 06:59:33 PM PDT 24 |
Aug 19 07:07:20 PM PDT 24 |
7506072786 ps |
| T262 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.4146935724 |
|
|
Aug 19 06:34:47 PM PDT 24 |
Aug 19 06:38:52 PM PDT 24 |
2425666500 ps |
| T309 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.67899571 |
|
|
Aug 19 06:56:15 PM PDT 24 |
Aug 19 07:01:51 PM PDT 24 |
4183084210 ps |
| T400 |
/workspace/coverage/default/0.chip_sw_hmac_smoketest.1871622033 |
|
|
Aug 19 06:36:04 PM PDT 24 |
Aug 19 06:41:34 PM PDT 24 |
3107558582 ps |
| T370 |
/workspace/coverage/default/1.chip_sival_flash_info_access.4086330427 |
|
|
Aug 19 06:34:14 PM PDT 24 |
Aug 19 06:39:42 PM PDT 24 |
3115615626 ps |
| T478 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.964210979 |
|
|
Aug 19 06:59:37 PM PDT 24 |
Aug 19 07:09:37 PM PDT 24 |
5792573912 ps |
| T209 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.2186915182 |
|
|
Aug 19 06:40:30 PM PDT 24 |
Aug 19 06:45:12 PM PDT 24 |
2837752720 ps |
| T310 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.3209822576 |
|
|
Aug 19 06:54:22 PM PDT 24 |
Aug 19 07:00:42 PM PDT 24 |
4212717464 ps |
| T285 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.1325285786 |
|
|
Aug 19 06:36:32 PM PDT 24 |
Aug 19 06:47:27 PM PDT 24 |
5609413310 ps |
| T16 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.4141264898 |
|
|
Aug 19 06:37:26 PM PDT 24 |
Aug 19 07:20:32 PM PDT 24 |
33942646316 ps |
| T317 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.2361820480 |
|
|
Aug 19 06:34:58 PM PDT 24 |
Aug 19 07:28:17 PM PDT 24 |
12322650768 ps |
| T13 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.2702515460 |
|
|
Aug 19 06:34:47 PM PDT 24 |
Aug 19 06:40:55 PM PDT 24 |
6628776950 ps |
| T529 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.1817656790 |
|
|
Aug 19 06:59:10 PM PDT 24 |
Aug 19 07:07:55 PM PDT 24 |
4895584842 ps |
| T402 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.2404407456 |
|
|
Aug 19 07:00:37 PM PDT 24 |
Aug 19 07:09:54 PM PDT 24 |
5906546464 ps |
| T308 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.3935998409 |
|
|
Aug 19 06:43:41 PM PDT 24 |
Aug 19 07:07:54 PM PDT 24 |
9460084532 ps |
| T422 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.3323842571 |
|
|
Aug 19 06:36:43 PM PDT 24 |
Aug 19 06:43:22 PM PDT 24 |
3667407043 ps |
| T189 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.2702199206 |
|
|
Aug 19 06:39:09 PM PDT 24 |
Aug 19 06:49:30 PM PDT 24 |
5592125816 ps |
| T585 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.1737494009 |
|
|
Aug 19 06:40:53 PM PDT 24 |
Aug 19 06:49:55 PM PDT 24 |
7330714905 ps |
| T125 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.2541474654 |
|
|
Aug 19 06:50:56 PM PDT 24 |
Aug 19 07:28:32 PM PDT 24 |
15122039027 ps |
| T586 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.3112882818 |
|
|
Aug 19 06:40:59 PM PDT 24 |
Aug 19 06:43:58 PM PDT 24 |
2508112807 ps |
| T279 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.978671843 |
|
|
Aug 19 06:45:09 PM PDT 24 |
Aug 19 07:42:36 PM PDT 24 |
27860646630 ps |
| T264 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.1382155788 |
|
|
Aug 19 06:45:48 PM PDT 24 |
Aug 19 06:52:35 PM PDT 24 |
2442539614 ps |
| T119 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.230644009 |
|
|
Aug 19 06:52:33 PM PDT 24 |
Aug 19 07:23:12 PM PDT 24 |
15056979205 ps |
| T322 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.2225863019 |
|
|
Aug 19 06:41:16 PM PDT 24 |
Aug 19 07:08:10 PM PDT 24 |
10754794436 ps |
| T349 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.4147495342 |
|
|
Aug 19 06:59:55 PM PDT 24 |
Aug 19 07:07:46 PM PDT 24 |
5164192764 ps |
| T286 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.476534756 |
|
|
Aug 19 06:47:07 PM PDT 24 |
Aug 19 06:54:28 PM PDT 24 |
3911470408 ps |
| T265 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.2631577074 |
|
|
Aug 19 06:39:04 PM PDT 24 |
Aug 19 06:44:10 PM PDT 24 |
2624573770 ps |
| T587 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.2184846268 |
|
|
Aug 19 06:51:27 PM PDT 24 |
Aug 19 06:55:56 PM PDT 24 |
3065982399 ps |
| T312 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.362712938 |
|
|
Aug 19 06:40:06 PM PDT 24 |
Aug 19 06:44:16 PM PDT 24 |
2298463700 ps |
| T588 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.1523400767 |
|
|
Aug 19 06:41:03 PM PDT 24 |
Aug 19 07:45:17 PM PDT 24 |
15633509368 ps |
| T316 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.3292623790 |
|
|
Aug 19 06:36:45 PM PDT 24 |
Aug 19 07:22:46 PM PDT 24 |
30355144760 ps |
| T589 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.444845007 |
|
|
Aug 19 06:36:27 PM PDT 24 |
Aug 19 06:42:45 PM PDT 24 |
3074603224 ps |
| T590 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.3986966811 |
|
|
Aug 19 06:35:59 PM PDT 24 |
Aug 19 07:58:17 PM PDT 24 |
43752955260 ps |
| T384 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.2065321311 |
|
|
Aug 19 06:55:24 PM PDT 24 |
Aug 19 07:02:14 PM PDT 24 |
3304072034 ps |
| T14 |
/workspace/coverage/default/1.chip_jtag_csr_rw.3813587741 |
|
|
Aug 19 06:25:00 PM PDT 24 |
Aug 19 06:46:08 PM PDT 24 |
12501364424 ps |
| T591 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.1102135055 |
|
|
Aug 19 06:37:38 PM PDT 24 |
Aug 19 06:43:16 PM PDT 24 |
2957018312 ps |
| T347 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.3387592417 |
|
|
Aug 19 07:00:07 PM PDT 24 |
Aug 19 07:12:07 PM PDT 24 |
6184235416 ps |
| T226 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.782213985 |
|
|
Aug 19 06:55:39 PM PDT 24 |
Aug 19 07:03:57 PM PDT 24 |
4507552010 ps |
| T232 |
/workspace/coverage/default/2.chip_sw_hmac_enc.2743307080 |
|
|
Aug 19 06:49:23 PM PDT 24 |
Aug 19 06:53:54 PM PDT 24 |
3095860980 ps |
| T287 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.2962830702 |
|
|
Aug 19 06:37:55 PM PDT 24 |
Aug 19 06:49:39 PM PDT 24 |
6176149812 ps |
| T323 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.250671137 |
|
|
Aug 19 06:38:43 PM PDT 24 |
Aug 19 06:58:37 PM PDT 24 |
7925349800 ps |
| T280 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.533462246 |
|
|
Aug 19 06:39:22 PM PDT 24 |
Aug 19 07:29:48 PM PDT 24 |
14312757292 ps |
| T353 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.2914543686 |
|
|
Aug 19 06:39:28 PM PDT 24 |
Aug 19 07:16:44 PM PDT 24 |
29840043930 ps |
| T246 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.168316950 |
|
|
Aug 19 06:44:51 PM PDT 24 |
Aug 19 06:57:29 PM PDT 24 |
4922214381 ps |
| T120 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.537703137 |
|
|
Aug 19 06:40:03 PM PDT 24 |
Aug 19 07:21:46 PM PDT 24 |
17556257889 ps |
| T414 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.1766704142 |
|
|
Aug 19 06:59:54 PM PDT 24 |
Aug 19 07:04:57 PM PDT 24 |
3856829992 ps |
| T592 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.931274529 |
|
|
Aug 19 06:52:06 PM PDT 24 |
Aug 19 06:57:32 PM PDT 24 |
2828640428 ps |
| T593 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.3125804993 |
|
|
Aug 19 06:36:11 PM PDT 24 |
Aug 19 06:40:58 PM PDT 24 |
2711185836 ps |
| T348 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3542692282 |
|
|
Aug 19 06:52:34 PM PDT 24 |
Aug 19 07:18:23 PM PDT 24 |
13937426288 ps |
| T164 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.515272328 |
|
|
Aug 19 06:35:06 PM PDT 24 |
Aug 19 06:45:10 PM PDT 24 |
5652428634 ps |
| T37 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.726815757 |
|
|
Aug 19 06:37:36 PM PDT 24 |
Aug 19 07:45:14 PM PDT 24 |
21019369576 ps |
| T17 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.3410912618 |
|
|
Aug 19 06:33:27 PM PDT 24 |
Aug 19 07:18:56 PM PDT 24 |
12167800213 ps |
| T594 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.804475507 |
|
|
Aug 19 06:54:20 PM PDT 24 |
Aug 19 08:06:12 PM PDT 24 |
21850333636 ps |
| T137 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2258982371 |
|
|
Aug 19 06:37:58 PM PDT 24 |
Aug 19 06:47:51 PM PDT 24 |
4890525864 ps |
| T409 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.3814132612 |
|
|
Aug 19 06:41:31 PM PDT 24 |
Aug 19 06:45:23 PM PDT 24 |
2353505720 ps |
| T318 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.2617097622 |
|
|
Aug 19 06:48:10 PM PDT 24 |
Aug 19 07:18:47 PM PDT 24 |
10059335038 ps |
| T595 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3885877425 |
|
|
Aug 19 06:40:40 PM PDT 24 |
Aug 19 06:50:42 PM PDT 24 |
3907761756 ps |
| T596 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.3820776013 |
|
|
Aug 19 06:43:30 PM PDT 24 |
Aug 19 07:21:06 PM PDT 24 |
13407717284 ps |
| T597 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.1725250723 |
|
|
Aug 19 06:39:48 PM PDT 24 |
Aug 19 06:44:21 PM PDT 24 |
3024681630 ps |
| T383 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.2842676 |
|
|
Aug 19 06:50:58 PM PDT 24 |
Aug 19 06:54:39 PM PDT 24 |
2464753095 ps |
| T488 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.3088619532 |
|
|
Aug 19 07:02:21 PM PDT 24 |
Aug 19 07:11:22 PM PDT 24 |
3489950624 ps |
| T40 |
/workspace/coverage/default/2.chip_sw_gpio.1919913754 |
|
|
Aug 19 06:39:56 PM PDT 24 |
Aug 19 06:47:25 PM PDT 24 |
4307873310 ps |
| T28 |
/workspace/coverage/default/0.chip_sw_power_virus.655532656 |
|
|
Aug 19 06:43:35 PM PDT 24 |
Aug 19 07:08:53 PM PDT 24 |
6115049658 ps |
| T230 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.2531711829 |
|
|
Aug 19 06:38:11 PM PDT 24 |
Aug 19 07:05:31 PM PDT 24 |
7468164524 ps |
| T190 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.399149367 |
|
|
Aug 19 06:39:53 PM PDT 24 |
Aug 19 07:07:36 PM PDT 24 |
10256616700 ps |
| T598 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.1379283948 |
|
|
Aug 19 06:48:57 PM PDT 24 |
Aug 19 07:02:38 PM PDT 24 |
9595260212 ps |
| T599 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.1006834221 |
|
|
Aug 19 06:55:49 PM PDT 24 |
Aug 19 07:46:48 PM PDT 24 |
15301399560 ps |
| T369 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.3074488033 |
|
|
Aug 19 06:41:35 PM PDT 24 |
Aug 19 06:54:39 PM PDT 24 |
4718343586 ps |
| T600 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.1855550861 |
|
|
Aug 19 06:45:49 PM PDT 24 |
Aug 19 06:57:01 PM PDT 24 |
5239278720 ps |
| T601 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.1426453895 |
|
|
Aug 19 06:40:50 PM PDT 24 |
Aug 19 06:50:55 PM PDT 24 |
4208959528 ps |
| T602 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3408074754 |
|
|
Aug 19 06:33:51 PM PDT 24 |
Aug 19 06:53:13 PM PDT 24 |
8535954736 ps |
| T184 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.1661811177 |
|
|
Aug 19 06:47:30 PM PDT 24 |
Aug 19 07:49:26 PM PDT 24 |
16517928596 ps |