| T425 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3254867201 |
|
|
Aug 19 06:50:16 PM PDT 24 |
Aug 19 06:57:56 PM PDT 24 |
7601908140 ps |
| T854 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.3875317537 |
|
|
Aug 19 06:34:38 PM PDT 24 |
Aug 19 06:46:17 PM PDT 24 |
3778789882 ps |
| T174 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.684701059 |
|
|
Aug 19 06:40:33 PM PDT 24 |
Aug 19 06:54:35 PM PDT 24 |
8135585925 ps |
| T855 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.1424153850 |
|
|
Aug 19 06:51:16 PM PDT 24 |
Aug 19 08:08:58 PM PDT 24 |
22600842914 ps |
| T269 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2620784608 |
|
|
Aug 19 06:55:35 PM PDT 24 |
Aug 19 07:05:24 PM PDT 24 |
4247220748 ps |
| T856 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.1778543475 |
|
|
Aug 19 06:36:02 PM PDT 24 |
Aug 19 06:43:05 PM PDT 24 |
3171272848 ps |
| T361 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.3562691851 |
|
|
Aug 19 06:37:30 PM PDT 24 |
Aug 19 07:11:25 PM PDT 24 |
8191385904 ps |
| T857 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.1167923164 |
|
|
Aug 19 06:52:48 PM PDT 24 |
Aug 19 06:58:51 PM PDT 24 |
5593914648 ps |
| T858 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.946777460 |
|
|
Aug 19 06:48:38 PM PDT 24 |
Aug 19 06:53:34 PM PDT 24 |
3215484344 ps |
| T326 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.3101402234 |
|
|
Aug 19 06:33:55 PM PDT 24 |
Aug 19 08:03:30 PM PDT 24 |
18378744250 ps |
| T859 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.2200885867 |
|
|
Aug 19 06:36:15 PM PDT 24 |
Aug 19 07:07:00 PM PDT 24 |
9770730164 ps |
| T860 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.230496735 |
|
|
Aug 19 06:53:21 PM PDT 24 |
Aug 19 07:14:46 PM PDT 24 |
10062985515 ps |
| T514 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.1784941284 |
|
|
Aug 19 06:52:46 PM PDT 24 |
Aug 19 07:00:06 PM PDT 24 |
4496507032 ps |
| T861 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.2519979941 |
|
|
Aug 19 06:53:42 PM PDT 24 |
Aug 19 07:02:25 PM PDT 24 |
3415555802 ps |
| T66 |
/workspace/coverage/default/2.chip_sw_alert_test.3838150722 |
|
|
Aug 19 06:47:01 PM PDT 24 |
Aug 19 06:52:55 PM PDT 24 |
3103864300 ps |
| T537 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.4150785456 |
|
|
Aug 19 06:59:40 PM PDT 24 |
Aug 19 07:06:43 PM PDT 24 |
3554152532 ps |
| T862 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.2672772551 |
|
|
Aug 19 06:38:24 PM PDT 24 |
Aug 19 06:47:38 PM PDT 24 |
4487013640 ps |
| T863 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.3527100520 |
|
|
Aug 19 06:39:12 PM PDT 24 |
Aug 19 07:57:38 PM PDT 24 |
17885018533 ps |
| T541 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.2779357120 |
|
|
Aug 19 06:56:47 PM PDT 24 |
Aug 19 07:02:17 PM PDT 24 |
3891662476 ps |
| T864 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.3200223748 |
|
|
Aug 19 06:54:35 PM PDT 24 |
Aug 19 07:10:35 PM PDT 24 |
12477956883 ps |
| T865 |
/workspace/coverage/default/2.rom_raw_unlock.100707593 |
|
|
Aug 19 06:51:46 PM PDT 24 |
Aug 19 06:55:55 PM PDT 24 |
4746675385 ps |
| T866 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.3492311898 |
|
|
Aug 19 06:37:23 PM PDT 24 |
Aug 19 06:46:23 PM PDT 24 |
7566881264 ps |
| T867 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.131461763 |
|
|
Aug 19 06:38:14 PM PDT 24 |
Aug 19 07:06:24 PM PDT 24 |
6467674490 ps |
| T868 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.1960688662 |
|
|
Aug 19 06:36:31 PM PDT 24 |
Aug 19 06:44:55 PM PDT 24 |
4057041564 ps |
| T869 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.4052313976 |
|
|
Aug 19 06:39:39 PM PDT 24 |
Aug 19 06:46:10 PM PDT 24 |
5236372170 ps |
| T870 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1853546441 |
|
|
Aug 19 06:37:18 PM PDT 24 |
Aug 19 06:39:31 PM PDT 24 |
2773182532 ps |
| T871 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.1416148915 |
|
|
Aug 19 06:38:52 PM PDT 24 |
Aug 19 06:56:06 PM PDT 24 |
6000842592 ps |
| T551 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.560798945 |
|
|
Aug 19 06:58:45 PM PDT 24 |
Aug 19 07:06:42 PM PDT 24 |
5518129470 ps |
| T872 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.3537089475 |
|
|
Aug 19 06:54:31 PM PDT 24 |
Aug 19 07:01:20 PM PDT 24 |
5360959024 ps |
| T301 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.1660479405 |
|
|
Aug 19 06:35:28 PM PDT 24 |
Aug 19 06:38:51 PM PDT 24 |
1942262441 ps |
| T569 |
/workspace/coverage/default/47.chip_sw_all_escalation_resets.664378931 |
|
|
Aug 19 06:57:58 PM PDT 24 |
Aug 19 07:05:23 PM PDT 24 |
5854335640 ps |
| T382 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.2548122415 |
|
|
Aug 19 06:35:54 PM PDT 24 |
Aug 19 06:45:43 PM PDT 24 |
3692144177 ps |
| T873 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.556648106 |
|
|
Aug 19 06:48:29 PM PDT 24 |
Aug 19 06:56:18 PM PDT 24 |
9426735995 ps |
| T507 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.1945102557 |
|
|
Aug 19 06:59:20 PM PDT 24 |
Aug 19 07:11:00 PM PDT 24 |
5923557704 ps |
| T874 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.3320435649 |
|
|
Aug 19 06:36:07 PM PDT 24 |
Aug 19 06:41:06 PM PDT 24 |
2887700827 ps |
| T875 |
/workspace/coverage/default/1.rom_e2e_smoke.2767264989 |
|
|
Aug 19 06:45:49 PM PDT 24 |
Aug 19 07:47:24 PM PDT 24 |
15133079300 ps |
| T876 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.179633551 |
|
|
Aug 19 06:38:00 PM PDT 24 |
Aug 19 10:16:17 PM PDT 24 |
77966723924 ps |
| T426 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_wake_ups.3524898745 |
|
|
Aug 19 06:35:56 PM PDT 24 |
Aug 19 06:57:57 PM PDT 24 |
21044701332 ps |
| T412 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.1712855244 |
|
|
Aug 19 06:38:03 PM PDT 24 |
Aug 19 06:44:49 PM PDT 24 |
2880746996 ps |
| T877 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.3879828614 |
|
|
Aug 19 06:45:24 PM PDT 24 |
Aug 19 07:49:54 PM PDT 24 |
15377305794 ps |
| T878 |
/workspace/coverage/default/69.chip_sw_all_escalation_resets.1440131644 |
|
|
Aug 19 07:01:23 PM PDT 24 |
Aug 19 07:12:07 PM PDT 24 |
5232577780 ps |
| T427 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.2148298288 |
|
|
Aug 19 06:36:41 PM PDT 24 |
Aug 19 07:08:00 PM PDT 24 |
24243970794 ps |
| T879 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.616961128 |
|
|
Aug 19 06:33:15 PM PDT 24 |
Aug 19 06:41:43 PM PDT 24 |
5518045000 ps |
| T173 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.3952744718 |
|
|
Aug 19 06:33:10 PM PDT 24 |
Aug 19 07:14:52 PM PDT 24 |
25143046245 ps |
| T538 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.90641054 |
|
|
Aug 19 07:00:58 PM PDT 24 |
Aug 19 07:07:24 PM PDT 24 |
3729575222 ps |
| T880 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.2080575160 |
|
|
Aug 19 06:56:28 PM PDT 24 |
Aug 19 07:06:11 PM PDT 24 |
3721238250 ps |
| T881 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.1514024971 |
|
|
Aug 19 06:30:43 PM PDT 24 |
Aug 19 06:45:06 PM PDT 24 |
12266771400 ps |
| T882 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.1015193981 |
|
|
Aug 19 06:37:39 PM PDT 24 |
Aug 19 06:49:31 PM PDT 24 |
4551652360 ps |
| T560 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.544458178 |
|
|
Aug 19 07:01:26 PM PDT 24 |
Aug 19 07:08:59 PM PDT 24 |
4342012510 ps |
| T883 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.1134436307 |
|
|
Aug 19 06:38:16 PM PDT 24 |
Aug 19 07:47:40 PM PDT 24 |
15122905692 ps |
| T373 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.4115945589 |
|
|
Aug 19 06:40:19 PM PDT 24 |
Aug 19 06:57:10 PM PDT 24 |
4856145200 ps |
| T884 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.3143260022 |
|
|
Aug 19 07:03:16 PM PDT 24 |
Aug 19 07:11:28 PM PDT 24 |
5680638406 ps |
| T885 |
/workspace/coverage/default/0.chip_sw_example_concurrency.3099168554 |
|
|
Aug 19 06:31:12 PM PDT 24 |
Aug 19 06:35:16 PM PDT 24 |
2940239036 ps |
| T886 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.3870545414 |
|
|
Aug 19 06:36:48 PM PDT 24 |
Aug 19 07:06:24 PM PDT 24 |
8703004800 ps |
| T887 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.2671845975 |
|
|
Aug 19 06:37:48 PM PDT 24 |
Aug 19 09:38:46 PM PDT 24 |
65404316189 ps |
| T888 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.1097907100 |
|
|
Aug 19 07:00:34 PM PDT 24 |
Aug 19 07:08:47 PM PDT 24 |
4169453724 ps |
| T889 |
/workspace/coverage/default/1.chip_tap_straps_dev.187627933 |
|
|
Aug 19 06:38:58 PM PDT 24 |
Aug 19 07:05:59 PM PDT 24 |
15501689510 ps |
| T890 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.1864196119 |
|
|
Aug 19 06:32:53 PM PDT 24 |
Aug 19 07:50:31 PM PDT 24 |
43005288796 ps |
| T891 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3631826326 |
|
|
Aug 19 06:52:38 PM PDT 24 |
Aug 19 07:00:52 PM PDT 24 |
5032101864 ps |
| T892 |
/workspace/coverage/default/3.chip_tap_straps_rma.2561776391 |
|
|
Aug 19 06:54:13 PM PDT 24 |
Aug 19 07:01:57 PM PDT 24 |
5450976959 ps |
| T893 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.2735682110 |
|
|
Aug 19 06:48:18 PM PDT 24 |
Aug 19 06:53:37 PM PDT 24 |
3554050927 ps |
| T315 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.811775829 |
|
|
Aug 19 06:53:07 PM PDT 24 |
Aug 19 06:57:13 PM PDT 24 |
2739235254 ps |
| T472 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.4163824044 |
|
|
Aug 19 07:00:01 PM PDT 24 |
Aug 19 07:05:44 PM PDT 24 |
3394238574 ps |
| T242 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.1707741665 |
|
|
Aug 19 06:40:30 PM PDT 24 |
Aug 19 06:48:35 PM PDT 24 |
6229013031 ps |
| T894 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.982735254 |
|
|
Aug 19 06:35:56 PM PDT 24 |
Aug 19 07:02:21 PM PDT 24 |
8854143916 ps |
| T81 |
/workspace/coverage/default/0.chip_tap_straps_rma.2790781527 |
|
|
Aug 19 06:33:18 PM PDT 24 |
Aug 19 06:45:54 PM PDT 24 |
7518814071 ps |
| T895 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.671509172 |
|
|
Aug 19 06:32:28 PM PDT 24 |
Aug 19 06:40:54 PM PDT 24 |
7817355464 ps |
| T896 |
/workspace/coverage/default/2.chip_sw_example_concurrency.4126935045 |
|
|
Aug 19 06:35:45 PM PDT 24 |
Aug 19 06:40:31 PM PDT 24 |
3295208580 ps |
| T897 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.2797052364 |
|
|
Aug 19 06:40:27 PM PDT 24 |
Aug 19 06:43:31 PM PDT 24 |
2519879852 ps |
| T520 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.543908557 |
|
|
Aug 19 06:55:07 PM PDT 24 |
Aug 19 07:04:28 PM PDT 24 |
6341334140 ps |
| T898 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.3023186542 |
|
|
Aug 19 06:39:21 PM PDT 24 |
Aug 19 06:59:54 PM PDT 24 |
5680831989 ps |
| T201 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.979962913 |
|
|
Aug 19 06:35:28 PM PDT 24 |
Aug 19 06:42:21 PM PDT 24 |
4615920032 ps |
| T899 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.151992243 |
|
|
Aug 19 06:48:51 PM PDT 24 |
Aug 19 06:56:09 PM PDT 24 |
5799353920 ps |
| T900 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.1883256290 |
|
|
Aug 19 06:43:59 PM PDT 24 |
Aug 19 07:38:09 PM PDT 24 |
14686023020 ps |
| T143 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.2698496723 |
|
|
Aug 19 06:44:19 PM PDT 24 |
Aug 19 06:54:22 PM PDT 24 |
4427818631 ps |
| T901 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.2923309365 |
|
|
Aug 19 06:58:23 PM PDT 24 |
Aug 19 07:09:03 PM PDT 24 |
4007630528 ps |
| T902 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.2146910405 |
|
|
Aug 19 06:36:03 PM PDT 24 |
Aug 19 06:39:38 PM PDT 24 |
2535119502 ps |
| T454 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.35037622 |
|
|
Aug 19 06:50:15 PM PDT 24 |
Aug 19 06:59:37 PM PDT 24 |
4831805811 ps |
| T903 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.1650061340 |
|
|
Aug 19 06:34:11 PM PDT 24 |
Aug 19 06:37:48 PM PDT 24 |
2638988364 ps |
| T335 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.3875416789 |
|
|
Aug 19 06:44:38 PM PDT 24 |
Aug 19 07:17:25 PM PDT 24 |
12669627546 ps |
| T904 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.1378234348 |
|
|
Aug 19 06:35:12 PM PDT 24 |
Aug 19 07:18:33 PM PDT 24 |
12898192812 ps |
| T905 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.2941385712 |
|
|
Aug 19 06:44:55 PM PDT 24 |
Aug 19 07:10:45 PM PDT 24 |
7605851840 ps |
| T906 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.1515334310 |
|
|
Aug 19 06:38:26 PM PDT 24 |
Aug 19 06:59:22 PM PDT 24 |
5510202628 ps |
| T907 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.966575171 |
|
|
Aug 19 06:36:47 PM PDT 24 |
Aug 19 06:56:06 PM PDT 24 |
7434583726 ps |
| T908 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.4033923253 |
|
|
Aug 19 06:40:05 PM PDT 24 |
Aug 19 06:43:18 PM PDT 24 |
2831532408 ps |
| T511 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.2277702001 |
|
|
Aug 19 06:56:35 PM PDT 24 |
Aug 19 07:07:40 PM PDT 24 |
4985422200 ps |
| T49 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.1638333165 |
|
|
Aug 19 06:42:28 PM PDT 24 |
Aug 19 06:47:19 PM PDT 24 |
2561963256 ps |
| T909 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.897176701 |
|
|
Aug 19 06:43:11 PM PDT 24 |
Aug 19 07:04:39 PM PDT 24 |
8794350820 ps |
| T550 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.954867553 |
|
|
Aug 19 06:55:15 PM PDT 24 |
Aug 19 07:04:27 PM PDT 24 |
5345392536 ps |
| T910 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.412206601 |
|
|
Aug 19 06:42:30 PM PDT 24 |
Aug 19 06:46:33 PM PDT 24 |
2827348908 ps |
| T911 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.3389935216 |
|
|
Aug 19 06:37:20 PM PDT 24 |
Aug 19 07:12:02 PM PDT 24 |
11679033182 ps |
| T509 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1162460695 |
|
|
Aug 19 06:58:40 PM PDT 24 |
Aug 19 07:06:29 PM PDT 24 |
3872470192 ps |
| T912 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.4030952594 |
|
|
Aug 19 06:45:38 PM PDT 24 |
Aug 19 06:52:04 PM PDT 24 |
3452971710 ps |
| T913 |
/workspace/coverage/default/4.chip_tap_straps_prod.3880741841 |
|
|
Aug 19 06:52:23 PM PDT 24 |
Aug 19 07:03:09 PM PDT 24 |
6985846945 ps |
| T914 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.132624433 |
|
|
Aug 19 06:42:56 PM PDT 24 |
Aug 19 07:42:41 PM PDT 24 |
14521869009 ps |
| T515 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.1318926618 |
|
|
Aug 19 06:54:22 PM PDT 24 |
Aug 19 07:01:55 PM PDT 24 |
3813947794 ps |
| T915 |
/workspace/coverage/default/2.chip_sw_example_rom.2437357758 |
|
|
Aug 19 06:38:17 PM PDT 24 |
Aug 19 06:40:50 PM PDT 24 |
2849486440 ps |
| T916 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.1503436987 |
|
|
Aug 19 06:53:40 PM PDT 24 |
Aug 19 07:09:41 PM PDT 24 |
12282957120 ps |
| T917 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3956151234 |
|
|
Aug 19 06:32:56 PM PDT 24 |
Aug 19 06:37:54 PM PDT 24 |
3365857677 ps |
| T216 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.317070151 |
|
|
Aug 19 06:39:56 PM PDT 24 |
Aug 19 06:56:24 PM PDT 24 |
5812378912 ps |
| T918 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.3752109924 |
|
|
Aug 19 06:54:04 PM PDT 24 |
Aug 19 07:26:37 PM PDT 24 |
9270931414 ps |
| T919 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.394110908 |
|
|
Aug 19 06:51:02 PM PDT 24 |
Aug 19 07:00:43 PM PDT 24 |
4824419272 ps |
| T920 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_power_glitch_reset.3156755616 |
|
|
Aug 19 06:37:38 PM PDT 24 |
Aug 19 07:22:36 PM PDT 24 |
27879226004 ps |
| T516 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.2079449072 |
|
|
Aug 19 06:47:15 PM PDT 24 |
Aug 19 06:55:30 PM PDT 24 |
3828407080 ps |
| T921 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3055998612 |
|
|
Aug 19 06:36:30 PM PDT 24 |
Aug 19 07:03:28 PM PDT 24 |
17407994711 ps |
| T922 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.937254847 |
|
|
Aug 19 06:52:01 PM PDT 24 |
Aug 19 06:57:02 PM PDT 24 |
2951946460 ps |
| T923 |
/workspace/coverage/default/3.chip_tap_straps_prod.3618940983 |
|
|
Aug 19 06:52:19 PM PDT 24 |
Aug 19 07:05:51 PM PDT 24 |
7465940067 ps |
| T924 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.2251437549 |
|
|
Aug 19 06:36:49 PM PDT 24 |
Aug 19 06:47:25 PM PDT 24 |
5719624572 ps |
| T925 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.4009724777 |
|
|
Aug 19 06:40:23 PM PDT 24 |
Aug 19 06:42:26 PM PDT 24 |
2310750110 ps |
| T521 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.2289357740 |
|
|
Aug 19 06:57:07 PM PDT 24 |
Aug 19 07:07:15 PM PDT 24 |
6060480040 ps |
| T926 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.511340959 |
|
|
Aug 19 06:36:25 PM PDT 24 |
Aug 19 06:47:21 PM PDT 24 |
4845064178 ps |
| T535 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.3249046411 |
|
|
Aug 19 06:57:18 PM PDT 24 |
Aug 19 07:02:52 PM PDT 24 |
3826175904 ps |
| T211 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.3982370317 |
|
|
Aug 19 06:51:32 PM PDT 24 |
Aug 19 07:07:19 PM PDT 24 |
9435613103 ps |
| T927 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.4163212474 |
|
|
Aug 19 06:36:21 PM PDT 24 |
Aug 19 07:01:59 PM PDT 24 |
10180327891 ps |
| T928 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.2282142901 |
|
|
Aug 19 06:57:02 PM PDT 24 |
Aug 19 07:02:31 PM PDT 24 |
3610623046 ps |
| T929 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.1736570135 |
|
|
Aug 19 06:41:20 PM PDT 24 |
Aug 19 06:42:59 PM PDT 24 |
2142298485 ps |
| T930 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.1052450462 |
|
|
Aug 19 06:33:48 PM PDT 24 |
Aug 19 06:39:45 PM PDT 24 |
3505564713 ps |
| T504 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.3991262027 |
|
|
Aug 19 06:58:24 PM PDT 24 |
Aug 19 07:04:58 PM PDT 24 |
4097775940 ps |
| T931 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.3925884568 |
|
|
Aug 19 06:30:55 PM PDT 24 |
Aug 19 09:19:35 PM PDT 24 |
57854466505 ps |
| T932 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.876420126 |
|
|
Aug 19 06:54:15 PM PDT 24 |
Aug 19 08:24:28 PM PDT 24 |
24212672588 ps |
| T933 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.942060776 |
|
|
Aug 19 06:36:23 PM PDT 24 |
Aug 19 06:40:38 PM PDT 24 |
2382741520 ps |
| T380 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.2806757686 |
|
|
Aug 19 06:38:13 PM PDT 24 |
Aug 19 06:46:08 PM PDT 24 |
4283500920 ps |
| T934 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.3335424234 |
|
|
Aug 19 06:35:59 PM PDT 24 |
Aug 19 07:35:40 PM PDT 24 |
16893166726 ps |
| T935 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.1189876640 |
|
|
Aug 19 06:42:17 PM PDT 24 |
Aug 19 06:44:59 PM PDT 24 |
3825178400 ps |
| T936 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.3906901396 |
|
|
Aug 19 07:00:54 PM PDT 24 |
Aug 19 07:08:37 PM PDT 24 |
3914045726 ps |
| T937 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.715666414 |
|
|
Aug 19 06:43:57 PM PDT 24 |
Aug 19 07:26:52 PM PDT 24 |
11368126472 ps |
| T938 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.578289577 |
|
|
Aug 19 06:45:21 PM PDT 24 |
Aug 19 07:52:42 PM PDT 24 |
14693131496 ps |
| T939 |
/workspace/coverage/default/0.chip_sw_aes_enc.1380400729 |
|
|
Aug 19 06:31:38 PM PDT 24 |
Aug 19 06:35:09 PM PDT 24 |
3106546376 ps |
| T392 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.2977407900 |
|
|
Aug 19 06:36:59 PM PDT 24 |
Aug 19 06:44:08 PM PDT 24 |
5042919088 ps |
| T940 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.188814168 |
|
|
Aug 19 06:53:10 PM PDT 24 |
Aug 19 07:00:54 PM PDT 24 |
3265746704 ps |
| T50 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.1508042116 |
|
|
Aug 19 06:36:46 PM PDT 24 |
Aug 19 06:42:26 PM PDT 24 |
3544740000 ps |
| T941 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1357679530 |
|
|
Aug 19 06:38:56 PM PDT 24 |
Aug 19 06:50:16 PM PDT 24 |
4762801256 ps |
| T942 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.3509309734 |
|
|
Aug 19 06:39:41 PM PDT 24 |
Aug 19 07:22:55 PM PDT 24 |
25057112850 ps |
| T470 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.1987712846 |
|
|
Aug 19 06:58:19 PM PDT 24 |
Aug 19 07:05:17 PM PDT 24 |
3279278986 ps |
| T943 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.1435898919 |
|
|
Aug 19 06:34:00 PM PDT 24 |
Aug 19 06:42:50 PM PDT 24 |
10214338425 ps |
| T944 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.3760076446 |
|
|
Aug 19 06:56:19 PM PDT 24 |
Aug 19 08:22:16 PM PDT 24 |
27302666168 ps |
| T945 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.1729555819 |
|
|
Aug 19 06:38:24 PM PDT 24 |
Aug 19 06:54:45 PM PDT 24 |
6912565640 ps |
| T946 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.3896357244 |
|
|
Aug 19 06:34:23 PM PDT 24 |
Aug 19 06:37:43 PM PDT 24 |
2291674680 ps |
| T415 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.4278607662 |
|
|
Aug 19 06:38:50 PM PDT 24 |
Aug 19 06:49:06 PM PDT 24 |
2939037790 ps |
| T947 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.2564901489 |
|
|
Aug 19 06:50:07 PM PDT 24 |
Aug 19 07:22:54 PM PDT 24 |
23125808663 ps |
| T948 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.754832316 |
|
|
Aug 19 06:58:07 PM PDT 24 |
Aug 19 07:08:02 PM PDT 24 |
4300845480 ps |
| T325 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.3674860875 |
|
|
Aug 19 06:38:27 PM PDT 24 |
Aug 19 07:18:46 PM PDT 24 |
12657772576 ps |
| T949 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.2495218031 |
|
|
Aug 19 06:56:27 PM PDT 24 |
Aug 19 07:07:12 PM PDT 24 |
4037671840 ps |
| T217 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.2943065784 |
|
|
Aug 19 06:49:50 PM PDT 24 |
Aug 19 07:08:12 PM PDT 24 |
5561530872 ps |
| T950 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.2576721407 |
|
|
Aug 19 06:57:27 PM PDT 24 |
Aug 19 07:31:47 PM PDT 24 |
13482603400 ps |
| T951 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.4102785375 |
|
|
Aug 19 06:54:57 PM PDT 24 |
Aug 19 07:00:34 PM PDT 24 |
4418197760 ps |
| T952 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.2345107188 |
|
|
Aug 19 06:38:37 PM PDT 24 |
Aug 19 06:44:12 PM PDT 24 |
2867649740 ps |
| T42 |
/workspace/coverage/default/0.chip_sw_gpio.2646502088 |
|
|
Aug 19 06:34:15 PM PDT 24 |
Aug 19 06:44:12 PM PDT 24 |
3548191600 ps |
| T525 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.1122986570 |
|
|
Aug 19 07:00:20 PM PDT 24 |
Aug 19 07:06:50 PM PDT 24 |
3541454376 ps |
| T376 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.2702297149 |
|
|
Aug 19 06:38:17 PM PDT 24 |
Aug 19 06:49:25 PM PDT 24 |
4896630332 ps |
| T542 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.1089110272 |
|
|
Aug 19 06:57:37 PM PDT 24 |
Aug 19 07:05:19 PM PDT 24 |
4467903722 ps |
| T953 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.3189529499 |
|
|
Aug 19 06:43:28 PM PDT 24 |
Aug 19 07:17:13 PM PDT 24 |
34740725992 ps |
| T954 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.1742333725 |
|
|
Aug 19 06:38:12 PM PDT 24 |
Aug 19 06:42:24 PM PDT 24 |
2703583520 ps |
| T955 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_bootstrap.2955635241 |
|
|
Aug 19 06:41:27 PM PDT 24 |
Aug 19 10:17:41 PM PDT 24 |
79034070000 ps |
| T956 |
/workspace/coverage/default/1.chip_sw_example_rom.2046329202 |
|
|
Aug 19 06:35:32 PM PDT 24 |
Aug 19 06:37:41 PM PDT 24 |
2605141740 ps |
| T72 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.2688907173 |
|
|
Aug 19 06:42:04 PM PDT 24 |
Aug 19 06:47:15 PM PDT 24 |
3375711360 ps |
| T175 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.4095733312 |
|
|
Aug 19 06:40:54 PM PDT 24 |
Aug 19 06:48:37 PM PDT 24 |
4215920544 ps |
| T243 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.3800305197 |
|
|
Aug 19 06:34:53 PM PDT 24 |
Aug 19 06:45:34 PM PDT 24 |
6076454334 ps |
| T437 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.2663970900 |
|
|
Aug 19 06:59:55 PM PDT 24 |
Aug 19 07:08:48 PM PDT 24 |
5229001822 ps |
| T438 |
/workspace/coverage/default/1.chip_sw_example_concurrency.2666075219 |
|
|
Aug 19 06:39:09 PM PDT 24 |
Aug 19 06:43:12 PM PDT 24 |
2235162344 ps |
| T439 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.7257291 |
|
|
Aug 19 06:37:15 PM PDT 24 |
Aug 19 06:54:00 PM PDT 24 |
5273185094 ps |
| T440 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.969821443 |
|
|
Aug 19 06:54:26 PM PDT 24 |
Aug 19 07:04:18 PM PDT 24 |
6388634900 ps |
| T339 |
/workspace/coverage/default/2.chip_jtag_mem_access.845502382 |
|
|
Aug 19 06:42:39 PM PDT 24 |
Aug 19 07:06:23 PM PDT 24 |
14167583141 ps |
| T441 |
/workspace/coverage/default/2.rom_e2e_static_critical.1523288092 |
|
|
Aug 19 06:57:30 PM PDT 24 |
Aug 19 07:58:48 PM PDT 24 |
17407744024 ps |
| T442 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.1910412041 |
|
|
Aug 19 06:59:39 PM PDT 24 |
Aug 19 07:07:12 PM PDT 24 |
3928314940 ps |
| T957 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.3400332763 |
|
|
Aug 19 06:37:49 PM PDT 24 |
Aug 19 06:42:04 PM PDT 24 |
3592189192 ps |
| T958 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2886740743 |
|
|
Aug 19 06:42:01 PM PDT 24 |
Aug 19 06:51:02 PM PDT 24 |
4131399933 ps |
| T959 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.679527479 |
|
|
Aug 19 06:56:55 PM PDT 24 |
Aug 19 07:18:10 PM PDT 24 |
8055284126 ps |
| T960 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.3483469998 |
|
|
Aug 19 06:43:54 PM PDT 24 |
Aug 19 07:40:07 PM PDT 24 |
14513322045 ps |
| T961 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1523113350 |
|
|
Aug 19 06:51:09 PM PDT 24 |
Aug 19 07:01:56 PM PDT 24 |
5012367320 ps |
| T962 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.3772822317 |
|
|
Aug 19 06:38:44 PM PDT 24 |
Aug 19 07:18:51 PM PDT 24 |
10746080350 ps |
| T963 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.1929359973 |
|
|
Aug 19 06:53:44 PM PDT 24 |
Aug 19 07:29:47 PM PDT 24 |
13034297600 ps |
| T567 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.3321410025 |
|
|
Aug 19 06:59:39 PM PDT 24 |
Aug 19 07:07:53 PM PDT 24 |
5681534672 ps |
| T362 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.4273488978 |
|
|
Aug 19 06:36:49 PM PDT 24 |
Aug 19 06:48:18 PM PDT 24 |
4482047468 ps |
| T964 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.1790467641 |
|
|
Aug 19 06:41:11 PM PDT 24 |
Aug 19 06:51:24 PM PDT 24 |
4762398580 ps |
| T965 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.3016577176 |
|
|
Aug 19 06:48:15 PM PDT 24 |
Aug 19 06:54:09 PM PDT 24 |
3293092805 ps |
| T966 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.1541461484 |
|
|
Aug 19 06:48:14 PM PDT 24 |
Aug 19 06:55:29 PM PDT 24 |
4381574766 ps |
| T967 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1953123784 |
|
|
Aug 19 06:50:22 PM PDT 24 |
Aug 19 07:44:28 PM PDT 24 |
24799979581 ps |
| T968 |
/workspace/coverage/default/0.chip_sw_example_flash.1250023939 |
|
|
Aug 19 06:33:29 PM PDT 24 |
Aug 19 06:38:58 PM PDT 24 |
3065079640 ps |
| T969 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.909869175 |
|
|
Aug 19 06:56:30 PM PDT 24 |
Aug 19 07:08:48 PM PDT 24 |
12275839365 ps |
| T970 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.278401077 |
|
|
Aug 19 06:38:21 PM PDT 24 |
Aug 19 06:47:05 PM PDT 24 |
5346945666 ps |
| T971 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.2735818278 |
|
|
Aug 19 06:36:57 PM PDT 24 |
Aug 19 07:43:53 PM PDT 24 |
19137986152 ps |
| T972 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.3120003523 |
|
|
Aug 19 06:37:10 PM PDT 24 |
Aug 19 06:41:01 PM PDT 24 |
2703752396 ps |
| T545 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.548833889 |
|
|
Aug 19 06:58:38 PM PDT 24 |
Aug 19 07:04:53 PM PDT 24 |
3119806742 ps |
| T973 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.389841892 |
|
|
Aug 19 06:44:23 PM PDT 24 |
Aug 19 06:51:21 PM PDT 24 |
3925989052 ps |
| T539 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.495903355 |
|
|
Aug 19 06:59:04 PM PDT 24 |
Aug 19 07:08:25 PM PDT 24 |
4990349008 ps |
| T974 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.3628986087 |
|
|
Aug 19 06:41:11 PM PDT 24 |
Aug 19 08:05:20 PM PDT 24 |
50940082694 ps |
| T975 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.3779446323 |
|
|
Aug 19 06:49:51 PM PDT 24 |
Aug 19 06:55:01 PM PDT 24 |
3020931234 ps |
| T976 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.3407029306 |
|
|
Aug 19 06:38:48 PM PDT 24 |
Aug 19 06:40:37 PM PDT 24 |
2753442053 ps |
| T977 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.947271634 |
|
|
Aug 19 06:51:55 PM PDT 24 |
Aug 19 07:01:12 PM PDT 24 |
7303570426 ps |
| T978 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.367700076 |
|
|
Aug 19 06:49:55 PM PDT 24 |
Aug 19 06:58:49 PM PDT 24 |
6863087288 ps |
| T508 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.1404154872 |
|
|
Aug 19 06:59:46 PM PDT 24 |
Aug 19 07:11:35 PM PDT 24 |
4457709920 ps |
| T979 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.1461836071 |
|
|
Aug 19 06:56:04 PM PDT 24 |
Aug 19 08:00:07 PM PDT 24 |
15335004059 ps |
| T980 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.3672967938 |
|
|
Aug 19 06:34:13 PM PDT 24 |
Aug 19 06:39:15 PM PDT 24 |
2970424296 ps |
| T981 |
/workspace/coverage/default/1.chip_tap_straps_prod.267973114 |
|
|
Aug 19 06:39:58 PM PDT 24 |
Aug 19 07:04:26 PM PDT 24 |
13454312543 ps |
| T982 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.3330950105 |
|
|
Aug 19 06:50:58 PM PDT 24 |
Aug 19 07:20:19 PM PDT 24 |
11656907852 ps |
| T983 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.511593087 |
|
|
Aug 19 06:42:59 PM PDT 24 |
Aug 19 06:53:02 PM PDT 24 |
3948817064 ps |
| T984 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.3724785134 |
|
|
Aug 19 06:58:25 PM PDT 24 |
Aug 19 07:09:57 PM PDT 24 |
5084929480 ps |
| T546 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.1568585679 |
|
|
Aug 19 07:00:06 PM PDT 24 |
Aug 19 07:06:07 PM PDT 24 |
3462938090 ps |
| T985 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.48624004 |
|
|
Aug 19 07:00:11 PM PDT 24 |
Aug 19 07:06:08 PM PDT 24 |
3813654376 ps |
| T986 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.440128427 |
|
|
Aug 19 06:34:35 PM PDT 24 |
Aug 19 06:38:29 PM PDT 24 |
2461650253 ps |
| T500 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.2834527721 |
|
|
Aug 19 06:54:28 PM PDT 24 |
Aug 19 07:04:39 PM PDT 24 |
6197033300 ps |
| T987 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3264187136 |
|
|
Aug 19 06:50:34 PM PDT 24 |
Aug 19 09:41:14 PM PDT 24 |
255011005112 ps |
| T988 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.981851578 |
|
|
Aug 19 06:44:05 PM PDT 24 |
Aug 19 06:51:21 PM PDT 24 |
6748451298 ps |
| T989 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.1708298805 |
|
|
Aug 19 06:35:17 PM PDT 24 |
Aug 19 06:46:54 PM PDT 24 |
4484758028 ps |
| T990 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.6484000 |
|
|
Aug 19 06:33:13 PM PDT 24 |
Aug 19 06:37:25 PM PDT 24 |
2694515016 ps |
| T991 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.2540033911 |
|
|
Aug 19 06:59:32 PM PDT 24 |
Aug 19 07:04:44 PM PDT 24 |
3273690866 ps |
| T992 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.4197272853 |
|
|
Aug 19 06:41:31 PM PDT 24 |
Aug 19 07:41:37 PM PDT 24 |
15748252086 ps |
| T993 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3314523742 |
|
|
Aug 19 06:38:29 PM PDT 24 |
Aug 19 10:03:50 PM PDT 24 |
254373385850 ps |
| T994 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.4195755898 |
|
|
Aug 19 06:33:46 PM PDT 24 |
Aug 19 06:36:55 PM PDT 24 |
2719153796 ps |
| T513 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.2907799907 |
|
|
Aug 19 06:54:12 PM PDT 24 |
Aug 19 07:02:04 PM PDT 24 |
5307552882 ps |
| T995 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.1041622945 |
|
|
Aug 19 06:36:17 PM PDT 24 |
Aug 19 06:44:26 PM PDT 24 |
3673756090 ps |
| T25 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.2774399480 |
|
|
Aug 19 06:36:57 PM PDT 24 |
Aug 19 06:42:30 PM PDT 24 |
3452381226 ps |
| T996 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.3522643816 |
|
|
Aug 19 06:55:22 PM PDT 24 |
Aug 19 07:38:24 PM PDT 24 |
13263596102 ps |
| T997 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.631852549 |
|
|
Aug 19 06:59:37 PM PDT 24 |
Aug 19 07:09:54 PM PDT 24 |
4561767978 ps |
| T552 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.1892598464 |
|
|
Aug 19 06:53:05 PM PDT 24 |
Aug 19 06:59:52 PM PDT 24 |
3727647832 ps |
| T998 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.1426991568 |
|
|
Aug 19 06:31:29 PM PDT 24 |
Aug 19 06:41:03 PM PDT 24 |
8442368504 ps |
| T999 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.1011334631 |
|
|
Aug 19 06:43:04 PM PDT 24 |
Aug 19 07:37:42 PM PDT 24 |
15627794208 ps |
| T1000 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.1106750220 |
|
|
Aug 19 06:34:38 PM PDT 24 |
Aug 19 06:55:45 PM PDT 24 |
5438366369 ps |
| T502 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.129187519 |
|
|
Aug 19 06:58:29 PM PDT 24 |
Aug 19 07:09:23 PM PDT 24 |
5702294320 ps |
| T43 |
/workspace/coverage/default/1.chip_sw_gpio.3655489302 |
|
|
Aug 19 06:33:09 PM PDT 24 |
Aug 19 06:39:49 PM PDT 24 |
4335750242 ps |
| T1001 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.56343208 |
|
|
Aug 19 06:35:05 PM PDT 24 |
Aug 19 06:56:27 PM PDT 24 |
9148208232 ps |
| T176 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.68685324 |
|
|
Aug 19 06:35:42 PM PDT 24 |
Aug 19 06:41:33 PM PDT 24 |
3788104336 ps |
| T461 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.3264521422 |
|
|
Aug 19 06:32:31 PM PDT 24 |
Aug 19 06:49:22 PM PDT 24 |
12715472469 ps |
| T462 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.3464036113 |
|
|
Aug 19 06:52:29 PM PDT 24 |
Aug 19 06:56:08 PM PDT 24 |
2091676312 ps |
| T463 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.61135292 |
|
|
Aug 19 06:56:59 PM PDT 24 |
Aug 19 07:51:35 PM PDT 24 |
15139569536 ps |
| T464 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.1644311289 |
|
|
Aug 19 06:59:20 PM PDT 24 |
Aug 19 07:04:09 PM PDT 24 |
3250056996 ps |
| T465 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.742660936 |
|
|
Aug 19 06:38:53 PM PDT 24 |
Aug 19 07:02:39 PM PDT 24 |
6467234412 ps |
| T466 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.1004074374 |
|
|
Aug 19 06:54:25 PM PDT 24 |
Aug 19 07:40:24 PM PDT 24 |
13337210544 ps |
| T467 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.2207667938 |
|
|
Aug 19 06:45:26 PM PDT 24 |
Aug 19 07:43:59 PM PDT 24 |
18208183299 ps |
| T468 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2346094525 |
|
|
Aug 19 06:49:06 PM PDT 24 |
Aug 19 06:58:22 PM PDT 24 |
4581197066 ps |
| T469 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.1109540960 |
|
|
Aug 19 07:01:03 PM PDT 24 |
Aug 19 07:09:27 PM PDT 24 |
5206937056 ps |
| T428 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3356076891 |
|
|
Aug 19 06:41:05 PM PDT 24 |
Aug 19 07:00:24 PM PDT 24 |
23636882632 ps |
| T1002 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2098917659 |
|
|
Aug 19 06:42:48 PM PDT 24 |
Aug 19 07:43:05 PM PDT 24 |
25504443783 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.504187434 |
|
|
Aug 19 06:34:44 PM PDT 24 |
Aug 19 06:41:52 PM PDT 24 |
3668645366 ps |
| T1004 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.2249921704 |
|
|
Aug 19 06:56:54 PM PDT 24 |
Aug 19 07:04:02 PM PDT 24 |
3674208504 ps |
| T1005 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.2735113656 |
|
|
Aug 19 06:44:27 PM PDT 24 |
Aug 19 06:50:22 PM PDT 24 |
3009680208 ps |
| T540 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.1294569619 |
|
|
Aug 19 06:56:12 PM PDT 24 |
Aug 19 07:03:33 PM PDT 24 |
3436725960 ps |
| T327 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.3050600533 |
|
|
Aug 19 06:51:47 PM PDT 24 |
Aug 19 07:34:55 PM PDT 24 |
11305842764 ps |
| T1006 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.4041890299 |
|
|
Aug 19 06:36:46 PM PDT 24 |
Aug 19 08:10:06 PM PDT 24 |
22454183468 ps |
| T1007 |
/workspace/coverage/default/2.chip_sw_aes_entropy.1747974010 |
|
|
Aug 19 06:47:43 PM PDT 24 |
Aug 19 06:51:51 PM PDT 24 |
2954557680 ps |
| T133 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.579817267 |
|
|
Aug 19 06:37:58 PM PDT 24 |
Aug 19 06:49:20 PM PDT 24 |
6701235708 ps |
| T1008 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.693672066 |
|
|
Aug 19 07:02:12 PM PDT 24 |
Aug 19 07:12:53 PM PDT 24 |
5518007800 ps |
| T1009 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1230953048 |
|
|
Aug 19 06:36:23 PM PDT 24 |
Aug 19 06:44:59 PM PDT 24 |
3665223974 ps |
| T144 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.1447248509 |
|
|
Aug 19 06:36:11 PM PDT 24 |
Aug 19 06:45:59 PM PDT 24 |
4009574128 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.1201418942 |
|
|
Aug 19 06:46:05 PM PDT 24 |
Aug 19 07:38:16 PM PDT 24 |
20713301070 ps |
| T336 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.326570605 |
|
|
Aug 19 06:37:51 PM PDT 24 |
Aug 19 07:04:51 PM PDT 24 |
12792175992 ps |
| T1011 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.3390422511 |
|
|
Aug 19 06:39:17 PM PDT 24 |
Aug 19 06:51:17 PM PDT 24 |
9652162015 ps |
| T1012 |
/workspace/coverage/default/0.chip_sw_aes_idle.3513666931 |
|
|
Aug 19 06:35:25 PM PDT 24 |
Aug 19 06:40:00 PM PDT 24 |
3232926022 ps |
| T1013 |
/workspace/coverage/default/1.chip_sw_aes_idle.2135856654 |
|
|
Aug 19 06:38:37 PM PDT 24 |
Aug 19 06:42:27 PM PDT 24 |
2166673316 ps |