Unified Coverage Report :: Module :: pinmux_wkup

Module : pinmux_wkup

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
81.33	78.95	92.31			72.73

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_08/chip_earlgrey_asic-sim-vcs/default/sim-vcs/../src/lowrisc_ip_pinmux_component_0.1/rtl/pinmux_wkup.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup	45.52	52.63	38.46			45.45
tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup	45.52	52.63	38.46			45.45
tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup	49.02	63.16	38.46			45.45
tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup	52.40	57.89	53.85			45.45
tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup	56.72	63.16	61.54			45.45
tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup	59.28	63.16	69.23			45.45
tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup	61.50	68.42	61.54			54.55
tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup	81.33	78.95	92.31			72.73

---

Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
45.52	52.63	38.46			45.45

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
60.10	66.67	45.45			68.18

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
90.83	98.93	84.46	98.84		79.95	92.00	u_pinmux_aon

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_prim_filter	76.27	82.35	55.56			90.91

---

Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
45.52	52.63	38.46			45.45

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
56.14	63.89	40.91			63.64

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
90.83	98.93	84.46	98.84		79.95	92.00	u_pinmux_aon

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_prim_filter	67.58	76.47	44.44			81.82

---

Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
49.02	63.16	38.46			45.45

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
64.73	80.56	45.45			68.18

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
90.83	98.93	84.46	98.84		79.95	92.00	u_pinmux_aon

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_prim_filter	82.15	100.00	55.56			90.91

---

Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
52.40	57.89	53.85			45.45

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
71.38	77.78	68.18			68.18

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
90.83	98.93	84.46	98.84		79.95	92.00	u_pinmux_aon

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_prim_filter	93.27	100.00	88.89			90.91

---

Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
56.72	63.16	61.54			45.45

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
76.85	80.56	77.27			72.73

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
90.83	98.93	84.46	98.84		79.95	92.00	u_pinmux_aon

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_prim_filter	100.00	100.00	100.00			100.00

---

Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
59.28	63.16	69.23			45.45

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
78.37	80.56	81.82			72.73

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
90.83	98.93	84.46	98.84		79.95	92.00	u_pinmux_aon

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_prim_filter	100.00	100.00	100.00			100.00

---

Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
61.50	68.42	61.54			54.55

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
76.26	83.33	72.73			72.73

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
90.83	98.93	84.46	98.84		79.95	92.00	u_pinmux_aon

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_prim_filter	93.27	100.00	88.89			90.91

---

Module Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
81.33	78.95	92.31			72.73

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
90.24	88.89	95.45			86.36

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
90.83	98.93	84.46	98.84		79.95	92.00	u_pinmux_aon

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_prim_filter	100.00	100.00	100.00			100.00

Line Coverage for Module : pinmux_wkup

	Line No.	Total	Covered	Percent
TOTAL		19	15	78.95
CONT_ASSIGN	45	1	1	100.00
CONT_ASSIGN	46	1	1	100.00
CONT_ASSIGN	50	1	1	100.00
CONT_ASSIGN	52	1	1	100.00
ALWAYS	55	10	6	60.00
ALWAYS	82	5	5	100.00

44                        logic rising, falling;
45         1/1            assign falling = ~filter_out_d & filter_out_q;
           Tests:       T5 T29 T26 
46         1/1            assign rising  = filter_out_d & ~filter_out_q;
           Tests:       T5 T29 T26 
47                      
48                        logic cnt_en, cnt_eq_th;
49                        logic [WkupCntWidth-1:0] cnt_d, cnt_q;
50         1/1            assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
           Tests:       T122 T69 
51                      
52         1/1            assign cnt_eq_th = (cnt_q >= wkup_cnt_th_i);
           Tests:       T122 T69 
53                      
54                        always_comb begin : p_mode
55         1/1              aon_wkup_pulse_o = 1'b0;
           Tests:       T5 T29 T26 
56         1/1              cnt_en           = 1'b0;
           Tests:       T5 T29 T26 
57         1/1              if (wkup_en_i) begin
           Tests:       T5 T29 T26 
58         1/1                unique case (wkup_mode_i)
           Tests:       T5 T29 T26 
59                              Negedge: begin
60         1/1                    aon_wkup_pulse_o = falling;
           Tests:       T5 T82 T83 
61                              end
62                              Edge: begin
63         1/1                    aon_wkup_pulse_o = rising | falling;
           Tests:       T5 T82 T83 
64                              end
65                              HighTimed: begin
66         0/1     ==>            cnt_en = filter_out_d;
67         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
68                              end
69                              LowTimed: begin
70         0/1     ==>            cnt_en = ~filter_out_d;
71         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
72                              end
73                              // Default to rising
74                              default: begin
75                                aon_wkup_pulse_o = rising;
76                              end
77                            endcase
78                          end
                        MISSING_ELSE
79                        end
80                      
81                        always_ff @(posedge clk_i or negedge rst_ni) begin : p_aon_pattern
82         1/1              if (!rst_ni) begin
           Tests:       T1 T2 T3 
83         1/1                filter_out_q <= 1'b0;
           Tests:       T1 T2 T3 
84         1/1                cnt_q        <= '0;
           Tests:       T1 T2 T3 
85                          end else begin
86         1/1                filter_out_q <= filter_out_d;
           Tests:       T1 T2 T3 
87         1/1                cnt_q        <= cnt_d;
           Tests:       T1 T2 T3 

---

Cond Coverage for Module : pinmux_wkup

	Total	Covered	Percent
Conditions	13	12	92.31
Logical	13	12	92.31
Non-Logical	0	0
Event	0	0

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----

-1-	-2-	Status	Tests
0	1	Covered	T5,T29,T26
1	0	Covered	T1,T2,T3
1	1	Covered	T5,T29,T76

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Covered	T5,T29,T26
1	1	Covered	T5,T29,T26

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----

-1-	Status	Tests
0	Covered	T122,T69
1	Covered	T1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--

-1-	Status	Tests
0	Covered	T122,T69
1	Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---

-1-	-2-	Status	Tests
0	0	Covered	T5,T82,T83
0	1	Covered	T5,T82,T83
1	0	Covered	T82,T83

---

Branch Coverage for Module : pinmux_wkup

	Line No.	Total	Covered	Percent
Branches		11	8	72.73
TERNARY	50	3	2	66.67
IF	57	6	4	66.67
IF	82	2	2	100.00

50           assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
                                            -1-             -2-   
                                            ==>             ==>   
                                                            ==>  

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T122,T69

57             if (wkup_en_i) begin
               -1-  
58               unique case (wkup_mode_i)
                        -2-  
59                 Negedge: begin
60                   aon_wkup_pulse_o = falling;
                     ==>
61                 end
62                 Edge: begin
63                   aon_wkup_pulse_o = rising | falling;
                     ==>
64                 end
65                 HighTimed: begin
66                   cnt_en = filter_out_d;
                     ==>
67                   aon_wkup_pulse_o = cnt_eq_th;
68                 end
69                 LowTimed: begin
70                   cnt_en = ~filter_out_d;
                     ==>
71                   aon_wkup_pulse_o = cnt_eq_th;
72                 end
73                 // Default to rising
74                 default: begin
75                   aon_wkup_pulse_o = rising;
                     ==>
76                 end
77               endcase
78             end
               MISSING_ELSE
               ==>

Branches:

-1-	-2-	Status	Tests
1	Negedge	Covered	T5,T82,T83
1	Edge	Covered	T5,T82,T83
1	HighTimed	Not Covered
1	LowTimed	Not Covered
1	default	Covered	T29,T26,T76
0	-	Covered	T5,T26,T94

82             if (!rst_ni) begin
               -1-  
83               filter_out_q <= 1'b0;
                 ==>
84               cnt_q        <= '0;
85             end else begin
86               filter_out_q <= filter_out_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup

	Line No.	Total	Covered	Percent
TOTAL		19	10	52.63
CONT_ASSIGN	45	1	0	0.00
CONT_ASSIGN	46	1	0	0.00
CONT_ASSIGN	50	1	1	100.00
CONT_ASSIGN	52	1	1	100.00
ALWAYS	55	10	3	30.00
ALWAYS	82	5	5	100.00

44                        logic rising, falling;
45         0/1     ==>    assign falling = ~filter_out_d & filter_out_q;
46         0/1     ==>    assign rising  = filter_out_d & ~filter_out_q;
47                      
48                        logic cnt_en, cnt_eq_th;
49                        logic [WkupCntWidth-1:0] cnt_d, cnt_q;
50         1/1            assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
           Tests:       T122 T69 
51                      
52         1/1            assign cnt_eq_th = (cnt_q >= wkup_cnt_th_i);
           Tests:       T122 T69 
53                      
54                        always_comb begin : p_mode
55         1/1              aon_wkup_pulse_o = 1'b0;
           Tests:       T122 T69 
56         1/1              cnt_en           = 1'b0;
           Tests:       T122 T69 
57         1/1              if (wkup_en_i) begin
           Tests:       T122 T69 
58         0/1     ==>        unique case (wkup_mode_i)
59                              Negedge: begin
60         0/1     ==>            aon_wkup_pulse_o = falling;
61                              end
62                              Edge: begin
63         0/1     ==>            aon_wkup_pulse_o = rising | falling;
64                              end
65                              HighTimed: begin
66         0/1     ==>            cnt_en = filter_out_d;
67         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
68                              end
69                              LowTimed: begin
70         0/1     ==>            cnt_en = ~filter_out_d;
71         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
72                              end
73                              // Default to rising
74                              default: begin
75                                aon_wkup_pulse_o = rising;
76                              end
77                            endcase
78                          end
                        MISSING_ELSE
79                        end
80                      
81                        always_ff @(posedge clk_i or negedge rst_ni) begin : p_aon_pattern
82         1/1              if (!rst_ni) begin
           Tests:       T1 T2 T3 
83         1/1                filter_out_q <= 1'b0;
           Tests:       T1 T2 T3 
84         1/1                cnt_q        <= '0;
           Tests:       T1 T2 T3 
85                          end else begin
86         1/1                filter_out_q <= filter_out_d;
           Tests:       T1 T2 T3 
87         1/1                cnt_q        <= cnt_d;
           Tests:       T1 T2 T3 

---

Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup

	Total	Covered	Percent
Conditions	13	5	38.46
Logical	13	5	38.46
Non-Logical	0	0
Event	0	0

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Covered	T1,T2,T3
1	1	Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Not Covered
1	1	Not Covered

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----

-1-	Status	Tests
0	Covered	T122,T69
1	Covered	T1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--

-1-	Status	Tests
0	Covered	T122,T69
1	Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

---

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[1].u_pinmux_wkup

	Line No.	Total	Covered	Percent
Branches		11	5	45.45
TERNARY	50	3	2	66.67
IF	57	6	1	16.67
IF	82	2	2	100.00

50           assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
                                            -1-             -2-   
                                            ==>             ==>   
                                                            ==>  

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T122,T69

57             if (wkup_en_i) begin
               -1-  
58               unique case (wkup_mode_i)
                        -2-  
59                 Negedge: begin
60                   aon_wkup_pulse_o = falling;
                     ==>
61                 end
62                 Edge: begin
63                   aon_wkup_pulse_o = rising | falling;
                     ==>
64                 end
65                 HighTimed: begin
66                   cnt_en = filter_out_d;
                     ==>
67                   aon_wkup_pulse_o = cnt_eq_th;
68                 end
69                 LowTimed: begin
70                   cnt_en = ~filter_out_d;
                     ==>
71                   aon_wkup_pulse_o = cnt_eq_th;
72                 end
73                 // Default to rising
74                 default: begin
75                   aon_wkup_pulse_o = rising;
                     ==>
76                 end
77               endcase
78             end
               MISSING_ELSE
               ==>

Branches:

-1-	-2-	Status	Tests
1	Negedge	Not Covered
1	Edge	Not Covered
1	HighTimed	Not Covered
1	LowTimed	Not Covered
1	default	Not Covered
0	-	Covered	T122,T69

82             if (!rst_ni) begin
               -1-  
83               filter_out_q <= 1'b0;
                 ==>
84               cnt_q        <= '0;
85             end else begin
86               filter_out_q <= filter_out_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup

	Line No.	Total	Covered	Percent
TOTAL		19	10	52.63
CONT_ASSIGN	45	1	0	0.00
CONT_ASSIGN	46	1	0	0.00
CONT_ASSIGN	50	1	1	100.00
CONT_ASSIGN	52	1	1	100.00
ALWAYS	55	10	3	30.00
ALWAYS	82	5	5	100.00

44                        logic rising, falling;
45         0/1     ==>    assign falling = ~filter_out_d & filter_out_q;
46         0/1     ==>    assign rising  = filter_out_d & ~filter_out_q;
47                      
48                        logic cnt_en, cnt_eq_th;
49                        logic [WkupCntWidth-1:0] cnt_d, cnt_q;
50         1/1            assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
           Tests:       T69 
51                      
52         1/1            assign cnt_eq_th = (cnt_q >= wkup_cnt_th_i);
           Tests:       T69 
53                      
54                        always_comb begin : p_mode
55         1/1              aon_wkup_pulse_o = 1'b0;
           Tests:       T69 
56         1/1              cnt_en           = 1'b0;
           Tests:       T69 
57         1/1              if (wkup_en_i) begin
           Tests:       T69 
58         0/1     ==>        unique case (wkup_mode_i)
59                              Negedge: begin
60         0/1     ==>            aon_wkup_pulse_o = falling;
61                              end
62                              Edge: begin
63         0/1     ==>            aon_wkup_pulse_o = rising | falling;
64                              end
65                              HighTimed: begin
66         0/1     ==>            cnt_en = filter_out_d;
67         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
68                              end
69                              LowTimed: begin
70         0/1     ==>            cnt_en = ~filter_out_d;
71         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
72                              end
73                              // Default to rising
74                              default: begin
75                                aon_wkup_pulse_o = rising;
76                              end
77                            endcase
78                          end
                        MISSING_ELSE
79                        end
80                      
81                        always_ff @(posedge clk_i or negedge rst_ni) begin : p_aon_pattern
82         1/1              if (!rst_ni) begin
           Tests:       T1 T2 T3 
83         1/1                filter_out_q <= 1'b0;
           Tests:       T1 T2 T3 
84         1/1                cnt_q        <= '0;
           Tests:       T1 T2 T3 
85                          end else begin
86         1/1                filter_out_q <= filter_out_d;
           Tests:       T1 T2 T3 
87         1/1                cnt_q        <= cnt_d;
           Tests:       T1 T2 T3 

---

Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup

	Total	Covered	Percent
Conditions	13	5	38.46
Logical	13	5	38.46
Non-Logical	0	0
Event	0	0

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Covered	T1,T2,T3
1	1	Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Not Covered
1	1	Not Covered

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----

-1-	Status	Tests
0	Covered	T69
1	Covered	T1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--

-1-	Status	Tests
0	Covered	T69
1	Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

---

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[4].u_pinmux_wkup

	Line No.	Total	Covered	Percent
Branches		11	5	45.45
TERNARY	50	3	2	66.67
IF	57	6	1	16.67
IF	82	2	2	100.00

50           assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
                                            -1-             -2-   
                                            ==>             ==>   
                                                            ==>  

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T69

57             if (wkup_en_i) begin
               -1-  
58               unique case (wkup_mode_i)
                        -2-  
59                 Negedge: begin
60                   aon_wkup_pulse_o = falling;
                     ==>
61                 end
62                 Edge: begin
63                   aon_wkup_pulse_o = rising | falling;
                     ==>
64                 end
65                 HighTimed: begin
66                   cnt_en = filter_out_d;
                     ==>
67                   aon_wkup_pulse_o = cnt_eq_th;
68                 end
69                 LowTimed: begin
70                   cnt_en = ~filter_out_d;
                     ==>
71                   aon_wkup_pulse_o = cnt_eq_th;
72                 end
73                 // Default to rising
74                 default: begin
75                   aon_wkup_pulse_o = rising;
                     ==>
76                 end
77               endcase
78             end
               MISSING_ELSE
               ==>

Branches:

-1-	-2-	Status	Tests
1	Negedge	Not Covered
1	Edge	Not Covered
1	HighTimed	Not Covered
1	LowTimed	Not Covered
1	default	Not Covered
0	-	Covered	T69

82             if (!rst_ni) begin
               -1-  
83               filter_out_q <= 1'b0;
                 ==>
84               cnt_q        <= '0;
85             end else begin
86               filter_out_q <= filter_out_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup

	Line No.	Total	Covered	Percent
TOTAL		19	12	63.16
CONT_ASSIGN	45	1	1	100.00
CONT_ASSIGN	46	1	1	100.00
CONT_ASSIGN	50	1	1	100.00
CONT_ASSIGN	52	1	1	100.00
ALWAYS	55	10	3	30.00
ALWAYS	82	5	5	100.00

44                        logic rising, falling;
45         1/1            assign falling = ~filter_out_d & filter_out_q;
           Tests:       T69 
46         1/1            assign rising  = filter_out_d & ~filter_out_q;
           Tests:       T69 
47                      
48                        logic cnt_en, cnt_eq_th;
49                        logic [WkupCntWidth-1:0] cnt_d, cnt_q;
50         1/1            assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
           Tests:       T69 
51                      
52         1/1            assign cnt_eq_th = (cnt_q >= wkup_cnt_th_i);
           Tests:       T69 
53                      
54                        always_comb begin : p_mode
55         1/1              aon_wkup_pulse_o = 1'b0;
           Tests:       T69 
56         1/1              cnt_en           = 1'b0;
           Tests:       T69 
57         1/1              if (wkup_en_i) begin
           Tests:       T69 
58         0/1     ==>        unique case (wkup_mode_i)
59                              Negedge: begin
60         0/1     ==>            aon_wkup_pulse_o = falling;
61                              end
62                              Edge: begin
63         0/1     ==>            aon_wkup_pulse_o = rising | falling;
64                              end
65                              HighTimed: begin
66         0/1     ==>            cnt_en = filter_out_d;
67         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
68                              end
69                              LowTimed: begin
70         0/1     ==>            cnt_en = ~filter_out_d;
71         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
72                              end
73                              // Default to rising
74                              default: begin
75                                aon_wkup_pulse_o = rising;
76                              end
77                            endcase
78                          end
                        MISSING_ELSE
79                        end
80                      
81                        always_ff @(posedge clk_i or negedge rst_ni) begin : p_aon_pattern
82         1/1              if (!rst_ni) begin
           Tests:       T1 T2 T3 
83         1/1                filter_out_q <= 1'b0;
           Tests:       T1 T2 T3 
84         1/1                cnt_q        <= '0;
           Tests:       T1 T2 T3 
85                          end else begin
86         1/1                filter_out_q <= filter_out_d;
           Tests:       T1 T2 T3 
87         1/1                cnt_q        <= cnt_d;
           Tests:       T1 T2 T3 

---

Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup

	Total	Covered	Percent
Conditions	13	5	38.46
Logical	13	5	38.46
Non-Logical	0	0
Event	0	0

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Covered	T1,T2,T3
1	1	Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Not Covered
1	1	Not Covered

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----

-1-	Status	Tests
0	Covered	T69
1	Covered	T1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--

-1-	Status	Tests
0	Covered	T69
1	Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

---

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[6].u_pinmux_wkup

	Line No.	Total	Covered	Percent
Branches		11	5	45.45
TERNARY	50	3	2	66.67
IF	57	6	1	16.67
IF	82	2	2	100.00

50           assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
                                            -1-             -2-   
                                            ==>             ==>   
                                                            ==>  

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T69

57             if (wkup_en_i) begin
               -1-  
58               unique case (wkup_mode_i)
                        -2-  
59                 Negedge: begin
60                   aon_wkup_pulse_o = falling;
                     ==>
61                 end
62                 Edge: begin
63                   aon_wkup_pulse_o = rising | falling;
                     ==>
64                 end
65                 HighTimed: begin
66                   cnt_en = filter_out_d;
                     ==>
67                   aon_wkup_pulse_o = cnt_eq_th;
68                 end
69                 LowTimed: begin
70                   cnt_en = ~filter_out_d;
                     ==>
71                   aon_wkup_pulse_o = cnt_eq_th;
72                 end
73                 // Default to rising
74                 default: begin
75                   aon_wkup_pulse_o = rising;
                     ==>
76                 end
77               endcase
78             end
               MISSING_ELSE
               ==>

Branches:

-1-	-2-	Status	Tests
1	Negedge	Not Covered
1	Edge	Not Covered
1	HighTimed	Not Covered
1	LowTimed	Not Covered
1	default	Not Covered
0	-	Covered	T69

82             if (!rst_ni) begin
               -1-  
83               filter_out_q <= 1'b0;
                 ==>
84               cnt_q        <= '0;
85             end else begin
86               filter_out_q <= filter_out_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup

	Line No.	Total	Covered	Percent
TOTAL		19	11	57.89
CONT_ASSIGN	45	1	1	100.00
CONT_ASSIGN	46	1	1	100.00
CONT_ASSIGN	50	1	0	0.00
CONT_ASSIGN	52	1	0	0.00
ALWAYS	55	10	4	40.00
ALWAYS	82	5	5	100.00

44                        logic rising, falling;
45         1/1            assign falling = ~filter_out_d & filter_out_q;
           Tests:       T26 T76 T77 
46         1/1            assign rising  = filter_out_d & ~filter_out_q;
           Tests:       T26 T76 T77 
47                      
48                        logic cnt_en, cnt_eq_th;
49                        logic [WkupCntWidth-1:0] cnt_d, cnt_q;
50         0/1     ==>    assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
51                      
52         0/1     ==>    assign cnt_eq_th = (cnt_q >= wkup_cnt_th_i);
53                      
54                        always_comb begin : p_mode
55         1/1              aon_wkup_pulse_o = 1'b0;
           Tests:       T26 T76 T77 
56         1/1              cnt_en           = 1'b0;
           Tests:       T26 T76 T77 
57         1/1              if (wkup_en_i) begin
           Tests:       T26 T76 T77 
58         1/1                unique case (wkup_mode_i)
           Tests:       T26 T76 T77 
59                              Negedge: begin
60         0/1     ==>            aon_wkup_pulse_o = falling;
61                              end
62                              Edge: begin
63         0/1     ==>            aon_wkup_pulse_o = rising | falling;
64                              end
65                              HighTimed: begin
66         0/1     ==>            cnt_en = filter_out_d;
67         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
68                              end
69                              LowTimed: begin
70         0/1     ==>            cnt_en = ~filter_out_d;
71         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
72                              end
73                              // Default to rising
74                              default: begin
75                                aon_wkup_pulse_o = rising;
76                              end
77                            endcase
78                          end
                        MISSING_ELSE
79                        end
80                      
81                        always_ff @(posedge clk_i or negedge rst_ni) begin : p_aon_pattern
82         1/1              if (!rst_ni) begin
           Tests:       T1 T2 T3 
83         1/1                filter_out_q <= 1'b0;
           Tests:       T1 T2 T3 
84         1/1                cnt_q        <= '0;
           Tests:       T1 T2 T3 
85                          end else begin
86         1/1                filter_out_q <= filter_out_d;
           Tests:       T1 T2 T3 
87         1/1                cnt_q        <= cnt_d;
           Tests:       T1 T2 T3 

---

Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup

	Total	Covered	Percent
Conditions	13	7	53.85
Logical	13	7	53.85
Non-Logical	0	0
Event	0	0

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----

-1-	-2-	Status	Tests
0	1	Covered	T26,T76,T77
1	0	Covered	T1,T2,T3
1	1	Covered	T76,T77,T94

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Covered	T26,T76,T77
1	1	Covered	T26,T76,T77

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----

-1-	Status	Tests
0	Not Covered
1	Covered	T1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

---

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[5].u_pinmux_wkup

	Line No.	Total	Covered	Percent
Branches		11	5	45.45
TERNARY	50	3	1	33.33
IF	57	6	2	33.33
IF	82	2	2	100.00

50           assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
                                            -1-             -2-   
                                            ==>             ==>   
                                                            ==>  

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Not Covered

57             if (wkup_en_i) begin
               -1-  
58               unique case (wkup_mode_i)
                        -2-  
59                 Negedge: begin
60                   aon_wkup_pulse_o = falling;
                     ==>
61                 end
62                 Edge: begin
63                   aon_wkup_pulse_o = rising | falling;
                     ==>
64                 end
65                 HighTimed: begin
66                   cnt_en = filter_out_d;
                     ==>
67                   aon_wkup_pulse_o = cnt_eq_th;
68                 end
69                 LowTimed: begin
70                   cnt_en = ~filter_out_d;
                     ==>
71                   aon_wkup_pulse_o = cnt_eq_th;
72                 end
73                 // Default to rising
74                 default: begin
75                   aon_wkup_pulse_o = rising;
                     ==>
76                 end
77               endcase
78             end
               MISSING_ELSE
               ==>

Branches:

-1-	-2-	Status	Tests
1	Negedge	Not Covered
1	Edge	Not Covered
1	HighTimed	Not Covered
1	LowTimed	Not Covered
1	default	Covered	T26,T76,T77
0	-	Covered	T26,T94,T27

82             if (!rst_ni) begin
               -1-  
83               filter_out_q <= 1'b0;
                 ==>
84               cnt_q        <= '0;
85             end else begin
86               filter_out_q <= filter_out_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup

	Line No.	Total	Covered	Percent
TOTAL		19	12	63.16
CONT_ASSIGN	45	1	1	100.00
CONT_ASSIGN	46	1	1	100.00
CONT_ASSIGN	50	1	1	100.00
CONT_ASSIGN	52	1	1	100.00
ALWAYS	55	10	3	30.00
ALWAYS	82	5	5	100.00

44                        logic rising, falling;
45         1/1            assign falling = ~filter_out_d & filter_out_q;
           Tests:       T69 
46         1/1            assign rising  = filter_out_d & ~filter_out_q;
           Tests:       T69 
47                      
48                        logic cnt_en, cnt_eq_th;
49                        logic [WkupCntWidth-1:0] cnt_d, cnt_q;
50         1/1            assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
           Tests:       T69 
51                      
52         1/1            assign cnt_eq_th = (cnt_q >= wkup_cnt_th_i);
           Tests:       T69 
53                      
54                        always_comb begin : p_mode
55         1/1              aon_wkup_pulse_o = 1'b0;
           Tests:       T69 
56         1/1              cnt_en           = 1'b0;
           Tests:       T69 
57         1/1              if (wkup_en_i) begin
           Tests:       T69 
58         0/1     ==>        unique case (wkup_mode_i)
59                              Negedge: begin
60         0/1     ==>            aon_wkup_pulse_o = falling;
61                              end
62                              Edge: begin
63         0/1     ==>            aon_wkup_pulse_o = rising | falling;
64                              end
65                              HighTimed: begin
66         0/1     ==>            cnt_en = filter_out_d;
67         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
68                              end
69                              LowTimed: begin
70         0/1     ==>            cnt_en = ~filter_out_d;
71         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
72                              end
73                              // Default to rising
74                              default: begin
75                                aon_wkup_pulse_o = rising;
76                              end
77                            endcase
78                          end
                        MISSING_ELSE
79                        end
80                      
81                        always_ff @(posedge clk_i or negedge rst_ni) begin : p_aon_pattern
82         1/1              if (!rst_ni) begin
           Tests:       T1 T2 T3 
83         1/1                filter_out_q <= 1'b0;
           Tests:       T1 T2 T3 
84         1/1                cnt_q        <= '0;
           Tests:       T1 T2 T3 
85                          end else begin
86         1/1                filter_out_q <= filter_out_d;
           Tests:       T1 T2 T3 
87         1/1                cnt_q        <= cnt_d;
           Tests:       T1 T2 T3 

---

Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup

	Total	Covered	Percent
Conditions	13	8	61.54
Logical	13	8	61.54
Non-Logical	0	0
Event	0	0

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----

-1-	-2-	Status	Tests
0	1	Covered	T69
1	0	Covered	T1,T2,T3
1	1	Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Covered	T69
1	1	Covered	T69

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----

-1-	Status	Tests
0	Covered	T69
1	Covered	T1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--

-1-	Status	Tests
0	Covered	T69
1	Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

---

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[7].u_pinmux_wkup

	Line No.	Total	Covered	Percent
Branches		11	5	45.45
TERNARY	50	3	2	66.67
IF	57	6	1	16.67
IF	82	2	2	100.00

50           assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
                                            -1-             -2-   
                                            ==>             ==>   
                                                            ==>  

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T69

57             if (wkup_en_i) begin
               -1-  
58               unique case (wkup_mode_i)
                        -2-  
59                 Negedge: begin
60                   aon_wkup_pulse_o = falling;
                     ==>
61                 end
62                 Edge: begin
63                   aon_wkup_pulse_o = rising | falling;
                     ==>
64                 end
65                 HighTimed: begin
66                   cnt_en = filter_out_d;
                     ==>
67                   aon_wkup_pulse_o = cnt_eq_th;
68                 end
69                 LowTimed: begin
70                   cnt_en = ~filter_out_d;
                     ==>
71                   aon_wkup_pulse_o = cnt_eq_th;
72                 end
73                 // Default to rising
74                 default: begin
75                   aon_wkup_pulse_o = rising;
                     ==>
76                 end
77               endcase
78             end
               MISSING_ELSE
               ==>

Branches:

-1-	-2-	Status	Tests
1	Negedge	Not Covered
1	Edge	Not Covered
1	HighTimed	Not Covered
1	LowTimed	Not Covered
1	default	Not Covered
0	-	Covered	T69

82             if (!rst_ni) begin
               -1-  
83               filter_out_q <= 1'b0;
                 ==>
84               cnt_q        <= '0;
85             end else begin
86               filter_out_q <= filter_out_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup

	Line No.	Total	Covered	Percent
TOTAL		19	12	63.16
CONT_ASSIGN	45	1	1	100.00
CONT_ASSIGN	46	1	1	100.00
CONT_ASSIGN	50	1	1	100.00
CONT_ASSIGN	52	1	1	100.00
ALWAYS	55	10	3	30.00
ALWAYS	82	5	5	100.00

44                        logic rising, falling;
45         1/1            assign falling = ~filter_out_d & filter_out_q;
           Tests:       T69 
46         1/1            assign rising  = filter_out_d & ~filter_out_q;
           Tests:       T69 
47                      
48                        logic cnt_en, cnt_eq_th;
49                        logic [WkupCntWidth-1:0] cnt_d, cnt_q;
50         1/1            assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
           Tests:       T69 
51                      
52         1/1            assign cnt_eq_th = (cnt_q >= wkup_cnt_th_i);
           Tests:       T69 
53                      
54                        always_comb begin : p_mode
55         1/1              aon_wkup_pulse_o = 1'b0;
           Tests:       T69 
56         1/1              cnt_en           = 1'b0;
           Tests:       T69 
57         1/1              if (wkup_en_i) begin
           Tests:       T69 
58         0/1     ==>        unique case (wkup_mode_i)
59                              Negedge: begin
60         0/1     ==>            aon_wkup_pulse_o = falling;
61                              end
62                              Edge: begin
63         0/1     ==>            aon_wkup_pulse_o = rising | falling;
64                              end
65                              HighTimed: begin
66         0/1     ==>            cnt_en = filter_out_d;
67         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
68                              end
69                              LowTimed: begin
70         0/1     ==>            cnt_en = ~filter_out_d;
71         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
72                              end
73                              // Default to rising
74                              default: begin
75                                aon_wkup_pulse_o = rising;
76                              end
77                            endcase
78                          end
                        MISSING_ELSE
79                        end
80                      
81                        always_ff @(posedge clk_i or negedge rst_ni) begin : p_aon_pattern
82         1/1              if (!rst_ni) begin
           Tests:       T1 T2 T3 
83         1/1                filter_out_q <= 1'b0;
           Tests:       T1 T2 T3 
84         1/1                cnt_q        <= '0;
           Tests:       T1 T2 T3 
85                          end else begin
86         1/1                filter_out_q <= filter_out_d;
           Tests:       T1 T2 T3 
87         1/1                cnt_q        <= cnt_d;
           Tests:       T1 T2 T3 

---

Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup

	Total	Covered	Percent
Conditions	13	9	69.23
Logical	13	9	69.23
Non-Logical	0	0
Event	0	0

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----

-1-	-2-	Status	Tests
0	1	Covered	T69
1	0	Covered	T1,T2,T3
1	1	Covered	T69

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Covered	T69
1	1	Covered	T69

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----

-1-	Status	Tests
0	Covered	T69
1	Covered	T1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--

-1-	Status	Tests
0	Covered	T69
1	Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

---

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[3].u_pinmux_wkup

	Line No.	Total	Covered	Percent
Branches		11	5	45.45
TERNARY	50	3	2	66.67
IF	57	6	1	16.67
IF	82	2	2	100.00

50           assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
                                            -1-             -2-   
                                            ==>             ==>   
                                                            ==>  

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T69

57             if (wkup_en_i) begin
               -1-  
58               unique case (wkup_mode_i)
                        -2-  
59                 Negedge: begin
60                   aon_wkup_pulse_o = falling;
                     ==>
61                 end
62                 Edge: begin
63                   aon_wkup_pulse_o = rising | falling;
                     ==>
64                 end
65                 HighTimed: begin
66                   cnt_en = filter_out_d;
                     ==>
67                   aon_wkup_pulse_o = cnt_eq_th;
68                 end
69                 LowTimed: begin
70                   cnt_en = ~filter_out_d;
                     ==>
71                   aon_wkup_pulse_o = cnt_eq_th;
72                 end
73                 // Default to rising
74                 default: begin
75                   aon_wkup_pulse_o = rising;
                     ==>
76                 end
77               endcase
78             end
               MISSING_ELSE
               ==>

Branches:

-1-	-2-	Status	Tests
1	Negedge	Not Covered
1	Edge	Not Covered
1	HighTimed	Not Covered
1	LowTimed	Not Covered
1	default	Not Covered
0	-	Covered	T69

82             if (!rst_ni) begin
               -1-  
83               filter_out_q <= 1'b0;
                 ==>
84               cnt_q        <= '0;
85             end else begin
86               filter_out_q <= filter_out_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup

	Line No.	Total	Covered	Percent
TOTAL		19	13	68.42
CONT_ASSIGN	45	1	1	100.00
CONT_ASSIGN	46	1	1	100.00
CONT_ASSIGN	50	1	1	100.00
CONT_ASSIGN	52	1	1	100.00
ALWAYS	55	10	4	40.00
ALWAYS	82	5	5	100.00

44                        logic rising, falling;
45         1/1            assign falling = ~filter_out_d & filter_out_q;
           Tests:       T28 T69 
46         1/1            assign rising  = filter_out_d & ~filter_out_q;
           Tests:       T28 T69 
47                      
48                        logic cnt_en, cnt_eq_th;
49                        logic [WkupCntWidth-1:0] cnt_d, cnt_q;
50         1/1            assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
           Tests:       T69 
51                      
52         1/1            assign cnt_eq_th = (cnt_q >= wkup_cnt_th_i);
           Tests:       T69 
53                      
54                        always_comb begin : p_mode
55         1/1              aon_wkup_pulse_o = 1'b0;
           Tests:       T28 T69 
56         1/1              cnt_en           = 1'b0;
           Tests:       T28 T69 
57         1/1              if (wkup_en_i) begin
           Tests:       T28 T69 
58         1/1                unique case (wkup_mode_i)
           Tests:       T28 
59                              Negedge: begin
60         0/1     ==>            aon_wkup_pulse_o = falling;
61                              end
62                              Edge: begin
63         0/1     ==>            aon_wkup_pulse_o = rising | falling;
64                              end
65                              HighTimed: begin
66         0/1     ==>            cnt_en = filter_out_d;
67         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
68                              end
69                              LowTimed: begin
70         0/1     ==>            cnt_en = ~filter_out_d;
71         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
72                              end
73                              // Default to rising
74                              default: begin
75                                aon_wkup_pulse_o = rising;
76                              end
77                            endcase
78                          end
                        MISSING_ELSE
79                        end
80                      
81                        always_ff @(posedge clk_i or negedge rst_ni) begin : p_aon_pattern
82         1/1              if (!rst_ni) begin
           Tests:       T1 T2 T3 
83         1/1                filter_out_q <= 1'b0;
           Tests:       T1 T2 T3 
84         1/1                cnt_q        <= '0;
           Tests:       T1 T2 T3 
85                          end else begin
86         1/1                filter_out_q <= filter_out_d;
           Tests:       T1 T2 T3 
87         1/1                cnt_q        <= cnt_d;
           Tests:       T1 T2 T3 

---

Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup

	Total	Covered	Percent
Conditions	13	8	61.54
Logical	13	8	61.54
Non-Logical	0	0
Event	0	0

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----

-1-	-2-	Status	Tests
0	1	Covered	T28,T69
1	0	Covered	T1,T2,T3
1	1	Not Covered

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Covered	T28,T69
1	1	Covered	T28,T69

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----

-1-	Status	Tests
0	Covered	T69
1	Covered	T1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--

-1-	Status	Tests
0	Covered	T69
1	Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

---

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[2].u_pinmux_wkup

	Line No.	Total	Covered	Percent
Branches		11	6	54.55
TERNARY	50	3	2	66.67
IF	57	6	2	33.33
IF	82	2	2	100.00

50           assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
                                            -1-             -2-   
                                            ==>             ==>   
                                                            ==>  

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T69

57             if (wkup_en_i) begin
               -1-  
58               unique case (wkup_mode_i)
                        -2-  
59                 Negedge: begin
60                   aon_wkup_pulse_o = falling;
                     ==>
61                 end
62                 Edge: begin
63                   aon_wkup_pulse_o = rising | falling;
                     ==>
64                 end
65                 HighTimed: begin
66                   cnt_en = filter_out_d;
                     ==>
67                   aon_wkup_pulse_o = cnt_eq_th;
68                 end
69                 LowTimed: begin
70                   cnt_en = ~filter_out_d;
                     ==>
71                   aon_wkup_pulse_o = cnt_eq_th;
72                 end
73                 // Default to rising
74                 default: begin
75                   aon_wkup_pulse_o = rising;
                     ==>
76                 end
77               endcase
78             end
               MISSING_ELSE
               ==>

Branches:

-1-	-2-	Status	Tests
1	Negedge	Not Covered
1	Edge	Not Covered
1	HighTimed	Not Covered
1	LowTimed	Not Covered
1	default	Covered	T28
0	-	Covered	T28,T69

82             if (!rst_ni) begin
               -1-  
83               filter_out_q <= 1'b0;
                 ==>
84               cnt_q        <= '0;
85             end else begin
86               filter_out_q <= filter_out_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

Line Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup

	Line No.	Total	Covered	Percent
TOTAL		19	15	78.95
CONT_ASSIGN	45	1	1	100.00
CONT_ASSIGN	46	1	1	100.00
CONT_ASSIGN	50	1	1	100.00
CONT_ASSIGN	52	1	1	100.00
ALWAYS	55	10	6	60.00
ALWAYS	82	5	5	100.00

44                        logic rising, falling;
45         1/1            assign falling = ~filter_out_d & filter_out_q;
           Tests:       T5 T29 T75 
46         1/1            assign rising  = filter_out_d & ~filter_out_q;
           Tests:       T5 T29 T75 
47                      
48                        logic cnt_en, cnt_eq_th;
49                        logic [WkupCntWidth-1:0] cnt_d, cnt_q;
50         1/1            assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
           Tests:       T69 
51                      
52         1/1            assign cnt_eq_th = (cnt_q >= wkup_cnt_th_i);
           Tests:       T69 
53                      
54                        always_comb begin : p_mode
55         1/1              aon_wkup_pulse_o = 1'b0;
           Tests:       T5 T29 T75 
56         1/1              cnt_en           = 1'b0;
           Tests:       T5 T29 T75 
57         1/1              if (wkup_en_i) begin
           Tests:       T5 T29 T75 
58         1/1                unique case (wkup_mode_i)
           Tests:       T5 T29 T75 
59                              Negedge: begin
60         1/1                    aon_wkup_pulse_o = falling;
           Tests:       T5 T82 T83 
61                              end
62                              Edge: begin
63         1/1                    aon_wkup_pulse_o = rising | falling;
           Tests:       T5 T82 T83 
64                              end
65                              HighTimed: begin
66         0/1     ==>            cnt_en = filter_out_d;
67         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
68                              end
69                              LowTimed: begin
70         0/1     ==>            cnt_en = ~filter_out_d;
71         0/1     ==>            aon_wkup_pulse_o = cnt_eq_th;
72                              end
73                              // Default to rising
74                              default: begin
75                                aon_wkup_pulse_o = rising;
76                              end
77                            endcase
78                          end
                        MISSING_ELSE
79                        end
80                      
81                        always_ff @(posedge clk_i or negedge rst_ni) begin : p_aon_pattern
82         1/1              if (!rst_ni) begin
           Tests:       T1 T2 T3 
83         1/1                filter_out_q <= 1'b0;
           Tests:       T1 T2 T3 
84         1/1                cnt_q        <= '0;
           Tests:       T1 T2 T3 
85                          end else begin
86         1/1                filter_out_q <= filter_out_d;
           Tests:       T1 T2 T3 
87         1/1                cnt_q        <= cnt_d;
           Tests:       T1 T2 T3 

---

Cond Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup

	Total	Covered	Percent
Conditions	13	12	92.31
Logical	13	12	92.31
Non-Logical	0	0
Event	0	0

 LINE       45
 EXPRESSION (((~filter_out_d)) & filter_out_q)
             --------1--------   ------2-----

-1-	-2-	Status	Tests
0	1	Covered	T5,T29,T75
1	0	Covered	T1,T2,T3
1	1	Covered	T5,T29,T75

 LINE       46
 EXPRESSION (filter_out_d & ((~filter_out_q)))
             ------1-----   --------2--------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Covered	T5,T29,T75
1	1	Covered	T5,T29,T75

 LINE       50
 EXPRESSION (cnt_eq_th ? '0 : (cnt_en ? ((cnt_q + 1'b1)) : '0))
             ----1----

-1-	Status	Tests
0	Covered	T69
1	Covered	T1,T2,T3

 LINE       50
 SUB-EXPRESSION (cnt_en ? ((cnt_q + 1'b1)) : '0)
                 ---1--

-1-	Status	Tests
0	Covered	T69
1	Not Covered

 LINE       63
 EXPRESSION (rising | falling)
             ---1--   ---2---

-1-	-2-	Status	Tests
0	0	Covered	T5,T82,T83
0	1	Covered	T5,T82,T83
1	0	Covered	T82,T83

---

Branch Coverage for Instance : tb.dut.top_earlgrey.u_pinmux_aon.gen_wkup_detect[0].u_pinmux_wkup

	Line No.	Total	Covered	Percent
Branches		11	8	72.73
TERNARY	50	3	2	66.67
IF	57	6	4	66.67
IF	82	2	2	100.00

50           assign cnt_d     = (cnt_eq_th) ? '0 : (cnt_en) ? cnt_q + 1'b1 : '0;
                                            -1-             -2-   
                                            ==>             ==>   
                                                            ==>  

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T69

57             if (wkup_en_i) begin
               -1-  
58               unique case (wkup_mode_i)
                        -2-  
59                 Negedge: begin
60                   aon_wkup_pulse_o = falling;
                     ==>
61                 end
62                 Edge: begin
63                   aon_wkup_pulse_o = rising | falling;
                     ==>
64                 end
65                 HighTimed: begin
66                   cnt_en = filter_out_d;
                     ==>
67                   aon_wkup_pulse_o = cnt_eq_th;
68                 end
69                 LowTimed: begin
70                   cnt_en = ~filter_out_d;
                     ==>
71                   aon_wkup_pulse_o = cnt_eq_th;
72                 end
73                 // Default to rising
74                 default: begin
75                   aon_wkup_pulse_o = rising;
                     ==>
76                 end
77               endcase
78             end
               MISSING_ELSE
               ==>

Branches:

-1-	-2-	Status	Tests
1	Negedge	Covered	T5,T82,T83
1	Edge	Covered	T5,T82,T83
1	HighTimed	Not Covered
1	LowTimed	Not Covered
1	default	Covered	T29,T75,T81
0	-	Covered	T5,T82,T83

82             if (!rst_ni) begin
               -1-  
83               filter_out_q <= 1'b0;
                 ==>
84               cnt_q        <= '0;
85             end else begin
86               filter_out_q <= filter_out_d;
                 ==>

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3