SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.61 | 84.61 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 84.80 | 84.80 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.80 | 84.80 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.80 | 84.80 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9317 | 84.61 |
Total Bits 0->1 | 5506 | 4673 | 84.87 |
Total Bits 1->0 | 5506 | 4644 | 84.34 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9317 | 84.61 |
Port Bits 0->1 | 5506 | 4673 | 84.87 |
Port Bits 1->0 | 5506 | 4644 | 84.34 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
edn_i.edn_fips | No | No | Yes | T172,T173,T174 | INPUT | |
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T91,*T92,*T93 | Yes | T91,T92,T93 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T36,*T94,*T95 | Yes | T36,T94,T95 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T36,T95,T96 | Yes | T36,T95,T96 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T91,T93,T175 | Yes | T91,T92,T93 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T91,T93,T97 | Yes | T91,T92,T93 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T176,*T177,*T178 | Yes | T176,T177,T178 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T93,T97 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T120,*T37,*T179 | Yes | T120,T37,T179 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T91,*T92,*T93 | Yes | T91,T92,T93 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T91,*T92,*T93 | Yes | T91,T92,T93 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T36,*T94,*T95 | Yes | T36,T94,T95 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T36,T95,T96 | Yes | T36,T95,T96 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T3,T4 | Yes | T38,T44,T80 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T91,T93,T97 | Yes | T92,T93,T97 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T93,T97 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T3,T4 | Yes | T38,T44,T80 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | T93,T97,T180 | Yes | T91,T92,T93 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T93,T97 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T3,*T4 | Yes | T38,T44,T80 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T124,T181,T182 | Yes | T124,T181,T182 | OUTPUT |
intr_otp_error_o | Yes | Yes | T124,T181,T182 | Yes | T124,T181,T182 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T183,T74,T99 | Yes | T183,T74,T99 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T183,T74,T99 | Yes | T183,T74,T99 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T24,T34,T17 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[5:0] | No | No | Yes | T35,T184,T185 | INPUT | |
lc_otp_vendor_test_i.ctrl[6] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[9:7] | No | No | Yes | T184,T35 | INPUT | |
lc_otp_vendor_test_i.ctrl[10] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[11] | No | No | Yes | T35 | INPUT | |
lc_otp_vendor_test_i.ctrl[12] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[16:13] | No | No | Yes | T35,T184,T185 | INPUT | |
lc_otp_vendor_test_i.ctrl[17] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[27:18] | No | No | Yes | T184,T185,T35 | INPUT | |
lc_otp_vendor_test_i.ctrl[28] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:29] | No | No | Yes | T35,T184,T185 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[0] | No | No | No | INPUT | ||
lc_otp_program_i.count[2:1] | Yes | Yes | T186,T147,T187 | Yes | T186,T147,T187 | INPUT |
lc_otp_program_i.count[3] | No | No | No | INPUT | ||
lc_otp_program_i.count[12:4] | Yes | Yes | T186,T147,*T183 | Yes | T186,T147,T183 | INPUT |
lc_otp_program_i.count[14:13] | No | No | No | INPUT | ||
lc_otp_program_i.count[18:15] | Yes | Yes | T186,T147,*T183 | Yes | T186,T147,T183 | INPUT |
lc_otp_program_i.count[19] | No | No | No | INPUT | ||
lc_otp_program_i.count[48:20] | Yes | Yes | *T183,*T188,*T186 | Yes | T183,T188,T186 | INPUT |
lc_otp_program_i.count[49] | No | No | No | INPUT | ||
lc_otp_program_i.count[59:50] | Yes | Yes | T186,T147,T187 | Yes | T186,T147,T187 | INPUT |
lc_otp_program_i.count[60] | No | No | No | INPUT | ||
lc_otp_program_i.count[64:61] | Yes | Yes | *T183,*T188,*T186 | Yes | T183,T188,T186 | INPUT |
lc_otp_program_i.count[67:65] | No | No | No | INPUT | ||
lc_otp_program_i.count[73:68] | Yes | Yes | *T7,T186,*T189 | Yes | T187,T154,T190 | INPUT |
lc_otp_program_i.count[74] | No | No | No | INPUT | ||
lc_otp_program_i.count[84:75] | Yes | Yes | *T7,*T186,*T189 | Yes | T183,T187,T154 | INPUT |
lc_otp_program_i.count[85] | No | No | No | INPUT | ||
lc_otp_program_i.count[94:86] | Yes | Yes | *T2,*T7,*T24 | Yes | T24,T187,T191 | INPUT |
lc_otp_program_i.count[95] | No | No | No | INPUT | ||
lc_otp_program_i.count[112:96] | Yes | Yes | *T183,*T188,*T186 | Yes | T183,T188,T186 | INPUT |
lc_otp_program_i.count[113] | No | No | No | INPUT | ||
lc_otp_program_i.count[130:114] | Yes | Yes | *T183,*T188,*T186 | Yes | T183,T188,T186 | INPUT |
lc_otp_program_i.count[131] | No | No | No | INPUT | ||
lc_otp_program_i.count[135:132] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[136] | No | No | No | INPUT | ||
lc_otp_program_i.count[150:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[151] | No | No | No | INPUT | ||
lc_otp_program_i.count[152] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT |
lc_otp_program_i.count[155:153] | No | No | No | INPUT | ||
lc_otp_program_i.count[157:156] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT |
lc_otp_program_i.count[158] | No | No | No | INPUT | ||
lc_otp_program_i.count[160:159] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT |
lc_otp_program_i.count[161] | No | No | No | INPUT | ||
lc_otp_program_i.count[162] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT |
lc_otp_program_i.count[163] | No | No | No | INPUT | ||
lc_otp_program_i.count[170:164] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT |
lc_otp_program_i.count[171] | No | No | No | INPUT | ||
lc_otp_program_i.count[182:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[183] | No | No | No | INPUT | ||
lc_otp_program_i.count[189:184] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT |
lc_otp_program_i.count[190] | No | No | No | INPUT | ||
lc_otp_program_i.count[194:191] | Yes | Yes | *T183,*T188,*T1 | Yes | T183,T188,T37 | INPUT |
lc_otp_program_i.count[195] | No | No | No | INPUT | ||
lc_otp_program_i.count[201:196] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[202] | No | No | No | INPUT | ||
lc_otp_program_i.count[220:203] | Yes | Yes | *T183,*T188,*T1 | Yes | T183,T188,T37 | INPUT |
lc_otp_program_i.count[221] | No | No | No | INPUT | ||
lc_otp_program_i.count[225:222] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[226] | No | No | No | INPUT | ||
lc_otp_program_i.count[230:227] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[232:231] | No | No | No | INPUT | ||
lc_otp_program_i.count[241:233] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT |
lc_otp_program_i.count[242] | No | No | No | INPUT | ||
lc_otp_program_i.count[243] | Yes | Yes | *T183,*T188 | Yes | T183,T188 | INPUT |
lc_otp_program_i.count[244] | No | No | No | INPUT | ||
lc_otp_program_i.count[246:245] | Yes | Yes | T186,T147,T187 | Yes | T186,T147,T187 | INPUT |
lc_otp_program_i.count[247] | No | No | No | INPUT | ||
lc_otp_program_i.count[254:248] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT |
lc_otp_program_i.count[255] | No | No | No | INPUT | ||
lc_otp_program_i.count[264:256] | Yes | Yes | *T183,*T188,*T1 | Yes | T183,T188,T37 | INPUT |
lc_otp_program_i.count[265] | No | No | No | INPUT | ||
lc_otp_program_i.count[275:266] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[276] | No | No | No | INPUT | ||
lc_otp_program_i.count[310:277] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT |
lc_otp_program_i.count[311] | No | No | No | INPUT | ||
lc_otp_program_i.count[315:312] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT |
lc_otp_program_i.count[316] | No | No | No | INPUT | ||
lc_otp_program_i.count[325:317] | Yes | Yes | *T183,*T188,*T186 | Yes | T183,T188,T186 | INPUT |
lc_otp_program_i.count[326] | No | No | No | INPUT | ||
lc_otp_program_i.count[329:327] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[330] | No | No | No | INPUT | ||
lc_otp_program_i.count[332:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[333] | No | No | No | INPUT | ||
lc_otp_program_i.count[339:334] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[340] | No | No | No | INPUT | ||
lc_otp_program_i.count[344:341] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT |
lc_otp_program_i.count[345] | No | No | No | INPUT | ||
lc_otp_program_i.count[347:346] | Yes | Yes | T186,T147,T183 | Yes | T186,T147,T183 | INPUT |
lc_otp_program_i.count[348] | No | No | No | INPUT | ||
lc_otp_program_i.count[350:349] | Yes | Yes | T186,T147,T183 | Yes | T186,T147,T183 | INPUT |
lc_otp_program_i.count[351] | No | No | No | INPUT | ||
lc_otp_program_i.count[353:352] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[354] | No | No | No | INPUT | ||
lc_otp_program_i.count[357:355] | Yes | Yes | *T183,*T188,*T1 | Yes | T183,T188,T37 | INPUT |
lc_otp_program_i.count[359:358] | No | No | No | INPUT | ||
lc_otp_program_i.count[362:360] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT |
lc_otp_program_i.count[363] | No | No | No | INPUT | ||
lc_otp_program_i.count[369:364] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT |
lc_otp_program_i.count[370] | No | No | No | INPUT | ||
lc_otp_program_i.count[382:371] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.count[383] | No | No | No | INPUT | ||
lc_otp_program_i.state[1:0] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[2] | No | No | No | INPUT | ||
lc_otp_program_i.state[4:3] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[5] | No | No | No | INPUT | ||
lc_otp_program_i.state[11:6] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[12] | No | No | No | INPUT | ||
lc_otp_program_i.state[14:13] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[15] | No | No | No | INPUT | ||
lc_otp_program_i.state[20:16] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[21] | No | No | No | INPUT | ||
lc_otp_program_i.state[23:22] | Yes | Yes | T7,T35,T32 | Yes | T32,T183,T187 | INPUT |
lc_otp_program_i.state[24] | No | No | No | INPUT | ||
lc_otp_program_i.state[31:25] | Yes | Yes | *T183,*T188,*T7 | Yes | T183,T188,T32 | INPUT |
lc_otp_program_i.state[32] | No | No | No | INPUT | ||
lc_otp_program_i.state[45:33] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[46] | No | No | No | INPUT | ||
lc_otp_program_i.state[47] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[48] | No | No | No | INPUT | ||
lc_otp_program_i.state[57:49] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[58] | No | No | No | INPUT | ||
lc_otp_program_i.state[68:59] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[70:69] | No | No | No | INPUT | ||
lc_otp_program_i.state[72:71] | Yes | Yes | *T7,T35,T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[73] | No | No | No | INPUT | ||
lc_otp_program_i.state[77:74] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[78] | No | No | No | INPUT | ||
lc_otp_program_i.state[86:79] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[87] | No | No | No | INPUT | ||
lc_otp_program_i.state[88] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[89] | No | No | No | INPUT | ||
lc_otp_program_i.state[92:90] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[93] | No | No | No | INPUT | ||
lc_otp_program_i.state[94] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[95] | No | No | No | INPUT | ||
lc_otp_program_i.state[128:96] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[129] | No | No | No | INPUT | ||
lc_otp_program_i.state[133:130] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[134] | No | No | No | INPUT | ||
lc_otp_program_i.state[141:135] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[142] | No | No | No | INPUT | ||
lc_otp_program_i.state[145:143] | Yes | Yes | *T7,T35,T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[147:146] | No | No | No | INPUT | ||
lc_otp_program_i.state[149:148] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[150] | No | No | No | INPUT | ||
lc_otp_program_i.state[165:151] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[166] | No | No | No | INPUT | ||
lc_otp_program_i.state[167] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[168] | No | No | No | INPUT | ||
lc_otp_program_i.state[173:169] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[174] | No | No | No | INPUT | ||
lc_otp_program_i.state[176:175] | Yes | Yes | *T183,*T188,*T35 | Yes | T183,T188,T32 | INPUT |
lc_otp_program_i.state[177] | No | No | No | INPUT | ||
lc_otp_program_i.state[181:178] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[182] | No | No | No | INPUT | ||
lc_otp_program_i.state[188:183] | Yes | Yes | *T183,*T188,*T7 | Yes | T183,T188,T32 | INPUT |
lc_otp_program_i.state[189] | No | No | No | INPUT | ||
lc_otp_program_i.state[191:190] | Yes | Yes | T7,T35,T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[192] | No | No | No | INPUT | ||
lc_otp_program_i.state[196:193] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[197] | No | No | No | INPUT | ||
lc_otp_program_i.state[208:198] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[209] | No | No | No | INPUT | ||
lc_otp_program_i.state[214:210] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[215] | No | No | No | INPUT | ||
lc_otp_program_i.state[217:216] | Yes | Yes | T7,T35,T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[218] | No | No | No | INPUT | ||
lc_otp_program_i.state[219] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[220] | No | No | No | INPUT | ||
lc_otp_program_i.state[222:221] | Yes | Yes | *T7,T35,T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[224:223] | No | No | No | INPUT | ||
lc_otp_program_i.state[226:225] | Yes | Yes | T7,T35,T32 | Yes | T32,T33,T148 | INPUT |
lc_otp_program_i.state[227] | No | No | No | INPUT | ||
lc_otp_program_i.state[237:228] | Yes | Yes | *T183,*T188,*T7 | Yes | T183,T188,T32 | INPUT |
lc_otp_program_i.state[238] | No | No | No | INPUT | ||
lc_otp_program_i.state[249:239] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[250] | No | No | No | INPUT | ||
lc_otp_program_i.state[255:251] | Yes | Yes | *T2,*T7,*T37 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.state[256] | No | No | No | INPUT | ||
lc_otp_program_i.state[258:257] | Yes | Yes | *T7,*T37,T35 | Yes | T37,T32,T33 | INPUT |
lc_otp_program_i.state[260:259] | No | No | No | INPUT | ||
lc_otp_program_i.state[263:261] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[264] | No | No | No | INPUT | ||
lc_otp_program_i.state[265] | Yes | Yes | *T183,*T188 | Yes | T183,T188 | INPUT |
lc_otp_program_i.state[266] | No | No | No | INPUT | ||
lc_otp_program_i.state[273:267] | Yes | Yes | *T7,*T37,*T35 | Yes | T37,T32,T33 | INPUT |
lc_otp_program_i.state[274] | No | No | No | INPUT | ||
lc_otp_program_i.state[275] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.state[276] | No | No | No | INPUT | ||
lc_otp_program_i.state[277] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.state[278] | No | No | No | INPUT | ||
lc_otp_program_i.state[285:279] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[286] | No | No | No | INPUT | ||
lc_otp_program_i.state[306:287] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.state[307] | No | No | No | INPUT | ||
lc_otp_program_i.state[309:308] | Yes | Yes | T2,T7,T37 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.state[310] | No | No | No | INPUT | ||
lc_otp_program_i.state[317:311] | Yes | Yes | *T2,*T7,*T37 | Yes | T37,T24,T32 | INPUT |
lc_otp_program_i.state[318] | No | No | No | INPUT | ||
lc_otp_program_i.state[319] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT |
lc_otp_program_i.req | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T192,T193,T194 | Yes | T192,T193,T194 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T37,T24,T38 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T37,T38,T44 | Yes | T1,T3,T4 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T38,T44,T80 | Yes | T1,T3,T4 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T44,T80,T81 | Yes | T32,T38,T33 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T37,T38,T33 | Yes | T1,T4,T103 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T37,T195,T196 | Yes | T37,T187,T191 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T37,T32,T33 | Yes | T2,T4,T8 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T37,T32,T38 | Yes | T3,T5,T8 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T37,T195,T196 | Yes | T37,T187,T191 | OUTPUT |
otp_lc_data_o.count[0] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[2:1] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT |
otp_lc_data_o.count[3] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[12:4] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[14:13] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[18:15] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[48:20] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[49] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[59:50] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT |
otp_lc_data_o.count[60] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[64:61] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[67:65] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[73:68] | Yes | Yes | *T7,*T186,*T189 | Yes | T187,T154,T190 | OUTPUT |
otp_lc_data_o.count[74] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[84:75] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[85] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[94:86] | Yes | Yes | *T2,*T7,*T24 | Yes | T24,T187,T191 | OUTPUT |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[112:96] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[130:114] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[131] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[135:132] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[136] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[150:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[151] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[152] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[155:153] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[157:156] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT |
otp_lc_data_o.count[158] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[160:159] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT |
otp_lc_data_o.count[161] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[162] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[163] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[170:164] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT |
otp_lc_data_o.count[171] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[182:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[183] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[189:184] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT |
otp_lc_data_o.count[190] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[194:191] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[195] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[201:196] | Yes | Yes | *T32,*T38,*T33 | Yes | T32,T38,T33 | OUTPUT |
otp_lc_data_o.count[202] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[220:203] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[221] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[225:222] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[230:227] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[232:231] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[241:233] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[242] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[243] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[244] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[246:245] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT |
otp_lc_data_o.count[247] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[254:248] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[264:256] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[265] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[275:266] | Yes | Yes | *T32,*T38,*T33 | Yes | T32,T38,T33 | OUTPUT |
otp_lc_data_o.count[276] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[310:277] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[311] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[315:312] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT |
otp_lc_data_o.count[316] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[325:317] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[326] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[329:327] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[330] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[332:331] | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | OUTPUT |
otp_lc_data_o.count[333] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[339:334] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[340] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[344:341] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT |
otp_lc_data_o.count[345] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[347:346] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[348] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350:349] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[353:352] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[357:355] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[359:358] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[362:360] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[363] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[369:364] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[370] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[382:371] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.count[383] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[1:0] | Yes | Yes | T35,T32,T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[2] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[4:3] | Yes | Yes | T35,T32,T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[5] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[11:6] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[12] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[14:13] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[15] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[20:16] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[21] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[23:22] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[24] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[31:25] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.state[32] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[45:33] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[46] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[47] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | OUTPUT |
otp_lc_data_o.state[48] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[57:49] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[58] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[68:59] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[70:69] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[72:71] | Yes | Yes | *T7,*T35,T32 | Yes | T32,T33,T148 | OUTPUT |
otp_lc_data_o.state[73] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[77:74] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | OUTPUT |
otp_lc_data_o.state[78] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[86:79] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | OUTPUT |
otp_lc_data_o.state[87] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[88] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[89] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[92:90] | Yes | Yes | *T35,T32,*T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[93] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[94] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[95] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[128:96] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[129] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[133:130] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[134] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[141:135] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[142] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[145:143] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[147:146] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[149:148] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[150] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[165:151] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[166] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[167] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[168] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[173:169] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[174] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[176:175] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.state[177] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[181:178] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[182] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[188:183] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[191:190] | Yes | Yes | T7,T35,T32 | Yes | T32,T33,T148 | OUTPUT |
otp_lc_data_o.state[192] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[196:193] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | OUTPUT |
otp_lc_data_o.state[197] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[208:198] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[209] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[214:210] | Yes | Yes | T35,T32,T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[215] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[217:216] | Yes | Yes | *T7,*T35,T32 | Yes | T32,T33,T148 | OUTPUT |
otp_lc_data_o.state[218] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[219] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | OUTPUT |
otp_lc_data_o.state[220] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[222:221] | Yes | Yes | *T7,*T35,T32 | Yes | T32,T33,T148 | OUTPUT |
otp_lc_data_o.state[224:223] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[226:225] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[237:228] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.state[238] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[249:239] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[250] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[255:251] | Yes | Yes | *T2,*T7,*T37 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.state[256] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[258:257] | Yes | Yes | *T7,T37,*T35 | Yes | T37,T32,T33 | OUTPUT |
otp_lc_data_o.state[260:259] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[263:261] | Yes | Yes | *T35,T32,*T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[264] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[265] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[273:267] | Yes | Yes | *T7,*T37,*T35 | Yes | T37,T32,T33 | OUTPUT |
otp_lc_data_o.state[274] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[275] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.state[276] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[277] | Yes | Yes | *T32,*T38,*T33 | Yes | T32,T38,T33 | OUTPUT |
otp_lc_data_o.state[278] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[285:279] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT |
otp_lc_data_o.state[286] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[306:287] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[307] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[309:308] | Yes | Yes | *T2,*T7,*T37 | Yes | T37,T24,T32 | OUTPUT |
otp_lc_data_o.state[310] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[317:311] | Yes | Yes | T32,*T38,*T33 | Yes | T1,T3,T4 | OUTPUT |
otp_lc_data_o.state[318] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T44,T80,T81 | Yes | T32,T38,T33 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T37,T195,T196 | Yes | T37,T187,T191 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T80,T81,T197 | Yes | T3,T103,T104 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T37,T195,T196 | Yes | T37,T187,T191 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T44,T80,T81 | Yes | T3,T4,T103 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T146,T198,T199 | Yes | T146,T198,T199 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T146,T200,T198 | Yes | T146,T200,T198 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T201,T202,T203 | Yes | T201,T202,T203 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T146,T198,T199 | Yes | T146,T198,T199 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T146,T200,T198 | Yes | T146,T200,T198 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T202,T203,T204 | Yes | T202,T203,T204 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T205,T172,T173 | Yes | T205,T172,T173 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T205,T172,T173 | Yes | T205,T172,T173 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T2,T104,T65 | Yes | T37,T32,T33 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[23:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[24] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[44:25] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[45] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[117:46] | Yes | Yes | *T209,*T154,*T201 | Yes | T209,T154,T201 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[118] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[193:119] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[194] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[250:195] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[251] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:252] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T33,T80,T148 | Yes | T2,T3,T104 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T186,T147,T187 | Yes | T187,T209,T154 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T2,T39,T20 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T38,T44,T80 | Yes | T1,T3,T4 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9316 | 84.80 |
Total Bits 0->1 | 5493 | 4672 | 85.05 |
Total Bits 1->0 | 5493 | 4644 | 84.54 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9316 | 84.80 |
Port Bits 0->1 | 5493 | 4672 | 85.05 |
Port Bits 1->0 | 5493 | 4644 | 84.54 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
edn_i.edn_fips | No | No | Yes | T172,T173,T174 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T91,*T92,*T93 | Yes | T91,T92,T93 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T36,*T94,*T95 | Yes | T36,T94,T95 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T36,T95,T96 | Yes | T36,T95,T96 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T91,T93,T175 | Yes | T91,T92,T93 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T91,T93,T97 | Yes | T91,T92,T93 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T176,*T177,*T178 | Yes | T176,T177,T178 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T93,T97 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T120,*T37,*T179 | Yes | T120,T37,T179 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T91,*T92,*T93 | Yes | T91,T92,T93 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T91,*T92,*T93 | Yes | T91,T92,T93 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T36,*T94,*T95 | Yes | T36,T94,T95 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T36,T95,T96 | Yes | T36,T95,T96 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T3,T4 | Yes | T1,T3,T4 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T3,T4 | Yes | T38,T44,T80 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T91,T93,T97 | Yes | T92,T93,T97 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T93,T97 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T3,T4 | Yes | T38,T44,T80 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | T93,T97,T180 | Yes | T91,T92,T93 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T91,T92,T93 | Yes | T91,T93,T97 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T3,*T4 | Yes | T38,T44,T80 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T91,T92,T93 | Yes | T91,T92,T93 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T124,T181,T182 | Yes | T124,T181,T182 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T124,T181,T182 | Yes | T124,T181,T182 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T183,T74,T99 | Yes | T183,T74,T99 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T99,T101,T102 | Yes | T99,T101,T102 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T183,T74,T99 | Yes | T183,T74,T99 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T74,T99,T101 | Yes | T74,T99,T101 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T24,T34,T17 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[5:0] | No | No | Yes | T35,T184,T185 | INPUT | ||
lc_otp_vendor_test_i.ctrl[6] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[9:7] | No | No | Yes | T184,T35 | INPUT | ||
lc_otp_vendor_test_i.ctrl[10] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[11] | No | No | Yes | T35 | INPUT | ||
lc_otp_vendor_test_i.ctrl[12] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[16:13] | No | No | Yes | T35,T184,T185 | INPUT | ||
lc_otp_vendor_test_i.ctrl[17] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[27:18] | No | No | Yes | T184,T185,T35 | INPUT | ||
lc_otp_vendor_test_i.ctrl[28] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:29] | No | No | Yes | T35,T184,T185 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[0] | No | No | No | INPUT | |||
lc_otp_program_i.count[2:1] | Yes | Yes | T186,T147,T187 | Yes | T186,T147,T187 | INPUT | |
lc_otp_program_i.count[3] | No | No | No | INPUT | |||
lc_otp_program_i.count[12:4] | Yes | Yes | T186,T147,*T183 | Yes | T186,T147,T183 | INPUT | |
lc_otp_program_i.count[14:13] | No | No | No | INPUT | |||
lc_otp_program_i.count[18:15] | Yes | Yes | T186,T147,*T183 | Yes | T186,T147,T183 | INPUT | |
lc_otp_program_i.count[19] | No | No | No | INPUT | |||
lc_otp_program_i.count[48:20] | Yes | Yes | *T183,*T188,*T186 | Yes | T183,T188,T186 | INPUT | |
lc_otp_program_i.count[49] | No | No | No | INPUT | |||
lc_otp_program_i.count[59:50] | Yes | Yes | T186,T147,T187 | Yes | T186,T147,T187 | INPUT | |
lc_otp_program_i.count[60] | No | No | No | INPUT | |||
lc_otp_program_i.count[64:61] | Yes | Yes | *T183,*T188,*T186 | Yes | T183,T188,T186 | INPUT | |
lc_otp_program_i.count[67:65] | No | No | No | INPUT | |||
lc_otp_program_i.count[73:68] | Yes | Yes | *T7,T186,*T189 | Yes | T187,T154,T190 | INPUT | |
lc_otp_program_i.count[74] | No | No | No | INPUT | |||
lc_otp_program_i.count[84:75] | Yes | Yes | *T7,*T186,*T189 | Yes | T183,T187,T154 | INPUT | |
lc_otp_program_i.count[85] | No | No | No | INPUT | |||
lc_otp_program_i.count[94:86] | Yes | Yes | *T2,*T7,*T24 | Yes | T24,T187,T191 | INPUT | |
lc_otp_program_i.count[95] | No | No | No | INPUT | |||
lc_otp_program_i.count[112:96] | Yes | Yes | *T183,*T188,*T186 | Yes | T183,T188,T186 | INPUT | |
lc_otp_program_i.count[113] | No | No | No | INPUT | |||
lc_otp_program_i.count[130:114] | Yes | Yes | *T183,*T188,*T186 | Yes | T183,T188,T186 | INPUT | |
lc_otp_program_i.count[131] | No | No | No | INPUT | |||
lc_otp_program_i.count[135:132] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[136] | No | No | No | INPUT | |||
lc_otp_program_i.count[150:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[151] | No | No | No | INPUT | |||
lc_otp_program_i.count[152] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT | |
lc_otp_program_i.count[155:153] | No | No | No | INPUT | |||
lc_otp_program_i.count[157:156] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT | |
lc_otp_program_i.count[158] | No | No | No | INPUT | |||
lc_otp_program_i.count[160:159] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT | |
lc_otp_program_i.count[161] | No | No | No | INPUT | |||
lc_otp_program_i.count[162] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT | |
lc_otp_program_i.count[163] | No | No | No | INPUT | |||
lc_otp_program_i.count[170:164] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT | |
lc_otp_program_i.count[171] | No | No | No | INPUT | |||
lc_otp_program_i.count[182:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[183] | No | No | No | INPUT | |||
lc_otp_program_i.count[189:184] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT | |
lc_otp_program_i.count[190] | No | No | No | INPUT | |||
lc_otp_program_i.count[194:191] | Yes | Yes | *T183,*T188,*T1 | Yes | T183,T188,T37 | INPUT | |
lc_otp_program_i.count[195] | No | No | No | INPUT | |||
lc_otp_program_i.count[201:196] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[202] | No | No | No | INPUT | |||
lc_otp_program_i.count[220:203] | Yes | Yes | *T183,*T188,*T1 | Yes | T183,T188,T37 | INPUT | |
lc_otp_program_i.count[221] | No | No | No | INPUT | |||
lc_otp_program_i.count[225:222] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[226] | No | No | No | INPUT | |||
lc_otp_program_i.count[230:227] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[232:231] | No | No | No | INPUT | |||
lc_otp_program_i.count[241:233] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT | |
lc_otp_program_i.count[242] | No | No | No | INPUT | |||
lc_otp_program_i.count[243] | Yes | Yes | *T183,*T188 | Yes | T183,T188 | INPUT | |
lc_otp_program_i.count[244] | No | No | No | INPUT | |||
lc_otp_program_i.count[246:245] | Yes | Yes | T186,T147,T187 | Yes | T186,T147,T187 | INPUT | |
lc_otp_program_i.count[247] | No | No | No | INPUT | |||
lc_otp_program_i.count[254:248] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT | |
lc_otp_program_i.count[255] | No | No | No | INPUT | |||
lc_otp_program_i.count[264:256] | Yes | Yes | *T183,*T188,*T1 | Yes | T183,T188,T37 | INPUT | |
lc_otp_program_i.count[265] | No | No | No | INPUT | |||
lc_otp_program_i.count[275:266] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[276] | No | No | No | INPUT | |||
lc_otp_program_i.count[310:277] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT | |
lc_otp_program_i.count[311] | No | No | No | INPUT | |||
lc_otp_program_i.count[315:312] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT | |
lc_otp_program_i.count[316] | No | No | No | INPUT | |||
lc_otp_program_i.count[325:317] | Yes | Yes | *T183,*T188,*T186 | Yes | T183,T188,T186 | INPUT | |
lc_otp_program_i.count[326] | No | No | No | INPUT | |||
lc_otp_program_i.count[329:327] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[330] | No | No | No | INPUT | |||
lc_otp_program_i.count[332:331] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[333] | No | No | No | INPUT | |||
lc_otp_program_i.count[339:334] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[340] | No | No | No | INPUT | |||
lc_otp_program_i.count[344:341] | Yes | Yes | *T186,*T147,*T187 | Yes | T186,T147,T187 | INPUT | |
lc_otp_program_i.count[345] | No | No | No | INPUT | |||
lc_otp_program_i.count[347:346] | Yes | Yes | T186,T147,T183 | Yes | T186,T147,T183 | INPUT | |
lc_otp_program_i.count[348] | No | No | No | INPUT | |||
lc_otp_program_i.count[350:349] | Yes | Yes | T186,T147,T183 | Yes | T186,T147,T183 | INPUT | |
lc_otp_program_i.count[351] | No | No | No | INPUT | |||
lc_otp_program_i.count[353:352] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[354] | No | No | No | INPUT | |||
lc_otp_program_i.count[357:355] | Yes | Yes | *T183,*T188,*T1 | Yes | T183,T188,T37 | INPUT | |
lc_otp_program_i.count[359:358] | No | No | No | INPUT | |||
lc_otp_program_i.count[362:360] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT | |
lc_otp_program_i.count[363] | No | No | No | INPUT | |||
lc_otp_program_i.count[369:364] | Yes | Yes | *T186,*T147,*T183 | Yes | T186,T147,T183 | INPUT | |
lc_otp_program_i.count[370] | No | No | No | INPUT | |||
lc_otp_program_i.count[382:371] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.count[383] | No | No | No | INPUT | |||
lc_otp_program_i.state[1:0] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[2] | No | No | No | INPUT | |||
lc_otp_program_i.state[4:3] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[5] | No | No | No | INPUT | |||
lc_otp_program_i.state[11:6] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[12] | No | No | No | INPUT | |||
lc_otp_program_i.state[14:13] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[15] | No | No | No | INPUT | |||
lc_otp_program_i.state[20:16] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[21] | No | No | No | INPUT | |||
lc_otp_program_i.state[23:22] | Yes | Yes | T7,T35,T32 | Yes | T32,T183,T187 | INPUT | |
lc_otp_program_i.state[24] | No | No | No | INPUT | |||
lc_otp_program_i.state[31:25] | Yes | Yes | *T183,*T188,*T7 | Yes | T183,T188,T32 | INPUT | |
lc_otp_program_i.state[32] | No | No | No | INPUT | |||
lc_otp_program_i.state[45:33] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[46] | No | No | No | INPUT | |||
lc_otp_program_i.state[47] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[48] | No | No | No | INPUT | |||
lc_otp_program_i.state[57:49] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[58] | No | No | No | INPUT | |||
lc_otp_program_i.state[68:59] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[70:69] | No | No | No | INPUT | |||
lc_otp_program_i.state[72:71] | Yes | Yes | *T7,T35,T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[73] | No | No | No | INPUT | |||
lc_otp_program_i.state[77:74] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[78] | No | No | No | INPUT | |||
lc_otp_program_i.state[86:79] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[87] | No | No | No | INPUT | |||
lc_otp_program_i.state[88] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[89] | No | No | No | INPUT | |||
lc_otp_program_i.state[92:90] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[93] | No | No | No | INPUT | |||
lc_otp_program_i.state[94] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[95] | No | No | No | INPUT | |||
lc_otp_program_i.state[128:96] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[129] | No | No | No | INPUT | |||
lc_otp_program_i.state[133:130] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[134] | No | No | No | INPUT | |||
lc_otp_program_i.state[141:135] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[142] | No | No | No | INPUT | |||
lc_otp_program_i.state[145:143] | Yes | Yes | *T7,T35,T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[147:146] | No | No | No | INPUT | |||
lc_otp_program_i.state[149:148] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[150] | No | No | No | INPUT | |||
lc_otp_program_i.state[165:151] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[166] | No | No | No | INPUT | |||
lc_otp_program_i.state[167] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[168] | No | No | No | INPUT | |||
lc_otp_program_i.state[173:169] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[174] | No | No | No | INPUT | |||
lc_otp_program_i.state[176:175] | Yes | Yes | *T183,*T188,*T35 | Yes | T183,T188,T32 | INPUT | |
lc_otp_program_i.state[177] | No | No | No | INPUT | |||
lc_otp_program_i.state[181:178] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[182] | No | No | No | INPUT | |||
lc_otp_program_i.state[188:183] | Yes | Yes | *T183,*T188,*T7 | Yes | T183,T188,T32 | INPUT | |
lc_otp_program_i.state[189] | No | No | No | INPUT | |||
lc_otp_program_i.state[191:190] | Yes | Yes | T7,T35,T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[192] | No | No | No | INPUT | |||
lc_otp_program_i.state[196:193] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[197] | No | No | No | INPUT | |||
lc_otp_program_i.state[208:198] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[209] | No | No | No | INPUT | |||
lc_otp_program_i.state[214:210] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[215] | No | No | No | INPUT | |||
lc_otp_program_i.state[217:216] | Yes | Yes | T7,T35,T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[218] | No | No | No | INPUT | |||
lc_otp_program_i.state[219] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[220] | No | No | No | INPUT | |||
lc_otp_program_i.state[222:221] | Yes | Yes | *T7,T35,T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[224:223] | No | No | No | INPUT | |||
lc_otp_program_i.state[226:225] | Yes | Yes | T7,T35,T32 | Yes | T32,T33,T148 | INPUT | |
lc_otp_program_i.state[227] | No | No | No | INPUT | |||
lc_otp_program_i.state[237:228] | Yes | Yes | *T183,*T188,*T7 | Yes | T183,T188,T32 | INPUT | |
lc_otp_program_i.state[238] | No | No | No | INPUT | |||
lc_otp_program_i.state[249:239] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[250] | No | No | No | INPUT | |||
lc_otp_program_i.state[255:251] | Yes | Yes | *T2,*T7,*T37 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.state[256] | No | No | No | INPUT | |||
lc_otp_program_i.state[258:257] | Yes | Yes | *T7,*T37,T35 | Yes | T37,T32,T33 | INPUT | |
lc_otp_program_i.state[260:259] | No | No | No | INPUT | |||
lc_otp_program_i.state[263:261] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[264] | No | No | No | INPUT | |||
lc_otp_program_i.state[265] | Yes | Yes | *T183,*T188 | Yes | T183,T188 | INPUT | |
lc_otp_program_i.state[266] | No | No | No | INPUT | |||
lc_otp_program_i.state[273:267] | Yes | Yes | *T7,*T37,*T35 | Yes | T37,T32,T33 | INPUT | |
lc_otp_program_i.state[274] | No | No | No | INPUT | |||
lc_otp_program_i.state[275] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.state[276] | No | No | No | INPUT | |||
lc_otp_program_i.state[277] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.state[278] | No | No | No | INPUT | |||
lc_otp_program_i.state[285:279] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[286] | No | No | No | INPUT | |||
lc_otp_program_i.state[306:287] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.state[307] | No | No | No | INPUT | |||
lc_otp_program_i.state[309:308] | Yes | Yes | T2,T7,T37 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.state[310] | No | No | No | INPUT | |||
lc_otp_program_i.state[317:311] | Yes | Yes | *T2,*T7,*T37 | Yes | T37,T24,T32 | INPUT | |
lc_otp_program_i.state[318] | No | No | No | INPUT | |||
lc_otp_program_i.state[319] | Yes | Yes | T35,T32,T186 | Yes | T32,T186,T147 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T192,T193,T194 | Yes | T192,T193,T194 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T37,T24,T38 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T37,T38,T44 | Yes | T1,T3,T4 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T38,T44,T80 | Yes | T1,T3,T4 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T44,T80,T81 | Yes | T32,T38,T33 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T37,T38,T33 | Yes | T1,T4,T103 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T37,T195,T196 | Yes | T37,T187,T191 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T37,T32,T33 | Yes | T2,T4,T8 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T37,T32,T38 | Yes | T3,T5,T8 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T37,T195,T196 | Yes | T37,T187,T191 | OUTPUT | |
otp_lc_data_o.count[0] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[2:1] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT | |
otp_lc_data_o.count[3] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[12:4] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[14:13] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[18:15] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[19] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[48:20] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[49] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[59:50] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT | |
otp_lc_data_o.count[60] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[64:61] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[67:65] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[73:68] | Yes | Yes | *T7,*T186,*T189 | Yes | T187,T154,T190 | OUTPUT | |
otp_lc_data_o.count[74] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[84:75] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[85] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[94:86] | Yes | Yes | *T2,*T7,*T24 | Yes | T24,T187,T191 | OUTPUT | |
otp_lc_data_o.count[95] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[112:96] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[130:114] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[131] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[135:132] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[136] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[150:137] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[151] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[152] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[155:153] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[157:156] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT | |
otp_lc_data_o.count[158] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[160:159] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT | |
otp_lc_data_o.count[161] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[162] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[163] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[170:164] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT | |
otp_lc_data_o.count[171] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[182:172] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[183] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[189:184] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT | |
otp_lc_data_o.count[190] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[194:191] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[195] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[201:196] | Yes | Yes | *T32,*T38,*T33 | Yes | T32,T38,T33 | OUTPUT | |
otp_lc_data_o.count[202] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[220:203] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[221] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[225:222] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[230:227] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[232:231] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[241:233] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[242] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[243] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[244] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[246:245] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT | |
otp_lc_data_o.count[247] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[254:248] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT | |
otp_lc_data_o.count[255] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[264:256] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[265] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[275:266] | Yes | Yes | *T32,*T38,*T33 | Yes | T32,T38,T33 | OUTPUT | |
otp_lc_data_o.count[276] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[310:277] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[311] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[315:312] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT | |
otp_lc_data_o.count[316] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[325:317] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[326] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[329:327] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[330] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[332:331] | Yes | Yes | T32,T38,T33 | Yes | T32,T38,T33 | OUTPUT | |
otp_lc_data_o.count[333] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[339:334] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[340] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[344:341] | Yes | Yes | *T186,*T147,*T187 | Yes | T187,T190,T176 | OUTPUT | |
otp_lc_data_o.count[345] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[347:346] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[348] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350:349] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[353:352] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[354] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[357:355] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[359:358] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[362:360] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[363] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[369:364] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[370] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[382:371] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.count[383] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[1:0] | Yes | Yes | T35,T32,T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[2] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[4:3] | Yes | Yes | T35,T32,T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[5] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[11:6] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[12] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[14:13] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[15] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[20:16] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[21] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[23:22] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[24] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[31:25] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.state[32] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[45:33] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[46] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[47] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | OUTPUT | |
otp_lc_data_o.state[48] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[57:49] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[58] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[68:59] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[70:69] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[72:71] | Yes | Yes | *T7,*T35,T32 | Yes | T32,T33,T148 | OUTPUT | |
otp_lc_data_o.state[73] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[77:74] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | OUTPUT | |
otp_lc_data_o.state[78] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[86:79] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | OUTPUT | |
otp_lc_data_o.state[87] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[88] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[89] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[92:90] | Yes | Yes | *T35,T32,*T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[93] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[94] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[95] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[128:96] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[129] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[133:130] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[134] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[141:135] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[142] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[145:143] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[147:146] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[149:148] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[150] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[165:151] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[166] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[167] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[168] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[173:169] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[174] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[176:175] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.state[177] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[181:178] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[182] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[188:183] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.state[189] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[191:190] | Yes | Yes | T7,T35,T32 | Yes | T32,T33,T148 | OUTPUT | |
otp_lc_data_o.state[192] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[196:193] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | OUTPUT | |
otp_lc_data_o.state[197] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[208:198] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[209] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[214:210] | Yes | Yes | T35,T32,T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[215] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[217:216] | Yes | Yes | *T7,*T35,T32 | Yes | T32,T33,T148 | OUTPUT | |
otp_lc_data_o.state[218] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[219] | Yes | Yes | *T7,*T35,*T32 | Yes | T32,T33,T148 | OUTPUT | |
otp_lc_data_o.state[220] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[222:221] | Yes | Yes | *T7,*T35,T32 | Yes | T32,T33,T148 | OUTPUT | |
otp_lc_data_o.state[224:223] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[226:225] | Yes | Yes | *T37,*T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[227] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[237:228] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.state[238] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[249:239] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[250] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[255:251] | Yes | Yes | *T2,*T7,*T37 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.state[256] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[258:257] | Yes | Yes | *T7,T37,*T35 | Yes | T37,T32,T33 | OUTPUT | |
otp_lc_data_o.state[260:259] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[263:261] | Yes | Yes | *T35,T32,*T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[264] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[265] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.state[266] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[273:267] | Yes | Yes | *T7,*T37,*T35 | Yes | T37,T32,T33 | OUTPUT | |
otp_lc_data_o.state[274] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[275] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.state[276] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[277] | Yes | Yes | *T32,*T38,*T33 | Yes | T32,T38,T33 | OUTPUT | |
otp_lc_data_o.state[278] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[285:279] | Yes | Yes | *T35,*T32,*T186 | Yes | T32,T187,T190 | OUTPUT | |
otp_lc_data_o.state[286] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[306:287] | Yes | Yes | *T37,*T24,*T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[307] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[309:308] | Yes | Yes | *T2,*T7,*T37 | Yes | T37,T24,T32 | OUTPUT | |
otp_lc_data_o.state[310] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[317:311] | Yes | Yes | T32,*T38,*T33 | Yes | T1,T3,T4 | OUTPUT | |
otp_lc_data_o.state[318] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T44,T80,T81 | Yes | T32,T38,T33 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T37,T195,T196 | Yes | T37,T187,T191 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T80,T81,T197 | Yes | T3,T103,T104 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T37,T195,T196 | Yes | T37,T187,T191 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T44,T80,T81 | Yes | T3,T4,T103 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T146,T198,T199 | Yes | T146,T198,T199 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T146,T200,T198 | Yes | T146,T200,T198 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T201,T202,T203 | Yes | T201,T202,T203 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T146,T198,T199 | Yes | T146,T198,T199 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T146,T200,T198 | Yes | T146,T200,T198 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T202,T203,T204 | Yes | T202,T203,T204 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T205,T172,T173 | Yes | T205,T172,T173 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T37,T24,T38 | Yes | T2,T3,T4 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T103,T104,T55 | Yes | T2,T4,T103 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T2,T4,T104 | Yes | T4,T6,T120 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T205,T172,T173 | Yes | T205,T172,T173 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T2,T104,T65 | Yes | T37,T32,T33 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[23:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[24] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[44:25] | Yes | Yes | *T206,*T207,*T208 | Yes | T206,T207,T208 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[45] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[117:46] | Yes | Yes | *T209,*T154,*T201 | Yes | T209,T154,T201 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[118] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[193:119] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[194] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[250:195] | Yes | Yes | *T1,*T2,*T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[251] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:252] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T33,T80,T148 | Yes | T2,T3,T104 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T37,T24,T32 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T186,T147,T187 | Yes | T187,T209,T154 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T37,T24,T32 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T38,T44,T80 | Yes | T1,T3,T4 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |