CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 396645 | 1 | T96 | 1 | T99 | 246 | T248 | 2 | ||||
rising | 396736 | 1 | T96 | 1 | T99 | 246 | T248 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1090025 | 1 | T96 | 2 | T99 | 1016 | T248 | 4 | ||||
auto[1] | 9244361 | 1 | T94 | 202 | T95 | 258 | T96 | 1722 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 337310 | 1 | T99 | 246 | T278 | 249 | T279 | 87 | ||||
rising | 337374 | 1 | T99 | 246 | T278 | 248 | T279 | 87 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1202408 | 1 | T99 | 1042 | T278 | 1060 | T279 | 176 | ||||
auto[1] | 9951929 | 1 | T94 | 382 | T95 | 400 | T96 | 1896 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 688115 | 1 | T99 | 514 | T278 | 419 | T279 | 113 | ||||
rising | 688207 | 1 | T99 | 514 | T278 | 418 | T279 | 113 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1099163 | 1 | T99 | 1024 | T278 | 856 | T279 | 123 | ||||
auto[1] | 9341723 | 1 | T94 | 392 | T95 | 284 | T96 | 1634 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6121 | 1 | T278 | 1 | T443 | 1 | T452 | 1 | ||||
rising | 6155 | 1 | T278 | 1 | T443 | 1 | T452 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 166967 | 1 | T94 | 2 | T95 | 1 | T96 | 34 | ||||
auto[1] | 11716 | 1 | T278 | 3 | T443 | 1 | T452 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4396 | 1 | T443 | 2 | T548 | 1 | T446 | 1 | ||||
rising | 4422 | 1 | T443 | 2 | T548 | 1 | T446 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 179859 | 1 | T94 | 10 | T95 | 3 | T96 | 36 | ||||
auto[1] | 6286 | 1 | T443 | 2 | T548 | 1 | T446 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2465 | 1 | T96 | 1 | T443 | 1 | T448 | 1 | ||||
rising | 2489 | 1 | T96 | 1 | T443 | 1 | T452 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169701 | 1 | T94 | 6 | T95 | 6 | T96 | 45 | ||||
auto[1] | 2645 | 1 | T96 | 1 | T443 | 1 | T452 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5587 | 1 | T443 | 1 | T452 | 1 | T544 | 1 | ||||
rising | 5636 | 1 | T443 | 1 | T452 | 1 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 163868 | 1 | T94 | 3 | T95 | 10 | T96 | 35 | ||||
auto[1] | 13559 | 1 | T443 | 1 | T452 | 1 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 3202 | 1 | T443 | 1 | T544 | 1 | T447 | 1 | ||||
rising | 3227 | 1 | T443 | 1 | T544 | 1 | T447 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 171708 | 1 | T94 | 3 | T95 | 10 | T96 | 21 | ||||
auto[1] | 3574 | 1 | T443 | 1 | T544 | 1 | T447 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6037 | 1 | T278 | 1 | T443 | 1 | T545 | 1 | ||||
rising | 6077 | 1 | T278 | 1 | T443 | 1 | T545 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 166569 | 1 | T94 | 5 | T95 | 5 | T96 | 26 | ||||
auto[1] | 11234 | 1 | T278 | 2 | T443 | 1 | T545 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4506 | 1 | T443 | 2 | T452 | 1 | T543 | 137 | ||||
rising | 4534 | 1 | T443 | 2 | T452 | 1 | T543 | 138 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 175166 | 1 | T94 | 7 | T95 | 3 | T96 | 34 | ||||
auto[1] | 8193 | 1 | T443 | 2 | T452 | 1 | T543 | 177 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6337 | 1 | T443 | 3 | T548 | 1 | T544 | 2 | ||||
rising | 6372 | 1 | T443 | 3 | T548 | 1 | T544 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177783 | 1 | T94 | 10 | T95 | 3 | T96 | 40 | ||||
auto[1] | 12907 | 1 | T443 | 3 | T548 | 1 | T544 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6014 | 1 | T278 | 1 | T443 | 1 | T546 | 1 | ||||
rising | 6054 | 1 | T278 | 1 | T443 | 1 | T546 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184481 | 1 | T94 | 12 | T95 | 4 | T96 | 30 | ||||
auto[1] | 11607 | 1 | T278 | 1 | T443 | 1 | T546 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5460 | 1 | T443 | 1 | T452 | 1 | T546 | 2 | ||||
rising | 5495 | 1 | T443 | 1 | T452 | 1 | T546 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 188759 | 1 | T94 | 7 | T95 | 3 | T96 | 37 | ||||
auto[1] | 8158 | 1 | T443 | 1 | T452 | 1 | T546 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4698 | 1 | T443 | 1 | T545 | 1 | T450 | 40 | ||||
rising | 4733 | 1 | T443 | 1 | T545 | 1 | T450 | 40 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 188352 | 1 | T94 | 3 | T95 | 5 | T96 | 26 | ||||
auto[1] | 5825 | 1 | T443 | 1 | T545 | 1 | T450 | 42 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 13854 | 1 | T278 | 4 | T443 | 12 | T545 | 1 | ||||
rising | 13879 | 1 | T278 | 4 | T443 | 12 | T545 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 1430764 | 1 | T94 | 39 | T95 | 56 | T96 | 283 | ||||
auto[1] | 14460 | 1 | T278 | 4 | T443 | 12 | T545 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6088 | 1 | T278 | 1 | T443 | 1 | T451 | 2 | ||||
rising | 6131 | 1 | T278 | 1 | T443 | 1 | T451 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 172226 | 1 | T94 | 3 | T95 | 7 | T96 | 25 | ||||
auto[1] | 13108 | 1 | T278 | 1 | T443 | 1 | T451 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6527 | 1 | T452 | 1 | T450 | 19 | T543 | 82 | ||||
rising | 6574 | 1 | T452 | 1 | T451 | 1 | T450 | 19 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 163631 | 1 | T94 | 2 | T95 | 8 | T96 | 35 | ||||
auto[1] | 15915 | 1 | T452 | 1 | T451 | 1 | T450 | 20 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2252 | 1 | T544 | 1 | T540 | 2 | T543 | 15 | ||||
rising | 2273 | 1 | T544 | 1 | T540 | 2 | T543 | 15 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182149 | 1 | T94 | 8 | T95 | 9 | T96 | 40 | ||||
auto[1] | 2375 | 1 | T544 | 1 | T540 | 2 | T543 | 15 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6401 | 1 | T452 | 1 | T446 | 7 | T547 | 2 | ||||
rising | 6448 | 1 | T452 | 1 | T446 | 7 | T547 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 168627 | 1 | T94 | 7 | T95 | 8 | T96 | 30 | ||||
auto[1] | 11529 | 1 | T452 | 1 | T446 | 7 | T547 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6146 | 1 | T443 | 1 | T444 | 1 | T447 | 1 | ||||
rising | 6184 | 1 | T443 | 1 | T444 | 1 | T447 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178886 | 1 | T94 | 1 | T95 | 3 | T96 | 40 | ||||
auto[1] | 10247 | 1 | T443 | 1 | T444 | 1 | T447 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 7128 | 1 | T96 | 1 | T451 | 1 | T548 | 1 | ||||
rising | 7170 | 1 | T96 | 1 | T451 | 1 | T548 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 180496 | 1 | T94 | 2 | T95 | 7 | T96 | 37 | ||||
auto[1] | 12783 | 1 | T96 | 1 | T451 | 1 | T548 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4979 | 1 | T452 | 1 | T546 | 2 | T544 | 1 | ||||
rising | 5004 | 1 | T452 | 1 | T546 | 2 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 182785 | 1 | T94 | 9 | T95 | 5 | T96 | 31 | ||||
auto[1] | 7345 | 1 | T452 | 1 | T546 | 2 | T544 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2411 | 1 | T278 | 1 | T443 | 1 | T546 | 1 | ||||
rising | 2437 | 1 | T278 | 1 | T443 | 1 | T451 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184866 | 1 | T94 | 7 | T95 | 3 | T96 | 35 | ||||
auto[1] | 2576 | 1 | T278 | 1 | T443 | 1 | T451 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6161 | 1 | T545 | 1 | T548 | 2 | T444 | 1 | ||||
rising | 6189 | 1 | T545 | 1 | T548 | 2 | T444 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 177311 | 1 | T94 | 5 | T95 | 4 | T96 | 31 | ||||
auto[1] | 8733 | 1 | T545 | 1 | T548 | 3 | T444 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 41889 | 1 | T401 | 1875 | T402 | 1162 | T562 | 587 | ||||
rising | 41897 | 1 | T401 | 1876 | T402 | 1163 | T562 | 588 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 92143 | 1 | T401 | 4181 | T402 | 2410 | T562 | 1327 | ||||
auto[1] | 81165 | 1 | T401 | 3576 | T402 | 2321 | T562 | 1137 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 24648 | 1 | T401 | 1138 | T402 | 621 | T562 | 355 | ||||
rising | 24644 | 1 | T401 | 1137 | T402 | 621 | T562 | 355 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 142156 | 1 | T401 | 6282 | T402 | 3995 | T562 | 2002 | ||||
auto[1] | 31152 | 1 | T401 | 1475 | T402 | 736 | T562 | 462 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 24648 | 1 | T401 | 1138 | T402 | 621 | T562 | 355 | ||||
rising | 24644 | 1 | T401 | 1137 | T402 | 621 | T562 | 355 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 142156 | 1 | T401 | 6282 | T402 | 3995 | T562 | 2002 | ||||
auto[1] | 31152 | 1 | T401 | 1475 | T402 | 736 | T562 | 462 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 4470 | 1 | T401 | 204 | T402 | 27 | T562 | 76 | ||||
rising | 4459 | 1 | T401 | 204 | T402 | 26 | T562 | 76 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 167313 | 1 | T401 | 7483 | T402 | 4704 | T562 | 2369 | ||||
auto[1] | 5995 | 1 | T401 | 274 | T402 | 27 | T562 | 95 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 111685 | 1 | T402 | 2 | T182 | 295 | T183 | 282 | ||||
rising | 111707 | 1 | T402 | 2 | T182 | 295 | T183 | 283 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 37435282 | 1 | T1 | 353 | T2 | 4272 | T3 | 6898 | ||||
auto[1] | 604231 | 1 | T402 | 2 | T182 | 383 | T183 | 368 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 42510 | 1 | T401 | 1888 | T402 | 1151 | T562 | 590 | ||||
rising | 42508 | 1 | T401 | 1888 | T402 | 1151 | T562 | 590 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 92077 | 1 | T401 | 4130 | T402 | 2406 | T562 | 1337 | ||||
auto[1] | 81231 | 1 | T401 | 3627 | T402 | 2325 | T562 | 1127 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 36460 | 1 | T401 | 1642 | T402 | 996 | T562 | 524 | ||||
rising | 36470 | 1 | T401 | 1642 | T402 | 996 | T562 | 524 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 121048 | 1 | T401 | 5377 | T402 | 3309 | T562 | 1714 | ||||
auto[1] | 52260 | 1 | T401 | 2380 | T402 | 1422 | T562 | 750 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2276 | 1 | T278 | 1 | T443 | 2 | T544 | 3 | ||||
rising | 2301 | 1 | T278 | 1 | T443 | 2 | T544 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 184404 | 1 | T94 | 7 | T95 | 5 | T96 | 37 | ||||
auto[1] | 2406 | 1 | T278 | 1 | T443 | 2 | T544 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2808 | 1 | T443 | 2 | T446 | 5 | T553 | 2 | ||||
rising | 2834 | 1 | T443 | 2 | T451 | 1 | T546 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 180457 | 1 | T94 | 8 | T95 | 6 | T96 | 30 | ||||
auto[1] | 2983 | 1 | T443 | 2 | T451 | 1 | T546 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5989 | 1 | T443 | 1 | T548 | 1 | T432 | 1 | ||||
rising | 6046 | 1 | T278 | 1 | T443 | 1 | T548 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 170606 | 1 | T94 | 6 | T95 | 4 | T96 | 39 | ||||
auto[1] | 19265 | 1 | T278 | 1 | T443 | 1 | T548 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 5482 | 1 | T278 | 1 | T443 | 1 | T548 | 1 | ||||
rising | 5528 | 1 | T278 | 1 | T443 | 1 | T548 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 162600 | 1 | T94 | 7 | T95 | 8 | T96 | 32 | ||||
auto[1] | 11752 | 1 | T278 | 1 | T443 | 1 | T548 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 2547 | 1 | T452 | 1 | T548 | 3 | T544 | 1 | ||||
rising | 2569 | 1 | T452 | 1 | T548 | 3 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 178142 | 1 | T94 | 3 | T95 | 9 | T96 | 39 | ||||
auto[1] | 2699 | 1 | T452 | 1 | T548 | 3 | T544 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6439 | 1 | T278 | 1 | T545 | 1 | T546 | 1 | ||||
rising | 6475 | 1 | T278 | 1 | T545 | 1 | T546 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 168411 | 1 | T94 | 3 | T95 | 5 | T96 | 35 | ||||
auto[1] | 12464 | 1 | T278 | 1 | T545 | 1 | T546 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
falling | 6359 | 1 | T432 | 1 | T547 | 2 | T600 | 117 | ||||
rising | 6390 | 1 | T432 | 1 | T547 | 2 | T600 | 117 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 169498 | 1 | T94 | 5 | T95 | 7 | T96 | 33 | ||||
auto[1] | 12358 | 1 | T432 | 1 | T547 | 2 | T600 | 155 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |