Testbench Group List
dashboard | hierarchy | modlist | groups | tests | asserts
Total Groups Coverage Summary 
COVEREDEXPECTEDSCORECOVEREDEXPECTEDINST SCOREWEIGHT
8471 8511 99.53 8471 8511 99.53 1


Total groups in report: 65
NAMECOVEREDEXPECTEDSCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSINGCOMMENT
tb.dut.top_earlgrey.u_otbn.u_otbn_core.u_otbn_rf_base.gen_rf_base_ff.u_otbn_rf_base_inner.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_with_addr_fault_if_proxy::onehot_with_addr_fault_cg 0 3 0.00 0.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_otbn.u_otbn_core.u_otbn_rf_bignum.gen_rf_bignum_ff.u_otbn_rf_bignum_inner.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_with_addr_fault_if_proxy::onehot_with_addr_fault_cg 0 3 0.00 0.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_rv_core_ibex.u_core.gen_regfile_ff.register_file_i.gen_rdata_mux_check.u_prim_onehot_check_raddr_a.u_prim_onehot_check_if::prim_onehot_check_with_addr_fault_if_proxy::onehot_with_addr_fault_cg 0 3 0.00 0.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_rv_core_ibex.u_core.gen_regfile_ff.register_file_i.gen_rdata_mux_check.u_prim_onehot_check_raddr_b.u_prim_onehot_check_if::prim_onehot_check_with_addr_fault_if_proxy::onehot_with_addr_fault_cg 0 3 0.00 0.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_rv_core_ibex.u_core.gen_regfile_ff.register_file_i.gen_wren_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_with_addr_fault_if_proxy::onehot_with_addr_fault_cg 0 3 0.00 0.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_alert_handler.u_reg_wrap.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 0 2 0.00 0.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_lc_ctrl.u_reg_tap.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 0 2 0.00 0.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_otp_ctrl.u_otp.gen_generic.u_impl_generic.u_reg_top.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 0 2 0.00 0.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_sram_ctrl_ret_aon.u_reg_regs.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 0 2 0.00 0.00 1 100 1 1 64 64
tb.dut.u_ast.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 0 2 0.00 0.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_adc_ctrl_aon.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_csrng.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_flash_ctrl.u_eflash.u_flash.gen_generic.u_impl_generic.u_reg_top.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_flash_ctrl.u_reg_core.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_gpio.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_i2c2.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_lc_ctrl.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_pwm_aon.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_pwrmgr_aon.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_rv_plic.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_spi_device.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_uart1.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 1 2 50.00 50.00 1 100 1 1 64 64
cip_base_pkg::tl_errors_cg_wrap::tl_errors_cg 12 15 80.00 80.00 1 100 1 1 64 64
alert_esc_agent_pkg::alert_handshake_complete_cg 3 3 100.00 100.00 1 100 1 1 64 64
chip_env_pkg::chip_alert_cg_wrap::alert_cg 1 1 100.00 100.00 1 100 1 1 64 64
dv_lib_pkg::bit_toggle_cg_wrap::bit_toggle_cg 4 4 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_aes.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_aon_timer_aon.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_clkmgr_aon.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_edn0.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_edn1.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_entropy_src.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_hmac.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_i2c0.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_i2c1.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_keymgr.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_kmac.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_otbn.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_otp_ctrl.u_reg_core.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_pattgen.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_pinmux_aon.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_rom_ctrl.u_reg_regs.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_rstmgr_aon.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_rv_core_ibex.u_reg_cfg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_rv_dm.u_reg_regs.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_rv_timer.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_sensor_ctrl_aon.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_spi_host0.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_spi_host1.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_sram_ctrl_main.u_reg_regs.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_sysrst_ctrl_aon.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_uart0.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_uart2.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_uart3.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tb.dut.top_earlgrey.u_usbdev.u_reg.u_prim_reg_we_check.u_prim_onehot_check.u_prim_onehot_check_if::prim_onehot_check_without_addr_fault_if_proxy::onehot_without_addr_fault_cg 2 2 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=128} 128 128 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=192} 192 192 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=3} 3 3 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::max_outstanding_cg::SHAPE{max_outstanding=64} 64 64 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::pending_req_on_rst_cg 2 2 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=32} 41 41 100.00 100.00 1 100 1 1 64 64
tl_agent_pkg::tl_d_chan_cov_cg 5 5 100.00 100.00 1 100 1 1 64 64
xbar_env_pkg::max_delay_cg_obj::max_delay_cg 6 6 100.00 100.00 1 100 1 1 64 64
xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=49} 50 50 100.00 1 100 1 0 64 64
xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63} 64 64 100.00 1 100 1 0 64 64
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%