Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	132719	1			T98	6		T99	6		T100	70
values[2]	7937	1			T100	4		T161	1		T457	7
values[3]	3262	1			T457	7		T562	104		T459	48
values[4]	2070	1			T457	5		T562	80		T459	32
values[5]	1319	1			T457	6		T562	61		T459	16
values[6]	932	1			T457	10		T562	31		T459	11
values[7]	726	1			T457	5		T562	19		T459	9
values[8]	568	1			T457	3		T562	6		T459	2
values[9]	491	1			T457	3		T562	1		T459	18
values[10]	436	1			T457	10		T459	7		T653	13
values[11]	395	1			T457	10		T459	6		T653	14
values[12]	449	1			T457	12		T459	5		T653	27
values[13]	397	1			T457	3		T459	5		T653	19
values[14]	459	1			T457	20		T459	6		T653	26
values[15]	429	1			T457	5		T459	11		T653	18
values[16]	412	1			T457	11		T459	9		T653	12
values[17]	416	1			T457	12		T459	10		T653	20
values[18]	412	1			T457	4		T459	6		T653	12
values[19]	421	1			T457	12		T459	11		T653	9
values[20]	398	1			T457	4		T459	12		T653	19
values[21]	411	1			T457	12		T459	5		T653	12
values[22]	401	1			T457	7		T459	8		T653	9
values[23]	432	1			T457	6		T459	5		T653	17
values[24]	371	1			T457	6		T459	3		T653	9
values[25]	409	1			T457	6		T459	13		T653	9
values[26]	419	1			T457	12		T459	4		T653	8
values[27]	364	1			T457	9		T459	6		T653	12
values[28]	491	1			T457	7		T459	9		T653	27
values[29]	382	1			T457	5		T459	11		T653	25
values[30]	395	1			T457	5		T459	4		T653	17
values[31]	336	1			T457	3		T459	7		T653	5
values[32]	374	1			T457	4		T459	4		T653	5
values[33]	370	1			T457	5		T459	4		T653	3
values[34]	385	1			T457	15		T459	4		T653	5
values[35]	468	1			T457	7		T459	9		T653	4
values[36]	442	1			T457	5		T459	11		T653	13
values[37]	389	1			T457	6		T459	5		T653	18
values[38]	336	1			T457	10		T459	5		T653	9
values[39]	350	1			T457	3		T459	6		T653	7
values[40]	345	1			T457	14		T459	7		T653	5
values[41]	344	1			T457	20		T459	13		T653	7
values[42]	320	1			T457	5		T459	9		T653	7
values[43]	332	1			T457	8		T459	4		T653	9
values[44]	352	1			T457	5		T459	7		T653	12
values[45]	439	1			T457	3		T459	4		T653	9
values[46]	381	1			T457	9		T459	8		T653	7
values[47]	323	1			T457	4		T459	8		T653	11
values[48]	326	1			T457	8		T459	3		T653	2
values[49]	282	1			T457	3		T459	6		T653	1
values[50]	316	1			T457	9		T459	5		T653	2
values[51]	329	1			T457	12		T459	7		T653	5
values[52]	293	1			T457	5		T459	4		T653	1
values[53]	290	1			T457	10		T459	9		T653	2
values[54]	362	1			T457	20		T459	20		T653	17
values[55]	282	1			T457	6		T459	7		T653	15
values[56]	277	1			T457	3		T459	4		T653	8
values[57]	301	1			T457	4		T459	9		T653	1
values[58]	312	1			T457	11		T459	15		T653	4
values[59]	298	1			T457	25		T459	3		T653	5
values[60]	235	1			T457	6		T653	1		T596	3
values[61]	224	1			T457	2		T653	5		T596	12
values[62]	239	1			T457	5		T653	3		T596	11
values[63]	246	1			T457	18		T653	2		T596	7
values[64]	245	1			T457	4		T653	4		T596	4
values[65]	221	1			T457	4		T653	4		T596	8
values[66]	223	1			T653	8		T596	4		T498	6
values[67]	200	1			T653	6		T596	3		T498	8
values[68]	157	1			T653	7		T596	10		T498	1
values[69]	128	1			T653	3		T596	15		T507	5
values[70]	125	1			T653	4		T596	7		T507	4
values[71]	102	1			T653	2		T596	4		T507	8
values[72]	150	1			T653	2		T596	9		T507	7
values[73]	116	1			T653	1		T507	6		T488	3
values[74]	113	1			T653	2		T507	14		T488	1
values[75]	86	1			T653	3		T507	5		T488	2
values[76]	108	1			T653	1		T507	9		T488	2
values[77]	112	1			T653	1		T507	2		T488	1
values[78]	92	1			T653	6		T507	5		T488	1
values[79]	107	1			T653	7		T507	3		T488	6
values[80]	94	1			T653	5		T507	3		T488	2
values[81]	77	1			T653	3		T507	2		T488	2
values[82]	81	1			T653	2		T488	1		T492	1
values[83]	61	1			T653	3		T488	2		T492	1
values[84]	70	1			T653	4		T488	2		T492	1
values[85]	79	1			T653	3		T488	3		T492	1
values[86]	73	1			T653	2		T488	1		T492	1
values[87]	91	1			T653	5		T488	1		T492	1
values[88]	73	1			T653	4		T488	8		T492	1
values[89]	115	1			T653	9		T488	9		T492	1
values[90]	98	1			T653	3		T488	2		T492	1
values[91]	74	1			T653	4		T488	1		T492	1
values[92]	94	1			T653	3		T488	7		T492	1
values[93]	83	1			T653	3		T488	3		T492	1
values[94]	62	1			T653	2		T488	1		T492	1
values[95]	78	1			T653	1		T488	2		T492	1
values[96]	66	1			T653	1		T488	5		T492	2
values[97]	68	1			T653	3		T488	4		T492	1
values[98]	63	1			T653	6		T488	1		T492	1
values[99]	80	1			T653	4		T488	3		T492	1
values[100]	74	1			T653	7		T488	3		T492	1
values[101]	79	1			T653	14		T488	2		T492	1
values[102]	77	1			T653	13		T488	1		T492	1
values[103]	59	1			T653	4		T488	1		T492	1
values[104]	77	1			T653	1		T488	4		T492	1
values[105]	82	1			T653	9		T488	3		T492	1
values[106]	73	1			T653	6		T488	1		T492	1
values[107]	80	1			T653	4		T488	8		T492	1
values[108]	77	1			T653	3		T488	6		T492	1
values[109]	75	1			T653	6		T488	5		T492	1
values[110]	83	1			T653	4		T488	1		T492	1
values[111]	71	1			T653	6		T488	2		T492	1
values[112]	75	1			T653	2		T488	6		T492	1
values[113]	80	1			T653	5		T488	9		T492	1
values[114]	68	1			T653	4		T488	5		T492	1
values[115]	77	1			T653	2		T488	4		T492	1
values[116]	78	1			T653	2		T488	8		T492	1
values[117]	74	1			T653	3		T488	6		T492	1
values[118]	85	1			T653	4		T488	5		T492	1
values[119]	74	1			T653	5		T488	3		T492	2
values[120]	78	1			T653	9		T488	2		T492	1
values[121]	68	1			T653	9		T488	2		T492	1
values[122]	69	1			T653	5		T488	1		T492	2
values[123]	74	1			T488	4		T492	2		T508	1
values[124]	61	1			T488	8		T492	1		T508	2
values[125]	77	1			T488	9		T492	3		T508	2
values[126]	158	1			T488	18		T492	2		T508	1
values[127]	746	1			T488	32		T492	33		T508	29
values[128]	5666	1			T488	13		T492	326		T508	279