| T551 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke_zero_delays.3344132012 |
|
|
Feb 08 09:06:15 AM UTC 25 |
Feb 08 09:06:19 AM UTC 25 |
29005615 ps |
| T552 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_stress_all_with_reset_error.3384019279 |
|
|
Feb 08 09:01:22 AM UTC 25 |
Feb 08 09:06:28 AM UTC 25 |
10042429846 ps |
| T553 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_smoke_large_delays.3249953899 |
|
|
Feb 08 09:05:43 AM UTC 25 |
Feb 08 09:06:33 AM UTC 25 |
4300338201 ps |
| T554 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_error_and_unmapped_addr.3866015892 |
|
|
Feb 08 09:06:04 AM UTC 25 |
Feb 08 09:06:34 AM UTC 25 |
939995695 ps |
| T555 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all_with_error.1896543558 |
|
|
Feb 08 09:06:07 AM UTC 25 |
Feb 08 09:06:35 AM UTC 25 |
1285808668 ps |
| T556 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_random.918761979 |
|
|
Feb 08 09:06:16 AM UTC 25 |
Feb 08 09:06:35 AM UTC 25 |
369487006 ps |
| T557 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_unmapped_addr.2951391999 |
|
|
Feb 08 09:06:02 AM UTC 25 |
Feb 08 09:06:37 AM UTC 25 |
604507810 ps |
| T558 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_random_large_delays.224727842 |
|
|
Feb 08 09:04:19 AM UTC 25 |
Feb 08 09:06:37 AM UTC 25 |
36557881907 ps |
| T559 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all_with_error.645945518 |
|
|
Feb 08 09:04:03 AM UTC 25 |
Feb 08 09:06:38 AM UTC 25 |
2850872263 ps |
| T560 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_access_same_device.10579754 |
|
|
Feb 08 09:05:54 AM UTC 25 |
Feb 08 09:06:39 AM UTC 25 |
1932290470 ps |
| T561 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_random_large_delays.3783874678 |
|
|
Feb 08 09:05:49 AM UTC 25 |
Feb 08 09:06:40 AM UTC 25 |
12745301201 ps |
| T562 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_stress_all.2496751961 |
|
|
Feb 08 09:04:34 AM UTC 25 |
Feb 08 09:06:42 AM UTC 25 |
7380732112 ps |
| T563 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all_with_error.1523477249 |
|
|
Feb 08 09:05:12 AM UTC 25 |
Feb 08 09:06:42 AM UTC 25 |
1409940960 ps |
| T564 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all_with_error.1278463345 |
|
|
Feb 08 09:05:40 AM UTC 25 |
Feb 08 09:06:42 AM UTC 25 |
827350492 ps |
| T565 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_random_zero_delays.2449955640 |
|
|
Feb 08 09:06:17 AM UTC 25 |
Feb 08 09:06:43 AM UTC 25 |
175371176 ps |
| T566 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_random_slow_rsp.3447026227 |
|
|
Feb 08 09:03:15 AM UTC 25 |
Feb 08 09:06:44 AM UTC 25 |
15039694209 ps |
| T567 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_error_random.1095292394 |
|
|
Feb 08 09:06:02 AM UTC 25 |
Feb 08 09:06:44 AM UTC 25 |
1569354067 ps |
| T568 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all_with_rand_reset.18549529 |
|
|
Feb 08 09:02:32 AM UTC 25 |
Feb 08 09:06:46 AM UTC 25 |
1270715752 ps |
| T569 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all.2226784841 |
|
|
Feb 08 09:03:02 AM UTC 25 |
Feb 08 09:06:46 AM UTC 25 |
9371901753 ps |
| T570 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_random_large_delays.2774067264 |
|
|
Feb 08 09:03:49 AM UTC 25 |
Feb 08 09:06:46 AM UTC 25 |
27969951039 ps |
| T571 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke.2453769237 |
|
|
Feb 08 09:06:43 AM UTC 25 |
Feb 08 09:06:48 AM UTC 25 |
29451167 ps |
| T572 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke_zero_delays.1863842065 |
|
|
Feb 08 09:06:44 AM UTC 25 |
Feb 08 09:06:49 AM UTC 25 |
27073864 ps |
| T573 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke.3298467707 |
|
|
Feb 08 09:07:23 AM UTC 25 |
Feb 08 09:07:28 AM UTC 25 |
106559464 ps |
| T574 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_error_random.1648198169 |
|
|
Feb 08 09:06:36 AM UTC 25 |
Feb 08 09:06:52 AM UTC 25 |
1636210654 ps |
| T575 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke_slow_rsp.2539061704 |
|
|
Feb 08 09:06:16 AM UTC 25 |
Feb 08 09:06:54 AM UTC 25 |
5606516831 ps |
| T576 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_error_and_unmapped_addr.795214977 |
|
|
Feb 08 09:06:39 AM UTC 25 |
Feb 08 09:06:58 AM UTC 25 |
485938007 ps |
| T577 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/14.xbar_stress_all_with_rand_reset.1645604105 |
|
|
Feb 08 08:58:12 AM UTC 25 |
Feb 08 09:07:00 AM UTC 25 |
7307438926 ps |
| T578 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/9.xbar_access_same_device_slow_rsp.3935304741 |
|
|
Feb 08 08:55:54 AM UTC 25 |
Feb 08 09:07:00 AM UTC 25 |
141990500705 ps |
| T579 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_same_source.231819963 |
|
|
Feb 08 09:06:36 AM UTC 25 |
Feb 08 09:07:04 AM UTC 25 |
270236772 ps |
| T580 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_random_slow_rsp.3136558178 |
|
|
Feb 08 09:04:20 AM UTC 25 |
Feb 08 09:07:05 AM UTC 25 |
26930483014 ps |
| T581 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_unmapped_addr.966838682 |
|
|
Feb 08 09:06:59 AM UTC 25 |
Feb 08 09:07:07 AM UTC 25 |
267089932 ps |
| T318 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all_with_error.2483855804 |
|
|
Feb 08 09:03:05 AM UTC 25 |
Feb 08 09:07:08 AM UTC 25 |
39879460641 ps |
| T582 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_same_source.4218870883 |
|
|
Feb 08 09:06:53 AM UTC 25 |
Feb 08 09:07:08 AM UTC 25 |
131849088 ps |
| T583 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all.2522703302 |
|
|
Feb 08 09:04:01 AM UTC 25 |
Feb 08 09:07:09 AM UTC 25 |
18049296769 ps |
| T319 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/14.xbar_access_same_device_slow_rsp.447608042 |
|
|
Feb 08 08:58:08 AM UTC 25 |
Feb 08 09:07:09 AM UTC 25 |
90233013645 ps |
| T234 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_unmapped_addr.3878800535 |
|
|
Feb 08 09:06:37 AM UTC 25 |
Feb 08 09:07:10 AM UTC 25 |
774957410 ps |
| T584 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_random_large_delays.3060916028 |
|
|
Feb 08 09:03:15 AM UTC 25 |
Feb 08 09:07:10 AM UTC 25 |
32936388914 ps |
| T585 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_smoke_large_delays.220787349 |
|
|
Feb 08 09:06:16 AM UTC 25 |
Feb 08 09:07:11 AM UTC 25 |
14232187314 ps |
| T586 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_error_random.1182418193 |
|
|
Feb 08 09:06:54 AM UTC 25 |
Feb 08 09:07:11 AM UTC 25 |
922998761 ps |
| T587 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/16.xbar_access_same_device_slow_rsp.3561543807 |
|
|
Feb 08 08:59:02 AM UTC 25 |
Feb 08 09:07:13 AM UTC 25 |
71787856077 ps |
| T588 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_random_large_delays.523054471 |
|
|
Feb 08 09:02:16 AM UTC 25 |
Feb 08 09:07:13 AM UTC 25 |
44307057661 ps |
| T589 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_random_zero_delays.641926852 |
|
|
Feb 08 09:06:47 AM UTC 25 |
Feb 08 09:07:14 AM UTC 25 |
141433819 ps |
| T590 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke_zero_delays.2874933390 |
|
|
Feb 08 09:07:09 AM UTC 25 |
Feb 08 09:07:14 AM UTC 25 |
26596275 ps |
| T591 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke.2870554100 |
|
|
Feb 08 09:07:09 AM UTC 25 |
Feb 08 09:07:15 AM UTC 25 |
124541313 ps |
| T158 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_random_large_delays.2622228270 |
|
|
Feb 08 09:06:21 AM UTC 25 |
Feb 08 09:07:15 AM UTC 25 |
10410779362 ps |
| T592 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_random.127922223 |
|
|
Feb 08 09:06:46 AM UTC 25 |
Feb 08 09:07:16 AM UTC 25 |
716976052 ps |
| T593 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_error_and_unmapped_addr.3792249239 |
|
|
Feb 08 09:07:02 AM UTC 25 |
Feb 08 09:07:17 AM UTC 25 |
260719961 ps |
| T594 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all_with_reset_error.159862568 |
|
|
Feb 08 09:06:43 AM UTC 25 |
Feb 08 09:07:20 AM UTC 25 |
162283200 ps |
| T595 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_access_same_device.563362515 |
|
|
Feb 08 09:06:50 AM UTC 25 |
Feb 08 09:07:20 AM UTC 25 |
1032523167 ps |
| T596 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_random_large_delays.1587436944 |
|
|
Feb 08 09:06:47 AM UTC 25 |
Feb 08 09:07:21 AM UTC 25 |
7273917414 ps |
| T271 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke_large_delays.2960347555 |
|
|
Feb 08 09:06:44 AM UTC 25 |
Feb 08 09:07:21 AM UTC 25 |
7942317092 ps |
| T597 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all.1861968463 |
|
|
Feb 08 09:05:07 AM UTC 25 |
Feb 08 09:07:26 AM UTC 25 |
28996263387 ps |
| T598 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_stress_all.2350981483 |
|
|
Feb 08 09:02:31 AM UTC 25 |
Feb 08 09:07:27 AM UTC 25 |
10157637133 ps |
| T599 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke_zero_delays.1779183957 |
|
|
Feb 08 09:07:23 AM UTC 25 |
Feb 08 09:07:28 AM UTC 25 |
53608029 ps |
| T600 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all.3934897409 |
|
|
Feb 08 09:05:37 AM UTC 25 |
Feb 08 09:07:28 AM UTC 25 |
4251348813 ps |
| T601 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_error_random.2361779991 |
|
|
Feb 08 09:07:16 AM UTC 25 |
Feb 08 09:07:28 AM UTC 25 |
84225210 ps |
| T602 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_same_source.1729788984 |
|
|
Feb 08 09:07:16 AM UTC 25 |
Feb 08 09:07:28 AM UTC 25 |
181029833 ps |
| T603 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_access_same_device.3503403047 |
|
|
Feb 08 09:07:14 AM UTC 25 |
Feb 08 09:07:29 AM UTC 25 |
332409356 ps |
| T604 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_random.3826294715 |
|
|
Feb 08 09:07:12 AM UTC 25 |
Feb 08 09:07:33 AM UTC 25 |
183497404 ps |
| T188 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_access_same_device.3585306407 |
|
|
Feb 08 09:06:34 AM UTC 25 |
Feb 08 09:07:33 AM UTC 25 |
1690010160 ps |
| T605 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all.363857607 |
|
|
Feb 08 09:06:39 AM UTC 25 |
Feb 08 09:07:35 AM UTC 25 |
1707307106 ps |
| T606 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_random_zero_delays.507358158 |
|
|
Feb 08 09:07:12 AM UTC 25 |
Feb 08 09:07:35 AM UTC 25 |
212831477 ps |
| T607 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_access_same_device.843076468 |
|
|
Feb 08 09:07:31 AM UTC 25 |
Feb 08 09:07:36 AM UTC 25 |
17289184 ps |
| T608 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_same_source.584085253 |
|
|
Feb 08 09:07:34 AM UTC 25 |
Feb 08 09:07:40 AM UTC 25 |
119317683 ps |
| T609 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke_slow_rsp.549588120 |
|
|
Feb 08 09:07:11 AM UTC 25 |
Feb 08 09:07:41 AM UTC 25 |
4112657651 ps |
| T610 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_unmapped_addr.3785374476 |
|
|
Feb 08 09:07:16 AM UTC 25 |
Feb 08 09:07:42 AM UTC 25 |
3329603829 ps |
| T611 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_random_zero_delays.3645259753 |
|
|
Feb 08 09:07:29 AM UTC 25 |
Feb 08 09:07:44 AM UTC 25 |
87853756 ps |
| T612 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/19.xbar_stress_all_with_rand_reset.4148170178 |
|
|
Feb 08 09:00:57 AM UTC 25 |
Feb 08 09:07:45 AM UTC 25 |
1257839391 ps |
| T613 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_access_same_device_slow_rsp.1512431634 |
|
|
Feb 08 09:06:36 AM UTC 25 |
Feb 08 09:07:46 AM UTC 25 |
7750334669 ps |
| T614 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_error_and_unmapped_addr.3447863827 |
|
|
Feb 08 09:07:37 AM UTC 25 |
Feb 08 09:07:48 AM UTC 25 |
224446045 ps |
| T615 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_random_slow_rsp.3178830240 |
|
|
Feb 08 09:07:13 AM UTC 25 |
Feb 08 09:07:48 AM UTC 25 |
3936859495 ps |
| T616 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all_with_reset_error.741810353 |
|
|
Feb 08 09:07:08 AM UTC 25 |
Feb 08 09:07:48 AM UTC 25 |
64253364 ps |
| T617 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_smoke_slow_rsp.3723531845 |
|
|
Feb 08 09:06:46 AM UTC 25 |
Feb 08 09:07:49 AM UTC 25 |
14998346308 ps |
| T618 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_smoke_large_delays.1116022033 |
|
|
Feb 08 09:07:11 AM UTC 25 |
Feb 08 09:07:49 AM UTC 25 |
7757027419 ps |
| T619 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_random_slow_rsp.4032976583 |
|
|
Feb 08 09:04:57 AM UTC 25 |
Feb 08 09:07:49 AM UTC 25 |
20328971185 ps |
| T620 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_error_and_unmapped_addr.936868351 |
|
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Feb 08 09:07:17 AM UTC 25 |
Feb 08 09:07:50 AM UTC 25 |
4796258507 ps |
| T621 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_error_random.2674026089 |
|
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Feb 08 09:07:34 AM UTC 25 |
Feb 08 09:07:50 AM UTC 25 |
129040524 ps |
| T622 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/23.xbar_random_slow_rsp.1207418083 |
|
|
Feb 08 09:02:16 AM UTC 25 |
Feb 08 09:07:51 AM UTC 25 |
39562527112 ps |
| T159 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke.2764590566 |
|
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Feb 08 09:07:45 AM UTC 25 |
Feb 08 09:07:51 AM UTC 25 |
245123750 ps |
| T623 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke_zero_delays.1938306619 |
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Feb 08 09:07:47 AM UTC 25 |
Feb 08 09:07:52 AM UTC 25 |
150885731 ps |
| T624 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_random.4204702594 |
|
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Feb 08 09:07:29 AM UTC 25 |
Feb 08 09:07:53 AM UTC 25 |
167085911 ps |
| T625 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all_with_error.3467315723 |
|
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Feb 08 09:07:21 AM UTC 25 |
Feb 08 09:07:58 AM UTC 25 |
4230288412 ps |
| T626 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_unmapped_addr.2599053934 |
|
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Feb 08 09:07:52 AM UTC 25 |
Feb 08 09:07:59 AM UTC 25 |
20285448 ps |
| T627 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_error_random.3298094485 |
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Feb 08 09:07:52 AM UTC 25 |
Feb 08 09:08:00 AM UTC 25 |
308816768 ps |
| T628 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all.1826541398 |
|
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Feb 08 09:07:17 AM UTC 25 |
Feb 08 09:08:00 AM UTC 25 |
1090586219 ps |
| T152 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all.335049792 |
|
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Feb 08 09:07:02 AM UTC 25 |
Feb 08 09:08:03 AM UTC 25 |
3897294945 ps |
| T160 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_random.487770595 |
|
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Feb 08 09:07:50 AM UTC 25 |
Feb 08 09:08:05 AM UTC 25 |
289178847 ps |
| T244 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_access_same_device.499919509 |
|
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Feb 08 09:07:50 AM UTC 25 |
Feb 08 09:08:05 AM UTC 25 |
65561402 ps |
| T245 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke_zero_delays.3875744327 |
|
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Feb 08 09:08:04 AM UTC 25 |
Feb 08 09:08:08 AM UTC 25 |
27827282 ps |
| T246 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_unmapped_addr.1299817807 |
|
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Feb 08 09:07:35 AM UTC 25 |
Feb 08 09:08:09 AM UTC 25 |
639895067 ps |
| T247 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke.4021925714 |
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Feb 08 09:08:02 AM UTC 25 |
Feb 08 09:08:09 AM UTC 25 |
141438217 ps |
| T248 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_error_and_unmapped_addr.2968261545 |
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Feb 08 09:07:52 AM UTC 25 |
Feb 08 09:08:09 AM UTC 25 |
307803250 ps |
| T249 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke_slow_rsp.1908531445 |
|
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Feb 08 09:07:29 AM UTC 25 |
Feb 08 09:08:10 AM UTC 25 |
13626272841 ps |
| T250 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all_with_reset_error.575645087 |
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Feb 08 09:03:06 AM UTC 25 |
Feb 08 09:08:14 AM UTC 25 |
2646099408 ps |
| T251 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_same_source.3758503145 |
|
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Feb 08 09:07:52 AM UTC 25 |
Feb 08 09:08:16 AM UTC 25 |
804259642 ps |
| T629 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_random_zero_delays.3603867769 |
|
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Feb 08 09:08:11 AM UTC 25 |
Feb 08 09:08:19 AM UTC 25 |
166064497 ps |
| T630 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_random_zero_delays.1430385470 |
|
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Feb 08 09:07:50 AM UTC 25 |
Feb 08 09:08:20 AM UTC 25 |
255886032 ps |
| T631 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_access_same_device.4272402747 |
|
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Feb 08 09:08:12 AM UTC 25 |
Feb 08 09:08:22 AM UTC 25 |
244874282 ps |
| T632 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_stress_all_with_reset_error.3879558848 |
|
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Feb 08 09:05:41 AM UTC 25 |
Feb 08 09:08:27 AM UTC 25 |
9297017467 ps |
| T633 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_error_and_unmapped_addr.2752479605 |
|
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Feb 08 09:08:23 AM UTC 25 |
Feb 08 09:08:28 AM UTC 25 |
89812504 ps |
| T634 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_unmapped_addr.3020667581 |
|
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Feb 08 09:08:22 AM UTC 25 |
Feb 08 09:08:30 AM UTC 25 |
36210608 ps |
| T635 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke_large_delays.3582967520 |
|
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Feb 08 09:07:47 AM UTC 25 |
Feb 08 09:08:31 AM UTC 25 |
7241447322 ps |
| T636 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_random_slow_rsp.860479570 |
|
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Feb 08 09:07:31 AM UTC 25 |
Feb 08 09:08:32 AM UTC 25 |
5963156365 ps |
| T637 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_random.1347680976 |
|
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Feb 08 09:08:09 AM UTC 25 |
Feb 08 09:08:33 AM UTC 25 |
150674846 ps |
| T638 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_random_large_delays.104788803 |
|
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Feb 08 09:07:29 AM UTC 25 |
Feb 08 09:08:34 AM UTC 25 |
9133859414 ps |
| T639 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke.156084666 |
|
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Feb 08 09:08:33 AM UTC 25 |
Feb 08 09:08:39 AM UTC 25 |
32019643 ps |
| T640 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke_zero_delays.2102236643 |
|
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Feb 08 09:08:35 AM UTC 25 |
Feb 08 09:08:40 AM UTC 25 |
38350142 ps |
| T641 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_smoke_slow_rsp.3135857586 |
|
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Feb 08 09:07:50 AM UTC 25 |
Feb 08 09:08:40 AM UTC 25 |
14399828469 ps |
| T642 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke_slow_rsp.3102894029 |
|
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Feb 08 09:08:06 AM UTC 25 |
Feb 08 09:08:48 AM UTC 25 |
4740356444 ps |
| T643 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all_with_error.3271816190 |
|
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Feb 08 09:07:43 AM UTC 25 |
Feb 08 09:08:49 AM UTC 25 |
595451231 ps |
| T644 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_same_source.4273854074 |
|
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Feb 08 09:08:17 AM UTC 25 |
Feb 08 09:08:54 AM UTC 25 |
2367327108 ps |
| T645 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_smoke_large_delays.793937134 |
|
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Feb 08 09:07:27 AM UTC 25 |
Feb 08 09:08:54 AM UTC 25 |
23560740277 ps |
| T646 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_random_large_delays.2423118839 |
|
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Feb 08 09:07:13 AM UTC 25 |
Feb 08 09:08:54 AM UTC 25 |
25720343015 ps |
| T647 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all.1750980159 |
|
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Feb 08 09:07:37 AM UTC 25 |
Feb 08 09:08:58 AM UTC 25 |
552492481 ps |
| T648 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_smoke_large_delays.2544455052 |
|
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Feb 08 09:08:06 AM UTC 25 |
Feb 08 09:09:01 AM UTC 25 |
15567711041 ps |
| T649 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_random_slow_rsp.2734911956 |
|
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Feb 08 09:08:11 AM UTC 25 |
Feb 08 09:09:02 AM UTC 25 |
7196937941 ps |
| T650 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_same_source.25027496 |
|
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Feb 08 09:08:56 AM UTC 25 |
Feb 08 09:09:03 AM UTC 25 |
228917877 ps |
| T651 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_error_random.1953828949 |
|
|
Feb 08 09:08:20 AM UTC 25 |
Feb 08 09:09:04 AM UTC 25 |
1738030146 ps |
| T652 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all_with_error.3103623980 |
|
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Feb 08 09:08:01 AM UTC 25 |
Feb 08 09:09:05 AM UTC 25 |
936934710 ps |
| T653 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_random_zero_delays.312974983 |
|
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Feb 08 09:08:42 AM UTC 25 |
Feb 08 09:09:07 AM UTC 25 |
394893241 ps |
| T654 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_error_and_unmapped_addr.1434718466 |
|
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Feb 08 09:09:03 AM UTC 25 |
Feb 08 09:09:08 AM UTC 25 |
89327617 ps |
| T135 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all.80750275 |
|
|
Feb 08 09:06:07 AM UTC 25 |
Feb 08 09:09:08 AM UTC 25 |
17170855022 ps |
| T655 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke_zero_delays.1200343297 |
|
|
Feb 08 09:09:10 AM UTC 25 |
Feb 08 09:09:14 AM UTC 25 |
42266104 ps |
| T656 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke.1461534227 |
|
|
Feb 08 09:09:10 AM UTC 25 |
Feb 08 09:09:16 AM UTC 25 |
153758878 ps |
| T657 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_access_same_device_slow_rsp.3394119690 |
|
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Feb 08 09:03:51 AM UTC 25 |
Feb 08 09:09:16 AM UTC 25 |
53784916316 ps |
| T297 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/18.xbar_stress_all_with_rand_reset.617804506 |
|
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Feb 08 09:00:33 AM UTC 25 |
Feb 08 09:09:22 AM UTC 25 |
7295925898 ps |
| T658 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke_slow_rsp.3309084776 |
|
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Feb 08 09:08:40 AM UTC 25 |
Feb 08 09:09:25 AM UTC 25 |
3596131195 ps |
| T659 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all_with_rand_reset.3165088052 |
|
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Feb 08 09:07:05 AM UTC 25 |
Feb 08 09:09:25 AM UTC 25 |
298327334 ps |
| T660 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_stress_all_with_error.4079240181 |
|
|
Feb 08 09:07:06 AM UTC 25 |
Feb 08 09:09:25 AM UTC 25 |
3732399297 ps |
| T661 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_stress_all_with_rand_reset.513694654 |
|
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Feb 08 09:01:40 AM UTC 25 |
Feb 08 09:09:26 AM UTC 25 |
1774240508 ps |
| T662 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_smoke_large_delays.3421702489 |
|
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Feb 08 09:08:35 AM UTC 25 |
Feb 08 09:09:28 AM UTC 25 |
4765682149 ps |
| T663 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_error_random.474697786 |
|
|
Feb 08 09:09:00 AM UTC 25 |
Feb 08 09:09:29 AM UTC 25 |
800426980 ps |
| T664 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_unmapped_addr.1690590410 |
|
|
Feb 08 09:09:02 AM UTC 25 |
Feb 08 09:09:30 AM UTC 25 |
872259768 ps |
| T665 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_access_same_device.1182652435 |
|
|
Feb 08 09:08:55 AM UTC 25 |
Feb 08 09:09:31 AM UTC 25 |
4064257638 ps |
| T666 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all_with_rand_reset.3463130385 |
|
|
Feb 08 09:07:41 AM UTC 25 |
Feb 08 09:09:33 AM UTC 25 |
255850742 ps |
| T667 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/26.xbar_stress_all_with_rand_reset.91416430 |
|
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Feb 08 09:04:01 AM UTC 25 |
Feb 08 09:09:35 AM UTC 25 |
5669178245 ps |
| T668 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_random_slow_rsp.1298385940 |
|
|
Feb 08 09:06:47 AM UTC 25 |
Feb 08 09:09:37 AM UTC 25 |
50398865349 ps |
| T669 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_random_zero_delays.1180541219 |
|
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Feb 08 09:09:23 AM UTC 25 |
Feb 08 09:09:38 AM UTC 25 |
126111861 ps |
| T670 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_error_random.3811984532 |
|
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Feb 08 09:09:31 AM UTC 25 |
Feb 08 09:09:39 AM UTC 25 |
216153854 ps |
| T671 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_random.1837705887 |
|
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Feb 08 09:08:40 AM UTC 25 |
Feb 08 09:09:39 AM UTC 25 |
6711998982 ps |
| T672 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_unmapped_addr.3737616018 |
|
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Feb 08 09:09:31 AM UTC 25 |
Feb 08 09:09:40 AM UTC 25 |
108150832 ps |
| T673 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_stress_all_with_error.4151085797 |
|
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Feb 08 09:06:41 AM UTC 25 |
Feb 08 09:09:41 AM UTC 25 |
4903627566 ps |
| T138 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/21.xbar_access_same_device_slow_rsp.3049049175 |
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Feb 08 09:01:34 AM UTC 25 |
Feb 08 09:09:43 AM UTC 25 |
240407366087 ps |
| T162 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_random_slow_rsp.1755718463 |
|
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Feb 08 09:05:52 AM UTC 25 |
Feb 08 09:09:44 AM UTC 25 |
31990141482 ps |
| T674 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke_zero_delays.3250904011 |
|
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Feb 08 09:09:41 AM UTC 25 |
Feb 08 09:09:45 AM UTC 25 |
94375550 ps |
| T161 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_random_slow_rsp.3965879208 |
|
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Feb 08 09:07:50 AM UTC 25 |
Feb 08 09:09:45 AM UTC 25 |
13304321858 ps |
| T675 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke.2819085754 |
|
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Feb 08 09:09:41 AM UTC 25 |
Feb 08 09:09:46 AM UTC 25 |
118553462 ps |
| T676 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/29.xbar_random_slow_rsp.1181879489 |
|
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Feb 08 09:05:26 AM UTC 25 |
Feb 08 09:09:47 AM UTC 25 |
30592078121 ps |
| T677 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke_large_delays.4187002376 |
|
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Feb 08 09:09:15 AM UTC 25 |
Feb 08 09:09:47 AM UTC 25 |
4718195989 ps |
| T678 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_same_source.3840372791 |
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Feb 08 09:09:29 AM UTC 25 |
Feb 08 09:09:48 AM UTC 25 |
152775068 ps |
| T679 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_smoke_slow_rsp.1965656827 |
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Feb 08 09:09:18 AM UTC 25 |
Feb 08 09:09:53 AM UTC 25 |
2587384092 ps |
| T680 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_random.2852515827 |
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Feb 08 09:09:18 AM UTC 25 |
Feb 08 09:09:57 AM UTC 25 |
1012622459 ps |
| T681 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_error_and_unmapped_addr.2762278539 |
|
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Feb 08 09:09:32 AM UTC 25 |
Feb 08 09:10:01 AM UTC 25 |
1132209665 ps |
| T136 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_random_large_delays.2956441691 |
|
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Feb 08 09:04:56 AM UTC 25 |
Feb 08 09:10:01 AM UTC 25 |
53040969164 ps |
| T682 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_stress_all_with_error.1902327974 |
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Feb 08 09:09:07 AM UTC 25 |
Feb 08 09:10:01 AM UTC 25 |
1520873982 ps |
| T683 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all_with_reset_error.1553806205 |
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Feb 08 09:08:01 AM UTC 25 |
Feb 08 09:10:02 AM UTC 25 |
294321345 ps |
| T684 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all_with_reset_error.1532301453 |
|
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Feb 08 09:06:07 AM UTC 25 |
Feb 08 09:10:04 AM UTC 25 |
7454642440 ps |
| T685 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_stress_all_with_reset_error.157951832 |
|
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Feb 08 09:09:08 AM UTC 25 |
Feb 08 09:10:06 AM UTC 25 |
227421470 ps |
| T686 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke_slow_rsp.2388337326 |
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Feb 08 09:09:42 AM UTC 25 |
Feb 08 09:10:07 AM UTC 25 |
2820288423 ps |
| T687 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_random_zero_delays.632740318 |
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Feb 08 09:09:45 AM UTC 25 |
Feb 08 09:10:09 AM UTC 25 |
142513221 ps |
| T688 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_access_same_device.2828325255 |
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Feb 08 09:09:47 AM UTC 25 |
Feb 08 09:10:10 AM UTC 25 |
106807157 ps |
| T689 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke.1466400609 |
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Feb 08 09:10:05 AM UTC 25 |
Feb 08 09:10:10 AM UTC 25 |
58257227 ps |
| T690 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_same_source.216198009 |
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Feb 08 09:09:49 AM UTC 25 |
Feb 08 09:10:13 AM UTC 25 |
790739152 ps |
| T691 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke_zero_delays.2862487038 |
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Feb 08 09:10:08 AM UTC 25 |
Feb 08 09:10:13 AM UTC 25 |
36540153 ps |
| T692 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_stress_all.1901286608 |
|
|
Feb 08 09:08:28 AM UTC 25 |
Feb 08 09:10:15 AM UTC 25 |
3521463042 ps |
| T693 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_unmapped_addr.3062473039 |
|
|
Feb 08 09:09:53 AM UTC 25 |
Feb 08 09:10:16 AM UTC 25 |
652069597 ps |
| T694 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_smoke_large_delays.221784803 |
|
|
Feb 08 09:09:41 AM UTC 25 |
Feb 08 09:10:18 AM UTC 25 |
14543513812 ps |
| T695 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_random_zero_delays.330370636 |
|
|
Feb 08 09:10:12 AM UTC 25 |
Feb 08 09:10:20 AM UTC 25 |
36458917 ps |
| T696 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/24.xbar_stress_all_with_rand_reset.1569242850 |
|
|
Feb 08 09:03:04 AM UTC 25 |
Feb 08 09:10:23 AM UTC 25 |
12490811665 ps |
| T697 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_error_and_unmapped_addr.984577421 |
|
|
Feb 08 09:09:58 AM UTC 25 |
Feb 08 09:10:23 AM UTC 25 |
1407181349 ps |
| T698 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/37.xbar_stress_all.2238731699 |
|
|
Feb 08 09:09:03 AM UTC 25 |
Feb 08 09:10:27 AM UTC 25 |
2382826461 ps |
| T699 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_error_random.402171944 |
|
|
Feb 08 09:09:49 AM UTC 25 |
Feb 08 09:10:27 AM UTC 25 |
1048475899 ps |
| T700 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_random.2821456634 |
|
|
Feb 08 09:09:45 AM UTC 25 |
Feb 08 09:10:28 AM UTC 25 |
2228836651 ps |
| T701 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_error_and_unmapped_addr.773708303 |
|
|
Feb 08 09:10:24 AM UTC 25 |
Feb 08 09:10:32 AM UTC 25 |
56906481 ps |
| T702 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_random.3322042239 |
|
|
Feb 08 09:10:12 AM UTC 25 |
Feb 08 09:10:33 AM UTC 25 |
170028208 ps |
| T703 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_random_large_delays.829063006 |
|
|
Feb 08 09:09:26 AM UTC 25 |
Feb 08 09:10:33 AM UTC 25 |
10546695221 ps |
| T704 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/31.xbar_random_slow_rsp.1857546677 |
|
|
Feb 08 09:06:29 AM UTC 25 |
Feb 08 09:10:37 AM UTC 25 |
27693351081 ps |
| T705 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_same_source.2396981707 |
|
|
Feb 08 09:10:19 AM UTC 25 |
Feb 08 09:10:37 AM UTC 25 |
1462440003 ps |
| T706 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_access_same_device.1310903535 |
|
|
Feb 08 09:10:17 AM UTC 25 |
Feb 08 09:10:37 AM UTC 25 |
574431360 ps |
| T707 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke.2033684134 |
|
|
Feb 08 09:10:34 AM UTC 25 |
Feb 08 09:10:40 AM UTC 25 |
298370365 ps |
| T708 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke_zero_delays.2030373195 |
|
|
Feb 08 09:10:35 AM UTC 25 |
Feb 08 09:10:40 AM UTC 25 |
54726575 ps |
| T709 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_unmapped_addr.3605527145 |
|
|
Feb 08 09:10:24 AM UTC 25 |
Feb 08 09:10:43 AM UTC 25 |
137724706 ps |
| T163 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_access_same_device.2294627393 |
|
|
Feb 08 09:09:26 AM UTC 25 |
Feb 08 09:10:45 AM UTC 25 |
4515134417 ps |
| T710 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke_slow_rsp.2840752400 |
|
|
Feb 08 09:10:09 AM UTC 25 |
Feb 08 09:10:48 AM UTC 25 |
4343955374 ps |
| T711 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/25.xbar_access_same_device_slow_rsp.2550042591 |
|
|
Feb 08 09:03:18 AM UTC 25 |
Feb 08 09:10:51 AM UTC 25 |
79844188443 ps |
| T712 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_error_random.1610837486 |
|
|
Feb 08 09:10:21 AM UTC 25 |
Feb 08 09:10:53 AM UTC 25 |
1058702073 ps |
| T253 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_access_same_device_slow_rsp.2647020332 |
|
|
Feb 08 09:04:26 AM UTC 25 |
Feb 08 09:10:54 AM UTC 25 |
37305967156 ps |
| T713 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_access_same_device_slow_rsp.1346647609 |
|
|
Feb 08 09:07:52 AM UTC 25 |
Feb 08 09:10:55 AM UTC 25 |
24516978826 ps |
| T714 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_random_slow_rsp.3924922437 |
|
|
Feb 08 09:09:26 AM UTC 25 |
Feb 08 09:10:57 AM UTC 25 |
13421819424 ps |
| T715 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_smoke_large_delays.1004385827 |
|
|
Feb 08 09:10:08 AM UTC 25 |
Feb 08 09:10:58 AM UTC 25 |
12482608142 ps |
| T716 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_random_zero_delays.1876100309 |
|
|
Feb 08 09:10:41 AM UTC 25 |
Feb 08 09:10:59 AM UTC 25 |
113823498 ps |
| T717 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_error_and_unmapped_addr.4152336906 |
|
|
Feb 08 09:10:56 AM UTC 25 |
Feb 08 09:11:01 AM UTC 25 |
32785823 ps |
| T718 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_stress_all_with_error.3853221768 |
|
|
Feb 08 09:08:31 AM UTC 25 |
Feb 08 09:11:03 AM UTC 25 |
4303440985 ps |
| T719 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_same_source.115770243 |
|
|
Feb 08 09:10:52 AM UTC 25 |
Feb 08 09:11:03 AM UTC 25 |
156099386 ps |
| T720 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all_with_error.416939238 |
|
|
Feb 08 09:10:02 AM UTC 25 |
Feb 08 09:11:07 AM UTC 25 |
735360866 ps |
| T721 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_random.452857112 |
|
|
Feb 08 09:10:39 AM UTC 25 |
Feb 08 09:11:07 AM UTC 25 |
720402991 ps |
| T722 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke_zero_delays.3973695681 |
|
|
Feb 08 09:11:05 AM UTC 25 |
Feb 08 09:11:09 AM UTC 25 |
28618177 ps |
| T137 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/13.xbar_access_same_device_slow_rsp.4031669286 |
|
|
Feb 08 08:57:37 AM UTC 25 |
Feb 08 09:11:10 AM UTC 25 |
74759007384 ps |
| T723 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke.3595568521 |
|
|
Feb 08 09:11:05 AM UTC 25 |
Feb 08 09:11:11 AM UTC 25 |
160614572 ps |
| T139 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/35.xbar_stress_all.1213142573 |
|
|
Feb 08 09:07:54 AM UTC 25 |
Feb 08 09:11:12 AM UTC 25 |
24096527334 ps |
| T724 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_unmapped_addr.1522307382 |
|
|
Feb 08 09:10:55 AM UTC 25 |
Feb 08 09:11:13 AM UTC 25 |
100449063 ps |
| T725 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_stress_all.1924100496 |
|
|
Feb 08 09:09:34 AM UTC 25 |
Feb 08 09:11:17 AM UTC 25 |
1112239789 ps |
| T726 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_random_zero_delays.3176065933 |
|
|
Feb 08 09:11:11 AM UTC 25 |
Feb 08 09:11:18 AM UTC 25 |
37058102 ps |
| T727 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_access_same_device.3723831908 |
|
|
Feb 08 09:11:14 AM UTC 25 |
Feb 08 09:11:19 AM UTC 25 |
38529778 ps |
| T140 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_stress_all_with_rand_reset.2533529812 |
|
|
Feb 08 09:06:07 AM UTC 25 |
Feb 08 09:11:22 AM UTC 25 |
1739325915 ps |
| T728 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke_slow_rsp.1742070640 |
|
|
Feb 08 09:10:39 AM UTC 25 |
Feb 08 09:11:22 AM UTC 25 |
2710223939 ps |
| T729 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_error_random.4156413383 |
|
|
Feb 08 09:11:20 AM UTC 25 |
Feb 08 09:11:25 AM UTC 25 |
86753565 ps |
| T730 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_same_source.3375465874 |
|
|
Feb 08 09:11:19 AM UTC 25 |
Feb 08 09:11:28 AM UTC 25 |
201666531 ps |
| T731 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/34.xbar_stress_all_with_reset_error.4257856020 |
|
|
Feb 08 09:07:43 AM UTC 25 |
Feb 08 09:11:29 AM UTC 25 |
2320473078 ps |
| T732 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/45.xbar_error_random.3940032195 |
|
|
Feb 08 09:12:32 AM UTC 25 |
Feb 08 09:13:15 AM UTC 25 |
796355882 ps |
| T43 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/33.xbar_stress_all_with_reset_error.2813613884 |
|
|
Feb 08 09:07:21 AM UTC 25 |
Feb 08 09:11:30 AM UTC 25 |
2628042001 ps |
| T733 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/32.xbar_access_same_device_slow_rsp.3047935300 |
|
|
Feb 08 09:06:50 AM UTC 25 |
Feb 08 09:11:33 AM UTC 25 |
23350919279 ps |
| T734 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all_with_error.2213988871 |
|
|
Feb 08 09:10:29 AM UTC 25 |
Feb 08 09:11:34 AM UTC 25 |
2483304038 ps |
| T735 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_stress_all_with_rand_reset.80967268 |
|
|
Feb 08 09:10:29 AM UTC 25 |
Feb 08 09:11:34 AM UTC 25 |
1000193838 ps |
| T736 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_stress_all_with_reset_error.2440078164 |
|
|
Feb 08 09:09:39 AM UTC 25 |
Feb 08 09:11:36 AM UTC 25 |
356821241 ps |
| T737 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/47.xbar_smoke.1596708863 |
|
|
Feb 08 09:13:07 AM UTC 25 |
Feb 08 09:13:15 AM UTC 25 |
537387646 ps |
| T738 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/36.xbar_stress_all_with_reset_error.3263176056 |
|
|
Feb 08 09:08:32 AM UTC 25 |
Feb 08 09:11:36 AM UTC 25 |
5403719595 ps |
| T739 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke.2070110053 |
|
|
Feb 08 09:11:34 AM UTC 25 |
Feb 08 09:11:39 AM UTC 25 |
30225926 ps |
| T740 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke_zero_delays.2653753247 |
|
|
Feb 08 09:11:35 AM UTC 25 |
Feb 08 09:11:40 AM UTC 25 |
31076156 ps |
| T741 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_random.3307360333 |
|
|
Feb 08 09:11:37 AM UTC 25 |
Feb 08 09:11:43 AM UTC 25 |
407534211 ps |
| T742 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/30.xbar_access_same_device_slow_rsp.3974558829 |
|
|
Feb 08 09:06:00 AM UTC 25 |
Feb 08 09:11:45 AM UTC 25 |
123515226030 ps |
| T743 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke_slow_rsp.146125003 |
|
|
Feb 08 09:11:08 AM UTC 25 |
Feb 08 09:11:45 AM UTC 25 |
3336346238 ps |
| T744 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/38.xbar_stress_all_with_error.3172879284 |
|
|
Feb 08 09:09:38 AM UTC 25 |
Feb 08 09:11:46 AM UTC 25 |
21178264519 ps |
| T745 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_error_and_unmapped_addr.2523289985 |
|
|
Feb 08 09:11:24 AM UTC 25 |
Feb 08 09:11:46 AM UTC 25 |
181081843 ps |
| T746 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_random.2097348044 |
|
|
Feb 08 09:11:11 AM UTC 25 |
Feb 08 09:11:48 AM UTC 25 |
239567094 ps |
| T747 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_smoke_large_delays.3050745098 |
|
|
Feb 08 09:10:39 AM UTC 25 |
Feb 08 09:11:48 AM UTC 25 |
20233786907 ps |
| T748 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_error_random.3902411853 |
|
|
Feb 08 09:10:54 AM UTC 25 |
Feb 08 09:11:50 AM UTC 25 |
5887614068 ps |
| T749 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_smoke_large_delays.2840303223 |
|
|
Feb 08 09:11:08 AM UTC 25 |
Feb 08 09:11:51 AM UTC 25 |
6571552205 ps |
| T750 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_random_slow_rsp.4089192992 |
|
|
Feb 08 09:09:47 AM UTC 25 |
Feb 08 09:11:54 AM UTC 25 |
8899966738 ps |
| T751 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/20.xbar_access_same_device_slow_rsp.3250480121 |
|
|
Feb 08 09:01:10 AM UTC 25 |
Feb 08 09:11:55 AM UTC 25 |
117928946554 ps |
| T752 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_stress_all_with_rand_reset.455004581 |
|
|
Feb 08 09:11:30 AM UTC 25 |
Feb 08 09:11:55 AM UTC 25 |
107822583 ps |
| T753 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/42.xbar_unmapped_addr.3769466359 |
|
|
Feb 08 09:11:24 AM UTC 25 |
Feb 08 09:11:56 AM UTC 25 |
768457171 ps |
| T754 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/39.xbar_stress_all.772377276 |
|
|
Feb 08 09:10:02 AM UTC 25 |
Feb 08 09:11:57 AM UTC 25 |
1022500581 ps |
| T755 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_error_random.31104993 |
|
|
Feb 08 09:11:48 AM UTC 25 |
Feb 08 09:11:57 AM UTC 25 |
89346100 ps |
| T756 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/28.xbar_stress_all_with_rand_reset.1193995386 |
|
|
Feb 08 09:05:08 AM UTC 25 |
Feb 08 09:11:58 AM UTC 25 |
3144527990 ps |
| T757 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke.858233095 |
|
|
Feb 08 09:11:56 AM UTC 25 |
Feb 08 09:12:02 AM UTC 25 |
35239064 ps |
| T758 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_random_zero_delays.1302527683 |
|
|
Feb 08 09:11:39 AM UTC 25 |
Feb 08 09:12:03 AM UTC 25 |
426822620 ps |
| T759 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/44.xbar_smoke_zero_delays.559628298 |
|
|
Feb 08 09:11:58 AM UTC 25 |
Feb 08 09:12:03 AM UTC 25 |
33167497 ps |
| T760 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/12.xbar_access_same_device_slow_rsp.1473070667 |
|
|
Feb 08 08:57:11 AM UTC 25 |
Feb 08 09:12:06 AM UTC 25 |
250035735845 ps |
| T761 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_stress_all_with_error.505284048 |
|
|
Feb 08 09:11:55 AM UTC 25 |
Feb 08 09:12:06 AM UTC 25 |
165463805 ps |
| T762 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/27.xbar_stress_all_with_reset_error.3067129017 |
|
|
Feb 08 09:04:46 AM UTC 25 |
Feb 08 09:12:06 AM UTC 25 |
8221968814 ps |
| T763 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_same_source.977895307 |
|
|
Feb 08 09:11:48 AM UTC 25 |
Feb 08 09:12:07 AM UTC 25 |
191403072 ps |
| T764 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke_slow_rsp.843061328 |
|
|
Feb 08 09:11:37 AM UTC 25 |
Feb 08 09:12:09 AM UTC 25 |
4285108229 ps |
| T765 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_access_same_device.1262780741 |
|
|
Feb 08 09:11:46 AM UTC 25 |
Feb 08 09:12:10 AM UTC 25 |
217344678 ps |
| T766 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/40.xbar_random_slow_rsp.109615673 |
|
|
Feb 08 09:10:15 AM UTC 25 |
Feb 08 09:12:10 AM UTC 25 |
19165414179 ps |
| T767 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/41.xbar_stress_all_with_error.2793572113 |
|
|
Feb 08 09:11:00 AM UTC 25 |
Feb 08 09:12:13 AM UTC 25 |
6704538578 ps |
| T768 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_error_and_unmapped_addr.769309314 |
|
|
Feb 08 09:11:49 AM UTC 25 |
Feb 08 09:12:13 AM UTC 25 |
155223646 ps |
| T769 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/43.xbar_smoke_large_delays.2624015676 |
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|
Feb 08 09:11:35 AM UTC 25 |
Feb 08 09:12:16 AM UTC 25 |
11705777576 ps |
| T770 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/44.xbar_error_random.3249717660 |
|
|
Feb 08 09:12:09 AM UTC 25 |
Feb 08 09:12:17 AM UTC 25 |
135699302 ps |
| T771 |
/workspaces/repo/scratch/os_regression/xbar_main-sim-vcs/coverage/xbar_build_mode/44.xbar_random.2811660482 |
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|
Feb 08 09:12:00 AM UTC 25 |
Feb 08 09:12:19 AM UTC 25 |
1260199400 ps |