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Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_49.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_49.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_49.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_5.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_5.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_5.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_50.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_50.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_50.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_51.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_51.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_51.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_52.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_52.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_52.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_53.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_53.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_53.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_54.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_54.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_54.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_55.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_55.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_55.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_56.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_56.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_56.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_57.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_57.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_57.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_59.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_59.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_59.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_6.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_6.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_6.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_60.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_60.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_60.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_61.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_61.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_61.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_62.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_62.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_62.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_63.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_63.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_63.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_64.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_64.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_64.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_7.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_7.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_7.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_8.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_8.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_8.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_9.en_a
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_9.en_a

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_9.en_a
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_accum_thresh_shadowed.classa_accum_thresh_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_accum_thresh_shadowed.classa_accum_thresh_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_accum_thresh_shadowed.classa_accum_thresh_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_clr_shadowed.classa_clr_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_clr_shadowed.classa_clr_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_clr_shadowed.classa_clr_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_crashdump_trigger_shadowed.classa_crashdump_trigger_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_crashdump_trigger_shadowed.classa_crashdump_trigger_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_crashdump_trigger_shadowed.classa_crashdump_trigger_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e2
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.lock
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.lock

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.lock
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e2
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_phase0_cyc_shadowed.classa_phase0_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_phase0_cyc_shadowed.classa_phase0_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_phase0_cyc_shadowed.classa_phase0_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_phase1_cyc_shadowed.classa_phase1_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_phase1_cyc_shadowed.classa_phase1_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_phase1_cyc_shadowed.classa_phase1_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_phase2_cyc_shadowed.classa_phase2_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_phase2_cyc_shadowed.classa_phase2_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_phase2_cyc_shadowed.classa_phase2_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_phase3_cyc_shadowed.classa_phase3_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_phase3_cyc_shadowed.classa_phase3_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_phase3_cyc_shadowed.classa_phase3_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_alert_handler_reg_block.classa_timeout_cyc_shadowed.classa_timeout_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_timeout_cyc_shadowed.classa_timeout_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classa_timeout_cyc_shadowed.classa_timeout_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2

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Group Instances:
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_49.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_5.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_50.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_51.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_52.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_53.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_54.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_55.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_56.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_57.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_58.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_59.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_6.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_60.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_61.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_62.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_63.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_64.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_7.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_8.en_a
lockable_field_cov_of_alert_handler_reg_block.alert_en_shadowed_9.en_a
lockable_field_cov_of_alert_handler_reg_block.classa_accum_thresh_shadowed.classa_accum_thresh_shadowed
lockable_field_cov_of_alert_handler_reg_block.classa_clr_shadowed.classa_clr_shadowed
lockable_field_cov_of_alert_handler_reg_block.classa_crashdump_trigger_shadowed.classa_crashdump_trigger_shadowed
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e0
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e1
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e2
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.en_e3
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.lock
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e0
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e1
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e2
lockable_field_cov_of_alert_handler_reg_block.classa_ctrl_shadowed.map_e3
lockable_field_cov_of_alert_handler_reg_block.classa_phase0_cyc_shadowed.classa_phase0_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classa_phase1_cyc_shadowed.classa_phase1_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classa_phase2_cyc_shadowed.classa_phase2_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classa_phase3_cyc_shadowed.classa_phase3_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classa_timeout_cyc_shadowed.classa_timeout_cyc_shadowed

Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 43 1 T201 1 T205 2 T203 8
auto[1] 73 1 T184 2 T188 4 T194 13


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 18 1 T205 5 T202 8 T214 2
auto[1] 37 1 T185 3 T187 4 T189 7


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 15 1 T211 3 T392 5 T210 2
auto[1] 29 1 T184 4 T189 5 T193 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 32 1 T201 3 T211 2 T202 6
auto[1] 63 1 T184 7 T187 3 T197 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 14 1 T388 2 T208 4 T392 3
auto[1] 38 1 T184 5 T186 6 T187 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 32 1 T205 2 T211 4 T199 1
auto[1] 60 1 T183 5 T186 4 T190 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 25 1 T390 7 T202 3 T203 4
auto[1] 60 1 T186 5 T185 2 T187 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6 1 T388 2 T215 4 - -
auto[1] 48 1 T185 6 T189 8 T194 10


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 28 1 T201 7 T388 2 T202 4
auto[1] 58 1 T184 4 T187 9 T190 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 22 1 T205 4 T199 5 T202 3
auto[1] 42 1 T183 3 T184 6 T189 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12 1 T201 1 T202 2 T204 1
auto[1] 35 1 T185 7 T201 4 T196 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 23 1 T205 3 T202 2 T203 2
auto[1] 76 1 T185 4 T187 16 T189 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 31 1 T201 7 T199 3 T204 1
auto[1] 25 1 T187 4 T194 5 T198 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 13 1 T205 1 T211 1 T199 1
auto[1] 39 1 T183 3 T187 4 T190 7


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 20 1 T199 2 T204 2 T210 6
auto[1] 29 1 T194 3 T193 3 T209 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 38 1 T201 1 T388 5 T202 2
auto[1] 70 1 T187 4 T189 1 T194 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 30 1 T205 1 T208 2 T203 4
auto[1] 64 1 T184 5 T186 3 T187 4


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 8 1 T202 4 T392 1 T210 1
auto[1] 58 1 T184 4 T187 3 T189 8


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 28 1 T201 5 T199 1 T208 4
auto[1] 58 1 T184 5 T186 3 T187 3


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 33 1 T201 2 T205 2 T390 3
auto[1] 77 1 T183 6 T184 2 T186 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 26 1 T388 1 T208 2 T391 2
auto[1] 62 1 T183 6 T186 5 T187 7


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 479 1 T233 1 T169 2 T236 2
auto[1] 1500 1 T167 1 T177 1 T385 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 44 1 T233 1 T169 2 T284 1
auto[1] 672 1 T236 2 T385 2 T284 8


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 548 1 T169 2 T236 2 T177 1
auto[1] 861 1 T177 1 T385 1 T284 10


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 282 1 T236 2 T177 1 T284 3
auto[1] 277 1 T177 1 T284 6 T259 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 269 1 T169 1 T236 2 T284 3
auto[1] 318 1 T167 1 T233 1 T284 6


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 256 1 T169 1 T284 2 T263 58
auto[1] 263 1 T177 2 T385 1 T284 5


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 262 1 T169 2 T236 2 T284 4
auto[1] 308 1 T233 1 T177 2 T385 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 252 1 T169 1 T236 1 T284 3
auto[1] 263 1 T167 1 T233 1 T177 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 276 1 T169 1 T236 1 T177 1
auto[1] 326 1 T167 1 T233 1 T385 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 255 1 T169 2 T236 2 T284 5
auto[1] 337 1 T167 1 T233 1 T177 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 245 1 T169 2 T236 1 T177 1
auto[1] 333 1 T233 1 T177 1 T385 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 230 1 T169 2 T284 5 T259 1
auto[1] 325 1 T167 1 T385 1 T284 12


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 214 1 T169 2 T236 2 T177 1
auto[1] 265 1 T167 1 T233 1 T177 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 894 1 T233 1 T169 2 T236 1
auto[1] 1206 1 T167 1 T236 1 T177 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 688 1 T169 2 T236 1 T177 1
auto[1] 444 1 T167 1 T233 1 T236 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 432 1 T169 2 T236 2 T177 1
auto[1] 626 1 T167 1 T233 1 T177 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 392 1 T169 2 T236 2 T177 1
auto[1] 584 1 T167 1 T233 1 T177 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 312 1 T169 2 T236 2 T177 1
auto[1] 339 1 T167 1 T233 1 T177 1

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