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Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_clr_shadowed.classb_clr_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_clr_shadowed.classb_clr_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_clr_shadowed.classb_clr_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_crashdump_trigger_shadowed.classb_crashdump_trigger_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_crashdump_trigger_shadowed.classb_crashdump_trigger_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_crashdump_trigger_shadowed.classb_crashdump_trigger_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e2
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.lock
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.lock

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.lock
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e2
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_phase0_cyc_shadowed.classb_phase0_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_phase0_cyc_shadowed.classb_phase0_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_phase0_cyc_shadowed.classb_phase0_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_phase1_cyc_shadowed.classb_phase1_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_phase1_cyc_shadowed.classb_phase1_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_phase1_cyc_shadowed.classb_phase1_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_phase2_cyc_shadowed.classb_phase2_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_phase2_cyc_shadowed.classb_phase2_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_phase2_cyc_shadowed.classb_phase2_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_phase3_cyc_shadowed.classb_phase3_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_phase3_cyc_shadowed.classb_phase3_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_phase3_cyc_shadowed.classb_phase3_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classb_timeout_cyc_shadowed.classb_timeout_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_timeout_cyc_shadowed.classb_timeout_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classb_timeout_cyc_shadowed.classb_timeout_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_accum_thresh_shadowed.classc_accum_thresh_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_accum_thresh_shadowed.classc_accum_thresh_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_accum_thresh_shadowed.classc_accum_thresh_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_clr_shadowed.classc_clr_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_clr_shadowed.classc_clr_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_clr_shadowed.classc_clr_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_crashdump_trigger_shadowed.classc_crashdump_trigger_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_crashdump_trigger_shadowed.classc_crashdump_trigger_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_crashdump_trigger_shadowed.classc_crashdump_trigger_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e2
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.lock
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.lock

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.lock
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e2
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_phase0_cyc_shadowed.classc_phase0_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_phase0_cyc_shadowed.classc_phase0_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_phase0_cyc_shadowed.classc_phase0_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_phase1_cyc_shadowed.classc_phase1_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_phase1_cyc_shadowed.classc_phase1_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_phase1_cyc_shadowed.classc_phase1_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_phase2_cyc_shadowed.classc_phase2_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_phase2_cyc_shadowed.classc_phase2_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_phase2_cyc_shadowed.classc_phase2_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_phase3_cyc_shadowed.classc_phase3_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_phase3_cyc_shadowed.classc_phase3_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_phase3_cyc_shadowed.classc_phase3_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classc_timeout_cyc_shadowed.classc_timeout_cyc_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_timeout_cyc_shadowed.classc_timeout_cyc_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classc_timeout_cyc_shadowed.classc_timeout_cyc_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classd_accum_thresh_shadowed.classd_accum_thresh_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classd_accum_thresh_shadowed.classd_accum_thresh_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classd_accum_thresh_shadowed.classd_accum_thresh_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classd_clr_shadowed.classd_clr_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classd_clr_shadowed.classd_clr_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classd_clr_shadowed.classd_clr_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classd_crashdump_trigger_shadowed.classd_crashdump_trigger_shadowed
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classd_crashdump_trigger_shadowed.classd_crashdump_trigger_shadowed

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classd_crashdump_trigger_shadowed.classd_crashdump_trigger_shadowed
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Group Instance : lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2

Go back
Group Instances:
lockable_field_cov_of_alert_handler_reg_block.classb_clr_shadowed.classb_clr_shadowed
lockable_field_cov_of_alert_handler_reg_block.classb_crashdump_trigger_shadowed.classb_crashdump_trigger_shadowed
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e0
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e1
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e2
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.en_e3
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.lock
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e0
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e1
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e2
lockable_field_cov_of_alert_handler_reg_block.classb_ctrl_shadowed.map_e3
lockable_field_cov_of_alert_handler_reg_block.classb_phase0_cyc_shadowed.classb_phase0_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classb_phase1_cyc_shadowed.classb_phase1_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classb_phase2_cyc_shadowed.classb_phase2_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classb_phase3_cyc_shadowed.classb_phase3_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classb_timeout_cyc_shadowed.classb_timeout_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classc_accum_thresh_shadowed.classc_accum_thresh_shadowed
lockable_field_cov_of_alert_handler_reg_block.classc_clr_shadowed.classc_clr_shadowed
lockable_field_cov_of_alert_handler_reg_block.classc_crashdump_trigger_shadowed.classc_crashdump_trigger_shadowed
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e0
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e1
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e2
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.en_e3
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.lock
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e0
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e1
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e2
lockable_field_cov_of_alert_handler_reg_block.classc_ctrl_shadowed.map_e3
lockable_field_cov_of_alert_handler_reg_block.classc_phase0_cyc_shadowed.classc_phase0_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classc_phase1_cyc_shadowed.classc_phase1_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classc_phase2_cyc_shadowed.classc_phase2_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classc_phase3_cyc_shadowed.classc_phase3_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classc_timeout_cyc_shadowed.classc_timeout_cyc_shadowed
lockable_field_cov_of_alert_handler_reg_block.classd_accum_thresh_shadowed.classd_accum_thresh_shadowed
lockable_field_cov_of_alert_handler_reg_block.classd_clr_shadowed.classd_clr_shadowed
lockable_field_cov_of_alert_handler_reg_block.classd_crashdump_trigger_shadowed.classd_crashdump_trigger_shadowed
lockable_field_cov_of_alert_handler_reg_block.classd_ctrl_shadowed.en

Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 139 1 T211 1 T228 81 T250 1
auto[1] 598 1 T209 2 T226 64 T233 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 379 1 T191 2 T231 64 T395 1
auto[1] 279 1 T209 1 T211 1 T226 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 304 1 T250 1 T231 64 T394 1
auto[1] 330 1 T209 2 T226 64 T250 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 293 1 T191 2 T231 60 T207 4
auto[1] 803 1 T209 1 T226 60 T191 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 292 1 T233 1 T191 3 T231 58
auto[1] 815 1 T209 2 T211 1 T226 58


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 285 1 T250 1 T231 56 T207 6
auto[1] 821 1 T209 2 T211 1 T226 56


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 278 1 T250 1 T191 2 T231 54
auto[1] 847 1 T209 2 T226 54 T228 283


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 300 1 T233 1 T191 2 T231 62
auto[1] 824 1 T209 2 T211 1 T226 62


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 294 1 T250 1 T191 3 T231 52
auto[1] 1126 1 T209 2 T211 1 T226 52


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 281 1 T233 1 T250 1 T191 2
auto[1] 1110 1 T209 2 T211 1 T226 48


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 266 1 T233 1 T250 1 T191 3
auto[1] 1103 1 T209 2 T226 44 T228 283


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 261 1 T233 1 T250 1 T191 2
auto[1] 1095 1 T209 2 T211 1 T226 40


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 906 1 T233 1 T191 1 T157 7
auto[1] 775 1 T156 4 T209 2 T211 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 458 1 T191 3 T230 1 T278 1
auto[1] 812 1 T209 2 T211 1 T226 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 707 1 T233 1 T191 3 T157 3
auto[1] 529 1 T209 2 T211 1 T226 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 494 1 T233 1 T191 2 T157 1
auto[1] 993 1 T209 2 T211 1 T226 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 385 1 T250 1 T191 4 T231 64
auto[1] 887 1 T209 2 T211 1 T226 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 336 1 T209 2 T250 1 T191 2
auto[1] 690 1 T211 1 T226 64 T233 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 322 1 T228 283 T191 2 T230 1
auto[1] 579 1 T156 4 T209 2 T226 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 395 1 T209 1 T250 1 T191 2
auto[1] 715 1 T209 1 T226 64 T228 66


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 574 1 T209 1 T191 1 T230 1
auto[1] 678 1 T209 1 T211 1 T226 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 241 1 T191 1 T157 3 T231 60
auto[1] 662 1 T211 1 T226 60 T233 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 553 1 T209 1 T157 3 T231 58
auto[1] 875 1 T211 1 T226 58 T233 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 215 1 T191 1 T157 1 T231 56
auto[1] 645 1 T211 1 T226 56 T228 292


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 552 1 T250 1 T191 1 T230 1
auto[1] 857 1 T211 1 T226 54 T228 282


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 239 1 T209 1 T250 1 T191 1
auto[1] 861 1 T209 1 T226 62 T228 282


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 561 1 T191 1 T230 1 T231 52
auto[1] 896 1 T209 2 T211 1 T226 52


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 223 1 T209 1 T250 1 T191 2
auto[1] 671 1 T209 1 T211 1 T226 48


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 545 1 T209 1 T250 1 T191 2
auto[1] 886 1 T209 1 T211 1 T226 44


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 533 1 T209 1 T250 1 T191 1
auto[1] 874 1 T209 1 T211 1 T226 40


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 413 1 T209 1 T226 64 T191 3
auto[1] 776 1 T156 4 T209 1 T211 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 692 1 T209 2 T191 1 T230 1
auto[1] 440 1 T156 7 T211 1 T226 64


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 272 1 T209 2 T191 3 T230 1
auto[1] 647 1 T211 1 T226 64 T233 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 412 1 T209 2 T226 64 T250 1
auto[1] 1282 1 T211 1 T233 1 T228 283


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 506 1 T209 2 T226 64 T191 1
auto[1] 524 1 T211 1 T233 1 T250 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 551 1 T209 1 T226 64 T250 2
auto[1] 671 1 T156 7 T209 1 T211 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 46 1 T191 2 T207 4 T200 3
auto[1] 619 1 T211 1 T226 64 T233 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 631 1 T209 1 T211 1 T228 15
auto[1] 358 1 T209 1 T226 64 T233 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 296 1 T250 1 T191 1 T207 2
auto[1] 312 1 T226 64 T191 5 T278 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%