Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 98.23 96.58 99.62 96.00 96.37 100.00 99.02


Total test records in report: 1116
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T562 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.3501959566 Aug 23 11:14:23 PM UTC 24 Aug 23 11:14:25 PM UTC 24 31547608 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.777490382 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:25 PM UTC 24 65194259 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_aborted_low_power.358055803 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:25 PM UTC 24 68673880 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.113703618 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 18345258 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup_reset.2043836622 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:26 PM UTC 24 509496198 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.1071713849 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:26 PM UTC 24 39926642 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.4289637084 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:26 PM UTC 24 23021918 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.4026278067 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:26 PM UTC 24 168691187 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.3871380516 Aug 23 11:14:23 PM UTC 24 Aug 23 11:14:26 PM UTC 24 171388578 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.2725326766 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:26 PM UTC 24 75606942 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.2718510734 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:26 PM UTC 24 51670498 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.40503196 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:26 PM UTC 24 363892166 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.2481537735 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:26 PM UTC 24 154805420 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.1740041668 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:26 PM UTC 24 337548756 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.25483523 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:27 PM UTC 24 878770094 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.3505497749 Aug 23 11:14:26 PM UTC 24 Aug 23 11:14:28 PM UTC 24 64314678 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.1476183117 Aug 23 11:14:26 PM UTC 24 Aug 23 11:14:28 PM UTC 24 70942168 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2175664658 Aug 23 11:14:24 PM UTC 24 Aug 23 11:14:28 PM UTC 24 863721463 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all_with_rand_reset.102197361 Aug 23 11:14:15 PM UTC 24 Aug 23 11:14:29 PM UTC 24 10128001306 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.1537668403 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 32408554 ps
T581 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.298403749 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:39 PM UTC 24 74115453 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.1282320480 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 55171439 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.1029808138 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 40903070 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.2611629156 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 35575189 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.2272508239 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 51326300 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.2164566623 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 603735272 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.3183589318 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 29754748 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.1700997896 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 145844872 ps
T589 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.2219857971 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 423443033 ps
T590 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.1983408735 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 57344027 ps
T591 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.473261139 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 55452195 ps
T592 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_invalid.2727129055 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 43889532 ps
T593 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.1876532626 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 103118617 ps
T594 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.2022502724 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 465247010 ps
T595 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_escalation_timeout.346606780 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 404978744 ps
T596 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_wakeup_race.1768530504 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 254554152 ps
T597 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.51951722 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:02 PM UTC 24 161974805 ps
T598 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.2884007804 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:02 PM UTC 24 55722294 ps
T599 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.3818139681 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 36607795 ps
T600 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.2285504119 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 330805031 ps
T601 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.3324226112 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 126793860 ps
T602 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.2264026856 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 391654250 ps
T603 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.1108665770 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 50435863 ps
T604 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.2299379077 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 43955365 ps
T605 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.3770211172 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 51153254 ps
T606 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_escalation_timeout.2750598821 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:40 PM UTC 24 109732170 ps
T607 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.655522164 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:41 PM UTC 24 267788393 ps
T608 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.403579118 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:41 PM UTC 24 216973873 ps
T609 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2202438644 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:41 PM UTC 24 1215014791 ps
T610 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2589470800 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:41 PM UTC 24 1014835689 ps
T611 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.3039820526 Aug 23 11:14:37 PM UTC 24 Aug 23 11:14:41 PM UTC 24 60115127 ps
T612 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.682202223 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:42 PM UTC 24 1290211292 ps
T613 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1366110232 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:42 PM UTC 24 1056322815 ps
T614 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.1600260679 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:45 PM UTC 24 2234690191 ps
T63 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.749581746 Aug 23 11:14:35 PM UTC 24 Aug 23 11:14:48 PM UTC 24 2610559030 ps
T615 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.507055772 Aug 23 11:14:48 PM UTC 24 Aug 23 11:14:50 PM UTC 24 72687549 ps
T616 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.473354433 Aug 23 11:14:48 PM UTC 24 Aug 23 11:14:50 PM UTC 24 79335559 ps
T617 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.2098442394 Aug 23 11:14:48 PM UTC 24 Aug 23 11:14:50 PM UTC 24 126666172 ps
T618 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.2424806658 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:50 PM UTC 24 32913246 ps
T619 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.3298725994 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 79716854 ps
T620 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.1654041170 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 33274211 ps
T621 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.2113528169 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 259819374 ps
T622 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.528318620 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 41248618 ps
T623 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.1581903639 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 176812716 ps
T624 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.1424843927 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 89873492 ps
T625 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.608932354 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 107760730 ps
T626 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.3568697604 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 90890444 ps
T627 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.548669358 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 41339553 ps
T628 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.1822561505 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 217168905 ps
T629 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.3272569407 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 443275588 ps
T630 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.199646970 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 391066807 ps
T631 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.3241501158 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 584133719 ps
T632 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.3509006444 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 69278172 ps
T633 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.3612188278 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 60224072 ps
T634 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.3019587106 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 64995605 ps
T635 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.2110204818 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 30857420 ps
T636 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.3164219466 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 183412433 ps
T637 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.2997215695 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 107692264 ps
T638 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.1626470095 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 121483803 ps
T639 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.3723845780 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:51 PM UTC 24 285327546 ps
T640 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.60179579 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:52 PM UTC 24 839312207 ps
T641 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.2954509058 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:52 PM UTC 24 3957950015 ps
T642 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.100007375 Aug 23 11:14:49 PM UTC 24 Aug 23 11:14:53 PM UTC 24 842532776 ps
T643 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.1103897908 Aug 23 11:14:51 PM UTC 24 Aug 23 11:14:53 PM UTC 24 76887811 ps
T644 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.210585593 Aug 23 11:14:51 PM UTC 24 Aug 23 11:14:54 PM UTC 24 1131696131 ps
T645 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3815320091 Aug 23 11:14:51 PM UTC 24 Aug 23 11:14:54 PM UTC 24 737051776 ps
T646 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.2359055851 Aug 23 11:15:00 PM UTC 24 Aug 23 11:15:02 PM UTC 24 36280055 ps
T647 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.969288594 Aug 23 11:15:00 PM UTC 24 Aug 23 11:15:02 PM UTC 24 41034842 ps
T648 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.1009016535 Aug 23 11:15:00 PM UTC 24 Aug 23 11:15:02 PM UTC 24 52847553 ps
T649 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.3492377126 Aug 23 11:15:00 PM UTC 24 Aug 23 11:15:02 PM UTC 24 48303718 ps
T650 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.3722293659 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:02 PM UTC 24 145515859 ps
T651 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.919245041 Aug 23 11:15:00 PM UTC 24 Aug 23 11:15:02 PM UTC 24 80830387 ps
T652 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.3842700214 Aug 23 11:15:00 PM UTC 24 Aug 23 11:15:02 PM UTC 24 113480358 ps
T653 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.388331031 Aug 23 11:15:00 PM UTC 24 Aug 23 11:15:03 PM UTC 24 241998952 ps
T654 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.1286660655 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 131484271 ps
T655 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.3568670818 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 86213751 ps
T656 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all_with_rand_reset.2948248 Aug 23 11:14:48 PM UTC 24 Aug 23 11:15:03 PM UTC 24 21534229072 ps
T657 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.4224436444 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 84509271 ps
T658 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.4114167501 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 287322745 ps
T659 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.376189437 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 53394543 ps
T660 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.3328790152 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 146118549 ps
T661 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.63557780 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 62571488 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.1505484538 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 150797212 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.2770386296 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 123006487 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.28849294 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 110467634 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.2532817024 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:03 PM UTC 24 1024085866 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3837283599 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:04 PM UTC 24 1071145141 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3899586389 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:04 PM UTC 24 946065883 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.225832060 Aug 23 11:15:25 PM UTC 24 Aug 23 11:15:27 PM UTC 24 151633469 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.2454845446 Aug 23 11:14:49 PM UTC 24 Aug 23 11:15:08 PM UTC 24 5325667399 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.1887710436 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:08 PM UTC 24 1991185516 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.202674408 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 31178408 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.2707788542 Aug 23 11:15:25 PM UTC 24 Aug 23 11:15:27 PM UTC 24 475497002 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.298527808 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 20395212 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.595077766 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 152223695 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.3823629704 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 314228505 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.3424098699 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 38510140 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.331270843 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 194197502 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.419545737 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 162798248 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.1031945469 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 53541833 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.400879672 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 153122204 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.810875515 Aug 23 11:15:25 PM UTC 24 Aug 23 11:15:27 PM UTC 24 371243321 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.3676239509 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 52896282 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.149067649 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 142670972 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.2452042212 Aug 23 11:15:25 PM UTC 24 Aug 23 11:15:27 PM UTC 24 43712435 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.1408350555 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 104789493 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.964171727 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 160082946 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.4060595365 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 210080731 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.1210510409 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:14 PM UTC 24 110676934 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.443558994 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:14 PM UTC 24 169717580 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.1696235762 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:15 PM UTC 24 42214158 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.3571884933 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:15 PM UTC 24 86837517 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.3977676530 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:15 PM UTC 24 439907616 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.2179367992 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:15 PM UTC 24 50668104 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.1502861180 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:15 PM UTC 24 103794328 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.1095136365 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:15 PM UTC 24 50367151 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.902311436 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:15 PM UTC 24 23891554 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.2313664211 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:15 PM UTC 24 39025685 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.2498481164 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:15 PM UTC 24 126456110 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2131493343 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:15 PM UTC 24 2880225741 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.1211003765 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:15 PM UTC 24 76639872 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.1308775874 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:15 PM UTC 24 288425495 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1730223301 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:16 PM UTC 24 1037420083 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4278184788 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:16 PM UTC 24 1209312771 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.2232173809 Aug 23 11:15:01 PM UTC 24 Aug 23 11:15:16 PM UTC 24 7682163185 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.926470841 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:17 PM UTC 24 2331944522 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2733602045 Aug 23 11:15:13 PM UTC 24 Aug 23 11:15:17 PM UTC 24 759132804 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.2022596096 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:26 PM UTC 24 62626122 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.2488798528 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:26 PM UTC 24 43180320 ps
T180 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.3790273921 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:26 PM UTC 24 119410699 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.2676173526 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:26 PM UTC 24 126080794 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.1938475483 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:26 PM UTC 24 223331018 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.1726461336 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:26 PM UTC 24 110271778 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.1866958719 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 62451261 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.1362393708 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 53397961 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.3814784684 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 94460122 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.3130097788 Aug 23 11:15:12 PM UTC 24 Aug 23 11:15:27 PM UTC 24 9762187342 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.2175952068 Aug 23 11:15:26 PM UTC 24 Aug 23 11:15:28 PM UTC 24 293180403 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.965671520 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 366164861 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.3469598791 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 85247261 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.1997483130 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 31202342 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.4205285082 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 231119311 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.1674841950 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 70533454 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.4174231719 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 79611968 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.1891025229 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 47084651 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.1342694095 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 122771539 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.2593611737 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:27 PM UTC 24 291117816 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1298997515 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:28 PM UTC 24 996262686 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.932718304 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:29 PM UTC 24 682189032 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3474960031 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:29 PM UTC 24 1008434878 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.4202766655 Aug 23 11:15:25 PM UTC 24 Aug 23 11:15:29 PM UTC 24 654023201 ps
T108 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.2751907207 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:36 PM UTC 24 5235086662 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.1973018085 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:38 PM UTC 24 29981733 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.2538382263 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:38 PM UTC 24 39810647 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.230115215 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:38 PM UTC 24 131944298 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.706122384 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:38 PM UTC 24 70672605 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.508280654 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:38 PM UTC 24 49041992 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.678855943 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:39 PM UTC 24 137657139 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.1118761453 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:39 PM UTC 24 89379842 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.3117992864 Aug 23 11:16:02 PM UTC 24 Aug 23 11:16:04 PM UTC 24 386405463 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.1364792238 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:39 PM UTC 24 42594371 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.3616618836 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 50047053 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.4026285195 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 28802953 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.876877488 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:39 PM UTC 24 146650770 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.2822855823 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 126506388 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.465643889 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:39 PM UTC 24 395482696 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.2335684440 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 104253635 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.3648246239 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 73291453 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.3371269267 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 39234208 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.3449234553 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 34564648 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.1966979766 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 246796541 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.3460445619 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 202795965 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.3216035925 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 412642013 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.3162974108 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 69530064 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.2139912327 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 57559972 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.187268381 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:39 PM UTC 24 246946346 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.3566473658 Aug 23 11:15:24 PM UTC 24 Aug 23 11:15:39 PM UTC 24 6639002219 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1937834517 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:40 PM UTC 24 1310762004 ps
T755 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3049548909 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:40 PM UTC 24 1110748660 ps
T756 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.66269837 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:40 PM UTC 24 820814521 ps
T757 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.735748841 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:41 PM UTC 24 821024136 ps
T758 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.3936651780 Aug 23 11:15:37 PM UTC 24 Aug 23 11:15:43 PM UTC 24 1751636233 ps
T759 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.648485704 Aug 23 11:15:36 PM UTC 24 Aug 23 11:15:48 PM UTC 24 2917573575 ps
T760 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.3861439798 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:48 PM UTC 24 71047535 ps
T761 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.581508700 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 36290066 ps
T762 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.2425243253 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 118592437 ps
T763 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.2577687032 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 118522510 ps
T764 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.947537504 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 65153474 ps
T765 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all.1053820463 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 177718307 ps
T766 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.3935373213 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 238263248 ps
T767 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.2698325877 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 75634872 ps
T768 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.4038205612 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 28873954 ps
T769 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.3564144659 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 34522989 ps
T770 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.60991606 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 100394829 ps
T771 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.780884163 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 33024788 ps
T772 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.207632596 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 111250753 ps
T773 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.40425367 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 102772318 ps
T774 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.2293981728 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 64925099 ps
T775 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.3950776952 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 41636731 ps
T776 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.2978136186 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 39594475 ps
T777 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.1734650602 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 111697828 ps
T778 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.1490504199 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 305371194 ps
T779 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.1769823542 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 150336554 ps
T780 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.4244742276 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 50482181 ps
T781 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.2582973956 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:49 PM UTC 24 173857543 ps
T782 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.3142479465 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:50 PM UTC 24 1006274974 ps
T783 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1878916956 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:50 PM UTC 24 833802925 ps
T784 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.2487727795 Aug 23 11:16:03 PM UTC 24 Aug 23 11:16:04 PM UTC 24 27306725 ps
T785 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2715617325 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:51 PM UTC 24 831453068 ps
T786 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.3902104859 Aug 23 11:15:50 PM UTC 24 Aug 23 11:15:52 PM UTC 24 27662355 ps
T787 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.3900000162 Aug 23 11:15:50 PM UTC 24 Aug 23 11:15:52 PM UTC 24 93838869 ps
T788 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.591095971 Aug 23 11:15:50 PM UTC 24 Aug 23 11:15:52 PM UTC 24 341666103 ps
T789 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.155558846 Aug 23 11:15:50 PM UTC 24 Aug 23 11:15:53 PM UTC 24 1192069673 ps
T790 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4085469098 Aug 23 11:15:50 PM UTC 24 Aug 23 11:15:54 PM UTC 24 836315348 ps
T791 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all_with_rand_reset.2305965397 Aug 23 11:15:47 PM UTC 24 Aug 23 11:15:57 PM UTC 24 14757098738 ps
T792 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.3427476839 Aug 23 11:16:02 PM UTC 24 Aug 23 11:16:04 PM UTC 24 32878234 ps
T793 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.645628559 Aug 23 11:16:02 PM UTC 24 Aug 23 11:16:04 PM UTC 24 84548771 ps
T794 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_invalid.419103888 Aug 23 11:16:02 PM UTC 24 Aug 23 11:16:04 PM UTC 24 41527720 ps
T795 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.982361 Aug 23 11:16:02 PM UTC 24 Aug 23 11:16:04 PM UTC 24 48387410 ps
T796 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.636342 Aug 23 11:16:02 PM UTC 24 Aug 23 11:16:04 PM UTC 24 113947246 ps
T797 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.2013821976 Aug 23 11:16:02 PM UTC 24 Aug 23 11:16:05 PM UTC 24 68061446 ps
T798 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.2868777278 Aug 23 11:16:03 PM UTC 24 Aug 23 11:16:05 PM UTC 24 114573547 ps
T799 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.3176605265 Aug 23 11:16:02 PM UTC 24 Aug 23 11:16:05 PM UTC 24 118553406 ps
T800 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.126128047 Aug 23 11:16:03 PM UTC 24 Aug 23 11:16:05 PM UTC 24 57659763 ps
T801 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.2950152867 Aug 23 11:16:03 PM UTC 24 Aug 23 11:16:05 PM UTC 24 278331268 ps
T802 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.3209322061 Aug 23 11:16:03 PM UTC 24 Aug 23 11:16:05 PM UTC 24 158737064 ps
T803 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.1830273853 Aug 23 11:16:03 PM UTC 24 Aug 23 11:16:05 PM UTC 24 33762573 ps
T804 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.950616910 Aug 23 11:16:03 PM UTC 24 Aug 23 11:16:05 PM UTC 24 24794509 ps
T805 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.2463099461 Aug 23 11:16:03 PM UTC 24 Aug 23 11:16:05 PM UTC 24 143295879 ps
T806 /workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.801708243 Aug 23 11:16:03 PM UTC 24 Aug 23 11:16:05 PM UTC 24 65401655 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%