| T807 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.2136107113 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:05 PM UTC 24 |
32054844 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.839826049 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:05 PM UTC 24 |
52331985 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.2422276137 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:05 PM UTC 24 |
203501257 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.1821082680 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:05 PM UTC 24 |
55781791 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.1703875248 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:05 PM UTC 24 |
401324527 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.1479860673 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:05 PM UTC 24 |
136687378 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.2569654352 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:05 PM UTC 24 |
91866340 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.872685153 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:05 PM UTC 24 |
94678609 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.1385807123 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:05 PM UTC 24 |
250729793 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1628251197 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:06 PM UTC 24 |
1263752261 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.738363102 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:06 PM UTC 24 |
1402440491 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all_with_rand_reset.1672725331 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:06 PM UTC 24 |
1142589788 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1111503218 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:07 PM UTC 24 |
852252058 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all.2295044053 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:10 PM UTC 24 |
1903871823 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.4035646453 |
|
|
Aug 23 11:16:03 PM UTC 24 |
Aug 23 11:16:16 PM UTC 24 |
11137072569 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.3144861326 |
|
|
Aug 23 11:16:16 PM UTC 24 |
Aug 23 11:16:18 PM UTC 24 |
31662736 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_aborted_low_power.3114677728 |
|
|
Aug 23 11:16:16 PM UTC 24 |
Aug 23 11:16:18 PM UTC 24 |
31853213 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.1805517281 |
|
|
Aug 23 11:16:16 PM UTC 24 |
Aug 23 11:16:18 PM UTC 24 |
317176293 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_global_esc.3820330191 |
|
|
Aug 23 11:16:16 PM UTC 24 |
Aug 23 11:16:18 PM UTC 24 |
47604290 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_glitch.3348484022 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:18 PM UTC 24 |
75001061 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.3573415379 |
|
|
Aug 23 11:16:16 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
177394781 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_smoke.349875573 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
50659398 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_smoke.3095594283 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
31269460 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_invalid.3305646974 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
80451395 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset_invalid.3215236855 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
99096545 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_disable_rom_integrity_check.3281229625 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
97311737 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_ctrl_config_regwen.337542744 |
|
|
Aug 23 11:16:16 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
136804863 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.1667773366 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
141456898 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_disable_rom_integrity_check.5699820 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
71178165 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_esc_clk_rst_malfunc.3212331100 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
32297496 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_aborted_low_power.67950886 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
33466987 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.2410282054 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
58650641 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.677021735 |
|
|
Aug 23 11:16:16 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
275557792 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.578614823 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
64121073 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_global_esc.4139856537 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
32421486 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_glitch.4013988253 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
45931865 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_disable_rom_integrity_check.2356453553 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
67451699 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup_reset.2132751321 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
138625995 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.3515798502 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
340343537 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all.4070690987 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
246024882 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_escalation_timeout.3182701642 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
935903752 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.973547958 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:19 PM UTC 24 |
237896481 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.517850906 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:20 PM UTC 24 |
1319749812 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.771718938 |
|
|
Aug 23 11:16:16 PM UTC 24 |
Aug 23 11:16:20 PM UTC 24 |
803424013 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1823386514 |
|
|
Aug 23 11:16:16 PM UTC 24 |
Aug 23 11:16:20 PM UTC 24 |
865527632 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset_invalid.1072701907 |
|
|
Aug 23 11:16:19 PM UTC 24 |
Aug 23 11:16:21 PM UTC 24 |
113021330 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.997491644 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:21 PM UTC 24 |
869122600 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_escalation_timeout.392652203 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
1169692728 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_invalid.278870140 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:33 PM UTC 24 |
42387367 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_smoke.4285354726 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:33 PM UTC 24 |
34782739 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup.3852786330 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:33 PM UTC 24 |
47739954 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset.2925414265 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:33 PM UTC 24 |
154522229 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset.1214900493 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
89447856 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_wakeup_race.299452096 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:33 PM UTC 24 |
323711222 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_aborted_low_power.1294175983 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
82997434 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.553136362 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
32167182 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_global_esc.2798872240 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
123325375 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_glitch.786785031 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
58420741 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset_invalid.2184185397 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
99244076 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup_reset.2397695868 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
392114221 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_ctrl_config_regwen.1021863357 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
132486491 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_invalid.3679464124 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
41346642 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rstmgr_intersig_mubi.3362908094 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
51790841 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup.781420036 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
47982837 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rstmgr_intersig_mubi.3856708921 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
96082077 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup_reset.1884364973 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
400665575 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_aborted_low_power.4188302443 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
31163934 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_wakeup_race.2005396789 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:34 PM UTC 24 |
239106453 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1652779795 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:35 PM UTC 24 |
954742511 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1352605452 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:35 PM UTC 24 |
1109634322 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1657852645 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:35 PM UTC 24 |
784993976 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3561252150 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:36 PM UTC 24 |
810780207 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all.2468879481 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:36 PM UTC 24 |
1791553547 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all_with_rand_reset.3558137455 |
|
|
Aug 23 11:16:17 PM UTC 24 |
Aug 23 11:16:39 PM UTC 24 |
9754977188 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all_with_rand_reset.1888342890 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:39 PM UTC 24 |
1756934798 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all_with_rand_reset.3568710719 |
|
|
Aug 23 11:16:31 PM UTC 24 |
Aug 23 11:16:39 PM UTC 24 |
3749093321 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all.4250120945 |
|
|
Aug 23 11:16:32 PM UTC 24 |
Aug 23 11:16:40 PM UTC 24 |
2018593943 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.3664911595 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
28617138 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_global_esc.1498060137 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
28788401 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_glitch.2896329799 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
55333163 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_disable_rom_integrity_check.1305733393 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
76903493 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_escalation_timeout.1200012700 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
369976976 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_invalid.1329832722 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
83008154 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset_invalid.872909334 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
165102048 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_escalation_timeout.2379486575 |
|
|
Aug 23 11:17:02 PM UTC 24 |
Aug 23 11:17:04 PM UTC 24 |
1182762857 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_smoke.3332435237 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
159101030 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_ctrl_config_regwen.820540415 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
166884152 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset.2011971981 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
139862009 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup_reset.1376770539 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:47 PM UTC 24 |
172074249 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_wakeup_race.421399893 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
193071866 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.3107582558 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
29841461 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_aborted_low_power.2674498388 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
90323707 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup.1966288787 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
299642930 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1199070669 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:04 PM UTC 24 |
851893024 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_global_esc.362171828 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
23826910 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_disable_rom_integrity_check.895778120 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
169372620 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_ctrl_config_regwen.892849796 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
108631368 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.2710350932 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
54023734 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_escalation_timeout.1409009153 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
108211894 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_glitch.1857094728 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
26761761 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_smoke.1697920566 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
33629735 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_invalid.3778323411 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
43560262 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset_invalid.294976705 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
108427678 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_stress_all.1992073874 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:48 PM UTC 24 |
261684260 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1033806456 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:49 PM UTC 24 |
810280129 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.953947049 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:49 PM UTC 24 |
878609350 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_stress_all_with_rand_reset.3612809125 |
|
|
Aug 23 11:16:46 PM UTC 24 |
Aug 23 11:16:51 PM UTC 24 |
1148105107 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all.1382292744 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:16:53 PM UTC 24 |
1662225251 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all_with_rand_reset.2672957002 |
|
|
Aug 23 11:16:45 PM UTC 24 |
Aug 23 11:17:01 PM UTC 24 |
4722746210 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_wakeup.3105353083 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:01 PM UTC 24 |
125468739 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_wakeup_race.3858764608 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:01 PM UTC 24 |
107832106 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset.1065202674 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:01 PM UTC 24 |
142207537 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_wakeup_reset.443776757 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:01 PM UTC 24 |
94681442 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_glitch.3424246154 |
|
|
Aug 23 11:17:02 PM UTC 24 |
Aug 23 11:17:04 PM UTC 24 |
34249031 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_aborted_low_power.1269701548 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:01 PM UTC 24 |
56249553 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.2792171331 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:01 PM UTC 24 |
37813809 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_glitch.3639849000 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
31813382 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_global_esc.3202141562 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
45524417 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_disable_rom_integrity_check.1797179627 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
67247387 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_rstmgr_intersig_mubi.3668194633 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
104033428 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_escalation_timeout.54326872 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
340212742 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_invalid.471590809 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
49062162 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_smoke.3139268100 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
29745878 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.2426056684 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
153364558 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_esc_clk_rst_malfunc.1648134943 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
39354715 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset.3637897260 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
134627358 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset_invalid.1898315660 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
109735781 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_ctrl_config_regwen.1136206324 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
65045576 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_global_esc.706906968 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
24746712 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_aborted_low_power.1543053175 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
89966214 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup.4167714459 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
547158502 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_rstmgr_intersig_mubi.3834603238 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
153465553 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_wakeup_race.1422345192 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:02 PM UTC 24 |
308181349 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup_reset.637972148 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:03 PM UTC 24 |
302709932 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.381621323 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:03 PM UTC 24 |
921527336 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all.4226665459 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:03 PM UTC 24 |
407360010 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2677897582 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:03 PM UTC 24 |
1633971006 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.874057462 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:05 PM UTC 24 |
861260136 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all_with_rand_reset.3541522934 |
|
|
Aug 23 11:17:00 PM UTC 24 |
Aug 23 11:17:13 PM UTC 24 |
12517986886 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_invalid.184125836 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:18 PM UTC 24 |
57470902 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_disable_rom_integrity_check.3216897104 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
75588255 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_smoke.2218469816 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
40472057 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset.4029968145 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
40803418 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup_reset.3856714866 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
140780457 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset_invalid.629170658 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
103206307 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup.958784799 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
80804446 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_aborted_low_power.1532296541 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
39124380 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_esc_clk_rst_malfunc.1128997242 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
29774937 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rstmgr_intersig_mubi.1807988617 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
76981193 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_global_esc.1430679859 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
34839762 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_glitch.762659211 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
38028057 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.2435094001 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
683586173 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_smoke.751381927 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
35728390 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_wakeup_race.1645291354 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
348634352 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_aborted_low_power.3821488894 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
37563275 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup.898486431 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
77149956 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_invalid.2091295509 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:19 PM UTC 24 |
44593201 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_escalation_timeout.3419717116 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:20 PM UTC 24 |
109117473 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all.919416890 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:20 PM UTC 24 |
83006538 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_disable_rom_integrity_check.1100729246 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:20 PM UTC 24 |
61405705 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset.1288747179 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:20 PM UTC 24 |
44755950 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset_invalid.809853199 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:20 PM UTC 24 |
106702769 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup_reset.3859902994 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:20 PM UTC 24 |
537592099 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_wakeup_race.1253654929 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:20 PM UTC 24 |
198475221 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3814918223 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:20 PM UTC 24 |
1169038668 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.384792795 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:21 PM UTC 24 |
824847417 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all_with_rand_reset.2545482586 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:21 PM UTC 24 |
1534639760 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.358647405 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:21 PM UTC 24 |
829937517 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all.625784741 |
|
|
Aug 23 11:17:16 PM UTC 24 |
Aug 23 11:17:22 PM UTC 24 |
1665085876 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.364616246 |
|
|
Aug 23 11:17:18 PM UTC 24 |
Aug 23 11:17:23 PM UTC 24 |
832534511 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all_with_rand_reset.1292296495 |
|
|
Aug 23 11:17:17 PM UTC 24 |
Aug 23 11:17:28 PM UTC 24 |
3890191881 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_global_esc.1059535200 |
|
|
Aug 23 11:17:32 PM UTC 24 |
Aug 23 11:17:34 PM UTC 24 |
52334685 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_esc_clk_rst_malfunc.2922816599 |
|
|
Aug 23 11:17:32 PM UTC 24 |
Aug 23 11:17:34 PM UTC 24 |
29789393 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_glitch.2565497454 |
|
|
Aug 23 11:17:32 PM UTC 24 |
Aug 23 11:17:34 PM UTC 24 |
38863363 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_ctrl_config_regwen.3254933401 |
|
|
Aug 23 11:17:32 PM UTC 24 |
Aug 23 11:17:34 PM UTC 24 |
49228288 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_disable_rom_integrity_check.1208986945 |
|
|
Aug 23 11:17:32 PM UTC 24 |
Aug 23 11:17:34 PM UTC 24 |
87121824 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset.3573588213 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
47413147 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_escalation_timeout.1551010241 |
|
|
Aug 23 11:17:32 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
110232502 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rstmgr_intersig_mubi.3377983245 |
|
|
Aug 23 11:17:32 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
78658402 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_invalid.159877728 |
|
|
Aug 23 11:17:32 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
39125099 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset_invalid.1261826689 |
|
|
Aug 23 11:17:32 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
102970961 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.4018752996 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
37954030 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_smoke.768076703 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
30015480 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_global_esc.1660540975 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
76461156 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup.88484429 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
377891784 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_aborted_low_power.1340568781 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
57227101 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_wakeup_race.1648986760 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
47184174 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.3282509795 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
53367653 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_glitch.3571250735 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
33727987 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset_invalid.1913683037 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
296907718 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_invalid.2335183837 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
83532356 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_disable_rom_integrity_check.1317544037 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
50707502 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_escalation_timeout.2421754809 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
434351314 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup_reset.3921073118 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:35 PM UTC 24 |
184578853 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.1795818812 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:36 PM UTC 24 |
272067414 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3807452269 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:36 PM UTC 24 |
1051549054 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1585755564 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:37 PM UTC 24 |
840687449 ps |
| T1003 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all.3616424191 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:40 PM UTC 24 |
1461922378 ps |
| T1004 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all.593972136 |
|
|
Aug 23 11:17:35 PM UTC 24 |
Aug 23 11:17:41 PM UTC 24 |
1215670093 ps |
| T1005 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all_with_rand_reset.2045442788 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:47 PM UTC 24 |
9770109862 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all_with_rand_reset.876443646 |
|
|
Aug 23 11:17:33 PM UTC 24 |
Aug 23 11:17:52 PM UTC 24 |
5445131244 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_intr_test.2691826370 |
|
|
Aug 23 10:21:27 PM UTC 24 |
Aug 23 10:21:29 PM UTC 24 |
61284005 ps |
| T53 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.1265416822 |
|
|
Aug 23 10:21:27 PM UTC 24 |
Aug 23 10:21:29 PM UTC 24 |
32916838 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_rw.1809080725 |
|
|
Aug 23 10:21:27 PM UTC 24 |
Aug 23 10:21:29 PM UTC 24 |
71950350 ps |
| T48 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_intg_err.2633520643 |
|
|
Aug 23 10:21:27 PM UTC 24 |
Aug 23 10:21:30 PM UTC 24 |
397331818 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_errors.1436387338 |
|
|
Aug 23 10:21:27 PM UTC 24 |
Aug 23 10:21:30 PM UTC 24 |
63773429 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_csr_rw.3893023780 |
|
|
Aug 23 10:21:38 PM UTC 24 |
Aug 23 10:21:39 PM UTC 24 |
22494563 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.1396882341 |
|
|
Aug 23 10:21:28 PM UTC 24 |
Aug 23 10:21:30 PM UTC 24 |
31435423 ps |
| T73 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_mem_rw_with_rand_reset.2468516033 |
|
|
Aug 23 10:21:28 PM UTC 24 |
Aug 23 10:21:30 PM UTC 24 |
35662259 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_intr_test.1181231538 |
|
|
Aug 23 10:21:28 PM UTC 24 |
Aug 23 10:21:30 PM UTC 24 |
33972859 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_hw_reset.2710421623 |
|
|
Aug 23 10:21:29 PM UTC 24 |
Aug 23 10:21:30 PM UTC 24 |
29769079 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_rw.1969422863 |
|
|
Aug 23 10:21:29 PM UTC 24 |
Aug 23 10:21:30 PM UTC 24 |
141268867 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.442184646 |
|
|
Aug 23 10:21:28 PM UTC 24 |
Aug 23 10:21:30 PM UTC 24 |
71774522 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.1724217750 |
|
|
Aug 23 10:21:28 PM UTC 24 |
Aug 23 10:21:31 PM UTC 24 |
215855431 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.481652415 |
|
|
Aug 23 10:21:28 PM UTC 24 |
Aug 23 10:21:31 PM UTC 24 |
43819375 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_errors.2192613325 |
|
|
Aug 23 10:21:28 PM UTC 24 |
Aug 23 10:21:31 PM UTC 24 |
44327226 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_intr_test.634424387 |
|
|
Aug 23 10:21:30 PM UTC 24 |
Aug 23 10:21:32 PM UTC 24 |
38256211 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.3563591118 |
|
|
Aug 23 10:21:30 PM UTC 24 |
Aug 23 10:21:32 PM UTC 24 |
64458375 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.3790052590 |
|
|
Aug 23 10:21:30 PM UTC 24 |
Aug 23 10:21:32 PM UTC 24 |
82453926 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_rw.862724485 |
|
|
Aug 23 10:21:30 PM UTC 24 |
Aug 23 10:21:32 PM UTC 24 |
27597442 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.1814437436 |
|
|
Aug 23 10:21:30 PM UTC 24 |
Aug 23 10:21:32 PM UTC 24 |
26073852 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.3417876108 |
|
|
Aug 23 10:21:30 PM UTC 24 |
Aug 23 10:21:32 PM UTC 24 |
279098488 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.3756447466 |
|
|
Aug 23 10:21:30 PM UTC 24 |
Aug 23 10:21:33 PM UTC 24 |
115671937 ps |
| T1006 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.2376282523 |
|
|
Aug 23 10:21:31 PM UTC 24 |
Aug 23 10:21:33 PM UTC 24 |
30746608 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.3247180105 |
|
|
Aug 23 10:21:31 PM UTC 24 |
Aug 23 10:21:33 PM UTC 24 |
32751675 ps |
| T1007 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_intr_test.2915684645 |
|
|
Aug 23 10:21:31 PM UTC 24 |
Aug 23 10:21:33 PM UTC 24 |
23115718 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.3880532817 |
|
|
Aug 23 10:21:31 PM UTC 24 |
Aug 23 10:21:33 PM UTC 24 |
65210523 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_rw.1943497079 |
|
|
Aug 23 10:21:31 PM UTC 24 |
Aug 23 10:21:33 PM UTC 24 |
36662556 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.2840647609 |
|
|
Aug 23 10:21:31 PM UTC 24 |
Aug 23 10:21:33 PM UTC 24 |
31208520 ps |
| T1008 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.1127216644 |
|
|
Aug 23 10:21:30 PM UTC 24 |
Aug 23 10:21:34 PM UTC 24 |
297806633 ps |
| T74 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_errors.1231901406 |
|
|
Aug 23 10:21:30 PM UTC 24 |
Aug 23 10:21:34 PM UTC 24 |
941593238 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_bit_bash.3412370396 |
|
|
Aug 23 10:21:31 PM UTC 24 |
Aug 23 10:21:34 PM UTC 24 |
80183099 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.1484665507 |
|
|
Aug 23 10:21:31 PM UTC 24 |
Aug 23 10:21:34 PM UTC 24 |
256037041 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_errors.2346342780 |
|
|
Aug 23 10:21:31 PM UTC 24 |
Aug 23 10:21:34 PM UTC 24 |
98716534 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_same_csr_outstanding.985525071 |
|
|
Aug 23 10:21:32 PM UTC 24 |
Aug 23 10:21:34 PM UTC 24 |
170066976 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.481323244 |
|
|
Aug 23 10:21:32 PM UTC 24 |
Aug 23 10:21:34 PM UTC 24 |
62388556 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_intr_test.105972024 |
|
|
Aug 23 10:21:32 PM UTC 24 |
Aug 23 10:21:34 PM UTC 24 |
23598107 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.904042696 |
|
|
Aug 23 10:21:33 PM UTC 24 |
Aug 23 10:21:34 PM UTC 24 |
60039317 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.1459984009 |
|
|
Aug 23 10:21:32 PM UTC 24 |
Aug 23 10:21:34 PM UTC 24 |
141433337 ps |
| T1009 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.3396153504 |
|
|
Aug 23 10:21:32 PM UTC 24 |
Aug 23 10:21:35 PM UTC 24 |
279648468 ps |
| T1010 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.1671554342 |
|
|
Aug 23 10:21:32 PM UTC 24 |
Aug 23 10:21:35 PM UTC 24 |
200462879 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_same_csr_outstanding.395995099 |
|
|
Aug 23 10:21:34 PM UTC 24 |
Aug 23 10:21:35 PM UTC 24 |
41323127 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_rw.3295559502 |
|
|
Aug 23 10:21:34 PM UTC 24 |
Aug 23 10:21:35 PM UTC 24 |
39746692 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_aliasing.1342992282 |
|
|
Aug 23 10:21:34 PM UTC 24 |
Aug 23 10:21:36 PM UTC 24 |
25191164 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_mem_rw_with_rand_reset.293437806 |
|
|
Aug 23 10:21:34 PM UTC 24 |
Aug 23 10:21:36 PM UTC 24 |
155519642 ps |
| T1011 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_errors.198029556 |
|
|
Aug 23 10:21:32 PM UTC 24 |
Aug 23 10:21:36 PM UTC 24 |
238501206 ps |
| T1012 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_intg_err.3206038760 |
|
|
Aug 23 10:21:34 PM UTC 24 |
Aug 23 10:21:36 PM UTC 24 |
297705787 ps |
| T1013 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_errors.3415932275 |
|
|
Aug 23 10:21:34 PM UTC 24 |
Aug 23 10:21:36 PM UTC 24 |
58658561 ps |
| T1014 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.905218555 |
|
|
Aug 23 10:21:34 PM UTC 24 |
Aug 23 10:21:36 PM UTC 24 |
146408140 ps |
| T1015 |
/workspaces/repo/scratch/os_regression_2024_08_22/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_intr_test.3427477119 |
|
|
Aug 23 10:21:35 PM UTC 24 |
Aug 23 10:21:37 PM UTC 24 |
19066830 ps |