Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4783 |
1 |
|
|
T3 |
1 |
|
T7 |
11 |
|
T10 |
1 |
auto[1] |
14017 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
8 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8397 |
1 |
|
|
T3 |
1 |
|
T4 |
4 |
|
T7 |
7 |
auto[1] |
10403 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8915 |
1 |
|
|
T3 |
1 |
|
T4 |
5 |
|
T7 |
7 |
auto[1] |
9885 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
3 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1078 |
1 |
|
|
T3 |
1 |
|
T7 |
1 |
|
T10 |
1 |
auto[0] |
auto[0] |
auto[1] |
1087 |
1 |
|
|
T7 |
5 |
|
T34 |
1 |
|
T36 |
1 |
auto[0] |
auto[1] |
auto[0] |
3260 |
1 |
|
|
T4 |
3 |
|
T9 |
2 |
|
T34 |
2 |
auto[0] |
auto[1] |
auto[1] |
2972 |
1 |
|
|
T4 |
1 |
|
T7 |
1 |
|
T9 |
2 |
auto[1] |
auto[0] |
auto[0] |
1091 |
1 |
|
|
T7 |
2 |
|
T34 |
1 |
|
T36 |
1 |
auto[1] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T7 |
3 |
|
T34 |
3 |
|
T36 |
3 |
auto[1] |
auto[1] |
auto[0] |
3486 |
1 |
|
|
T4 |
2 |
|
T7 |
4 |
|
T9 |
4 |
auto[1] |
auto[1] |
auto[1] |
4299 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4783 |
1 |
|
|
T3 |
1 |
|
T7 |
11 |
|
T10 |
1 |
auto[1] |
14017 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
8 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8383 |
1 |
|
|
T4 |
3 |
|
T7 |
11 |
|
T9 |
4 |
auto[1] |
10417 |
1 |
|
|
T1 |
1 |
|
T3 |
2 |
|
T4 |
5 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8927 |
1 |
|
|
T1 |
1 |
|
T4 |
4 |
|
T7 |
8 |
auto[1] |
9873 |
1 |
|
|
T3 |
2 |
|
T4 |
4 |
|
T7 |
12 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1112 |
1 |
|
|
T7 |
3 |
|
T34 |
3 |
|
T36 |
1 |
auto[0] |
auto[0] |
auto[1] |
1110 |
1 |
|
|
T7 |
4 |
|
T34 |
1 |
|
T36 |
2 |
auto[0] |
auto[1] |
auto[0] |
3273 |
1 |
|
|
T4 |
1 |
|
T7 |
3 |
|
T9 |
4 |
auto[0] |
auto[1] |
auto[1] |
2888 |
1 |
|
|
T4 |
2 |
|
T7 |
1 |
|
T36 |
1 |
auto[1] |
auto[0] |
auto[0] |
1070 |
1 |
|
|
T7 |
1 |
|
T34 |
2 |
|
T36 |
1 |
auto[1] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T3 |
1 |
|
T7 |
3 |
|
T10 |
1 |
auto[1] |
auto[1] |
auto[0] |
3472 |
1 |
|
|
T1 |
1 |
|
T4 |
3 |
|
T7 |
1 |
auto[1] |
auto[1] |
auto[1] |
4384 |
1 |
|
|
T3 |
1 |
|
T4 |
2 |
|
T7 |
4 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4783 |
1 |
|
|
T3 |
1 |
|
T7 |
11 |
|
T10 |
1 |
auto[1] |
14017 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
8 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8473 |
1 |
|
|
T3 |
1 |
|
T4 |
5 |
|
T7 |
12 |
auto[1] |
10327 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
3 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8942 |
1 |
|
|
T1 |
1 |
|
T4 |
7 |
|
T7 |
12 |
auto[1] |
9858 |
1 |
|
|
T3 |
2 |
|
T4 |
1 |
|
T7 |
8 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1055 |
1 |
|
|
T7 |
5 |
|
T34 |
2 |
|
T36 |
1 |
auto[0] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T3 |
1 |
|
T7 |
2 |
|
T34 |
3 |
auto[0] |
auto[1] |
auto[0] |
3322 |
1 |
|
|
T4 |
5 |
|
T7 |
5 |
|
T9 |
3 |
auto[0] |
auto[1] |
auto[1] |
2943 |
1 |
|
|
T9 |
3 |
|
T10 |
1 |
|
T34 |
3 |
auto[1] |
auto[0] |
auto[0] |
1076 |
1 |
|
|
T7 |
2 |
|
T34 |
2 |
|
T36 |
1 |
auto[1] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T7 |
2 |
|
T10 |
1 |
|
T34 |
2 |
auto[1] |
auto[1] |
auto[0] |
3489 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T9 |
3 |
auto[1] |
auto[1] |
auto[1] |
4263 |
1 |
|
|
T3 |
1 |
|
T4 |
1 |
|
T7 |
4 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4783 |
1 |
|
|
T3 |
1 |
|
T7 |
11 |
|
T10 |
1 |
auto[1] |
14017 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
8 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8552 |
1 |
|
|
T3 |
1 |
|
T4 |
5 |
|
T7 |
7 |
auto[1] |
10248 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
3 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9003 |
1 |
|
|
T1 |
1 |
|
T4 |
7 |
|
T7 |
6 |
auto[1] |
9797 |
1 |
|
|
T3 |
2 |
|
T4 |
1 |
|
T7 |
14 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1161 |
1 |
|
|
T7 |
3 |
|
T34 |
1 |
|
T36 |
1 |
auto[0] |
auto[0] |
auto[1] |
1133 |
1 |
|
|
T7 |
1 |
|
T34 |
2 |
|
T36 |
1 |
auto[0] |
auto[1] |
auto[0] |
3281 |
1 |
|
|
T4 |
4 |
|
T7 |
2 |
|
T9 |
2 |
auto[0] |
auto[1] |
auto[1] |
2977 |
1 |
|
|
T3 |
1 |
|
T4 |
1 |
|
T7 |
1 |
auto[1] |
auto[0] |
auto[0] |
1069 |
1 |
|
|
T10 |
1 |
|
T34 |
1 |
|
T36 |
2 |
auto[1] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T3 |
1 |
|
T7 |
7 |
|
T34 |
5 |
auto[1] |
auto[1] |
auto[0] |
3492 |
1 |
|
|
T1 |
1 |
|
T4 |
3 |
|
T7 |
1 |
auto[1] |
auto[1] |
auto[1] |
4267 |
1 |
|
|
T7 |
5 |
|
T9 |
3 |
|
T34 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4783 |
1 |
|
|
T3 |
1 |
|
T7 |
11 |
|
T10 |
1 |
auto[1] |
14017 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
8 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8605 |
1 |
|
|
T3 |
1 |
|
T4 |
2 |
|
T7 |
9 |
auto[1] |
10195 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
6 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8906 |
1 |
|
|
T3 |
2 |
|
T4 |
4 |
|
T7 |
6 |
auto[1] |
9894 |
1 |
|
|
T1 |
1 |
|
T4 |
4 |
|
T7 |
14 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1105 |
1 |
|
|
T3 |
1 |
|
T7 |
1 |
|
T34 |
4 |
auto[0] |
auto[0] |
auto[1] |
1097 |
1 |
|
|
T7 |
3 |
|
T34 |
2 |
|
T36 |
1 |
auto[0] |
auto[1] |
auto[0] |
3343 |
1 |
|
|
T4 |
2 |
|
T7 |
1 |
|
T9 |
2 |
auto[0] |
auto[1] |
auto[1] |
3060 |
1 |
|
|
T7 |
4 |
|
T9 |
3 |
|
T33 |
1 |
auto[1] |
auto[0] |
auto[0] |
1073 |
1 |
|
|
T7 |
1 |
|
T34 |
1 |
|
T36 |
4 |
auto[1] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T7 |
6 |
|
T10 |
1 |
|
T34 |
2 |
auto[1] |
auto[1] |
auto[0] |
3385 |
1 |
|
|
T3 |
1 |
|
T4 |
2 |
|
T7 |
3 |
auto[1] |
auto[1] |
auto[1] |
4229 |
1 |
|
|
T1 |
1 |
|
T4 |
4 |
|
T7 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4783 |
1 |
|
|
T3 |
1 |
|
T7 |
11 |
|
T10 |
1 |
auto[1] |
14017 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
8 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8486 |
1 |
|
|
T3 |
1 |
|
T4 |
5 |
|
T7 |
11 |
auto[1] |
10314 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
3 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8956 |
1 |
|
|
T1 |
1 |
|
T3 |
2 |
|
T4 |
5 |
auto[1] |
9844 |
1 |
|
|
T4 |
3 |
|
T7 |
9 |
|
T9 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1086 |
1 |
|
|
T3 |
1 |
|
T7 |
5 |
|
T34 |
1 |
auto[0] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T7 |
3 |
|
T10 |
1 |
|
T34 |
3 |
auto[0] |
auto[1] |
auto[0] |
3223 |
1 |
|
|
T4 |
3 |
|
T7 |
3 |
|
T9 |
3 |
auto[0] |
auto[1] |
auto[1] |
3034 |
1 |
|
|
T4 |
2 |
|
T9 |
1 |
|
T10 |
2 |
auto[1] |
auto[0] |
auto[0] |
1151 |
1 |
|
|
T7 |
1 |
|
T34 |
2 |
|
T99 |
3 |
auto[1] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T7 |
2 |
|
T34 |
3 |
|
T36 |
3 |
auto[1] |
auto[1] |
auto[0] |
3496 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
2 |
auto[1] |
auto[1] |
auto[1] |
4264 |
1 |
|
|
T4 |
1 |
|
T7 |
4 |
|
T9 |
3 |