Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5053 |
1 |
|
|
T4 |
3 |
|
T6 |
5 |
|
T23 |
3 |
auto[1] |
15527 |
1 |
|
|
T1 |
1 |
|
T3 |
3 |
|
T4 |
6 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9198 |
1 |
|
|
T3 |
2 |
|
T4 |
2 |
|
T6 |
4 |
auto[1] |
11382 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
7 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9697 |
1 |
|
|
T1 |
1 |
|
T3 |
2 |
|
T4 |
2 |
auto[1] |
10883 |
1 |
|
|
T3 |
1 |
|
T4 |
7 |
|
T6 |
6 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1083 |
1 |
|
|
T6 |
2 |
|
T23 |
1 |
|
T16 |
7 |
auto[0] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T6 |
1 |
|
T23 |
1 |
|
T33 |
1 |
auto[0] |
auto[1] |
auto[0] |
3603 |
1 |
|
|
T3 |
1 |
|
T4 |
1 |
|
T10 |
10 |
auto[0] |
auto[1] |
auto[1] |
3305 |
1 |
|
|
T3 |
1 |
|
T4 |
1 |
|
T6 |
1 |
auto[1] |
auto[0] |
auto[0] |
1180 |
1 |
|
|
T6 |
2 |
|
T34 |
3 |
|
T16 |
6 |
auto[1] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T4 |
3 |
|
T23 |
1 |
|
T34 |
1 |
auto[1] |
auto[1] |
auto[0] |
3831 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
1 |
auto[1] |
auto[1] |
auto[1] |
4788 |
1 |
|
|
T4 |
3 |
|
T6 |
4 |
|
T10 |
13 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5053 |
1 |
|
|
T4 |
3 |
|
T6 |
5 |
|
T23 |
3 |
auto[1] |
15527 |
1 |
|
|
T1 |
1 |
|
T3 |
3 |
|
T4 |
6 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9264 |
1 |
|
|
T3 |
2 |
|
T4 |
5 |
|
T6 |
6 |
auto[1] |
11316 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9717 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
2 |
auto[1] |
10863 |
1 |
|
|
T3 |
2 |
|
T4 |
7 |
|
T6 |
8 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1173 |
1 |
|
|
T33 |
1 |
|
T34 |
2 |
|
T16 |
6 |
auto[0] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T4 |
1 |
|
T23 |
2 |
|
T34 |
2 |
auto[0] |
auto[1] |
auto[0] |
3583 |
1 |
|
|
T4 |
1 |
|
T6 |
2 |
|
T10 |
10 |
auto[0] |
auto[1] |
auto[1] |
3361 |
1 |
|
|
T3 |
2 |
|
T4 |
3 |
|
T6 |
4 |
auto[1] |
auto[0] |
auto[0] |
1129 |
1 |
|
|
T6 |
1 |
|
T34 |
1 |
|
T16 |
8 |
auto[1] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T4 |
2 |
|
T6 |
4 |
|
T23 |
1 |
auto[1] |
auto[1] |
auto[0] |
3832 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
1 |
auto[1] |
auto[1] |
auto[1] |
4751 |
1 |
|
|
T4 |
1 |
|
T10 |
13 |
|
T23 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5053 |
1 |
|
|
T4 |
3 |
|
T6 |
5 |
|
T23 |
3 |
auto[1] |
15527 |
1 |
|
|
T1 |
1 |
|
T3 |
3 |
|
T4 |
6 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9350 |
1 |
|
|
T3 |
1 |
|
T4 |
3 |
|
T6 |
8 |
auto[1] |
11230 |
1 |
|
|
T1 |
1 |
|
T3 |
2 |
|
T4 |
6 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9755 |
1 |
|
|
T3 |
2 |
|
T4 |
2 |
|
T6 |
5 |
auto[1] |
10825 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
7 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1175 |
1 |
|
|
T6 |
1 |
|
T23 |
2 |
|
T34 |
1 |
auto[0] |
auto[0] |
auto[1] |
1154 |
1 |
|
|
T6 |
2 |
|
T34 |
1 |
|
T16 |
10 |
auto[0] |
auto[1] |
auto[0] |
3660 |
1 |
|
|
T3 |
1 |
|
T4 |
1 |
|
T6 |
3 |
auto[0] |
auto[1] |
auto[1] |
3361 |
1 |
|
|
T4 |
2 |
|
T6 |
2 |
|
T10 |
19 |
auto[1] |
auto[0] |
auto[0] |
1123 |
1 |
|
|
T33 |
1 |
|
T34 |
2 |
|
T16 |
6 |
auto[1] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T4 |
3 |
|
T6 |
2 |
|
T23 |
1 |
auto[1] |
auto[1] |
auto[0] |
3797 |
1 |
|
|
T3 |
1 |
|
T4 |
1 |
|
T6 |
1 |
auto[1] |
auto[1] |
auto[1] |
4709 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5053 |
1 |
|
|
T4 |
3 |
|
T6 |
5 |
|
T23 |
3 |
auto[1] |
15527 |
1 |
|
|
T1 |
1 |
|
T3 |
3 |
|
T4 |
6 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9120 |
1 |
|
|
T3 |
3 |
|
T4 |
6 |
|
T6 |
8 |
auto[1] |
11460 |
1 |
|
|
T1 |
1 |
|
T4 |
3 |
|
T6 |
6 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9769 |
1 |
|
|
T3 |
2 |
|
T4 |
2 |
|
T6 |
9 |
auto[1] |
10811 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
7 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1127 |
1 |
|
|
T6 |
2 |
|
T34 |
2 |
|
T16 |
9 |
auto[0] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T4 |
2 |
|
T6 |
1 |
|
T23 |
2 |
auto[0] |
auto[1] |
auto[0] |
3621 |
1 |
|
|
T3 |
2 |
|
T4 |
2 |
|
T6 |
5 |
auto[0] |
auto[1] |
auto[1] |
3238 |
1 |
|
|
T3 |
1 |
|
T4 |
2 |
|
T10 |
10 |
auto[1] |
auto[0] |
auto[0] |
1190 |
1 |
|
|
T6 |
1 |
|
T23 |
1 |
|
T34 |
3 |
auto[1] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T4 |
1 |
|
T6 |
1 |
|
T33 |
1 |
auto[1] |
auto[1] |
auto[0] |
3831 |
1 |
|
|
T6 |
1 |
|
T10 |
12 |
|
T23 |
1 |
auto[1] |
auto[1] |
auto[1] |
4837 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T6 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5053 |
1 |
|
|
T4 |
3 |
|
T6 |
5 |
|
T23 |
3 |
auto[1] |
15527 |
1 |
|
|
T1 |
1 |
|
T3 |
3 |
|
T4 |
6 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9220 |
1 |
|
|
T3 |
3 |
|
T4 |
7 |
|
T6 |
8 |
auto[1] |
11360 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T6 |
6 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9643 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T6 |
8 |
auto[1] |
10937 |
1 |
|
|
T3 |
3 |
|
T4 |
8 |
|
T6 |
6 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1155 |
1 |
|
|
T33 |
1 |
|
T34 |
3 |
|
T16 |
5 |
auto[0] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T4 |
3 |
|
T6 |
1 |
|
T23 |
1 |
auto[0] |
auto[1] |
auto[0] |
3560 |
1 |
|
|
T4 |
1 |
|
T6 |
3 |
|
T10 |
7 |
auto[0] |
auto[1] |
auto[1] |
3345 |
1 |
|
|
T3 |
3 |
|
T4 |
3 |
|
T6 |
4 |
auto[1] |
auto[0] |
auto[0] |
1122 |
1 |
|
|
T6 |
4 |
|
T34 |
1 |
|
T16 |
7 |
auto[1] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T23 |
2 |
|
T34 |
2 |
|
T16 |
10 |
auto[1] |
auto[1] |
auto[0] |
3806 |
1 |
|
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
11 |
auto[1] |
auto[1] |
auto[1] |
4816 |
1 |
|
|
T4 |
2 |
|
T6 |
1 |
|
T10 |
15 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5053 |
1 |
|
|
T4 |
3 |
|
T6 |
5 |
|
T23 |
3 |
auto[1] |
15527 |
1 |
|
|
T1 |
1 |
|
T3 |
3 |
|
T4 |
6 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9283 |
1 |
|
|
T4 |
5 |
|
T6 |
7 |
|
T10 |
19 |
auto[1] |
11297 |
1 |
|
|
T1 |
1 |
|
T3 |
3 |
|
T4 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9802 |
1 |
|
|
T3 |
1 |
|
T4 |
1 |
|
T6 |
4 |
auto[1] |
10778 |
1 |
|
|
T1 |
1 |
|
T3 |
2 |
|
T4 |
8 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1143 |
1 |
|
|
T6 |
1 |
|
T34 |
1 |
|
T16 |
6 |
auto[0] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T4 |
3 |
|
T6 |
2 |
|
T33 |
1 |
auto[0] |
auto[1] |
auto[0] |
3630 |
1 |
|
|
T6 |
1 |
|
T10 |
13 |
|
T23 |
2 |
auto[0] |
auto[1] |
auto[1] |
3331 |
1 |
|
|
T4 |
2 |
|
T6 |
3 |
|
T10 |
6 |
auto[1] |
auto[0] |
auto[0] |
1182 |
1 |
|
|
T6 |
2 |
|
T23 |
2 |
|
T34 |
1 |
auto[1] |
auto[0] |
auto[1] |
1549 |
1 |
|
|
T23 |
1 |
|
T34 |
2 |
|
T16 |
12 |
auto[1] |
auto[1] |
auto[0] |
3847 |
1 |
|
|
T3 |
1 |
|
T4 |
1 |
|
T10 |
12 |
auto[1] |
auto[1] |
auto[1] |
4719 |
1 |
|
|
T1 |
1 |
|
T3 |
2 |
|
T4 |
3 |