T323 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_aborted_low_power.3431196638 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
33081840 ps |
T324 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.3533247706 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
42097620 ps |
T325 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.3465070721 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
29797206 ps |
T60 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_stress_all_with_rand_reset.749978315 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
4471614812 ps |
T326 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup.3362645794 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
283856500 ps |
T327 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.4142320295 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
109570587 ps |
T328 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_glitch.1273589632 |
|
|
Sep 09 07:25:48 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
53243279 ps |
T329 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.339609075 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:50 AM UTC 24 |
166897485 ps |
T330 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all.2312668258 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:50 AM UTC 24 |
901750773 ps |
T331 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_escalation_timeout.3327791703 |
|
|
Sep 09 07:25:48 AM UTC 24 |
Sep 09 07:25:50 AM UTC 24 |
107824741 ps |
T332 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup_reset.4091865711 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:50 AM UTC 24 |
253187827 ps |
T333 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2196438365 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:50 AM UTC 24 |
854450284 ps |
T334 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3344610806 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
994046390 ps |
T335 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.2588734970 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
44281017 ps |
T336 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.4144775916 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
94938270 ps |
T337 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.1333290872 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
53916960 ps |
T338 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup_reset.82783805 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
195203251 ps |
T339 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.2706922297 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
112466242 ps |
T340 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.2542109271 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
39628306 ps |
T341 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.11826821 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
863842502 ps |
T342 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.554616891 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
33427225 ps |
T343 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.3490082605 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
39484462 ps |
T344 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.1926085646 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
78165524 ps |
T345 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.1067486975 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:51 AM UTC 24 |
51648135 ps |
T346 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_aborted_low_power.1717956550 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:52 AM UTC 24 |
63816319 ps |
T347 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.2183941867 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:52 AM UTC 24 |
207588617 ps |
T145 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all_with_rand_reset.1767637090 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:52 AM UTC 24 |
6562666168 ps |
T348 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.293338491 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:52 AM UTC 24 |
272271175 ps |
T87 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_stress_all_with_rand_reset.1657721152 |
|
|
Sep 09 07:25:24 AM UTC 24 |
Sep 09 07:25:52 AM UTC 24 |
24080669034 ps |
T349 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_glitch.3874410825 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:52 AM UTC 24 |
73409403 ps |
T350 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1039147825 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:52 AM UTC 24 |
987372266 ps |
T351 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_disable_rom_integrity_check.3538205057 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
57878085 ps |
T352 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset_invalid.767874590 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
129066123 ps |
T353 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_smoke.3904861637 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
53068595 ps |
T354 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_invalid.1738036727 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
67657065 ps |
T355 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.2201355762 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
401548575 ps |
T356 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup.2016033945 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
142472497 ps |
T357 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.484377880 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
30316547 ps |
T358 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_wakeup_race.2692281347 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
216009657 ps |
T359 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset.2750824256 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
127552608 ps |
T360 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2523974709 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
991305520 ps |
T361 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_global_esc.1438694986 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
51148023 ps |
T362 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup_reset.1938506249 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
90322793 ps |
T363 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.936535619 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
136364041 ps |
T364 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.3033647149 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
305406893 ps |
T365 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.3837327766 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
3349249767 ps |
T366 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_aborted_low_power.33177648 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:53 AM UTC 24 |
71922705 ps |
T367 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.788278116 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:54 AM UTC 24 |
3147967903 ps |
T368 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1526609744 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:54 AM UTC 24 |
1007498424 ps |
T369 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_invalid.2202292210 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
154797872 ps |
T370 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_glitch.1040822918 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
77898331 ps |
T371 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_disable_rom_integrity_check.3921534148 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
84608476 ps |
T372 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4021672709 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
1005901007 ps |
T373 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset.127904826 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
65457742 ps |
T374 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.2489395121 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
41077427 ps |
T375 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.2930067638 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
192866742 ps |
T376 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_global_esc.3949117909 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
181268790 ps |
T377 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.341229005 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
31235637 ps |
T378 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.910064694 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:24 AM UTC 24 |
29486043 ps |
T379 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup.3412222746 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
168094016 ps |
T380 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.874253114 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
273796727 ps |
T381 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.2481544879 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
394248113 ps |
T382 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_glitch.4120860063 |
|
|
Sep 09 07:25:54 AM UTC 24 |
Sep 09 07:25:56 AM UTC 24 |
33614055 ps |
T383 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.1419067291 |
|
|
Sep 09 07:25:54 AM UTC 24 |
Sep 09 07:25:56 AM UTC 24 |
62715186 ps |
T384 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_invalid.1899378617 |
|
|
Sep 09 07:25:54 AM UTC 24 |
Sep 09 07:25:56 AM UTC 24 |
81874194 ps |
T385 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_escalation_timeout.275548660 |
|
|
Sep 09 07:25:54 AM UTC 24 |
Sep 09 07:25:56 AM UTC 24 |
113761609 ps |
T386 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.3162878387 |
|
|
Sep 09 07:25:54 AM UTC 24 |
Sep 09 07:25:56 AM UTC 24 |
157715657 ps |
T387 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.3816542763 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:56 AM UTC 24 |
245934137 ps |
T388 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2567619543 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
1137925967 ps |
T389 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_smoke.815822485 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
67653919 ps |
T390 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3130199429 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
995446991 ps |
T391 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_aborted_low_power.3749015835 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
276921226 ps |
T392 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup.1877740159 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
36688951 ps |
T393 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup_reset.261207580 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
84013401 ps |
T394 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.3246703178 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
29515065 ps |
T395 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_wakeup_race.4091717751 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
253424545 ps |
T396 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.843375057 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
51816519 ps |
T397 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset.3086211983 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
91279202 ps |
T398 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.2796889265 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
254678573 ps |
T100 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.4016533418 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
13444267283 ps |
T399 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all.1128995702 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
1821891365 ps |
T400 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.2555860422 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:57 AM UTC 24 |
66145252 ps |
T88 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all_with_rand_reset.4094277187 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:58 AM UTC 24 |
3977574120 ps |
T401 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_glitch.424139468 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:58 AM UTC 24 |
52196734 ps |
T402 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.673450183 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:58 AM UTC 24 |
384540833 ps |
T403 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.441761542 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:58 AM UTC 24 |
1552946003 ps |
T81 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.3642976396 |
|
|
Sep 09 07:25:49 AM UTC 24 |
Sep 09 07:25:59 AM UTC 24 |
3755953503 ps |
T404 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_wakeup_race.2819804277 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:25:59 AM UTC 24 |
166803725 ps |
T405 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1844207407 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:59 AM UTC 24 |
975530503 ps |
T406 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.524296940 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:25:59 AM UTC 24 |
191111043 ps |
T407 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all_with_rand_reset.2173133825 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:25:59 AM UTC 24 |
783759576 ps |
T408 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all.2282452411 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:59 AM UTC 24 |
1486560973 ps |
T409 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all.2636017167 |
|
|
Sep 09 07:25:55 AM UTC 24 |
Sep 09 07:26:00 AM UTC 24 |
7985945358 ps |
T156 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all_with_rand_reset.3752803443 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:26:02 AM UTC 24 |
6096153846 ps |
T168 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.4068668822 |
|
|
Sep 09 07:25:51 AM UTC 24 |
Sep 09 07:26:08 AM UTC 24 |
7090016418 ps |
T410 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.4274310168 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:09 AM UTC 24 |
39941853 ps |
T411 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.1743863640 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:09 AM UTC 24 |
160317910 ps |
T412 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_global_esc.3343472026 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:09 AM UTC 24 |
56049178 ps |
T413 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.3916780497 |
|
|
Sep 09 07:26:04 AM UTC 24 |
Sep 09 07:26:09 AM UTC 24 |
66907530 ps |
T414 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup.99795183 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:09 AM UTC 24 |
241075653 ps |
T415 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.1076262382 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:09 AM UTC 24 |
92594940 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.2765135892 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:09 AM UTC 24 |
76382314 ps |
T417 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.2267320984 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:09 AM UTC 24 |
394258539 ps |
T418 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2346332939 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:11 AM UTC 24 |
877826571 ps |
T419 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.379027191 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:11 AM UTC 24 |
855924505 ps |
T420 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.3975661359 |
|
|
Sep 09 07:26:05 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
59738672 ps |
T421 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.1522965098 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
29220435 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_global_esc.4214185945 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
35012913 ps |
T423 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset.2667942700 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
349747667 ps |
T424 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.1279123674 |
|
|
Sep 09 07:26:09 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
74121811 ps |
T425 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup.4136495525 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
113167027 ps |
T426 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.2081690505 |
|
|
Sep 09 07:26:09 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
182639145 ps |
T427 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.791101159 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
390603670 ps |
T428 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.1962130798 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
137213015 ps |
T429 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.479689432 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
169975494 ps |
T430 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.2613277108 |
|
|
Sep 09 07:26:09 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
115378688 ps |
T431 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_aborted_low_power.461001154 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
44438022 ps |
T432 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_escalation_timeout.4024875143 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
374516579 ps |
T433 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup_reset.3009034152 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
193252018 ps |
T434 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.3452293912 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:14 AM UTC 24 |
287750958 ps |
T435 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2994801811 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:15 AM UTC 24 |
1173993369 ps |
T436 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.515578370 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:15 AM UTC 24 |
1209529989 ps |
T437 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.69869892 |
|
|
Sep 09 07:26:16 AM UTC 24 |
Sep 09 07:26:19 AM UTC 24 |
53146830 ps |
T438 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset.63707610 |
|
|
Sep 09 07:26:16 AM UTC 24 |
Sep 09 07:26:19 AM UTC 24 |
30576030 ps |
T439 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_glitch.1607451061 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:19 AM UTC 24 |
67187786 ps |
T440 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_disable_rom_integrity_check.3752677821 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:19 AM UTC 24 |
63973595 ps |
T441 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.1666616771 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:19 AM UTC 24 |
167280988 ps |
T442 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.908973798 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:24 AM UTC 24 |
52631876 ps |
T443 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.192604358 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:24 AM UTC 24 |
75125776 ps |
T444 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_escalation_timeout.3820342369 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:24 AM UTC 24 |
676469991 ps |
T445 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.2713366243 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:24 AM UTC 24 |
52507392 ps |
T446 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.4222107718 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:24 AM UTC 24 |
189576237 ps |
T447 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all.2391630320 |
|
|
Sep 09 07:26:16 AM UTC 24 |
Sep 09 07:26:24 AM UTC 24 |
1441245048 ps |
T448 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_aborted_low_power.2916568791 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:34 AM UTC 24 |
86850505 ps |
T449 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.3313098161 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:34 AM UTC 24 |
57422815 ps |
T450 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.2486747211 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:34 AM UTC 24 |
55494028 ps |
T451 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.3117652438 |
|
|
Sep 09 07:26:29 AM UTC 24 |
Sep 09 07:26:34 AM UTC 24 |
111150034 ps |
T452 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.1262357335 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:34 AM UTC 24 |
160150204 ps |
T453 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.2187754795 |
|
|
Sep 09 07:26:09 AM UTC 24 |
Sep 09 07:26:34 AM UTC 24 |
197833048 ps |
T454 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_glitch.2833650620 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:34 AM UTC 24 |
108295520 ps |
T455 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.1973222916 |
|
|
Sep 09 07:26:09 AM UTC 24 |
Sep 09 07:26:34 AM UTC 24 |
105473886 ps |
T456 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.3599606238 |
|
|
Sep 09 07:26:09 AM UTC 24 |
Sep 09 07:26:34 AM UTC 24 |
35578972 ps |
T457 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup_reset.1580060249 |
|
|
Sep 09 07:26:19 AM UTC 24 |
Sep 09 07:26:34 AM UTC 24 |
131313025 ps |
T458 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.2228306713 |
|
|
Sep 09 07:26:34 AM UTC 24 |
Sep 09 07:26:39 AM UTC 24 |
40217601 ps |
T459 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all.2772713311 |
|
|
Sep 09 07:25:57 AM UTC 24 |
Sep 09 07:26:39 AM UTC 24 |
77179741 ps |
T460 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.2208383599 |
|
|
Sep 09 07:26:01 AM UTC 24 |
Sep 09 07:26:39 AM UTC 24 |
31255972 ps |
T461 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.3941170380 |
|
|
Sep 09 07:26:01 AM UTC 24 |
Sep 09 07:26:40 AM UTC 24 |
322131051 ps |
T462 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3882531682 |
|
|
Sep 09 07:26:20 AM UTC 24 |
Sep 09 07:26:41 AM UTC 24 |
820291964 ps |
T89 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all_with_rand_reset.64149057 |
|
|
Sep 09 07:26:34 AM UTC 24 |
Sep 09 07:26:42 AM UTC 24 |
2355536119 ps |
T463 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_smoke.2285804607 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
57542741 ps |
T464 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_aborted_low_power.2744910380 |
|
|
Sep 09 07:26:35 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
25742670 ps |
T465 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup_reset.471780060 |
|
|
Sep 09 07:26:35 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
77250872 ps |
T466 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.1148694054 |
|
|
Sep 09 07:26:39 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
46644094 ps |
T467 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_wakeup_race.1260664162 |
|
|
Sep 09 07:26:19 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
137510785 ps |
T468 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_aborted_low_power.749833358 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
33000552 ps |
T469 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all_with_rand_reset.765501781 |
|
|
Sep 09 07:26:15 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
25629879101 ps |
T470 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.2270760432 |
|
|
Sep 09 07:26:43 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
77363829 ps |
T471 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.32654602 |
|
|
Sep 09 07:26:12 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
62410839 ps |
T472 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all.2945451852 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
457383356 ps |
T473 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.1224164907 |
|
|
Sep 09 07:26:12 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
69649498 ps |
T474 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.4068655184 |
|
|
Sep 09 07:26:39 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
54834968 ps |
T475 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_escalation_timeout.2471283750 |
|
|
Sep 09 07:26:42 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
551472973 ps |
T476 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.633433834 |
|
|
Sep 09 07:26:12 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
215356546 ps |
T477 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.3736272515 |
|
|
Sep 09 07:26:19 AM UTC 24 |
Sep 09 07:26:44 AM UTC 24 |
227646295 ps |
T478 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.1022761706 |
|
|
Sep 09 07:26:19 AM UTC 24 |
Sep 09 07:26:45 AM UTC 24 |
81738158 ps |
T479 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.1300203306 |
|
|
Sep 09 07:26:09 AM UTC 24 |
Sep 09 07:26:45 AM UTC 24 |
666934206 ps |
T480 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2098625580 |
|
|
Sep 09 07:26:35 AM UTC 24 |
Sep 09 07:26:45 AM UTC 24 |
907922378 ps |
T481 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2520455978 |
|
|
Sep 09 07:26:39 AM UTC 24 |
Sep 09 07:26:46 AM UTC 24 |
975519742 ps |
T482 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1685837405 |
|
|
Sep 09 07:26:03 AM UTC 24 |
Sep 09 07:26:46 AM UTC 24 |
873085235 ps |
T483 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3853596009 |
|
|
Sep 09 07:26:19 AM UTC 24 |
Sep 09 07:26:47 AM UTC 24 |
897635421 ps |
T90 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.1176459508 |
|
|
Sep 09 07:26:01 AM UTC 24 |
Sep 09 07:26:47 AM UTC 24 |
2142695417 ps |
T484 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_global_esc.3358266781 |
|
|
Sep 09 07:26:40 AM UTC 24 |
Sep 09 07:26:48 AM UTC 24 |
69162602 ps |
T485 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_disable_rom_integrity_check.2364936061 |
|
|
Sep 09 07:26:44 AM UTC 24 |
Sep 09 07:26:48 AM UTC 24 |
64311942 ps |
T486 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset_invalid.2567333484 |
|
|
Sep 09 07:26:44 AM UTC 24 |
Sep 09 07:26:49 AM UTC 24 |
122405033 ps |
T487 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.2497611373 |
|
|
Sep 09 07:26:40 AM UTC 24 |
Sep 09 07:26:49 AM UTC 24 |
227422834 ps |
T488 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all_with_rand_reset.1460877971 |
|
|
Sep 09 07:26:09 AM UTC 24 |
Sep 09 07:26:49 AM UTC 24 |
1784800813 ps |
T489 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_invalid.99379018 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:26:54 AM UTC 24 |
243642478 ps |
T490 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.3937480267 |
|
|
Sep 09 07:26:48 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
7006467641 ps |
T491 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_glitch.3672937772 |
|
|
Sep 09 07:26:46 AM UTC 24 |
Sep 09 07:26:59 AM UTC 24 |
48098367 ps |
T492 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_disable_rom_integrity_check.714630178 |
|
|
Sep 09 07:26:47 AM UTC 24 |
Sep 09 07:26:59 AM UTC 24 |
74651431 ps |
T493 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.640349755 |
|
|
Sep 09 07:26:47 AM UTC 24 |
Sep 09 07:26:59 AM UTC 24 |
167279158 ps |
T494 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_escalation_timeout.530298188 |
|
|
Sep 09 07:26:46 AM UTC 24 |
Sep 09 07:26:59 AM UTC 24 |
1586673308 ps |
T495 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup.286534111 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
244941913 ps |
T496 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.52293590 |
|
|
Sep 09 07:26:48 AM UTC 24 |
Sep 09 07:26:59 AM UTC 24 |
72394097 ps |
T497 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.2805585155 |
|
|
Sep 09 07:26:25 AM UTC 24 |
Sep 09 07:26:59 AM UTC 24 |
34668942 ps |
T498 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.886071379 |
|
|
Sep 09 07:26:25 AM UTC 24 |
Sep 09 07:26:59 AM UTC 24 |
42063859 ps |
T499 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.1006794213 |
|
|
Sep 09 07:26:25 AM UTC 24 |
Sep 09 07:26:59 AM UTC 24 |
96235953 ps |
T500 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.1656269585 |
|
|
Sep 09 07:26:25 AM UTC 24 |
Sep 09 07:27:00 AM UTC 24 |
224545162 ps |
T501 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.1717015004 |
|
|
Sep 09 07:26:25 AM UTC 24 |
Sep 09 07:27:00 AM UTC 24 |
85692149 ps |
T502 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.3449306069 |
|
|
Sep 09 07:26:51 AM UTC 24 |
Sep 09 07:27:00 AM UTC 24 |
292953120 ps |
T503 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup_reset.3265389394 |
|
|
Sep 09 07:26:01 AM UTC 24 |
Sep 09 07:27:00 AM UTC 24 |
293210365 ps |
T504 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.2199559022 |
|
|
Sep 09 07:26:59 AM UTC 24 |
Sep 09 07:27:04 AM UTC 24 |
32251222 ps |
T505 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_smoke.2194430367 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:04 AM UTC 24 |
61808412 ps |
T506 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.1027257412 |
|
|
Sep 09 07:26:59 AM UTC 24 |
Sep 09 07:27:04 AM UTC 24 |
319818577 ps |
T507 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.887739365 |
|
|
Sep 09 07:26:59 AM UTC 24 |
Sep 09 07:27:04 AM UTC 24 |
109713063 ps |
T508 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup_reset.391732674 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:04 AM UTC 24 |
96004180 ps |
T509 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.669413611 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:04 AM UTC 24 |
118738738 ps |
T510 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.4095196246 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:04 AM UTC 24 |
22799056 ps |
T511 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all.620687270 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:05 AM UTC 24 |
890273096 ps |
T512 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1630895755 |
|
|
Sep 09 07:26:59 AM UTC 24 |
Sep 09 07:27:05 AM UTC 24 |
1055877042 ps |
T513 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1928637128 |
|
|
Sep 09 07:26:59 AM UTC 24 |
Sep 09 07:27:05 AM UTC 24 |
1046838953 ps |
T514 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1860819152 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:05 AM UTC 24 |
1047471275 ps |
T515 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_invalid.2637727604 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
42339757 ps |
T516 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_wakeup_race.1079677706 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
37325632 ps |
T517 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.3201854719 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
36269686 ps |
T518 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.187421130 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
30104557 ps |
T519 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.707286121 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
56511310 ps |
T520 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.3737961801 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
254988743 ps |
T521 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.694819868 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
43936842 ps |
T522 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.1420724999 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
56419091 ps |
T523 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.4126283914 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
88086494 ps |
T524 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.3571501537 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:14 AM UTC 24 |
167972248 ps |
T525 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.3101698156 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:15 AM UTC 24 |
96901024 ps |
T526 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.1489139085 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:15 AM UTC 24 |
271377461 ps |
T527 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_wakeup_race.536216968 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:15 AM UTC 24 |
227674725 ps |
T528 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.2208496604 |
|
|
Sep 09 07:26:50 AM UTC 24 |
Sep 09 07:27:15 AM UTC 24 |
29338286 ps |
T529 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.1489051797 |
|
|
Sep 09 07:26:50 AM UTC 24 |
Sep 09 07:27:15 AM UTC 24 |
49673829 ps |
T530 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.817866777 |
|
|
Sep 09 07:26:45 AM UTC 24 |
Sep 09 07:27:15 AM UTC 24 |
1103640583 ps |
T531 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all.291711846 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:16 AM UTC 24 |
810548333 ps |
T532 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4285127833 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:16 AM UTC 24 |
797406781 ps |
T533 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.2338132585 |
|
|
Sep 09 07:27:17 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
32984543 ps |
T534 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.3494368347 |
|
|
Sep 09 07:27:16 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
33764823 ps |
T535 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.3019076128 |
|
|
Sep 09 07:27:16 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
364966242 ps |
T536 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.1275279890 |
|
|
Sep 09 07:27:16 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
181639993 ps |
T537 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.417320680 |
|
|
Sep 09 07:27:17 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
167495389 ps |
T538 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.2041768171 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
81354213 ps |
T539 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_disable_rom_integrity_check.2526703035 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
79327313 ps |
T540 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_glitch.1421619549 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
30672908 ps |
T541 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.2041335405 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
202458430 ps |
T542 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.3669931657 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
65702444 ps |
T543 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.1932658058 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
89984687 ps |
T544 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.2113705542 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
74121613 ps |
T545 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.706095824 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
305438775 ps |
T546 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.4262129196 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
40981192 ps |
T547 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset.1616625663 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
161607197 ps |
T548 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.3701788066 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
119317151 ps |
T549 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup_reset.2887291254 |
|
|
Sep 09 07:27:05 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
100095383 ps |
T550 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_aborted_low_power.157062579 |
|
|
Sep 09 07:27:05 AM UTC 24 |
Sep 09 07:27:19 AM UTC 24 |
73330816 ps |
T551 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.401221381 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:20 AM UTC 24 |
29621417 ps |
T552 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.3489905104 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:20 AM UTC 24 |
327635792 ps |
T553 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.2492660012 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:20 AM UTC 24 |
90722540 ps |
T554 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.1680056700 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:20 AM UTC 24 |
50530817 ps |
T555 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.1065703072 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:20 AM UTC 24 |
149289205 ps |
T556 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.3807821410 |
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|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:20 AM UTC 24 |
341836370 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all.265339469 |
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|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:20 AM UTC 24 |
949305628 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3447461272 |
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|
Sep 09 07:27:16 AM UTC 24 |
Sep 09 07:27:20 AM UTC 24 |
916635280 ps |
T559 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1292328784 |
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|
Sep 09 07:27:10 AM UTC 24 |
Sep 09 07:27:21 AM UTC 24 |
814144084 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1909167177 |
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|
Sep 09 07:27:16 AM UTC 24 |
Sep 09 07:27:21 AM UTC 24 |
792042000 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.1893409960 |
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|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
39005354 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.536370532 |
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Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
47143803 ps |