| Name |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.1705554692 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.633953011 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.1349709938 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_mem_rw_with_rand_reset.1140142260 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.380809846 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_errors.3754566313 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.1053180538 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.1061545107 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_hw_reset.1987976065 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.2724746601 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_rw.2197758153 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_intr_test.4029893580 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.806655942 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.3765257959 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_csr_mem_rw_with_rand_reset.310084162 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_csr_rw.1543311082 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_intr_test.3921968201 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_same_csr_outstanding.3431605972 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_tl_intg_err.3911517640 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_csr_mem_rw_with_rand_reset.1969721996 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_csr_rw.3731128740 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_intr_test.1974733635 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_same_csr_outstanding.3750548126 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_tl_errors.1762828713 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_tl_intg_err.2013523510 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_csr_mem_rw_with_rand_reset.43719077 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_csr_rw.1397663083 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_intr_test.2222284919 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_same_csr_outstanding.2767265788 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_tl_errors.1549642587 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_tl_intg_err.3583085611 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_csr_mem_rw_with_rand_reset.3680864717 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_csr_rw.351040992 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_intr_test.1607670963 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_same_csr_outstanding.3478288945 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_tl_errors.3351013827 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_csr_mem_rw_with_rand_reset.959837114 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_csr_rw.3408844145 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_intr_test.2886090262 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_same_csr_outstanding.3649006437 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_tl_errors.659093627 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_csr_mem_rw_with_rand_reset.4256898299 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_csr_rw.1772523679 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_same_csr_outstanding.4043253879 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_tl_errors.4161560773 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_tl_intg_err.1979854879 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_csr_mem_rw_with_rand_reset.634958050 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_csr_rw.2785581263 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_intr_test.1462645785 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_same_csr_outstanding.3441577119 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_tl_errors.1660375746 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_tl_intg_err.3177837820 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_csr_mem_rw_with_rand_reset.2524513037 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_csr_rw.1375749693 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_intr_test.2044001371 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_same_csr_outstanding.2532301652 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_tl_errors.2915969108 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_tl_intg_err.3758723555 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_csr_mem_rw_with_rand_reset.141881181 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_csr_rw.3944165708 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_intr_test.1838925599 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_same_csr_outstanding.1793543067 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_tl_errors.1516116984 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/18.pwrmgr_tl_intg_err.532837707 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_csr_mem_rw_with_rand_reset.3640089731 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_csr_rw.4268350242 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_intr_test.3976496749 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_same_csr_outstanding.2707449641 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_tl_errors.3573750758 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/19.pwrmgr_tl_intg_err.838596433 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.1904021767 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_bit_bash.2869563067 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.2562313366 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.2373805127 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_rw.3515714290 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_intr_test.1741899517 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.10892440 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_errors.815681347 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/20.pwrmgr_intr_test.556964374 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/21.pwrmgr_intr_test.3067903053 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/22.pwrmgr_intr_test.4286428982 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/23.pwrmgr_intr_test.2129787738 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/24.pwrmgr_intr_test.3092619071 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/25.pwrmgr_intr_test.321973539 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/26.pwrmgr_intr_test.2102779267 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/27.pwrmgr_intr_test.58872930 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/28.pwrmgr_intr_test.3367704335 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/29.pwrmgr_intr_test.8387906 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.2347871804 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.4235934972 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.2801839047 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.849787672 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_rw.2501954448 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_intr_test.1231978992 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_same_csr_outstanding.1389268565 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_errors.2118428137 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.101966091 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/30.pwrmgr_intr_test.376288972 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/31.pwrmgr_intr_test.1837494091 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/32.pwrmgr_intr_test.2455256500 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/33.pwrmgr_intr_test.3659974057 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/34.pwrmgr_intr_test.2499700253 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/35.pwrmgr_intr_test.3658245065 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/36.pwrmgr_intr_test.938060107 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/37.pwrmgr_intr_test.2569719445 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/38.pwrmgr_intr_test.95689891 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/39.pwrmgr_intr_test.3400734132 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_aliasing.920394541 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.3594346225 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.3093453 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_mem_rw_with_rand_reset.1512835911 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_rw.2452282452 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_intr_test.806932246 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_same_csr_outstanding.3799277938 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_errors.1480093355 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.2585871207 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/40.pwrmgr_intr_test.3987548401 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/41.pwrmgr_intr_test.788702842 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/42.pwrmgr_intr_test.528461911 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/43.pwrmgr_intr_test.4109421458 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/44.pwrmgr_intr_test.2944652335 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/45.pwrmgr_intr_test.560519799 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/46.pwrmgr_intr_test.2677926626 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/47.pwrmgr_intr_test.1864687944 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/48.pwrmgr_intr_test.58457597 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/49.pwrmgr_intr_test.1700236810 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_csr_mem_rw_with_rand_reset.1108890527 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_csr_rw.2800801993 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_intr_test.1296569008 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_same_csr_outstanding.1406463739 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_errors.2065884306 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_tl_intg_err.1312391166 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_csr_mem_rw_with_rand_reset.1541807010 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_csr_rw.1802228857 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_intr_test.416993776 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_same_csr_outstanding.2506766474 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_tl_errors.2623194229 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_tl_intg_err.3800920740 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_csr_mem_rw_with_rand_reset.468151544 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_csr_rw.2683033405 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_intr_test.1422804929 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_same_csr_outstanding.104289911 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_tl_errors.1300062901 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_tl_intg_err.2375444216 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_csr_mem_rw_with_rand_reset.3624422446 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_csr_rw.90066413 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_intr_test.927900315 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.1882230839 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_tl_errors.3331546014 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_tl_intg_err.1549426517 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_csr_mem_rw_with_rand_reset.584801372 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_csr_rw.2155902691 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_intr_test.3058809648 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_same_csr_outstanding.721026629 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_tl_errors.2568831686 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_tl_intg_err.3986738470 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_aborted_low_power.2113508002 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_esc_clk_rst_malfunc.1570643753 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_global_esc.3357728586 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_lowpower_wakeup_race.4125398377 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_reset.3117330511 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3436378342 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm_rstmgr_intersig_mubi.288331413 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_smoke.2491550594 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_stress_all_with_rand_reset.2441376503 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_wakeup.1866808811 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_aborted_low_power.124074086 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_disable_rom_integrity_check.1197619098 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_esc_clk_rst_malfunc.4190124938 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_escalation_timeout.4194702477 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_glitch.1875082637 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_global_esc.2930911246 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_lowpower_invalid.2315261381 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_lowpower_wakeup_race.207188642 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_reset.874127155 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_reset_invalid.1301755242 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm.2535932732 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_ctrl_config_regwen.936176767 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3617909987 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_rstmgr_intersig_mubi.1056588444 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_smoke.2540478408 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_stress_all.3739293496 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_stress_all_with_rand_reset.2224084902 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_wakeup.3497784203 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_wakeup_reset.3645500802 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_aborted_low_power.3501381936 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_esc_clk_rst_malfunc.1573902896 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_escalation_timeout.3715035949 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_glitch.2999844259 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_global_esc.1653020245 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_lowpower_invalid.1295797707 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_lowpower_wakeup_race.1340919250 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_reset.2132134059 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_reset_invalid.112561440 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_ctrl_config_regwen.2532148897 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1080564532 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.325171188 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_rstmgr_intersig_mubi.2905926594 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_smoke.2471594330 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all_with_rand_reset.1767637090 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_wakeup.410764360 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_wakeup_reset.2992658865 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_aborted_low_power.2466667431 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_disable_rom_integrity_check.3703887231 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_esc_clk_rst_malfunc.4274242358 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_escalation_timeout.38178403 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_glitch.983769125 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_global_esc.2099124164 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_lowpower_invalid.325369762 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_lowpower_wakeup_race.2646986069 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_reset.1598234124 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_reset_invalid.578045874 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_ctrl_config_regwen.2278134302 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2017725115 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3085221919 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_rstmgr_intersig_mubi.2641210653 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_smoke.771776683 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all.2312668258 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_stress_all_with_rand_reset.4094277187 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_wakeup.3634076518 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_wakeup_reset.2331968258 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_aborted_low_power.2937143934 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_disable_rom_integrity_check.4029059702 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_esc_clk_rst_malfunc.2299919373 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_escalation_timeout.4013268174 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_glitch.539899852 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_global_esc.600864622 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_lowpower_invalid.751673146 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_lowpower_wakeup_race.4195031879 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_reset.3395205990 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_reset_invalid.29723167 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_ctrl_config_regwen.2861571327 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2196438365 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1355600258 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rstmgr_intersig_mubi.832220999 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_smoke.1884989644 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all.3837327766 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_stress_all_with_rand_reset.4016533418 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_wakeup.3666578525 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_wakeup_reset.1223022718 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_aborted_low_power.3431196638 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_disable_rom_integrity_check.4144775916 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.3465070721 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_escalation_timeout.3327791703 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_glitch.1273589632 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_global_esc.3533247706 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_invalid.2588734970 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_wakeup_race.527375415 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset.2174318436 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset_invalid.2706922297 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_ctrl_config_regwen.4142320295 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.11826821 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3344610806 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.339609075 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_smoke.4277359613 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all.788278116 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_stress_all_with_rand_reset.3642976396 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup.3362645794 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_wakeup_reset.4091865711 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_aborted_low_power.1717956550 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_disable_rom_integrity_check.3538205057 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_esc_clk_rst_malfunc.554616891 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_escalation_timeout.2201355762 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_glitch.3874410825 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_global_esc.3490082605 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_invalid.1738036727 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_lowpower_wakeup_race.2183941867 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset.2542109271 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_reset_invalid.767874590 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.293338491 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2523974709 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1039147825 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.1067486975 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_smoke.1333290872 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all.1128995702 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_stress_all_with_rand_reset.4068668822 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup.1926085646 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/14.pwrmgr_wakeup_reset.82783805 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_aborted_low_power.33177648 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_disable_rom_integrity_check.3921534148 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_esc_clk_rst_malfunc.484377880 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_escalation_timeout.1257009688 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_glitch.1040822918 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_global_esc.1438694986 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_invalid.2202292210 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_lowpower_wakeup_race.2692281347 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset.2750824256 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.64604220 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.936535619 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1526609744 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4021672709 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_sec_cm_rstmgr_intersig_mubi.3033647149 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_smoke.3904861637 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all.2282452411 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_stress_all_with_rand_reset.3752803443 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup.2016033945 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_wakeup_reset.1938506249 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_aborted_low_power.2489395121 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_disable_rom_integrity_check.1419067291 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.341229005 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_escalation_timeout.275548660 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_glitch.4120860063 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_global_esc.3949117909 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_invalid.1899378617 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_lowpower_wakeup_race.2930067638 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset.127904826 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_reset_invalid.3162878387 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.3816542763 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3130199429 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2567619543 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.2481544879 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_smoke.2144723533 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all.2636017167 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_stress_all_with_rand_reset.2173133825 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup.3412222746 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_wakeup_reset.874253114 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_aborted_low_power.3749015835 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_esc_clk_rst_malfunc.3246703178 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_escalation_timeout.673450183 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_glitch.424139468 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_global_esc.843375057 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_lowpower_wakeup_race.4091717751 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_reset.3086211983 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.2796889265 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1844207407 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.441761542 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.2555860422 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_smoke.815822485 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_stress_all.2772713311 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup.1877740159 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/17.pwrmgr_wakeup_reset.261207580 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_aborted_low_power.1076262382 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_disable_rom_integrity_check.3752677821 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_esc_clk_rst_malfunc.4274310168 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_escalation_timeout.2267320984 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_glitch.1607451061 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_global_esc.3343472026 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_invalid.2637727604 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_lowpower_wakeup_race.2819804277 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_reset_invalid.1666616771 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.2765135892 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2346332939 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.379027191 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.524296940 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all.2945451852 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all_with_rand_reset.403985588 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup.99795183 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_wakeup_reset.1743863640 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_aborted_low_power.461001154 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.1522965098 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_escalation_timeout.4024875143 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_glitch.2833650620 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_global_esc.4214185945 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_lowpower_wakeup_race.791101159 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset.2667942700 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_reset_invalid.479689432 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.3452293912 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2994801811 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.515578370 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.1962130798 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_smoke.2285804607 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all.3941170380 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_stress_all_with_rand_reset.1176459508 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup.4136495525 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/19.pwrmgr_wakeup_reset.3009034152 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_aborted_low_power.2886185130 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_disable_rom_integrity_check.255243658 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_esc_clk_rst_malfunc.2636528599 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_escalation_timeout.1564031180 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_glitch.2839717145 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_global_esc.39123782 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_lowpower_invalid.4189061030 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_lowpower_wakeup_race.2857198696 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_reset.1236335018 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_reset_invalid.3041132071 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm.3506600567 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_ctrl_config_regwen.3107657761 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2217164840 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3475882226 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_rstmgr_intersig_mubi.898350471 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_smoke.2246883006 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_stress_all.2374508069 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_stress_all_with_rand_reset.1657721152 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_wakeup.2741568989 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_wakeup_reset.2833344789 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_disable_rom_integrity_check.1279123674 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.3975661359 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_escalation_timeout.2613277108 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_glitch.3599606238 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_global_esc.2187754795 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_lowpower_invalid.1973222916 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_reset_invalid.2081690505 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1685837405 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.3916780497 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_smoke.2208383599 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all.1300203306 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_stress_all_with_rand_reset.1460877971 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/20.pwrmgr_wakeup_reset.3265389394 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_aborted_low_power.2916568791 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_disable_rom_integrity_check.2713366243 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.910064694 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_escalation_timeout.3820342369 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_glitch.3313098161 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_global_esc.908973798 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_invalid.2486747211 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_lowpower_wakeup_race.1224164907 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset.633433834 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_reset_invalid.1262357335 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.192604358 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.4222107718 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_smoke.32654602 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all.2391630320 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/21.pwrmgr_stress_all_with_rand_reset.765501781 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_aborted_low_power.1022761706 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_esc_clk_rst_malfunc.2805585155 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_glitch.886071379 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_global_esc.1006794213 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_invalid.2228306713 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_lowpower_wakeup_race.1260664162 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset.63707610 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_reset_invalid.3117652438 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.1656269585 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3853596009 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3882531682 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_sec_cm_rstmgr_intersig_mubi.1717015004 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_smoke.69869892 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_stress_all_with_rand_reset.64149057 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup.3736272515 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/22.pwrmgr_wakeup_reset.1580060249 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_aborted_low_power.2744910380 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_disable_rom_integrity_check.2364936061 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.1148694054 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_escalation_timeout.2471283750 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_glitch.2270760432 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_global_esc.3358266781 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_lowpower_invalid.99379018 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_reset_invalid.2567333484 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.2497611373 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2098625580 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2520455978 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_sec_cm_rstmgr_intersig_mubi.4068655184 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_stress_all.620687270 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/23.pwrmgr_wakeup_reset.471780060 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_aborted_low_power.749833358 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_disable_rom_integrity_check.714630178 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_esc_clk_rst_malfunc.3201854719 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_escalation_timeout.530298188 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_glitch.3672937772 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_global_esc.4095196246 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_invalid.52293590 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_lowpower_wakeup_race.1079677706 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset.669413611 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_reset_invalid.640349755 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.1489139085 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1860819152 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.817866777 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.3571501537 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_smoke.2194430367 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all.945517080 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all_with_rand_reset.3937480267 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup.286534111 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_wakeup_reset.391732674 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_disable_rom_integrity_check.2526703035 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.2199559022 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_escalation_timeout.2041335405 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_glitch.1421619549 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_global_esc.2041768171 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_invalid.4262129196 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.775552887 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset.1489051797 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_reset_invalid.3701788066 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_ctrl_config_regwen.1027257412 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1630895755 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1928637128 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_sec_cm_rstmgr_intersig_mubi.887739365 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_smoke.2208496604 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all.265339469 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup.3449306069 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.100133313 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_aborted_low_power.157062579 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.204938113 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.767824413 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.4230555499 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.3264917651 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.327421423 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_invalid.707286121 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_lowpower_wakeup_race.1932658058 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset.1616625663 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_reset_invalid.3101698156 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.94541420 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.739535829 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1048039883 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.1476159360 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_smoke.3669931657 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all.291711846 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all_with_rand_reset.747472868 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup.3489905104 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_wakeup_reset.2887291254 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_aborted_low_power.694819868 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_disable_rom_integrity_check.2492660012 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.401221381 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_escalation_timeout.3070755321 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.4102784350 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.3789679854 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_invalid.1195304469 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_wakeup_race.536216968 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset.1420724999 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_reset_invalid.1065703072 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.3807821410 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4285127833 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1292328784 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_sec_cm_rstmgr_intersig_mubi.1680056700 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_smoke.187421130 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.1325953784 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.1501924294 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup.3737961801 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_wakeup_reset.4126283914 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_aborted_low_power.3494368347 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.3667845755 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.2338132585 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_escalation_timeout.2089406116 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.2912165781 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.725276367 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.1827121812 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.143090035 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.414556976 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.1896445462 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.4002248414 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1909167177 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3447461272 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.417320680 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.2174817937 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.4093034064 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all_with_rand_reset.642833481 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup.3019076128 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_wakeup_reset.1275279890 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.1872349609 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.264450076 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.1893409960 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.363465760 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_glitch.536370532 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.1010479855 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.2845883875 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.4029676447 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.2700363886 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.2099216124 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.1726897908 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.743430198 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2149555147 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.2299587515 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.3587306560 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.550351149 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.4267835135 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.40808842 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.1028587500 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_aborted_low_power.2815861176 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_disable_rom_integrity_check.3419639896 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_esc_clk_rst_malfunc.928578727 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_escalation_timeout.2766397022 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_glitch.2258414208 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_global_esc.1566677346 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_lowpower_invalid.61136270 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_lowpower_wakeup_race.2454536736 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_reset.3729386906 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_reset_invalid.805947283 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm.2129567918 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_ctrl_config_regwen.443673666 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1588220480 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.322448524 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_rstmgr_intersig_mubi.2927836564 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_smoke.2711260310 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_stress_all.911474471 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_stress_all_with_rand_reset.1812235247 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_wakeup.1992080903 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_wakeup_reset.4083371829 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.4010944025 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.1923670841 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.3706062495 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.4231866262 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.3272521693 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.315881833 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_invalid.2113705542 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.498288506 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.3642579169 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset_invalid.706095824 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.1678174888 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2500734706 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3861615033 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.3965820601 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.71050212 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.3304334525 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.3824011323 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.2635458221 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.2161832777 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.2574114178 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.3897015409 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.617341128 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.721283091 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.1387695112 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.2168193827 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.2363101980 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.4230360799 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.3543132616 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.2537653573 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.3411139383 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2354062082 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1081458990 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.3562671873 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.174988020 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.312835194 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.3648117065 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.2143787567 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.2777093649 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.3039116358 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.2000844787 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.3846442610 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.672071968 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.3233600930 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.2827257081 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.1395729900 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.2636206432 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.11840898 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.727505639 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.99127595 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2185419765 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2340155547 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.3053800026 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.261529372 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.3452619040 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.1020224064 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.4090107144 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.1626626543 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.3161671496 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.1591047137 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.3602182474 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.2372658774 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.688720532 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.2672820942 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.1420198583 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.2499691515 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.2588817777 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.1914814932 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.208936535 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.477617402 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3721012887 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.1405664349 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.1030317874 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.1053172182 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.3264620080 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.114980289 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.4263080140 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.560719146 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.200539615 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.3797652743 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.3053253257 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.3028701599 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.1877417263 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.1779084958 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.3010668186 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.2498496380 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.87551082 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.3225844360 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3233819793 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4293141565 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.3381537377 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.1529835182 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.3528794206 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.3712963328 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.790007379 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.4004145190 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.493817347 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.3518544813 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.3713043817 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.1405247800 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.4115529900 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.152351431 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.3898023598 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.402170999 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.404452088 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.1760120889 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.4017206527 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4152400431 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2826215379 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.675596850 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.1732619284 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.446145697 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.1971996446 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.1772291810 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.1865876346 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.508526029 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.3744744839 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.2433238502 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.271493981 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.839162516 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.4113413528 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.3512926158 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.2395771319 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.3523314388 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.3495288595 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.60949755 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.422348376 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2147459859 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.3150832983 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.3226878902 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all.966379298 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all_with_rand_reset.2354831804 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.925799428 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.603166170 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.1810613103 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.3436776398 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.2278288846 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.49445653 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.2081221935 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.579218776 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.3316917873 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.3095493573 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.3827236496 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.1743394787 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.2513245594 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4163409444 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2393971701 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.3247935365 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.446964859 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.2619518910 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all_with_rand_reset.3182521667 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.2047751036 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.2870167994 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.3834261689 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.818736199 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.2464115701 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.4104518034 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.1820769320 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.3931147277 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_invalid.841189300 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.530546001 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.2297247829 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.221745932 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.824615784 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1988434552 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3842407302 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.3131238019 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.4072904263 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.1096947448 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.3490640991 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.3122214357 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.827654542 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.2662516011 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.4132654499 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.3047538794 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.2252200601 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.3552757259 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.726374002 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.3406542475 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.3913807699 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.4100476430 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.1735658261 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.165875610 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1926824168 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1162305564 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.1079805896 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.2593532964 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all.1388585505 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all_with_rand_reset.1257537280 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.2880857881 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.895208807 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_aborted_low_power.3021562644 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_disable_rom_integrity_check.2039391532 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_esc_clk_rst_malfunc.3460533228 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_escalation_timeout.478462824 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_glitch.3350494299 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_global_esc.2849191010 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_lowpower_invalid.3962261689 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_lowpower_wakeup_race.3800070039 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_reset.1761206677 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_reset_invalid.834109268 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm.322274943 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_ctrl_config_regwen.1804373085 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3265494127 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1956970728 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_rstmgr_intersig_mubi.2803912769 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_smoke.3409340970 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_stress_all.3870984713 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_stress_all_with_rand_reset.1575033591 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_wakeup.2887492510 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_wakeup_reset.600449572 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_aborted_low_power.785727545 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_disable_rom_integrity_check.878293801 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.547461414 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_escalation_timeout.964786288 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_glitch.1234345827 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_global_esc.2222817150 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_invalid.168897017 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.1625820991 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.1421615488 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset_invalid.1895314476 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_ctrl_config_regwen.552753638 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3526647123 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1511686957 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.1899157366 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.87077030 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all.1337730814 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all_with_rand_reset.1806335859 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.750232094 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.1639182675 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_aborted_low_power.1904271886 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_disable_rom_integrity_check.797445586 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_esc_clk_rst_malfunc.1750870540 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_escalation_timeout.1408652643 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_glitch.2266375765 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_global_esc.449987889 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_invalid.1086611830 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.1544658025 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.2359346793 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset_invalid.368251277 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.5577650 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.316285924 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1650368567 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.2699602240 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_smoke.668969424 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all.3874967588 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all_with_rand_reset.1553167436 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.3093906528 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup_reset.40040818 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_aborted_low_power.870025905 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_disable_rom_integrity_check.1385138863 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.3666946345 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_escalation_timeout.2033855054 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_glitch.2481279868 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_global_esc.3742188126 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_invalid.3560511398 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_wakeup_race.3330991660 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset.695582103 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset_invalid.413857927 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_ctrl_config_regwen.1438362103 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1601567039 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3938638559 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rstmgr_intersig_mubi.3635265546 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_smoke.2480798681 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all.3089174631 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all_with_rand_reset.244594139 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup.3070335263 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup_reset.3361290855 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_aborted_low_power.2515172409 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_disable_rom_integrity_check.2962885543 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.1511104017 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_escalation_timeout.2780086712 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_glitch.3091223511 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_invalid.1802816760 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_wakeup_race.4285695893 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset.1184770235 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset_invalid.1552142808 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1172377675 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2183967502 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_smoke.589696211 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all.3878378323 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all_with_rand_reset.1871084451 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup.3506481229 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup_reset.3413933391 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_aborted_low_power.3033607031 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_disable_rom_integrity_check.2898714217 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.2132933984 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_escalation_timeout.2657404409 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_glitch.2490292887 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_global_esc.3468828778 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_invalid.1387825350 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_wakeup_race.3769132806 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset.2025770128 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset_invalid.851693507 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_ctrl_config_regwen.2254846024 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1040962223 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1032285988 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.2295329825 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_smoke.1711395341 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup.3218817321 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup_reset.555421298 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_invalid.246967928 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset_invalid.3564123215 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all.2307863353 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all_with_rand_reset.1212862333 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_aborted_low_power.3530412086 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_disable_rom_integrity_check.1400387846 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_escalation_timeout.2611541865 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_glitch.3613971909 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_global_esc.3524550758 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_invalid.695811093 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_wakeup_race.353083699 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset.1230186046 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset_invalid.4237654155 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_ctrl_config_regwen.2527483925 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3423056149 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_smoke.1735921681 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all.3803665908 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all_with_rand_reset.1282804678 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup.3263946498 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup_reset.2554758231 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_aborted_low_power.3256004248 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_disable_rom_integrity_check.584226683 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_esc_clk_rst_malfunc.168432327 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_escalation_timeout.4209808367 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_glitch.2709413405 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_global_esc.951031989 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_invalid.792513203 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_wakeup_race.1013698125 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset.3873012907 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset_invalid.1490988127 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.1700697868 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.927473085 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3698065707 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rstmgr_intersig_mubi.3282493254 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_smoke.1551172611 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all.1985825725 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all_with_rand_reset.2609516075 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup.2743591039 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup_reset.1651217511 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_aborted_low_power.1249025027 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_disable_rom_integrity_check.1965218640 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_esc_clk_rst_malfunc.3953253858 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_escalation_timeout.3589147975 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_glitch.3499315100 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_global_esc.704742865 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_invalid.4271868827 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_wakeup_race.2926272273 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset.2942954565 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset_invalid.2992957930 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_ctrl_config_regwen.2286648609 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3255605098 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2632969343 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rstmgr_intersig_mubi.1584295350 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_smoke.2312760591 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all.2273460725 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all_with_rand_reset.3056973680 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup.205609172 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup_reset.193609212 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_aborted_low_power.1842269882 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_disable_rom_integrity_check.70495904 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.2281440491 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_escalation_timeout.1778319495 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_glitch.3618764381 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_global_esc.4250392233 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_invalid.4056058080 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_wakeup_race.2471287443 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset.1079437956 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset_invalid.715815885 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.2798852383 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1881245049 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4075720593 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.3770636775 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_smoke.3260146490 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all.3580299741 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all_with_rand_reset.3401468820 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup.4015329834 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup_reset.408176309 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_aborted_low_power.177819609 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_disable_rom_integrity_check.4019507952 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_esc_clk_rst_malfunc.2051409468 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_escalation_timeout.3803985535 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_glitch.783933333 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_global_esc.4150590322 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_lowpower_invalid.2765021934 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_lowpower_wakeup_race.1535919269 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_reset.892143694 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_reset_invalid.221186565 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_ctrl_config_regwen.4012884567 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1764626072 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1109635799 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_rstmgr_intersig_mubi.2774456600 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_smoke.2656662982 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_stress_all.1366652198 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_wakeup.1893282056 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_wakeup_reset.434455733 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_aborted_low_power.213137804 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_disable_rom_integrity_check.952809881 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_esc_clk_rst_malfunc.1117904296 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_escalation_timeout.2350780175 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_glitch.4072325051 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_global_esc.676609208 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_lowpower_invalid.518341518 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_lowpower_wakeup_race.823769142 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_reset.1012484120 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_reset_invalid.175923377 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_ctrl_config_regwen.4052783085 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3244967386 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1761234434 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_rstmgr_intersig_mubi.1976878198 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_smoke.2310210113 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_stress_all.2922372917 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_stress_all_with_rand_reset.749978315 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_wakeup.1154991762 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_wakeup_reset.79495504 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_aborted_low_power.3538165662 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_disable_rom_integrity_check.4040955385 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_esc_clk_rst_malfunc.1077639285 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_escalation_timeout.2072725167 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_glitch.1001747964 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_global_esc.564818684 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_lowpower_invalid.1552899251 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_lowpower_wakeup_race.3210366352 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_reset.873686026 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_reset_invalid.505431928 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_ctrl_config_regwen.2222188930 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.847812399 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1668802728 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_rstmgr_intersig_mubi.219764365 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_smoke.3167455172 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_stress_all.2286655173 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_stress_all_with_rand_reset.745990267 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_wakeup.2161166747 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_wakeup_reset.3082794878 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_aborted_low_power.3959545235 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_disable_rom_integrity_check.2766881981 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_esc_clk_rst_malfunc.3750513775 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_escalation_timeout.2214189170 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_glitch.2772938042 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_global_esc.3239498232 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_lowpower_invalid.904870609 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_lowpower_wakeup_race.2363233212 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_reset.1835554204 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_reset_invalid.3995047125 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_ctrl_config_regwen.2264949030 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2845250455 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1921407086 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_rstmgr_intersig_mubi.351181551 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_smoke.2375446457 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_stress_all.2790096843 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_stress_all_with_rand_reset.154677943 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_wakeup.1983914803 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_wakeup_reset.4109173222 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_aborted_low_power.3183086379 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_disable_rom_integrity_check.553261263 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_esc_clk_rst_malfunc.3971877535 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_escalation_timeout.2506908329 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_glitch.1902243393 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_global_esc.757204777 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_lowpower_invalid.3392991032 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_lowpower_wakeup_race.1678541467 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_reset.3861719596 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_reset_invalid.258148344 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_ctrl_config_regwen.3792366969 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2119135461 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2426006300 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_rstmgr_intersig_mubi.350811990 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_smoke.844612324 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all.1078940468 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all_with_rand_reset.40383062 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_wakeup.2191741283 |
| /workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_wakeup_reset.240026743 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_smoke.2491550594 |
|
|
Sep 09 07:25:10 AM UTC 24 |
Sep 09 07:25:12 AM UTC 24 |
31701075 ps |
| T2 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_reset.3117330511 |
|
|
Sep 09 07:25:11 AM UTC 24 |
Sep 09 07:25:13 AM UTC 24 |
56754351 ps |
| T3 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_wakeup.1866808811 |
|
|
Sep 09 07:25:12 AM UTC 24 |
Sep 09 07:25:15 AM UTC 24 |
332780280 ps |
| T4 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_lowpower_wakeup_race.4125398377 |
|
|
Sep 09 07:25:12 AM UTC 24 |
Sep 09 07:25:15 AM UTC 24 |
321448482 ps |
| T5 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_wakeup_reset.3551302509 |
|
|
Sep 09 07:25:12 AM UTC 24 |
Sep 09 07:25:15 AM UTC 24 |
398451200 ps |
| T6 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_aborted_low_power.2113508002 |
|
|
Sep 09 07:25:13 AM UTC 24 |
Sep 09 07:25:15 AM UTC 24 |
18360926 ps |
| T7 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_esc_clk_rst_malfunc.1570643753 |
|
|
Sep 09 07:25:15 AM UTC 24 |
Sep 09 07:25:17 AM UTC 24 |
29958987 ps |
| T8 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_glitch.1588890405 |
|
|
Sep 09 07:25:15 AM UTC 24 |
Sep 09 07:25:17 AM UTC 24 |
23042375 ps |
| T9 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_global_esc.3357728586 |
|
|
Sep 09 07:25:15 AM UTC 24 |
Sep 09 07:25:17 AM UTC 24 |
46824620 ps |
| T10 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm_rstmgr_intersig_mubi.288331413 |
|
|
Sep 09 07:25:15 AM UTC 24 |
Sep 09 07:25:17 AM UTC 24 |
102788925 ps |
| T40 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm_ctrl_config_regwen.3438830025 |
|
|
Sep 09 07:25:15 AM UTC 24 |
Sep 09 07:25:17 AM UTC 24 |
191276931 ps |
| T11 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_escalation_timeout.8427920 |
|
|
Sep 09 07:25:15 AM UTC 24 |
Sep 09 07:25:17 AM UTC 24 |
393333231 ps |
| T14 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3436378342 |
|
|
Sep 09 07:25:13 AM UTC 24 |
Sep 09 07:25:18 AM UTC 24 |
856501524 ps |
| T15 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3172220644 |
|
|
Sep 09 07:25:15 AM UTC 24 |
Sep 09 07:25:18 AM UTC 24 |
1344943189 ps |
| T45 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_lowpower_invalid.737433946 |
|
|
Sep 09 07:25:16 AM UTC 24 |
Sep 09 07:25:18 AM UTC 24 |
40582676 ps |
| T13 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_disable_rom_integrity_check.3742263225 |
|
|
Sep 09 07:25:16 AM UTC 24 |
Sep 09 07:25:18 AM UTC 24 |
48409326 ps |
| T28 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_reset_invalid.3111762075 |
|
|
Sep 09 07:25:16 AM UTC 24 |
Sep 09 07:25:19 AM UTC 24 |
96555720 ps |
| T20 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_sec_cm.344581960 |
|
|
Sep 09 07:25:16 AM UTC 24 |
Sep 09 07:25:19 AM UTC 24 |
883032097 ps |
| T31 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_smoke.2540478408 |
|
|
Sep 09 07:25:17 AM UTC 24 |
Sep 09 07:25:20 AM UTC 24 |
45572711 ps |
| T32 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_reset.874127155 |
|
|
Sep 09 07:25:18 AM UTC 24 |
Sep 09 07:25:20 AM UTC 24 |
48322376 ps |
| T33 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_wakeup_reset.3645500802 |
|
|
Sep 09 07:25:18 AM UTC 24 |
Sep 09 07:25:20 AM UTC 24 |
504937924 ps |
| T34 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_wakeup.3497784203 |
|
|
Sep 09 07:25:18 AM UTC 24 |
Sep 09 07:25:20 AM UTC 24 |
201947725 ps |
| T35 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_rstmgr_intersig_mubi.1056588444 |
|
|
Sep 09 07:25:18 AM UTC 24 |
Sep 09 07:25:20 AM UTC 24 |
51540769 ps |
| T36 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_lowpower_wakeup_race.207188642 |
|
|
Sep 09 07:25:18 AM UTC 24 |
Sep 09 07:25:20 AM UTC 24 |
115765049 ps |
| T16 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_aborted_low_power.124074086 |
|
|
Sep 09 07:25:18 AM UTC 24 |
Sep 09 07:25:20 AM UTC 24 |
35202371 ps |
| T37 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_rstmgr_intersig_mubi.2927836564 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:27 AM UTC 24 |
111993601 ps |
| T38 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3617909987 |
|
|
Sep 09 07:25:18 AM UTC 24 |
Sep 09 07:25:21 AM UTC 24 |
888035911 ps |
| T12 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_esc_clk_rst_malfunc.4190124938 |
|
|
Sep 09 07:25:19 AM UTC 24 |
Sep 09 07:25:21 AM UTC 24 |
38765627 ps |
| T39 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_reset.1761206677 |
|
|
Sep 09 07:25:27 AM UTC 24 |
Sep 09 07:25:29 AM UTC 24 |
57127085 ps |
| T44 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_global_esc.2930911246 |
|
|
Sep 09 07:25:19 AM UTC 24 |
Sep 09 07:25:21 AM UTC 24 |
28737249 ps |
| T18 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_glitch.1875082637 |
|
|
Sep 09 07:25:19 AM UTC 24 |
Sep 09 07:25:21 AM UTC 24 |
86983075 ps |
| T27 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_disable_rom_integrity_check.1197619098 |
|
|
Sep 09 07:25:19 AM UTC 24 |
Sep 09 07:25:21 AM UTC 24 |
76860280 ps |
| T41 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_reset_invalid.1301755242 |
|
|
Sep 09 07:25:19 AM UTC 24 |
Sep 09 07:25:21 AM UTC 24 |
216688565 ps |
| T42 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_escalation_timeout.4194702477 |
|
|
Sep 09 07:25:19 AM UTC 24 |
Sep 09 07:25:21 AM UTC 24 |
388685270 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_lowpower_invalid.2315261381 |
|
|
Sep 09 07:25:19 AM UTC 24 |
Sep 09 07:25:21 AM UTC 24 |
74444504 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_ctrl_config_regwen.936176767 |
|
|
Sep 09 07:25:19 AM UTC 24 |
Sep 09 07:25:22 AM UTC 24 |
274038070 ps |
| T17 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_stress_all.3013834630 |
|
|
Sep 09 07:25:16 AM UTC 24 |
Sep 09 07:25:22 AM UTC 24 |
1972163372 ps |
| T83 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2448023219 |
|
|
Sep 09 07:25:18 AM UTC 24 |
Sep 09 07:25:22 AM UTC 24 |
901630347 ps |
| T84 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_smoke.2246883006 |
|
|
Sep 09 07:25:21 AM UTC 24 |
Sep 09 07:25:23 AM UTC 24 |
64418890 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_wakeup_reset.2833344789 |
|
|
Sep 09 07:25:21 AM UTC 24 |
Sep 09 07:25:23 AM UTC 24 |
40242350 ps |
| T43 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_reset.1236335018 |
|
|
Sep 09 07:25:21 AM UTC 24 |
Sep 09 07:25:23 AM UTC 24 |
72135435 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_wakeup.2741568989 |
|
|
Sep 09 07:25:21 AM UTC 24 |
Sep 09 07:25:23 AM UTC 24 |
448705448 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_stress_all.3739293496 |
|
|
Sep 09 07:25:21 AM UTC 24 |
Sep 09 07:25:23 AM UTC 24 |
845676100 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_lowpower_wakeup_race.2857198696 |
|
|
Sep 09 07:25:21 AM UTC 24 |
Sep 09 07:25:24 AM UTC 24 |
240959169 ps |
| T21 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_sec_cm.2535932732 |
|
|
Sep 09 07:25:21 AM UTC 24 |
Sep 09 07:25:24 AM UTC 24 |
649427822 ps |
| T26 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_aborted_low_power.2886185130 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:24 AM UTC 24 |
57491312 ps |
| T19 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_glitch.2839717145 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:24 AM UTC 24 |
39835026 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_esc_clk_rst_malfunc.2636528599 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:24 AM UTC 24 |
37699896 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_global_esc.39123782 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:24 AM UTC 24 |
28156685 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_rstmgr_intersig_mubi.898350471 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:24 AM UTC 24 |
151586895 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_lowpower_invalid.4189061030 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:24 AM UTC 24 |
42683809 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_disable_rom_integrity_check.255243658 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:25 AM UTC 24 |
62477342 ps |
| T65 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_ctrl_config_regwen.3107657761 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:25 AM UTC 24 |
382893420 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_escalation_timeout.1564031180 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:25 AM UTC 24 |
113452607 ps |
| T48 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_reset_invalid.3041132071 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:25 AM UTC 24 |
152557071 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_smoke.2711260310 |
|
|
Sep 09 07:25:24 AM UTC 24 |
Sep 09 07:25:26 AM UTC 24 |
36354211 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3475882226 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:26 AM UTC 24 |
1283467339 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_reset.3729386906 |
|
|
Sep 09 07:25:24 AM UTC 24 |
Sep 09 07:25:26 AM UTC 24 |
45019707 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_lowpower_wakeup_race.2454536736 |
|
|
Sep 09 07:25:24 AM UTC 24 |
Sep 09 07:25:26 AM UTC 24 |
94524648 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_stress_all.2374508069 |
|
|
Sep 09 07:25:24 AM UTC 24 |
Sep 09 07:25:26 AM UTC 24 |
408127520 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_wakeup_reset.4083371829 |
|
|
Sep 09 07:25:24 AM UTC 24 |
Sep 09 07:25:26 AM UTC 24 |
174300333 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_wakeup.1992080903 |
|
|
Sep 09 07:25:24 AM UTC 24 |
Sep 09 07:25:26 AM UTC 24 |
180030049 ps |
| T22 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm.3506600567 |
|
|
Sep 09 07:25:24 AM UTC 24 |
Sep 09 07:25:26 AM UTC 24 |
465624450 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/2.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2217164840 |
|
|
Sep 09 07:25:22 AM UTC 24 |
Sep 09 07:25:26 AM UTC 24 |
772860566 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_esc_clk_rst_malfunc.928578727 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:27 AM UTC 24 |
30499763 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_global_esc.1566677346 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:27 AM UTC 24 |
26882735 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_ctrl_config_regwen.443673666 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:27 AM UTC 24 |
65403879 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_aborted_low_power.2815861176 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:27 AM UTC 24 |
55530622 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_wakeup.2887492510 |
|
|
Sep 09 07:25:27 AM UTC 24 |
Sep 09 07:25:29 AM UTC 24 |
164594820 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_glitch.2258414208 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:27 AM UTC 24 |
57322998 ps |
| T213 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_reset_invalid.805947283 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:27 AM UTC 24 |
113388874 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_escalation_timeout.2766397022 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:27 AM UTC 24 |
1562801919 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_disable_rom_integrity_check.3419639896 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:27 AM UTC 24 |
97242300 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_lowpower_invalid.61136270 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:28 AM UTC 24 |
44348943 ps |
| T29 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm.2129567918 |
|
|
Sep 09 07:25:26 AM UTC 24 |
Sep 09 07:25:28 AM UTC 24 |
324460391 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1588220480 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:28 AM UTC 24 |
1061069165 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_smoke.3409340970 |
|
|
Sep 09 07:25:27 AM UTC 24 |
Sep 09 07:25:28 AM UTC 24 |
43062304 ps |
| T46 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_aborted_low_power.3021562644 |
|
|
Sep 09 07:25:27 AM UTC 24 |
Sep 09 07:25:29 AM UTC 24 |
53819056 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_lowpower_wakeup_race.3800070039 |
|
|
Sep 09 07:25:27 AM UTC 24 |
Sep 09 07:25:29 AM UTC 24 |
159674111 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_wakeup_reset.600449572 |
|
|
Sep 09 07:25:27 AM UTC 24 |
Sep 09 07:25:29 AM UTC 24 |
246064883 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.322448524 |
|
|
Sep 09 07:25:25 AM UTC 24 |
Sep 09 07:25:29 AM UTC 24 |
844666333 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_escalation_timeout.478462824 |
|
|
Sep 09 07:25:28 AM UTC 24 |
Sep 09 07:25:30 AM UTC 24 |
257187060 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_esc_clk_rst_malfunc.3460533228 |
|
|
Sep 09 07:25:28 AM UTC 24 |
Sep 09 07:25:30 AM UTC 24 |
30055129 ps |
| T47 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_stress_all.2922372917 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:38 AM UTC 24 |
2694490993 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_disable_rom_integrity_check.2039391532 |
|
|
Sep 09 07:25:28 AM UTC 24 |
Sep 09 07:25:30 AM UTC 24 |
50301401 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_wakeup.1983914803 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
189202992 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_glitch.3350494299 |
|
|
Sep 09 07:25:28 AM UTC 24 |
Sep 09 07:25:30 AM UTC 24 |
77321568 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_global_esc.2849191010 |
|
|
Sep 09 07:25:28 AM UTC 24 |
Sep 09 07:25:30 AM UTC 24 |
36129922 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_ctrl_config_regwen.1804373085 |
|
|
Sep 09 07:25:28 AM UTC 24 |
Sep 09 07:25:30 AM UTC 24 |
186054244 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_lowpower_invalid.3962261689 |
|
|
Sep 09 07:25:28 AM UTC 24 |
Sep 09 07:25:30 AM UTC 24 |
43335469 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_rstmgr_intersig_mubi.2803912769 |
|
|
Sep 09 07:25:28 AM UTC 24 |
Sep 09 07:25:30 AM UTC 24 |
75696015 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_reset_invalid.834109268 |
|
|
Sep 09 07:25:28 AM UTC 24 |
Sep 09 07:25:30 AM UTC 24 |
110917903 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1956970728 |
|
|
Sep 09 07:25:27 AM UTC 24 |
Sep 09 07:25:31 AM UTC 24 |
959694460 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_smoke.2656662982 |
|
|
Sep 09 07:25:29 AM UTC 24 |
Sep 09 07:25:31 AM UTC 24 |
34565680 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_reset.892143694 |
|
|
Sep 09 07:25:29 AM UTC 24 |
Sep 09 07:25:31 AM UTC 24 |
57887855 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3265494127 |
|
|
Sep 09 07:25:27 AM UTC 24 |
Sep 09 07:25:31 AM UTC 24 |
962579640 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_stress_all.911474471 |
|
|
Sep 09 07:25:27 AM UTC 24 |
Sep 09 07:25:31 AM UTC 24 |
1878733823 ps |
| T30 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_sec_cm.322274943 |
|
|
Sep 09 07:25:28 AM UTC 24 |
Sep 09 07:25:31 AM UTC 24 |
749180487 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_aborted_low_power.177819609 |
|
|
Sep 09 07:25:30 AM UTC 24 |
Sep 09 07:25:32 AM UTC 24 |
55454066 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_esc_clk_rst_malfunc.2051409468 |
|
|
Sep 09 07:25:30 AM UTC 24 |
Sep 09 07:25:32 AM UTC 24 |
49312477 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_wakeup.1893282056 |
|
|
Sep 09 07:25:30 AM UTC 24 |
Sep 09 07:25:32 AM UTC 24 |
138590699 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_rstmgr_intersig_mubi.2774456600 |
|
|
Sep 09 07:25:30 AM UTC 24 |
Sep 09 07:25:32 AM UTC 24 |
49691946 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_lowpower_wakeup_race.1535919269 |
|
|
Sep 09 07:25:30 AM UTC 24 |
Sep 09 07:25:32 AM UTC 24 |
256583892 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_ctrl_config_regwen.4012884567 |
|
|
Sep 09 07:25:30 AM UTC 24 |
Sep 09 07:25:32 AM UTC 24 |
144488113 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_wakeup_reset.434455733 |
|
|
Sep 09 07:25:30 AM UTC 24 |
Sep 09 07:25:32 AM UTC 24 |
304798893 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1764626072 |
|
|
Sep 09 07:25:30 AM UTC 24 |
Sep 09 07:25:33 AM UTC 24 |
1534648807 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_smoke.2375446457 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
35324141 ps |
| T23 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/0.pwrmgr_stress_all_with_rand_reset.2441376503 |
|
|
Sep 09 07:25:16 AM UTC 24 |
Sep 09 07:25:33 AM UTC 24 |
3764277764 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_global_esc.4150590322 |
|
|
Sep 09 07:25:31 AM UTC 24 |
Sep 09 07:25:33 AM UTC 24 |
70500863 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_escalation_timeout.3803985535 |
|
|
Sep 09 07:25:31 AM UTC 24 |
Sep 09 07:25:33 AM UTC 24 |
110653519 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_wakeup_reset.4109173222 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
107988929 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1109635799 |
|
|
Sep 09 07:25:30 AM UTC 24 |
Sep 09 07:25:33 AM UTC 24 |
1010240472 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_lowpower_invalid.2765021934 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:33 AM UTC 24 |
78971415 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_glitch.783933333 |
|
|
Sep 09 07:25:31 AM UTC 24 |
Sep 09 07:25:33 AM UTC 24 |
61567915 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_reset_invalid.221186565 |
|
|
Sep 09 07:25:31 AM UTC 24 |
Sep 09 07:25:33 AM UTC 24 |
248823108 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_smoke.2310210113 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:33 AM UTC 24 |
55964308 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_disable_rom_integrity_check.4019507952 |
|
|
Sep 09 07:25:31 AM UTC 24 |
Sep 09 07:25:34 AM UTC 24 |
71221454 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_wakeup.1154991762 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:34 AM UTC 24 |
41570575 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_aborted_low_power.213137804 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:34 AM UTC 24 |
86060026 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_lowpower_wakeup_race.823769142 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:34 AM UTC 24 |
351633628 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_reset.1012484120 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:34 AM UTC 24 |
88710885 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_stress_all.3870984713 |
|
|
Sep 09 07:25:29 AM UTC 24 |
Sep 09 07:25:34 AM UTC 24 |
3089361272 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_wakeup_reset.79495504 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:34 AM UTC 24 |
317741425 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_stress_all.1366652198 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
1944011538 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_esc_clk_rst_malfunc.1117904296 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
31798791 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_global_esc.676609208 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
41959350 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_reset.1835554204 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
61958834 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_glitch.4072325051 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
90990693 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_rstmgr_intersig_mubi.1976878198 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
52733600 ps |
| T24 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/4.pwrmgr_stress_all_with_rand_reset.1575033591 |
|
|
Sep 09 07:25:29 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
1568816799 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1761234434 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
1359667910 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_lowpower_invalid.518341518 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
68358244 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_reset_invalid.175923377 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
123101921 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_smoke.3167455172 |
|
|
Sep 09 07:25:34 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
43333894 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_escalation_timeout.2350780175 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
200727005 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_ctrl_config_regwen.4052783085 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
250844173 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_disable_rom_integrity_check.952809881 |
|
|
Sep 09 07:25:33 AM UTC 24 |
Sep 09 07:25:35 AM UTC 24 |
63535899 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/6.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3244967386 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:36 AM UTC 24 |
814130931 ps |
| T25 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/3.pwrmgr_stress_all_with_rand_reset.1812235247 |
|
|
Sep 09 07:25:26 AM UTC 24 |
Sep 09 07:25:36 AM UTC 24 |
3038384048 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_esc_clk_rst_malfunc.1077639285 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
37268820 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_reset.873686026 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
51206940 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_lowpower_wakeup_race.3210366352 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
89637685 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_aborted_low_power.3538165662 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
89110540 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_wakeup.2161166747 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
278472350 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_wakeup_reset.3082794878 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
169662747 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_global_esc.564818684 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
48672635 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_glitch.1001747964 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
26477441 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_lowpower_invalid.1552899251 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
87745779 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_escalation_timeout.2072725167 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
119888714 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_rstmgr_intersig_mubi.219764365 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
131602417 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_disable_rom_integrity_check.4040955385 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
48970132 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_reset_invalid.505431928 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:37 AM UTC 24 |
105315303 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_ctrl_config_regwen.2222188930 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:38 AM UTC 24 |
200995317 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.847812399 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:38 AM UTC 24 |
1214665814 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_lowpower_wakeup_race.2363233212 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
180744072 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_esc_clk_rst_malfunc.3750513775 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
29401257 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_global_esc.3239498232 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
74206315 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_rstmgr_intersig_mubi.351181551 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
52894991 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_aborted_low_power.3959545235 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
40138298 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_escalation_timeout.2214189170 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
294778187 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1668802728 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
938936542 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_ctrl_config_regwen.2264949030 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:39 AM UTC 24 |
349893780 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1921407086 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:40 AM UTC 24 |
983256923 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_glitch.2772938042 |
|
|
Sep 09 07:25:38 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
41534692 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2845250455 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
814273104 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_disable_rom_integrity_check.2766881981 |
|
|
Sep 09 07:25:38 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
68799720 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_lowpower_invalid.904870609 |
|
|
Sep 09 07:25:38 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
48890254 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_reset.3395205990 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:47 AM UTC 24 |
77385626 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_reset.3861719596 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
36648449 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_smoke.844612324 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
66784467 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_reset_invalid.3995047125 |
|
|
Sep 09 07:25:38 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
109598369 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_wakeup_reset.240026743 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
198905094 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_lowpower_wakeup_race.1678541467 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
147095122 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_esc_clk_rst_malfunc.3971877535 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
31632042 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_wakeup.2191741283 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
186190335 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_aborted_low_power.3183086379 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:41 AM UTC 24 |
38736458 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_rstmgr_intersig_mubi.350811990 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
65403995 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_ctrl_config_regwen.3792366969 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
273555668 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_global_esc.757204777 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
50631942 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_glitch.1902243393 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
26322584 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_escalation_timeout.2506908329 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
112430414 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_lowpower_invalid.3392991032 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
74343959 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_stress_all.2286655173 |
|
|
Sep 09 07:25:37 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
2017551478 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_aborted_low_power.3501381936 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
37577193 ps |
| T276 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_lowpower_wakeup_race.1340919250 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
164796690 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_reset_invalid.258148344 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
164329090 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_disable_rom_integrity_check.553261263 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
80506892 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_smoke.2471594330 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
29784001 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_reset.2132134059 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:42 AM UTC 24 |
67758808 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_wakeup.410764360 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:43 AM UTC 24 |
195295805 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2119135461 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:43 AM UTC 24 |
1436702894 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_wakeup_reset.2992658865 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:43 AM UTC 24 |
561184104 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/7.pwrmgr_stress_all_with_rand_reset.745990267 |
|
|
Sep 09 07:25:35 AM UTC 24 |
Sep 09 07:25:43 AM UTC 24 |
18159909702 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_esc_clk_rst_malfunc.1573902896 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:43 AM UTC 24 |
31354734 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/1.pwrmgr_stress_all_with_rand_reset.2224084902 |
|
|
Sep 09 07:25:21 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
5687872391 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2426006300 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
914390286 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_global_esc.1653020245 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
63224948 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_rstmgr_intersig_mubi.2905926594 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
52015754 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_glitch.2999844259 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
40458358 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_escalation_timeout.3715035949 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
109598465 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_lowpower_invalid.1295797707 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
39921324 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_smoke.771776683 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
32517269 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_disable_rom_integrity_check.2766153704 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
59631038 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_ctrl_config_regwen.2532148897 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
82481323 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_reset_invalid.112561440 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
105448031 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_reset.1598234124 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:44 AM UTC 24 |
131245172 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_stress_all.2790096843 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:45 AM UTC 24 |
3130069057 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1080564532 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:45 AM UTC 24 |
1279168037 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all_with_rand_reset.40383062 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:45 AM UTC 24 |
1471503640 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.325171188 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:45 AM UTC 24 |
1019079026 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/9.pwrmgr_stress_all.1078940468 |
|
|
Sep 09 07:25:40 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
4226857773 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_global_esc.2099124164 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
70450325 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_esc_clk_rst_malfunc.4274242358 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
81620401 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_wakeup_reset.2331968258 |
|
|
Sep 09 07:25:43 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
105921490 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_glitch.983769125 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
108160302 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_disable_rom_integrity_check.3703887231 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
78034533 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_rstmgr_intersig_mubi.2641210653 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
104151940 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_aborted_low_power.2466667431 |
|
|
Sep 09 07:25:43 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
33478749 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_ctrl_config_regwen.2278134302 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
121611736 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_escalation_timeout.38178403 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
111322669 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_wakeup.3634076518 |
|
|
Sep 09 07:25:43 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
373932558 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_reset_invalid.578045874 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
122011321 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_lowpower_invalid.325369762 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
88592347 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/8.pwrmgr_stress_all_with_rand_reset.154677943 |
|
|
Sep 09 07:25:39 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
3920072185 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_lowpower_wakeup_race.2646986069 |
|
|
Sep 09 07:25:43 AM UTC 24 |
Sep 09 07:25:46 AM UTC 24 |
260122736 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_smoke.1884989644 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:47 AM UTC 24 |
58706409 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_global_esc.600864622 |
|
|
Sep 09 07:25:46 AM UTC 24 |
Sep 09 07:25:47 AM UTC 24 |
77024755 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_esc_clk_rst_malfunc.2299919373 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:47 AM UTC 24 |
29530136 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_lowpower_wakeup_race.4195031879 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:47 AM UTC 24 |
317673650 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_glitch.539899852 |
|
|
Sep 09 07:25:46 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
36186236 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/5.pwrmgr_stress_all_with_rand_reset.2751528908 |
|
|
Sep 09 07:25:32 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
4422371305 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rstmgr_intersig_mubi.832220999 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
75742084 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_aborted_low_power.2937143934 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
45719021 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2017725115 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
1021617469 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_ctrl_config_regwen.2861571327 |
|
|
Sep 09 07:25:46 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
135662304 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_escalation_timeout.4013268174 |
|
|
Sep 09 07:25:46 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
111397835 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_wakeup.3666578525 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
170878280 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_wakeup_reset.1223022718 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
230907125 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/10.pwrmgr_stress_all.1802721914 |
|
|
Sep 09 07:25:42 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
1403112119 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/11.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3085221919 |
|
|
Sep 09 07:25:44 AM UTC 24 |
Sep 09 07:25:48 AM UTC 24 |
979165208 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_escalation_timeout.1257009688 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
201317380 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_disable_rom_integrity_check.4029059702 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
134078456 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_lowpower_invalid.751673146 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
69480370 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_reset_invalid.29723167 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
152973736 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1355600258 |
|
|
Sep 09 07:25:45 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
904030788 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_smoke.4277359613 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
48310921 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_reset.2174318436 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
42359050 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/13.pwrmgr_lowpower_wakeup_race.527375415 |
|
|
Sep 09 07:25:47 AM UTC 24 |
Sep 09 07:25:49 AM UTC 24 |
50313830 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/16.pwrmgr_smoke.2144723533 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
92005154 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/15.pwrmgr_reset_invalid.64604220 |
|
|
Sep 09 07:25:53 AM UTC 24 |
Sep 09 07:25:55 AM UTC 24 |
168621008 ps |