T563 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_global_esc.1010479855 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
47526674 ps |
T564 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_invalid.2845883875 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
76228400 ps |
T565 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_disable_rom_integrity_check.264450076 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
59056516 ps |
T566 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.2299587515 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
52798545 ps |
T567 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_smoke.71050212 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
64073540 ps |
T568 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset_invalid.2099216124 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
111225982 ps |
T569 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_escalation_timeout.363465760 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
209237714 ps |
T570 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup.2635458221 |
|
|
Sep 09 07:27:22 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
156879026 ps |
T571 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_reset.3642579169 |
|
|
Sep 09 07:27:22 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
32187781 ps |
T572 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_glitch.2912165781 |
|
|
Sep 09 07:27:19 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
45261066 ps |
T573 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_global_esc.725276367 |
|
|
Sep 09 07:27:19 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
39782738 ps |
T574 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_invalid.1827121812 |
|
|
Sep 09 07:27:19 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
82877754 ps |
T575 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_disable_rom_integrity_check.3667845755 |
|
|
Sep 09 07:27:19 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
52604014 ps |
T576 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset_invalid.1896445462 |
|
|
Sep 09 07:27:19 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
102058870 ps |
T577 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_escalation_timeout.2089406116 |
|
|
Sep 09 07:27:19 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
1573869288 ps |
T578 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_sec_cm_ctrl_config_regwen.4002248414 |
|
|
Sep 09 07:27:19 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
430961535 ps |
T579 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_lowpower_wakeup_race.498288506 |
|
|
Sep 09 07:27:22 AM UTC 24 |
Sep 09 07:27:24 AM UTC 24 |
379569305 ps |
T580 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all.550351149 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:25 AM UTC 24 |
889410850 ps |
T581 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_glitch.3264917651 |
|
|
Sep 09 07:27:06 AM UTC 24 |
Sep 09 07:27:25 AM UTC 24 |
50359581 ps |
T582 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_global_esc.327421423 |
|
|
Sep 09 07:27:06 AM UTC 24 |
Sep 09 07:27:25 AM UTC 24 |
81212310 ps |
T583 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_lowpower_wakeup_race.775552887 |
|
|
Sep 09 07:26:50 AM UTC 24 |
Sep 09 07:27:25 AM UTC 24 |
61232640 ps |
T584 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.743430198 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:25 AM UTC 24 |
1134519970 ps |
T585 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_disable_rom_integrity_check.204938113 |
|
|
Sep 09 07:27:06 AM UTC 24 |
Sep 09 07:27:25 AM UTC 24 |
55162160 ps |
T586 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_reset.414556976 |
|
|
Sep 09 07:27:16 AM UTC 24 |
Sep 09 07:27:25 AM UTC 24 |
66839274 ps |
T587 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_escalation_timeout.4230555499 |
|
|
Sep 09 07:27:06 AM UTC 24 |
Sep 09 07:27:25 AM UTC 24 |
581013449 ps |
T67 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_stress_all_with_rand_reset.2088015207 |
|
|
Sep 09 07:27:00 AM UTC 24 |
Sep 09 07:27:27 AM UTC 24 |
2883706884 ps |
T588 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_wakeup_reset.2161832777 |
|
|
Sep 09 07:27:23 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
497143666 ps |
T589 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_smoke.174988020 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
27426739 ps |
T590 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_reset.2700363886 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
37208629 ps |
T591 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_escalation_timeout.4231866262 |
|
|
Sep 09 07:27:25 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
383903099 ps |
T592 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.3965820601 |
|
|
Sep 09 07:27:25 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
70712263 ps |
T593 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_global_esc.1877417263 |
|
|
Sep 09 07:27:38 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
41124454 ps |
T594 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_aborted_low_power.2574114178 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
72152155 ps |
T595 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup_reset.2777093649 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
37036095 ps |
T596 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset.3543132616 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
54215739 ps |
T597 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup.40808842 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
107181194 ps |
T598 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_wakeup.2143787567 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
233528642 ps |
T599 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.617341128 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
27839804 ps |
T600 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.3411139383 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
341093157 ps |
T601 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_wakeup_race.4230360799 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:29 AM UTC 24 |
390388551 ps |
T602 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rstmgr_intersig_mubi.3562671873 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:30 AM UTC 24 |
51780591 ps |
T603 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_escalation_timeout.721283091 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:30 AM UTC 24 |
386349092 ps |
T604 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_glitch.1387695112 |
|
|
Sep 09 07:27:27 AM UTC 24 |
Sep 09 07:27:30 AM UTC 24 |
54101569 ps |
T605 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_global_esc.2168193827 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:30 AM UTC 24 |
36389508 ps |
T606 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rstmgr_intersig_mubi.1476159360 |
|
|
Sep 09 07:27:05 AM UTC 24 |
Sep 09 07:27:30 AM UTC 24 |
97430461 ps |
T607 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_escalation_timeout.3070755321 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:30 AM UTC 24 |
383045051 ps |
T608 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.94541420 |
|
|
Sep 09 07:27:05 AM UTC 24 |
Sep 09 07:27:30 AM UTC 24 |
103892738 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all.3304334525 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:31 AM UTC 24 |
1081155312 ps |
T110 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_stress_all_with_rand_reset.747472868 |
|
|
Sep 09 07:27:09 AM UTC 24 |
Sep 09 07:27:31 AM UTC 24 |
15072117405 ps |
T610 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.739535829 |
|
|
Sep 09 07:27:05 AM UTC 24 |
Sep 09 07:27:32 AM UTC 24 |
954637598 ps |
T611 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2354062082 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:32 AM UTC 24 |
842535447 ps |
T612 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1081458990 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:32 AM UTC 24 |
863694136 ps |
T613 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1048039883 |
|
|
Sep 09 07:27:05 AM UTC 24 |
Sep 09 07:27:32 AM UTC 24 |
905396991 ps |
T614 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all.4093034064 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:33 AM UTC 24 |
2450540733 ps |
T615 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_stress_all_with_rand_reset.642833481 |
|
|
Sep 09 07:27:19 AM UTC 24 |
Sep 09 07:27:33 AM UTC 24 |
6269896099 ps |
T616 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.3846442610 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
33234312 ps |
T617 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_global_esc.2827257081 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
37265712 ps |
T618 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_aborted_low_power.3039116358 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
119623403 ps |
T619 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_glitch.3233600930 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
35441069 ps |
T620 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_escalation_timeout.672071968 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
383269099 ps |
T621 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.3053800026 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
191051434 ps |
T622 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.99127595 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
187862046 ps |
T623 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_disable_rom_integrity_check.2000844787 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
83733644 ps |
T624 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_invalid.1395729900 |
|
|
Sep 09 07:27:32 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
58095605 ps |
T625 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset_invalid.727505639 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
158714356 ps |
T626 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_smoke.1030317874 |
|
|
Sep 09 07:27:32 AM UTC 24 |
Sep 09 07:27:34 AM UTC 24 |
28793055 ps |
T627 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_reset.11840898 |
|
|
Sep 09 07:27:30 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
43655513 ps |
T628 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_reset_invalid.2537653573 |
|
|
Sep 09 07:27:30 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
170471814 ps |
T629 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_lowpower_invalid.2363101980 |
|
|
Sep 09 07:27:30 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
70813067 ps |
T630 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup.4090107144 |
|
|
Sep 09 07:27:30 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
190357796 ps |
T631 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_wakeup_reset.1626626543 |
|
|
Sep 09 07:27:30 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
118399149 ps |
T632 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_disable_rom_integrity_check.3897015409 |
|
|
Sep 09 07:27:30 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
59537510 ps |
T633 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_smoke.261529372 |
|
|
Sep 09 07:27:30 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
32843910 ps |
T634 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_lowpower_wakeup_race.2636206432 |
|
|
Sep 09 07:27:30 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
210751899 ps |
T635 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset.2588817777 |
|
|
Sep 09 07:27:34 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
66876213 ps |
T636 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_lowpower_wakeup_race.143090035 |
|
|
Sep 09 07:27:16 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
874115224 ps |
T637 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2185419765 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
947852526 ps |
T638 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all.312835194 |
|
|
Sep 09 07:27:30 AM UTC 24 |
Sep 09 07:27:35 AM UTC 24 |
1446843292 ps |
T639 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2340155547 |
|
|
Sep 09 07:27:31 AM UTC 24 |
Sep 09 07:27:36 AM UTC 24 |
956897116 ps |
T640 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_wakeup_race.2499691515 |
|
|
Sep 09 07:27:34 AM UTC 24 |
Sep 09 07:27:36 AM UTC 24 |
354897718 ps |
T641 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/25.pwrmgr_wakeup_reset.100133313 |
|
|
Sep 09 07:26:54 AM UTC 24 |
Sep 09 07:27:36 AM UTC 24 |
247410263 ps |
T157 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_stress_all_with_rand_reset.3824011323 |
|
|
Sep 09 07:27:26 AM UTC 24 |
Sep 09 07:27:36 AM UTC 24 |
3401618849 ps |
T642 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup_reset.4263080140 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:36 AM UTC 24 |
66304627 ps |
T643 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_lowpower_invalid.1195304469 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:37 AM UTC 24 |
83361714 ps |
T644 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_aborted_low_power.3161671496 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:37 AM UTC 24 |
36671713 ps |
T645 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_glitch.4102784350 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:37 AM UTC 24 |
48762754 ps |
T646 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all.3452619040 |
|
|
Sep 09 07:27:32 AM UTC 24 |
Sep 09 07:27:37 AM UTC 24 |
2032776337 ps |
T647 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_wakeup.114980289 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:37 AM UTC 24 |
143797994 ps |
T648 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_stress_all_with_rand_reset.4267835135 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:38 AM UTC 24 |
9598083513 ps |
T649 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_lowpower_invalid.1420198583 |
|
|
Sep 09 07:27:36 AM UTC 24 |
Sep 09 07:27:39 AM UTC 24 |
48392578 ps |
T650 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset.2498496380 |
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|
Sep 09 07:27:36 AM UTC 24 |
Sep 09 07:27:39 AM UTC 24 |
25984924 ps |
T651 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_aborted_low_power.560719146 |
|
|
Sep 09 07:27:37 AM UTC 24 |
Sep 09 07:27:39 AM UTC 24 |
20106041 ps |
T652 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_esc_clk_rst_malfunc.3797652743 |
|
|
Sep 09 07:27:37 AM UTC 24 |
Sep 09 07:27:39 AM UTC 24 |
104064461 ps |
T653 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_smoke.1529835182 |
|
|
Sep 09 07:27:36 AM UTC 24 |
Sep 09 07:27:39 AM UTC 24 |
27843834 ps |
T654 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_reset_invalid.1914814932 |
|
|
Sep 09 07:27:36 AM UTC 24 |
Sep 09 07:27:39 AM UTC 24 |
101058099 ps |
T655 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_global_esc.3789679854 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:39 AM UTC 24 |
33803280 ps |
T656 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup.790007379 |
|
|
Sep 09 07:27:37 AM UTC 24 |
Sep 09 07:27:39 AM UTC 24 |
165167912 ps |
T657 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.767824413 |
|
|
Sep 09 07:27:05 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
33814692 ps |
T658 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_wakeup_race.3010668186 |
|
|
Sep 09 07:27:36 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
263275984 ps |
T659 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_wakeup_reset.4004145190 |
|
|
Sep 09 07:27:37 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
267544009 ps |
T660 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rstmgr_intersig_mubi.3381537377 |
|
|
Sep 09 07:27:37 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
66765082 ps |
T661 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_glitch.3028701599 |
|
|
Sep 09 07:27:38 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
43996543 ps |
T662 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_escalation_timeout.3053253257 |
|
|
Sep 09 07:27:38 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
110051189 ps |
T663 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_disable_rom_integrity_check.200539615 |
|
|
Sep 09 07:27:38 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
61973553 ps |
T664 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_global_esc.315881833 |
|
|
Sep 09 07:27:25 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
87541840 ps |
T665 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_lowpower_invalid.1779084958 |
|
|
Sep 09 07:27:38 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
70493327 ps |
T666 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/28.pwrmgr_smoke.2174817937 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
38095581 ps |
T667 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_esc_clk_rst_malfunc.3706062495 |
|
|
Sep 09 07:27:25 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
29773374 ps |
T668 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_aborted_low_power.4010944025 |
|
|
Sep 09 07:27:25 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
170051008 ps |
T669 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_smoke.3587306560 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
67738158 ps |
T670 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_esc_clk_rst_malfunc.3602182474 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
29393703 ps |
T671 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_global_esc.2672820942 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
31999362 ps |
T672 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.3225844360 |
|
|
Sep 09 07:27:38 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
215146907 ps |
T673 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_glitch.3272521693 |
|
|
Sep 09 07:27:25 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
24133234 ps |
T674 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_disable_rom_integrity_check.1923670841 |
|
|
Sep 09 07:27:25 AM UTC 24 |
Sep 09 07:27:40 AM UTC 24 |
65780843 ps |
T675 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.1405664349 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:41 AM UTC 24 |
166348667 ps |
T676 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.208936535 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:41 AM UTC 24 |
154325727 ps |
T677 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.1678174888 |
|
|
Sep 09 07:27:25 AM UTC 24 |
Sep 09 07:27:41 AM UTC 24 |
185570119 ps |
T678 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_aborted_low_power.1872349609 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:41 AM UTC 24 |
32546471 ps |
T679 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_reset_invalid.87551082 |
|
|
Sep 09 07:27:38 AM UTC 24 |
Sep 09 07:27:41 AM UTC 24 |
104571617 ps |
T158 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/31.pwrmgr_stress_all_with_rand_reset.3648117065 |
|
|
Sep 09 07:27:30 AM UTC 24 |
Sep 09 07:27:41 AM UTC 24 |
3695467992 ps |
T680 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_lowpower_wakeup_race.4029676447 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:41 AM UTC 24 |
355746592 ps |
T681 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4293141565 |
|
|
Sep 09 07:27:37 AM UTC 24 |
Sep 09 07:27:41 AM UTC 24 |
1412985774 ps |
T682 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_wakeup_reset.1028587500 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:41 AM UTC 24 |
345100971 ps |
T683 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2500734706 |
|
|
Sep 09 07:27:25 AM UTC 24 |
Sep 09 07:27:42 AM UTC 24 |
972216628 ps |
T684 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3233819793 |
|
|
Sep 09 07:27:37 AM UTC 24 |
Sep 09 07:27:42 AM UTC 24 |
771603438 ps |
T685 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.477617402 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:42 AM UTC 24 |
1212603278 ps |
T686 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/30.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3861615033 |
|
|
Sep 09 07:27:25 AM UTC 24 |
Sep 09 07:27:42 AM UTC 24 |
1359263902 ps |
T687 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3721012887 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:42 AM UTC 24 |
989759732 ps |
T688 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_disable_rom_integrity_check.3518544813 |
|
|
Sep 09 07:27:41 AM UTC 24 |
Sep 09 07:27:42 AM UTC 24 |
186927315 ps |
T689 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_aborted_low_power.493817347 |
|
|
Sep 09 07:27:40 AM UTC 24 |
Sep 09 07:27:43 AM UTC 24 |
34744259 ps |
T690 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.675596850 |
|
|
Sep 09 07:27:41 AM UTC 24 |
Sep 09 07:27:43 AM UTC 24 |
94729696 ps |
T691 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_smoke.3226878902 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
44595964 ps |
T692 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_invalid.3898023598 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
69370364 ps |
T693 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_smoke.1732619284 |
|
|
Sep 09 07:27:39 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
49251183 ps |
T694 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_glitch.688720532 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
61403450 ps |
T695 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_wakeup_race.2395771319 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
53749712 ps |
T696 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_disable_rom_integrity_check.1591047137 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
88808700 ps |
T697 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup.925799428 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
96909865 ps |
T698 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all.1053172182 |
|
|
Sep 09 07:27:36 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
2551154146 ps |
T699 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.2433238502 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
34642499 ps |
T700 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_escalation_timeout.2372658774 |
|
|
Sep 09 07:27:35 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
294048569 ps |
T701 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup_reset.2870167994 |
|
|
Sep 09 07:27:44 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
468486321 ps |
T702 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_glitch.839162516 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
39810031 ps |
T703 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset.3523314388 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
138936039 ps |
T704 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_aborted_low_power.508526029 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
38843360 ps |
T705 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_global_esc.4113413528 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
31501305 ps |
T706 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_wakeup_reset.603166170 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
524183305 ps |
T707 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset.3827236496 |
|
|
Sep 09 07:27:43 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
40525535 ps |
T708 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_escalation_timeout.271493981 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
623586114 ps |
T709 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_smoke.446964859 |
|
|
Sep 09 07:27:43 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
183118542 ps |
T710 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_lowpower_invalid.3512926158 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
46067586 ps |
T711 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.3150832983 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
105523647 ps |
T712 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_disable_rom_integrity_check.3744744839 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:44 AM UTC 24 |
69480315 ps |
T713 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.60949755 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
245218560 ps |
T714 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all.1325953784 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
3034144835 ps |
T715 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_reset_invalid.3495288595 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
112946528 ps |
T716 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_wakeup.2047751036 |
|
|
Sep 09 07:27:43 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
139989501 ps |
T74 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/33.pwrmgr_stress_all_with_rand_reset.3264620080 |
|
|
Sep 09 07:27:36 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
3716242870 ps |
T717 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_wakeup_race.3095493573 |
|
|
Sep 09 07:27:43 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
247476225 ps |
T718 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all_with_rand_reset.3712963328 |
|
|
Sep 09 07:27:38 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
3912642479 ps |
T719 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2147459859 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
898638776 ps |
T720 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset.404452088 |
|
|
Sep 09 07:27:40 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
69229734 ps |
T721 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_global_esc.152351431 |
|
|
Sep 09 07:27:41 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
50433294 ps |
T722 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.422348376 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
1980525693 ps |
T723 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_glitch.4115529900 |
|
|
Sep 09 07:27:41 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
48015460 ps |
T724 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/24.pwrmgr_stress_all.945517080 |
|
|
Sep 09 07:26:49 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
298476688 ps |
T725 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.3713043817 |
|
|
Sep 09 07:27:41 AM UTC 24 |
Sep 09 07:27:45 AM UTC 24 |
29363099 ps |
T726 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup.1772291810 |
|
|
Sep 09 07:27:40 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
328345808 ps |
T727 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_aborted_low_power.1810613103 |
|
|
Sep 09 07:27:44 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
142300830 ps |
T728 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_escalation_timeout.1405247800 |
|
|
Sep 09 07:27:41 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
197465075 ps |
T729 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/34.pwrmgr_stress_all.3528794206 |
|
|
Sep 09 07:27:39 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
602056252 ps |
T730 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_reset_invalid.1760120889 |
|
|
Sep 09 07:27:41 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
160883098 ps |
T731 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_lowpower_wakeup_race.402170999 |
|
|
Sep 09 07:27:40 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
249484345 ps |
T732 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_wakeup_reset.1865876346 |
|
|
Sep 09 07:27:40 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
188858706 ps |
T733 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.3247935365 |
|
|
Sep 09 07:27:44 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
61404213 ps |
T734 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.4017206527 |
|
|
Sep 09 07:27:41 AM UTC 24 |
Sep 09 07:27:46 AM UTC 24 |
269117972 ps |
T159 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/27.pwrmgr_stress_all_with_rand_reset.1501924294 |
|
|
Sep 09 07:27:15 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
14007649697 ps |
T735 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/32.pwrmgr_stress_all_with_rand_reset.1020224064 |
|
|
Sep 09 07:27:32 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
10313046608 ps |
T736 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_glitch.2081221935 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
42799698 ps |
T737 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_global_esc.579218776 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
54375806 ps |
T738 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all.446145697 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
2895971764 ps |
T739 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2826215379 |
|
|
Sep 09 07:27:40 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
899671078 ps |
T740 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_esc_clk_rst_malfunc.2278288846 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
30935855 ps |
T741 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_escalation_timeout.49445653 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
111835349 ps |
T742 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_disable_rom_integrity_check.3436776398 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
73553519 ps |
T743 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_smoke.4072904263 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
44226565 ps |
T744 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.2513245594 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
310825048 ps |
T745 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_lowpower_invalid.3316917873 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
43004485 ps |
T746 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset.2297247829 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
52012231 ps |
T747 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup_reset.827654542 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
139801264 ps |
T748 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4163409444 |
|
|
Sep 09 07:27:44 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
1259736105 ps |
T749 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all.966379298 |
|
|
Sep 09 07:27:43 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
2186224590 ps |
T750 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_reset_invalid.1743394787 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
108335998 ps |
T751 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_aborted_low_power.3834261689 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
85861924 ps |
T752 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4152400431 |
|
|
Sep 09 07:27:40 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
802264765 ps |
T753 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_global_esc.3931147277 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
194772962 ps |
T754 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_esc_clk_rst_malfunc.2464115701 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
36785362 ps |
T755 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.1726897908 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
276776585 ps |
T756 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_wakeup.3122214357 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:47 AM UTC 24 |
260495668 ps |
T757 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_glitch.1820769320 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:48 AM UTC 24 |
56068285 ps |
T758 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.3131238019 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:48 AM UTC 24 |
138274999 ps |
T759 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_escalation_timeout.4104518034 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:48 AM UTC 24 |
1185880505 ps |
T760 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_disable_rom_integrity_check.818736199 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:48 AM UTC 24 |
72408420 ps |
T761 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_wakeup_race.530546001 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:48 AM UTC 24 |
212059438 ps |
T762 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.824615784 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:48 AM UTC 24 |
123625282 ps |
T763 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2393971701 |
|
|
Sep 09 07:27:44 AM UTC 24 |
Sep 09 07:27:48 AM UTC 24 |
837489533 ps |
T764 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all.2619518910 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:48 AM UTC 24 |
692992285 ps |
T765 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3842407302 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:49 AM UTC 24 |
1619480378 ps |
T766 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/29.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2149555147 |
|
|
Sep 09 07:27:21 AM UTC 24 |
Sep 09 07:27:49 AM UTC 24 |
961215922 ps |
T767 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_smoke.2593532964 |
|
|
Sep 09 07:27:47 AM UTC 24 |
Sep 09 07:27:49 AM UTC 24 |
51870944 ps |
T768 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_lowpower_invalid.841189300 |
|
|
Sep 09 07:27:47 AM UTC 24 |
Sep 09 07:27:49 AM UTC 24 |
137322415 ps |
T769 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_reset_invalid.221745932 |
|
|
Sep 09 07:27:47 AM UTC 24 |
Sep 09 07:27:49 AM UTC 24 |
299844370 ps |
T770 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset.4100476430 |
|
|
Sep 09 07:27:47 AM UTC 24 |
Sep 09 07:27:49 AM UTC 24 |
64660780 ps |
T771 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_wakeup_race.3913807699 |
|
|
Sep 09 07:27:47 AM UTC 24 |
Sep 09 07:27:49 AM UTC 24 |
632476188 ps |
T772 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_global_esc.726374002 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:49 AM UTC 24 |
68547722 ps |
T773 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_invalid.1086611830 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:54 AM UTC 24 |
52137989 ps |
T774 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.3047538794 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:49 AM UTC 24 |
29644741 ps |
T775 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1988434552 |
|
|
Sep 09 07:27:46 AM UTC 24 |
Sep 09 07:27:49 AM UTC 24 |
878779229 ps |
T776 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_aborted_low_power.2662516011 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
85121359 ps |
T777 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_glitch.3552757259 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
60804568 ps |
T778 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.1079805896 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
270007815 ps |
T779 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_disable_rom_integrity_check.4132654499 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
59523897 ps |
T780 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.165875610 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
334218555 ps |
T781 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_lowpower_invalid.3406542475 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
76057519 ps |
T782 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_smoke.87077030 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
30842276 ps |
T783 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup_reset.895208807 |
|
|
Sep 09 07:27:47 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
234973129 ps |
T784 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_escalation_timeout.2252200601 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
202095965 ps |
T785 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_wakeup.2880857881 |
|
|
Sep 09 07:27:47 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
149247652 ps |
T786 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/35.pwrmgr_stress_all_with_rand_reset.1971996446 |
|
|
Sep 09 07:27:42 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
3501403667 ps |
T787 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset.1421615488 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
63329974 ps |
T788 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_wakeup_race.1625820991 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
114464422 ps |
T789 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_reset_invalid.1735658261 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
92942607 ps |
T790 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1926824168 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:50 AM UTC 24 |
1675162847 ps |
T791 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1162305564 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:51 AM UTC 24 |
1197806822 ps |
T792 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.547461414 |
|
|
Sep 09 07:27:49 AM UTC 24 |
Sep 09 07:27:51 AM UTC 24 |
29839460 ps |
T793 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all.1096947448 |
|
|
Sep 09 07:27:47 AM UTC 24 |
Sep 09 07:27:51 AM UTC 24 |
726324464 ps |
T794 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup.750232094 |
|
|
Sep 09 07:27:49 AM UTC 24 |
Sep 09 07:27:51 AM UTC 24 |
241596416 ps |
T795 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_ctrl_config_regwen.552753638 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:51 AM UTC 24 |
160817147 ps |
T796 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all.1388585505 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:52 AM UTC 24 |
970463945 ps |
T797 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_wakeup_reset.1639182675 |
|
|
Sep 09 07:27:49 AM UTC 24 |
Sep 09 07:27:52 AM UTC 24 |
364936675 ps |
T75 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/37.pwrmgr_stress_all_with_rand_reset.3182521667 |
|
|
Sep 09 07:27:45 AM UTC 24 |
Sep 09 07:27:52 AM UTC 24 |
1633899412 ps |
T798 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/39.pwrmgr_stress_all_with_rand_reset.1257537280 |
|
|
Sep 09 07:27:48 AM UTC 24 |
Sep 09 07:27:53 AM UTC 24 |
1604287156 ps |
T799 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_disable_rom_integrity_check.1385138863 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:54 AM UTC 24 |
80653830 ps |
T800 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_glitch.2481279868 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:54 AM UTC 24 |
48261452 ps |
T801 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_invalid.3560511398 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:54 AM UTC 24 |
165108175 ps |
T802 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset_invalid.413857927 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:54 AM UTC 24 |
113815395 ps |
T803 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_glitch.2266375765 |
|
|
Sep 09 07:27:51 AM UTC 24 |
Sep 09 07:27:54 AM UTC 24 |
69398036 ps |
T804 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_global_esc.2222817150 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:54 AM UTC 24 |
51556650 ps |
T805 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_escalation_timeout.1408652643 |
|
|
Sep 09 07:27:51 AM UTC 24 |
Sep 09 07:27:54 AM UTC 24 |
567144057 ps |