| T806 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/36.pwrmgr_stress_all_with_rand_reset.2354831804 |
|
|
Sep 09 07:27:43 AM UTC 24 |
Sep 09 07:28:01 AM UTC 24 |
12203487886 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1032285988 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:28:02 AM UTC 24 |
891072312 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_smoke.2480798681 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:54 AM UTC 24 |
27461807 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_glitch.1234345827 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:54 AM UTC 24 |
42713853 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_disable_rom_integrity_check.797445586 |
|
|
Sep 09 07:27:51 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
64515199 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_aborted_low_power.785727545 |
|
|
Sep 09 07:27:49 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
44942996 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset_invalid.368251277 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
100046009 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup.3070335263 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
65474216 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all_with_rand_reset.244594139 |
|
|
Sep 09 07:27:53 AM UTC 24 |
Sep 09 07:28:08 AM UTC 24 |
4449694400 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_lowpower_invalid.168897017 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
158870694 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.1899157366 |
|
|
Sep 09 07:27:49 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
88817096 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_escalation_timeout.964786288 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
209293369 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_reset.695582103 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
116889640 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.3666946345 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
38840809 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_smoke.668969424 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
54911718 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_disable_rom_integrity_check.878293801 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
94850538 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_global_esc.3742188126 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
131002426 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_esc_clk_rst_malfunc.1750870540 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
38505528 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_reset.2359346793 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
143458051 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_lowpower_wakeup_race.3330991660 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
305486145 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup.3093906528 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
226636677 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_ctrl_config_regwen.1438362103 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
61430163 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_aborted_low_power.870025905 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
110928215 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_reset_invalid.1895314476 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
111887124 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rstmgr_intersig_mubi.3635265546 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
153903014 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_wakeup_reset.3361290855 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
439957491 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_smoke.589696211 |
|
|
Sep 09 07:27:53 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
43721470 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_lowpower_wakeup_race.1544658025 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
317411451 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_global_esc.449987889 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
49954422 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_aborted_low_power.1904271886 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
33906560 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_wakeup_reset.40040818 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
646716538 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_escalation_timeout.2033855054 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
265889264 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset.1184770235 |
|
|
Sep 09 07:27:53 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
53652646 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.2699602240 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:55 AM UTC 24 |
53302192 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.5577650 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:56 AM UTC 24 |
182235054 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/18.pwrmgr_stress_all_with_rand_reset.403985588 |
|
|
Sep 09 07:25:59 AM UTC 24 |
Sep 09 07:27:56 AM UTC 24 |
3113083944 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3526647123 |
|
|
Sep 09 07:27:49 AM UTC 24 |
Sep 09 07:27:56 AM UTC 24 |
948390254 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1650368567 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:56 AM UTC 24 |
2603047994 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/38.pwrmgr_stress_all_with_rand_reset.3490640991 |
|
|
Sep 09 07:27:47 AM UTC 24 |
Sep 09 07:27:56 AM UTC 24 |
1535243957 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3938638559 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:56 AM UTC 24 |
1162577655 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1511686957 |
|
|
Sep 09 07:27:49 AM UTC 24 |
Sep 09 07:27:56 AM UTC 24 |
994283007 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1601567039 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:57 AM UTC 24 |
709169038 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.316285924 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:27:57 AM UTC 24 |
930811711 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/42.pwrmgr_stress_all.3089174631 |
|
|
Sep 09 07:27:53 AM UTC 24 |
Sep 09 07:27:58 AM UTC 24 |
2400737680 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all.3874967588 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:58 AM UTC 24 |
1801623023 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup.3506481229 |
|
|
Sep 09 07:27:53 AM UTC 24 |
Sep 09 07:27:58 AM UTC 24 |
349731909 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_wakeup_race.4285695893 |
|
|
Sep 09 07:27:53 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
290602572 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_escalation_timeout.2780086712 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
492901737 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_glitch.3091223511 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
68022944 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_lowpower_invalid.1802816760 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
50601135 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all.1337730814 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:28:01 AM UTC 24 |
2118492743 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all.3878378323 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:28:02 AM UTC 24 |
1568314878 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_disable_rom_integrity_check.2962885543 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
65594119 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_reset_invalid.1552142808 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
158292529 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_smoke.1711395341 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
28688092 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset.2025770128 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
594898233 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/41.pwrmgr_stress_all_with_rand_reset.1553167436 |
|
|
Sep 09 07:27:52 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
7524748516 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.2132933984 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
62512009 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup.3218817321 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
120040373 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_aborted_low_power.3033607031 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
39346132 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_ctrl_config_regwen.2254846024 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
195726905 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_wakeup_race.3769132806 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
187664208 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.2295329825 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
145470121 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_global_esc.3468828778 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
42236822 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_aborted_low_power.2515172409 |
|
|
Sep 09 07:27:54 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
134480467 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_reset_invalid.851693507 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
119354719 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_glitch.2490292887 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
54312848 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_escalation_timeout.2657404409 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:27:59 AM UTC 24 |
109109377 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_disable_rom_integrity_check.2898714217 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:28:00 AM UTC 24 |
64113075 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_wakeup_reset.555421298 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:28:00 AM UTC 24 |
377009704 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1040962223 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:28:01 AM UTC 24 |
751968104 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2183967502 |
|
|
Sep 09 07:27:54 AM UTC 24 |
Sep 09 07:28:02 AM UTC 24 |
939664837 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/40.pwrmgr_stress_all_with_rand_reset.1806335859 |
|
|
Sep 09 07:27:50 AM UTC 24 |
Sep 09 07:28:08 AM UTC 24 |
10304045529 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_stress_all_with_rand_reset.1871084451 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:28:13 AM UTC 24 |
27877428872 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_global_esc.3524550758 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
67786324 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_invalid.695811093 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
43316821 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_escalation_timeout.3589147975 |
|
|
Sep 09 07:28:16 AM UTC 24 |
Sep 09 07:29:05 AM UTC 24 |
188046114 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_glitch.3613971909 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
57363412 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_escalation_timeout.2611541865 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
385237791 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset_invalid.4237654155 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
116142632 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_disable_rom_integrity_check.1400387846 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
62828964 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_smoke.1551172611 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
33067369 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_ctrl_config_regwen.2527483925 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
181042575 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_aborted_low_power.3256004248 |
|
|
Sep 09 07:28:02 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
20629266 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset.3873012907 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
57078316 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup_reset.1651217511 |
|
|
Sep 09 07:28:02 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
92823965 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_wakeup_race.1013698125 |
|
|
Sep 09 07:28:02 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
86883013 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_lowpower_invalid.246967928 |
|
|
Sep 09 07:27:59 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
63101418 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_smoke.1735921681 |
|
|
Sep 09 07:27:59 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
102794431 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_reset_invalid.3564123215 |
|
|
Sep 09 07:27:59 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
170191050 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_wakeup.2743591039 |
|
|
Sep 09 07:28:02 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
378494849 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_reset.1230186046 |
|
|
Sep 09 07:27:59 AM UTC 24 |
Sep 09 07:28:14 AM UTC 24 |
40744633 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_aborted_low_power.3530412086 |
|
|
Sep 09 07:28:00 AM UTC 24 |
Sep 09 07:28:15 AM UTC 24 |
73687902 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_esc_clk_rst_malfunc.1511104017 |
|
|
Sep 09 07:27:56 AM UTC 24 |
Sep 09 07:28:15 AM UTC 24 |
28753404 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_lowpower_wakeup_race.353083699 |
|
|
Sep 09 07:28:00 AM UTC 24 |
Sep 09 07:28:15 AM UTC 24 |
170633666 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup.3263946498 |
|
|
Sep 09 07:28:00 AM UTC 24 |
Sep 09 07:28:15 AM UTC 24 |
126795471 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_wakeup_reset.2554758231 |
|
|
Sep 09 07:28:00 AM UTC 24 |
Sep 09 07:28:15 AM UTC 24 |
920108541 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.927473085 |
|
|
Sep 09 07:28:02 AM UTC 24 |
Sep 09 07:28:15 AM UTC 24 |
1100758873 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3423056149 |
|
|
Sep 09 07:28:00 AM UTC 24 |
Sep 09 07:28:17 AM UTC 24 |
805034927 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all.3803665908 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:17 AM UTC 24 |
1097593205 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all.2307863353 |
|
|
Sep 09 07:27:59 AM UTC 24 |
Sep 09 07:28:19 AM UTC 24 |
1360958301 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_glitch.3499315100 |
|
|
Sep 09 07:28:17 AM UTC 24 |
Sep 09 07:28:19 AM UTC 24 |
36070814 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_invalid.4271868827 |
|
|
Sep 09 07:28:18 AM UTC 24 |
Sep 09 07:28:19 AM UTC 24 |
75192042 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/44.pwrmgr_lowpower_invalid.1387825350 |
|
|
Sep 09 07:27:57 AM UTC 24 |
Sep 09 07:28:19 AM UTC 24 |
78374561 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_wakeup_reset.3413933391 |
|
|
Sep 09 07:27:54 AM UTC 24 |
Sep 09 07:28:19 AM UTC 24 |
91802485 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_disable_rom_integrity_check.1965218640 |
|
|
Sep 09 07:28:17 AM UTC 24 |
Sep 09 07:28:19 AM UTC 24 |
48436740 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3698065707 |
|
|
Sep 09 07:28:03 AM UTC 24 |
Sep 09 07:28:20 AM UTC 24 |
1346703246 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1172377675 |
|
|
Sep 09 07:27:54 AM UTC 24 |
Sep 09 07:28:21 AM UTC 24 |
1786360672 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/46.pwrmgr_stress_all_with_rand_reset.1282804678 |
|
|
Sep 09 07:28:01 AM UTC 24 |
Sep 09 07:28:22 AM UTC 24 |
11703513845 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_stress_all_with_rand_reset.1212862333 |
|
|
Sep 09 07:27:59 AM UTC 24 |
Sep 09 07:28:23 AM UTC 24 |
6172414649 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_escalation_timeout.4209808367 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:34 AM UTC 24 |
387966251 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup_reset.408176309 |
|
|
Sep 09 07:28:21 AM UTC 24 |
Sep 09 07:28:34 AM UTC 24 |
190827439 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup_reset.193609212 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:34 AM UTC 24 |
446908998 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rstmgr_intersig_mubi.1584295350 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:35 AM UTC 24 |
74838496 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all.1985825725 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:37 AM UTC 24 |
979061130 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_global_esc.951031989 |
|
|
Sep 09 07:28:14 AM UTC 24 |
Sep 09 07:28:38 AM UTC 24 |
25129104 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_smoke.3260146490 |
|
|
Sep 09 07:28:20 AM UTC 24 |
Sep 09 07:28:39 AM UTC 24 |
52898495 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.1700697868 |
|
|
Sep 09 07:28:14 AM UTC 24 |
Sep 09 07:28:39 AM UTC 24 |
137085059 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset.1079437956 |
|
|
Sep 09 07:28:20 AM UTC 24 |
Sep 09 07:28:39 AM UTC 24 |
51469690 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_wakeup.4015329834 |
|
|
Sep 09 07:28:20 AM UTC 24 |
Sep 09 07:28:39 AM UTC 24 |
351786857 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_wakeup_race.2471287443 |
|
|
Sep 09 07:28:20 AM UTC 24 |
Sep 09 07:28:39 AM UTC 24 |
233434874 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.3770636775 |
|
|
Sep 09 07:28:34 AM UTC 24 |
Sep 09 07:28:39 AM UTC 24 |
106590112 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_escalation_timeout.1778319495 |
|
|
Sep 09 07:28:38 AM UTC 24 |
Sep 09 07:28:39 AM UTC 24 |
419289421 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset_invalid.2992957930 |
|
|
Sep 09 07:28:18 AM UTC 24 |
Sep 09 07:28:39 AM UTC 24 |
173059536 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all.2273460725 |
|
|
Sep 09 07:28:20 AM UTC 24 |
Sep 09 07:28:41 AM UTC 24 |
2068042524 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_glitch.2709413405 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:44 AM UTC 24 |
175408873 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_aborted_low_power.1842269882 |
|
|
Sep 09 07:28:21 AM UTC 24 |
Sep 09 07:28:44 AM UTC 24 |
26768987 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_lowpower_invalid.792513203 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
44183611 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_disable_rom_integrity_check.584226683 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
61861168 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_lowpower_wakeup_race.2926272273 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
125335873 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_smoke.2312760591 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
28315141 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_reset_invalid.1490988127 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
244965669 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_reset.2942954565 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
49232766 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_aborted_low_power.1249025027 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
27520807 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_wakeup.205609172 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
282288690 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.2281440491 |
|
|
Sep 09 07:28:35 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
32271649 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all.3580299741 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:46 AM UTC 24 |
1006366366 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2632969343 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:46 AM UTC 24 |
1286114499 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3255605098 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:47 AM UTC 24 |
818218186 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_lowpower_invalid.4056058080 |
|
|
Sep 09 07:28:40 AM UTC 24 |
Sep 09 07:28:48 AM UTC 24 |
85156545 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_disable_rom_integrity_check.70495904 |
|
|
Sep 09 07:28:40 AM UTC 24 |
Sep 09 07:28:48 AM UTC 24 |
58192781 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1881245049 |
|
|
Sep 09 07:28:23 AM UTC 24 |
Sep 09 07:28:50 AM UTC 24 |
760500844 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_stress_all_with_rand_reset.2609516075 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:28:54 AM UTC 24 |
3367063748 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_stress_all_with_rand_reset.3401468820 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:55 AM UTC 24 |
9660488734 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_stress_all_with_rand_reset.3056973680 |
|
|
Sep 09 07:28:20 AM UTC 24 |
Sep 09 07:28:59 AM UTC 24 |
5659626750 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_global_esc.4250392233 |
|
|
Sep 09 07:28:35 AM UTC 24 |
Sep 09 07:29:05 AM UTC 24 |
57999186 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_sec_cm_ctrl_config_regwen.2286648609 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:29:05 AM UTC 24 |
146609451 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.2798852383 |
|
|
Sep 09 07:28:35 AM UTC 24 |
Sep 09 07:29:05 AM UTC 24 |
152960732 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_esc_clk_rst_malfunc.3953253858 |
|
|
Sep 09 07:28:15 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
30717198 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/48.pwrmgr_global_esc.704742865 |
|
|
Sep 09 07:28:16 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
47777766 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_glitch.3618764381 |
|
|
Sep 09 07:28:40 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
53058082 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_reset_invalid.715815885 |
|
|
Sep 09 07:28:40 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
104123502 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/49.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4075720593 |
|
|
Sep 09 07:28:23 AM UTC 24 |
Sep 09 07:29:18 AM UTC 24 |
895277724 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/45.pwrmgr_disable_rom_integrity_check.3111124377 |
|
|
Sep 09 07:27:58 AM UTC 24 |
Sep 09 07:29:47 AM UTC 24 |
50942366 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_esc_clk_rst_malfunc.168432327 |
|
|
Sep 09 07:28:09 AM UTC 24 |
Sep 09 07:29:50 AM UTC 24 |
28320412 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/default/47.pwrmgr_sec_cm_rstmgr_intersig_mubi.3282493254 |
|
|
Sep 09 07:28:09 AM UTC 24 |
Sep 09 07:29:51 AM UTC 24 |
55547635 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_intg_err.3708449464 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:44 AM UTC 24 |
813543414 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_intr_test.4111377677 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
44155709 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_tl_errors.3754566313 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
58068549 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_same_csr_outstanding.380809846 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
111876230 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_rw.1057204045 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
39792464 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.1349709938 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
47990393 ps |
| T53 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.3765257959 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
154851199 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.1705554692 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
24292450 ps |
| T59 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_intr_test.4029893580 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
20403662 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_mem_rw_with_rand_reset.1140142260 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:45 AM UTC 24 |
57860130 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_tl_errors.3696197567 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:46 AM UTC 24 |
86070672 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.633953011 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:28:47 AM UTC 24 |
215787123 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_rw.3515714290 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:28:59 AM UTC 24 |
29069943 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.1904021767 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:28:59 AM UTC 24 |
487329534 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_bit_bash.2869563067 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:00 AM UTC 24 |
1046929806 ps |
| T190 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_intr_test.1422804929 |
|
|
Sep 09 07:29:02 AM UTC 24 |
Sep 09 07:29:04 AM UTC 24 |
23270545 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_csr_rw.2683033405 |
|
|
Sep 09 07:29:02 AM UTC 24 |
Sep 09 07:29:04 AM UTC 24 |
32564080 ps |
| T63 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_tl_errors.2568831686 |
|
|
Sep 09 07:29:07 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
303930175 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_intr_test.416993776 |
|
|
Sep 09 07:28:55 AM UTC 24 |
Sep 09 07:29:04 AM UTC 24 |
50546486 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_csr_rw.1802228857 |
|
|
Sep 09 07:28:55 AM UTC 24 |
Sep 09 07:29:04 AM UTC 24 |
28778584 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_tl_errors.2623194229 |
|
|
Sep 09 07:28:51 AM UTC 24 |
Sep 09 07:29:04 AM UTC 24 |
106180359 ps |
| T62 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_tl_intg_err.3800920740 |
|
|
Sep 09 07:28:55 AM UTC 24 |
Sep 09 07:29:04 AM UTC 24 |
104213261 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_csr_rw.351040992 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:23 AM UTC 24 |
41750837 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_rw.2197758153 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:29:04 AM UTC 24 |
43880033 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_hw_reset.1987976065 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:29:05 AM UTC 24 |
137263931 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.1053180538 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:29:05 AM UTC 24 |
71206670 ps |
| T72 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_errors.815681347 |
|
|
Sep 09 07:28:42 AM UTC 24 |
Sep 09 07:29:05 AM UTC 24 |
129837477 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.2562313366 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:09 AM UTC 24 |
64869745 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_csr_mem_rw_with_rand_reset.1108890527 |
|
|
Sep 09 07:28:51 AM UTC 24 |
Sep 09 07:29:14 AM UTC 24 |
41459262 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_same_csr_outstanding.1406463739 |
|
|
Sep 09 07:28:51 AM UTC 24 |
Sep 09 07:29:14 AM UTC 24 |
373315374 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.2724746601 |
|
|
Sep 09 07:28:42 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
230455259 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.806655942 |
|
|
Sep 09 07:28:42 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
20033502 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_rw.2501954448 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
48988436 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_tl_intg_err.2013523510 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
438058486 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.2801839047 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
41624374 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_intr_test.1741899517 |
|
|
Sep 09 07:28:44 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
27781799 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_tl_errors.1549642587 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:21 AM UTC 24 |
281695550 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_same_csr_outstanding.721026629 |
|
|
Sep 09 07:29:07 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
73694216 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_csr_rw.2155902691 |
|
|
Sep 09 07:29:07 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
45180289 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.3529918918 |
|
|
Sep 09 07:28:42 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
256099128 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.101966091 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:15 AM UTC 24 |
104478056 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_csr_mem_rw_with_rand_reset.1541807010 |
|
|
Sep 09 07:29:01 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
79656814 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.1061545107 |
|
|
Sep 09 07:28:41 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
537308723 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_intr_test.1231978992 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
38429065 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_intr_test.927900315 |
|
|
Sep 09 07:29:07 AM UTC 24 |
Sep 09 07:29:19 AM UTC 24 |
31392071 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_rw.2452282452 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:19 AM UTC 24 |
84977736 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_intr_test.806932246 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:19 AM UTC 24 |
20870379 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_csr_mem_rw_with_rand_reset.584801372 |
|
|
Sep 09 07:29:07 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
64287940 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_same_csr_outstanding.104289911 |
|
|
Sep 09 07:29:04 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
56123043 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.2373805127 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
37429213 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_same_csr_outstanding.1389268565 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
44677958 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.10892440 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
120084714 ps |
| T73 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_tl_errors.3353871599 |
|
|
Sep 09 07:29:11 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
206406742 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/6.pwrmgr_same_csr_outstanding.2506766474 |
|
|
Sep 09 07:28:57 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
21064560 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_csr_mem_rw_with_rand_reset.468151544 |
|
|
Sep 09 07:29:04 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
57906532 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.849787672 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
35267320 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_tl_errors.2118428137 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
27343822 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_tl_intg_err.2375444216 |
|
|
Sep 09 07:29:01 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
466123629 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.2347871804 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:16 AM UTC 24 |
146274238 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.2585871207 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:17 AM UTC 24 |
135440451 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/7.pwrmgr_tl_errors.1300062901 |
|
|
Sep 09 07:29:01 AM UTC 24 |
Sep 09 07:29:17 AM UTC 24 |
232956689 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_tl_errors.3331546014 |
|
|
Sep 09 07:29:04 AM UTC 24 |
Sep 09 07:29:17 AM UTC 24 |
42993757 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.4235934972 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:17 AM UTC 24 |
120375448 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_tl_errors.1480093355 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:18 AM UTC 24 |
49243353 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_csr_rw.3408844145 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:23 AM UTC 24 |
36632748 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.3093453 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:19 AM UTC 24 |
57064408 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_csr_rw.90066413 |
|
|
Sep 09 07:29:07 AM UTC 24 |
Sep 09 07:29:19 AM UTC 24 |
26660300 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.1882230839 |
|
|
Sep 09 07:29:07 AM UTC 24 |
Sep 09 07:29:19 AM UTC 24 |
28166992 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_intr_test.3058809648 |
|
|
Sep 09 07:29:07 AM UTC 24 |
Sep 09 07:29:19 AM UTC 24 |
36494442 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_csr_mem_rw_with_rand_reset.3624422446 |
|
|
Sep 09 07:29:07 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
114293432 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/8.pwrmgr_tl_intg_err.1549426517 |
|
|
Sep 09 07:29:06 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
323456560 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_aliasing.920394541 |
|
|
Sep 09 07:28:47 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
114709958 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_csr_rw.1772523679 |
|
|
Sep 09 07:29:19 AM UTC 24 |
Sep 09 07:29:23 AM UTC 24 |
19229178 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_csr_rw.3731128740 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
23318811 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_intr_test.1974733635 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
48331984 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/9.pwrmgr_tl_intg_err.3986738470 |
|
|
Sep 09 07:29:07 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
104178078 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_csr_rw.1543311082 |
|
|
Sep 09 07:29:15 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
21074544 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/10.pwrmgr_intr_test.3921968201 |
|
|
Sep 09 07:29:15 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
18321471 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_same_csr_outstanding.3750548126 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
76985716 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/11.pwrmgr_csr_mem_rw_with_rand_reset.1969721996 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:20 AM UTC 24 |
42644955 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/12.pwrmgr_tl_intg_err.3583085611 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:21 AM UTC 24 |
1112443544 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.3594346225 |
|
|
Sep 09 07:28:46 AM UTC 24 |
Sep 09 07:29:21 AM UTC 24 |
74481554 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_intr_test.2886090262 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:23 AM UTC 24 |
54069936 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_same_csr_outstanding.3478288945 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:23 AM UTC 24 |
74141218 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/5.pwrmgr_csr_rw.2800801993 |
|
|
Sep 09 07:28:49 AM UTC 24 |
Sep 09 07:29:48 AM UTC 24 |
31026012 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_same_csr_outstanding.3649006437 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:23 AM UTC 24 |
22567568 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_intr_test.1462645785 |
|
|
Sep 09 07:29:22 AM UTC 24 |
Sep 09 07:29:24 AM UTC 24 |
28755310 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_intr_test.3943202353 |
|
|
Sep 09 07:29:19 AM UTC 24 |
Sep 09 07:29:24 AM UTC 24 |
123402402 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/14.pwrmgr_csr_mem_rw_with_rand_reset.959837114 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:24 AM UTC 24 |
114050284 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_csr_mem_rw_with_rand_reset.4256898299 |
|
|
Sep 09 07:29:19 AM UTC 24 |
Sep 09 07:29:24 AM UTC 24 |
56572506 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/16.pwrmgr_csr_rw.2785581263 |
|
|
Sep 09 07:29:22 AM UTC 24 |
Sep 09 07:29:24 AM UTC 24 |
22286724 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/17.pwrmgr_csr_rw.1375749693 |
|
|
Sep 09 07:29:22 AM UTC 24 |
Sep 09 07:29:24 AM UTC 24 |
20451685 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/13.pwrmgr_csr_mem_rw_with_rand_reset.3680864717 |
|
|
Sep 09 07:29:18 AM UTC 24 |
Sep 09 07:29:24 AM UTC 24 |
99182542 ps |
| T1002 |
/workspaces/repo/scratch/os_regression_2024_09_08/pwrmgr-sim-vcs/coverage/cover_reg_top/15.pwrmgr_same_csr_outstanding.4043253879 |
|
|
Sep 09 07:29:19 AM UTC 24 |
Sep 09 07:29:24 AM UTC 24 |
292813355 ps |